From 6d9b82d085ea810c7bb2ed5203522e45cc72c336 Mon Sep 17 00:00:00 2001 From: Ashish Kumar Date: Thu, 31 Aug 2017 16:12:53 +0530 Subject: armv8: ls1088a: Add NXP LS1088A SoC support LS1088A is compliant with the Layerscape Chassis Generation 3 with eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4 SDRAM memory controller with ECC, Data path acceleration architecture 2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs), QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc. Signed-off-by: Alison Wang Signed-off-by: Prabhakar Kushwaha Signed-off-by: Ashish Kumar Signed-off-by: Raghav Dogra Signed-off-by: Shaohui Xie [YS: Revised commit message] Reviewed-by: York Sun --- drivers/ddr/fsl/util.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/ddr/fsl/util.c') diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index 0a305b36b8b..d6e6e78de32 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -390,7 +390,7 @@ void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl, void remove_unused_controllers(fsl_ddr_info_t *info) { -#ifdef CONFIG_FSL_LSCH3 +#ifdef CONFIG_SYS_FSL_HAS_CCN504 int i; u64 nodeid; void *hnf_sam_ctrl = (void *)(CCI_HN_F_0_BASE + CCN_HN_F_SAM_CTL); -- cgit v1.2.3