From aa6e94deabb45154cea07ad44c4a5c047bca078b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:37 -0500 Subject: global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- drivers/ddr/fsl/arm_ddr_gen3.c | 2 +- drivers/ddr/fsl/fsl_ddr_gen4.c | 2 +- drivers/ddr/fsl/main.c | 2 +- drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/ddr/fsl') diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c index 5e8fb7a89c2..9dada5e1175 100644 --- a/drivers/ddr/fsl/arm_ddr_gen3.c +++ b/drivers/ddr/fsl/arm_ddr_gen3.c @@ -130,7 +130,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if (is_warm_boot()) { ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); - ddr_out32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE); + ddr_out32(&ddr->init_addr, CFG_SYS_SDRAM_BASE); ddr_out32(&ddr->init_ext_addr, DDR_INIT_ADDR_EXT_UIA); /* DRAM VRef will not be trained */ diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 3c1f7a18912..f8d1468a26f 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -230,7 +230,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if (is_warm_boot()) { ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); - ddr_out32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE); + ddr_out32(&ddr->init_addr, CFG_SYS_SDRAM_BASE); ddr_out32(&ddr->init_ext_addr, DDR_INIT_ADDR_EXT_UIA); /* DRAM VRef will not be trained */ diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index fcff223b4f0..4975dbb821e 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -30,7 +30,7 @@ */ #ifndef CFG_SYS_FSL_DDR_SDRAM_BASE_PHY #ifdef CONFIG_MPC83xx -#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CFG_SYS_SDRAM_BASE #else #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CONFIG_SYS_DDR_SDRAM_BASE #endif diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index 0f2dc243cb8..1c4a1cae4df 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -162,7 +162,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if (is_warm_boot()) { out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); - out_be32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE); + out_be32(&ddr->init_addr, CFG_SYS_SDRAM_BASE); out_be32(&ddr->init_ext_addr, DDR_INIT_ADDR_EXT_UIA); /* DRAM VRef will not be trained */ -- cgit v1.2.3 From 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:41 -0500 Subject: global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- drivers/ddr/fsl/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/ddr/fsl') diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 4975dbb821e..cd332718b64 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -22,7 +22,7 @@ /* * CFG_SYS_FSL_DDR_SDRAM_BASE_PHY is the physical address from the view - * of DDR controllers. It is the same as CONFIG_SYS_DDR_SDRAM_BASE for + * of DDR controllers. It is the same as CFG_SYS_DDR_SDRAM_BASE for * all Power SoCs. But it could be different for ARM SoCs. For example, * fsl_lsch3 has a mapping mechanism to map DDR memory to ranges (in order) of * 0x00_8000_0000 ~ 0x00_ffff_ffff @@ -32,7 +32,7 @@ #ifdef CONFIG_MPC83xx #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CFG_SYS_SDRAM_BASE #else -#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY CFG_SYS_DDR_SDRAM_BASE #endif #endif -- cgit v1.2.3 From 829e9d223657f5779668bb7a46e902a85e09b664 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:35 -0500 Subject: ddr: fsl: Remove CONFIG_MEM_INIT_VALUE The way all of the memory init code here works is that we pass 0xDEADBEEF around for the initial value (as it's a well known 'poison' value and so easily recognized in debuggers, etc). The only point of this CONFIG symbol was to pass in a different value for that purpose. Drop this symbol and cleanup the code slightly. Signed-off-by: Tom Rini --- drivers/ddr/fsl/ctrl_regs.c | 17 ++--------------- drivers/ddr/fsl/mpc85xx_ddr_gen1.c | 2 +- 2 files changed, 3 insertions(+), 16 deletions(-) (limited to 'drivers/ddr/fsl') diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index df7ec484651..759921bc582 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -938,7 +938,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) /* Use the DDR controller to auto initialize memory. */ d_init = popts->ecc_init_using_memctl; - ddr->ddr_data_init = CONFIG_MEM_INIT_VALUE; + ddr->ddr_data_init = 0xDEADBEEF; debug("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init); #else /* Memory will be initialized via DMA, or not at all. */ @@ -1842,19 +1842,6 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, } #endif -/* DDR SDRAM Data Initialization (DDR_DATA_INIT) */ -static void set_ddr_data_init(fsl_ddr_cfg_regs_t *ddr) -{ - unsigned int init_value; /* Initialization value */ - -#ifdef CONFIG_MEM_INIT_VALUE - init_value = CONFIG_MEM_INIT_VALUE; -#else - init_value = 0xDEADBEEF; -#endif - ddr->ddr_data_init = init_value; -} - /* * DDR SDRAM Clock Control (DDR_SDRAM_CLK_CNTL) * The old controller on the 8540/60 doesn't have this register. @@ -2537,7 +2524,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, set_ddr_sdram_rcw(ctrl_num, ddr, popts, common_dimm); set_ddr_sdram_interval(ctrl_num, ddr, popts, common_dimm); - set_ddr_data_init(ddr); + ddr->ddr_data_init = 0xDEADBEEF; set_ddr_sdram_clk_cntl(ddr, popts); set_ddr_init_addr(ddr); set_ddr_init_ext_addr(ddr); diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index 0f1e99eeb03..16186bdbae7 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -73,7 +73,7 @@ ddr_enable_ecc(unsigned int dram_size) struct ccsr_ddr __iomem *ddr = (struct ccsr_ddr __iomem *)(CFG_SYS_FSL_DDR_ADDR); - dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size); + dma_meminit(dram_size); /* * Enable errors for ECC. -- cgit v1.2.3 From 1d457dbb9151f50176f7548d00ed37e13dc81e00 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:50 -0500 Subject: global: Migrate CONFIG_MAX_MEM_MAPPED to CFG Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini --- drivers/ddr/fsl/util.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/ddr/fsl') diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index e49cf6e8e3d..60051392e71 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -139,10 +139,10 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, } #if !defined(CONFIG_PHYS_64BIT) - if (base >= CONFIG_MAX_MEM_MAPPED) + if (base >= CFG_MAX_MEM_MAPPED) return; - if ((base + size) >= CONFIG_MAX_MEM_MAPPED) - size = CONFIG_MAX_MEM_MAPPED - base; + if ((base + size) >= CFG_MAX_MEM_MAPPED) + size = CFG_MAX_MEM_MAPPED - base; #endif if (set_ddr_laws(base, size, law_memctl) < 0) { printf("%s: ERROR (ctrl #%d, TRGT ID=%x)\n", __func__, ctrl_num, -- cgit v1.2.3