From 88db55b054768238ac48170d684303123733d709 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 2 Dec 2023 02:48:00 +0100 Subject: ddr: imx: Handle 3734 in addition to 3733 and 3732 MTps rates The new MX8M DDR tool 3.31 now generates a programming file which uses data rate 3734 instead of 3733 or 3732 . Handle another rounding option . Signed-off-by: Marek Vasut Reviewed-by: Fabio Estevam --- drivers/ddr/imx/phy/ddrphy_utils.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/ddr/imx/phy/ddrphy_utils.c') diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c index fd8b4113b7b..d5dac0fce92 100644 --- a/drivers/ddr/imx/phy/ddrphy_utils.c +++ b/drivers/ddr/imx/phy/ddrphy_utils.c @@ -111,6 +111,7 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(1000)); dram_disable_bypass(); break; + case 3734: case 3733: case 3732: dram_pll_init(MHZ(933)); -- cgit v1.2.3 From 41b0f3454b2241ee323d7d10ef168199c8ca4f60 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 2 Dec 2023 02:48:40 +0100 Subject: ddr: imx: Add 3600 MTps rate support Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps PLL setting, except the divider is not 9 but 8 . Signed-off-by: Marek Vasut Reviewed-by: Fabio Estevam --- drivers/ddr/imx/phy/ddrphy_utils.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/ddr/imx/phy/ddrphy_utils.c') diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c index d5dac0fce92..45e1a70dbd4 100644 --- a/drivers/ddr/imx/phy/ddrphy_utils.c +++ b/drivers/ddr/imx/phy/ddrphy_utils.c @@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(933)); dram_disable_bypass(); break; + case 3600: + dram_pll_init(MHZ(900)); + dram_disable_bypass(); + break; case 3200: dram_pll_init(MHZ(800)); dram_disable_bypass(); -- cgit v1.2.3