From 8e81e679db3248f2b3c34aee5302cd15a8283293 Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Fri, 28 Apr 2023 12:08:43 +0800 Subject: ddr: imx93: update the ddr init to support mult setpoints Update the DDR init flow for multi-setpoint support on i.MX93. A new fsp_cfg struct need to be added in the timing file to store the diff part of the DDRC and DRAM MR register for each setpoint. Signed-off-by: Jacky Bai Reviewed-by: Ye Li Signed-off-by: Peng Fan --- drivers/ddr/imx/phy/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers/ddr/imx/phy/helper.c') diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c index e9e0294f87d..8cd438791e5 100644 --- a/drivers/ddr/imx/phy/helper.c +++ b/drivers/ddr/imx/phy/helper.c @@ -167,8 +167,7 @@ void ddrphy_trained_csr_save(struct dram_cfg_param *ddrphy_csr, dwc_ddrphy_apb_wr(0xd0000, 0x1); } -void dram_config_save(struct dram_timing_info *timing_info, - unsigned long saved_timing_base) +void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved_timing_base) { int i = 0; struct dram_timing_info *saved_timing = (struct dram_timing_info *)saved_timing_base; @@ -217,4 +216,6 @@ void dram_config_save(struct dram_timing_info *timing_info, cfg->val = timing_info->ddrphy_pie[i].val; cfg++; } + + return (void *)cfg; } -- cgit v1.2.3