From a267943fd95bc5b077e02b3d266ee538a1973946 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 19 Feb 2021 17:11:23 +0100 Subject: ddr: marvell: a38x: import code change from upstream MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit commit 2bdd12dd68b1f8e27a03a3443ae49a09a14c18e4 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes code in ddr3_training.c. Import this change to remain consistent with upstream. Signed-off-by: Marek Behún Tested-by: Chris Packham --- drivers/ddr/marvell/a38x/ddr3_training.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/ddr/marvell/a38x/ddr3_training.c') diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c index 34cc1709103..0358f6287a8 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training.c +++ b/drivers/ddr/marvell/a38x/ddr3_training.c @@ -143,6 +143,7 @@ static struct reg_data odpg_default_value[] = { {0x15a4, 0x0, MASK_ALL_BITS}, {0x15a8, 0x0, MASK_ALL_BITS}, {0x15ac, 0x0, MASK_ALL_BITS}, + {0x1600, 0x0, MASK_ALL_BITS}, {0x1604, 0x0, MASK_ALL_BITS}, {0x1608, 0x0, MASK_ALL_BITS}, {0x160c, 0x0, MASK_ALL_BITS}, @@ -1569,6 +1570,8 @@ int ddr3_tip_freq_set(u32 dev_num, enum hws_access_type access_type, val = ((cl_mask_table[cl_value] & 0x1) << 2) | ((cl_mask_table[cl_value] & 0xe) << 3); + cs_mask[0] = 0xc; + CHECK_STATUS(ddr3_tip_write_mrs_cmd(dev_num, cs_mask, MR_CMD0, val, (0x7 << 4) | (0x1 << 2))); -- cgit v1.2.3 From 2f0c18b1584129d8386f5a18390996f6bea78065 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 19 Feb 2021 17:11:26 +0100 Subject: ddr: marvell: a38x: fix comment in conditional macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The code was processed with unifdef utility to omit portions not relevant to A38x and DDR3. This removes usage of many macros, including A70X0, A80X0 and A3900. It seems that the unifdef utility did not remove the macros from #else comment. Signed-off-by: Marek Behún Tested-by: Chris Packham --- drivers/ddr/marvell/a38x/ddr3_training.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/ddr/marvell/a38x/ddr3_training.c') diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c index 0358f6287a8..2b3af23202b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training.c +++ b/drivers/ddr/marvell/a38x/ddr3_training.c @@ -219,7 +219,7 @@ static int ddr3_tip_pad_inv(void) DDR_PHY_CONTROL, PHY_CTRL_PHY_REG, data, data); -#else /* !CONFIG_ARMADA_38X && !CONFIG_ARMADA_39X && !A70X0 && !A80X0 && !A3900 */ +#else /* !CONFIG_ARMADA_38X && !CONFIG_ARMADA_39X */ #pragma message "unknown platform to configure ddr clock swap" #endif } -- cgit v1.2.3