From 0c8620d2ffe1440165156c7a0d95424c7eabe60b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:02 +0200 Subject: bsec: update after MISC u-class update Since the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered"); The misc bsec driver need to be adapted to reflect the number of transferred bytes. Signed-off-by: Patrick Delaunay --- drivers/misc/stm32mp_fuse.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) (limited to 'drivers/misc/stm32mp_fuse.c') diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index 801d946b773..a1a27d148a9 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -20,7 +20,7 @@ */ int fuse_read(u32 bank, u32 word, u32 *val) { - int ret = 0; + int ret; struct udevice *dev; switch (bank) { @@ -32,9 +32,10 @@ int fuse_read(u32 bank, u32 word, u32 *val) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -67,9 +68,10 @@ int fuse_prog(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -100,9 +102,10 @@ int fuse_sense(u32 bank, u32 word, u32 *val) if (ret) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -135,9 +138,10 @@ int fuse_override(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 -- cgit v1.2.3