From db5741f7a85ec3ee79b64496172afaa7dc2cb225 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Fri, 8 Nov 2019 10:38:20 +0800 Subject: arm: socfpga: Convert system manager from struct to defines Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- drivers/mmc/socfpga_dw_mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index 739c1629a27..df9e8ccb1e1 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -20,8 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; static const struct socfpga_clock_manager *clock_manager_base = (void *)SOCFPGA_CLKMGR_ADDRESS; -static const struct socfpga_system_manager *system_manager_base = - (void *)SOCFPGA_SYSMGR_ADDRESS; struct socfpga_dwmci_plat { struct mmc_config cfg; @@ -61,10 +59,10 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host) debug("%s: drvsel %d smplsel %d\n", __func__, priv->drvsel, priv->smplsel); - writel(sdmmc_mask, &system_manager_base->sdmmcgrp_ctrl); + writel(sdmmc_mask, socfpga_get_sysmgr_addr() + SYSMGR_SDMMC); debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, - readl(&system_manager_base->sdmmcgrp_ctrl)); + readl(socfpga_get_sysmgr_addr() + SYSMGR_SDMMC)); /* Enable SDMMC clock */ setbits_le32(&clock_manager_base->per_pll.en, -- cgit v1.2.3