From ee31be429ba4be734fcb7bcb037d38afc82cc052 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Mon, 24 Oct 2022 16:53:28 -0500 Subject: ram: k3-ddrss: add auto-generated macros for am62a support The new 32bit DDR controller for TI's am62a family of SoCs shares much of the same functionality with the existing 16bit (am64) and 32bit (j721e) controllers, so this patch reorganizes the existing auto-generated macros for the 16bit and 32bit controllers to make room for the macros for the am62a's controller This patch consists mostly of header/macro renames and additions with a new Kconfig option (K3_AM62A_DDRSS) allowing us to select these new macros during compilation. Signed-off-by: Bryan Brattlof --- drivers/ram/k3-ddrss/lpddr4_obj_if.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers/ram/k3-ddrss/lpddr4_obj_if.h') diff --git a/drivers/ram/k3-ddrss/lpddr4_obj_if.h b/drivers/ram/k3-ddrss/lpddr4_obj_if.h index d538e61b747..b1bbb5cc1a7 100644 --- a/drivers/ram/k3-ddrss/lpddr4_obj_if.h +++ b/drivers/ram/k3-ddrss/lpddr4_obj_if.h @@ -2,8 +2,8 @@ /* * Cadence DDR Driver * - * Copyright (C) 2012-2021 Cadence Design Systems, Inc. - * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2012-2022 Cadence Design Systems, Inc. + * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef lpddr4_obj_if_h @@ -79,6 +79,8 @@ typedef struct lpddr4_obj_s { u32 (*setrefreshrate)(const lpddr4_privatedata *pd, const lpddr4_ctlfspnum *fspnum, const u32 *tref, const u32 *tras_max); u32 (*refreshperchipselect)(const lpddr4_privatedata *pd, const u32 trefinterval); + + u32 (*deferredregverify)(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regvalues[], u16 regnum[], u16 regcount); } lpddr4_obj; extern lpddr4_obj *lpddr4_getinstance(void); -- cgit v1.2.3