From b0f4ba02421d8e9d87a505e4381b9d6677ee3465 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 11 Dec 2020 17:05:56 +0100 Subject: mips: octeon: Misc changes required because of the newly added headers With the newly added headers and their restructuring (which macro is defined where), some changes in the already existing Octeon files are necessary. This patch makes the necessary changes. Signed-off-by: Stefan Roese --- drivers/ram/octeon/octeon_ddr.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'drivers/ram/octeon/octeon_ddr.c') diff --git a/drivers/ram/octeon/octeon_ddr.c b/drivers/ram/octeon/octeon_ddr.c index 1f75dc15fa0..e7b61d39f5c 100644 --- a/drivers/ram/octeon/octeon_ddr.c +++ b/drivers/ram/octeon/octeon_ddr.c @@ -145,7 +145,7 @@ static void cvmx_l2c_set_big_size(struct ddr_priv *priv, u64 mem_size, int mode) big_ctl.u64 = 0; big_ctl.s.maxdram = bits - 9; big_ctl.cn61xx.disable = mode; - l2c_wr(priv, CVMX_L2C_BIG_CTL, big_ctl.u64); + l2c_wr(priv, CVMX_L2C_BIG_CTL_REL, big_ctl.u64); } } @@ -2274,15 +2274,15 @@ static int octeon_ddr_initialize(struct ddr_priv *priv, u32 cpu_hertz, printf("Disabling L2 ECC based on disable_l2_ecc environment variable\n"); union cvmx_l2c_ctl l2c_val; - l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL); + l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL_REL); l2c_val.s.disecc = 1; - l2c_wr(priv, CVMX_L2C_CTL, l2c_val.u64); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_val.u64); } else { union cvmx_l2c_ctl l2c_val; - l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL); + l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL_REL); l2c_val.s.disecc = 0; - l2c_wr(priv, CVMX_L2C_CTL, l2c_val.u64); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_val.u64); } /* @@ -2295,17 +2295,17 @@ static int octeon_ddr_initialize(struct ddr_priv *priv, u32 cpu_hertz, puts("L2 index aliasing disabled.\n"); - l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL); + l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL_REL); l2c_val.s.disidxalias = 1; - l2c_wr(priv, CVMX_L2C_CTL, l2c_val.u64); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_val.u64); } else { union cvmx_l2c_ctl l2c_val; /* Enable L2C index aliasing */ - l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL); + l2c_val.u64 = l2c_rd(priv, CVMX_L2C_CTL_REL); l2c_val.s.disidxalias = 0; - l2c_wr(priv, CVMX_L2C_CTL, l2c_val.u64); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_val.u64); } if (OCTEON_IS_OCTEON3()) { @@ -2321,7 +2321,7 @@ static int octeon_ddr_initialize(struct ddr_priv *priv, u32 cpu_hertz, u64 rdf_cnt; char *s; - l2c_ctl.u64 = l2c_rd(priv, CVMX_L2C_CTL); + l2c_ctl.u64 = l2c_rd(priv, CVMX_L2C_CTL_REL); /* * It is more convenient to compute the ratio using clock @@ -2338,7 +2338,7 @@ static int octeon_ddr_initialize(struct ddr_priv *priv, u32 cpu_hertz, debug("%-45s : %d, cpu_hertz:%d, ddr_hertz:%d\n", "EARLY FILL COUNT ", l2c_ctl.cn78xx.rdf_cnt, cpu_hertz, ddr_hertz); - l2c_wr(priv, CVMX_L2C_CTL, l2c_ctl.u64); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_ctl.u64); } /* Check for lower DIMM socket populated */ -- cgit v1.2.3