From 37c07c5b1ff89a75581a236d1536b0584d2f74c0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
Date: Sat, 18 Feb 2017 19:46:32 +0100
Subject: rockchip: rk3188: Add sysreset driver

Driver for the sysreset of Rockchip rk3188 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
---
 drivers/sysreset/sysreset_rk3188.c | 47 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_rk3188.c

(limited to 'drivers/sysreset/sysreset_rk3188.c')

diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c
new file mode 100644
index 00000000000..36ae47600a5
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3188.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3188.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3188_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3188_sysreset = {
+	.request	= rk3188_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3188) = {
+	.name	= "rk3188_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3188_sysreset,
+};
-- 
cgit v1.2.3