From 7084f34d0fc0f9ca5fadc2e86d0c397fa859a832 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 24 Oct 2023 10:49:03 +0300 Subject: sysreset: tegra: create arch specific sysreset driver Tegra uses built in Power Management Controller (PMC) to perform CPU reset. Code to perform this was located in mach-tegra, so lest create DM driver to handle this. Signed-off-by: Svyatoslav Ryhel --- drivers/sysreset/sysreset_tegra.c | 45 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 drivers/sysreset/sysreset_tegra.c (limited to 'drivers/sysreset/sysreset_tegra.c') diff --git a/drivers/sysreset/sysreset_tegra.c b/drivers/sysreset/sysreset_tegra.c new file mode 100644 index 00000000000..10bcd3a1873 --- /dev/null +++ b/drivers/sysreset/sysreset_tegra.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright(C) 2023 Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include + +static int tegra_sysreset_request(struct udevice *dev, + enum sysreset_t type) +{ + u32 value; + + switch (type) { + case SYSRESET_WARM: + case SYSRESET_COLD: + /* resets everything but scratch 0 and reset status */ + value = tegra_pmc_readl(PMC_CNTRL); + value |= PMC_CNTRL_MAIN_RST; + tegra_pmc_writel(value, PMC_CNTRL); + break; + default: + return -EPROTONOSUPPORT; + } + + return -EINPROGRESS; +} + +static struct sysreset_ops tegra_sysreset = { + .request = tegra_sysreset_request, +}; + +U_BOOT_DRIVER(sysreset_tegra) = { + .id = UCLASS_SYSRESET, + .name = "sysreset_tegra", + .ops = &tegra_sysreset, +}; + +/* Link to Tegra PMC once there is a driver */ +U_BOOT_DRVINFO(sysreset_tegra) = { + .name = "sysreset_tegra" +}; -- cgit v1.2.3