From c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76 Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 11 Sep 2014 13:32:07 -0700 Subject: board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun CC: Alison Wang --- include/configs/ls1021aqds.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/configs/ls1021aqds.h') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 657e3b6d48..bb47813345 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -49,10 +49,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ +#define CONFIG_SYS_DDR_RAW_TIMING +#endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -- cgit v1.2.3