From 9f9f0093730f91d95cb8e9546155ae6a3286159e Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 19 Mar 2015 09:30:29 -0700 Subject: driver/ddr/fsl: Add workaround for DDR erratum A008511 This erratum only applies to general purpose DDR controllers in LS2. It shouldn't be applied to DP-DDR controller. Check DDRC versoin number before applying workaround. Signed-off-by: York Sun --- include/fsl_ddr_sdram.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/fsl_ddr_sdram.h') diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 095b33e29ee..6358b6f3a27 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -155,6 +155,8 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define MD_CNTL_CKE_CNTL_HIGH 0x00200000 #define MD_CNTL_WRCW 0x00080000 #define MD_CNTL_MD_VALUE(x) (x & 0x0000FFFF) +#define MD_CNTL_CS_SEL(x) (((x) & 0x7) << 28) +#define MD_CNTL_MD_SEL(x) (((x) & 0xf) << 24) /* DDR_CDR1 */ #define DDR_CDR1_DHC_EN 0x80000000 -- cgit v1.2.3 From 7288c2c2b0d4ea2475424ef9d00227a4b608234d Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 20 Mar 2015 19:28:23 -0700 Subject: armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun Signed-off-by: Prabhakar Kushwaha Signed-off-by: Bhupesh Sharma --- include/fsl_ddr_sdram.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/fsl_ddr_sdram.h') diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 6358b6f3a27..e5b6e03c8fd 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -167,6 +167,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define DDR_CDR2_ODT(x) (x & DDR_CDR2_ODT_MASK) #define DDR_CDR2_VREF_OVRD(x) (0x00008080 | ((((x) - 37) & 0x3F) << 8)) #define DDR_CDR2_VREF_TRAIN_EN 0x00000080 +#define DDR_CDR2_VREF_RANGE_2 0x00000040 #if (defined(CONFIG_SYS_FSL_DDR_VER) && \ (CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7)) -- cgit v1.2.3