1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
|
/*
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <command.h>
#include <asm/processor.h>
#include <pci.h>
void show_reset_reg(void)
{
unsigned long reg;
/* read clock regsiter */
printf("===== Display reset and initialize register Start =========\n");
mfcpr(clk_pllc,reg);
printf("cpr_pllc = %#010lx\n",reg);
mfcpr(clk_plld,reg);
printf("cpr_plld = %#010lx\n",reg);
mfcpr(clk_primad,reg);
printf("cpr_primad = %#010lx\n",reg);
mfcpr(clk_primbd,reg);
printf("cpr_primbd = %#010lx\n",reg);
mfcpr(clk_opbd,reg);
printf("cpr_opbd = %#010lx\n",reg);
mfcpr(clk_perd,reg);
printf("cpr_perd = %#010lx\n",reg);
mfcpr(clk_mald,reg);
printf("cpr_mald = %#010lx\n",reg);
/* read sdr register */
mfsdr(sdr_ebc,reg);
printf("sdr_ebc = %#010lx\n",reg);
mfsdr(sdr_cp440,reg);
printf("sdr_cp440 = %#010lx\n",reg);
mfsdr(sdr_xcr,reg);
printf("sdr_xcr = %#010lx\n",reg);
mfsdr(sdr_xpllc,reg);
printf("sdr_xpllc = %#010lx\n",reg);
mfsdr(sdr_xplld,reg);
printf("sdr_xplld = %#010lx\n",reg);
mfsdr(sdr_pfc0,reg);
printf("sdr_pfc0 = %#010lx\n",reg);
mfsdr(sdr_pfc1,reg);
printf("sdr_pfc1 = %#010lx\n",reg);
mfsdr(sdr_cust0,reg);
printf("sdr_cust0 = %#010lx\n",reg);
mfsdr(sdr_cust1,reg);
printf("sdr_cust1 = %#010lx\n",reg);
mfsdr(sdr_uart0,reg);
printf("sdr_uart0 = %#010lx\n",reg);
mfsdr(sdr_uart1,reg);
printf("sdr_uart1 = %#010lx\n",reg);
printf("===== Display reset and initialize register End =========\n");
}
void show_xbridge_info(void)
{
unsigned long reg;
printf("PCI-X chip control registers\n");
mfsdr(sdr_xcr, reg);
printf("sdr_xcr = %#010lx\n", reg);
mfsdr(sdr_xpllc, reg);
printf("sdr_xpllc = %#010lx\n", reg);
mfsdr(sdr_xplld, reg);
printf("sdr_xplld = %#010lx\n", reg);
printf("PCI-X Bridge Configure registers\n");
printf("PCIX0_VENDID = %#06x\n", in16r(PCIX0_VENDID));
printf("PCIX0_DEVID = %#06x\n", in16r(PCIX0_DEVID));
printf("PCIX0_CMD = %#06x\n", in16r(PCIX0_CMD));
printf("PCIX0_STATUS = %#06x\n", in16r(PCIX0_STATUS));
printf("PCIX0_REVID = %#04x\n", in8(PCIX0_REVID));
printf("PCIX0_CACHELS = %#04x\n", in8(PCIX0_CACHELS));
printf("PCIX0_LATTIM = %#04x\n", in8(PCIX0_LATTIM));
printf("PCIX0_HDTYPE = %#04x\n", in8(PCIX0_HDTYPE));
printf("PCIX0_BIST = %#04x\n", in8(PCIX0_BIST));
printf("PCIX0_BAR0 = %#010lx\n", in32r(PCIX0_BAR0));
printf("PCIX0_BAR1 = %#010lx\n", in32r(PCIX0_BAR1));
printf("PCIX0_BAR2 = %#010lx\n", in32r(PCIX0_BAR2));
printf("PCIX0_BAR3 = %#010lx\n", in32r(PCIX0_BAR3));
printf("PCIX0_BAR4 = %#010lx\n", in32r(PCIX0_BAR4));
printf("PCIX0_BAR5 = %#010lx\n", in32r(PCIX0_BAR5));
printf("PCIX0_CISPTR = %#010lx\n", in32r(PCIX0_CISPTR));
printf("PCIX0_SBSSYSVID = %#010x\n", in16r(PCIX0_SBSYSVID));
printf("PCIX0_SBSSYSID = %#010x\n", in16r(PCIX0_SBSYSID));
printf("PCIX0_EROMBA = %#010lx\n", in32r(PCIX0_EROMBA));
printf("PCIX0_CAP = %#04x\n", in8(PCIX0_CAP));
printf("PCIX0_INTLN = %#04x\n", in8(PCIX0_INTLN));
printf("PCIX0_INTPN = %#04x\n", in8(PCIX0_INTPN));
printf("PCIX0_MINGNT = %#04x\n", in8(PCIX0_MINGNT));
printf("PCIX0_MAXLTNCY = %#04x\n", in8(PCIX0_MAXLTNCY));
printf("PCIX0_BRDGOPT1 = %#010lx\n", in32r(PCIX0_BRDGOPT1));
printf("PCIX0_BRDGOPT2 = %#010lx\n", in32r(PCIX0_BRDGOPT2));
printf("PCIX0_POM0LAL = %#010lx\n", in32r(PCIX0_POM0LAL));
printf("PCIX0_POM0LAH = %#010lx\n", in32r(PCIX0_POM0LAH));
printf("PCIX0_POM0SA = %#010lx\n", in32r(PCIX0_POM0SA));
printf("PCIX0_POM0PCILAL = %#010lx\n", in32r(PCIX0_POM0PCIAL));
printf("PCIX0_POM0PCILAH = %#010lx\n", in32r(PCIX0_POM0PCIAH));
printf("PCIX0_POM1LAL = %#010lx\n", in32r(PCIX0_POM1LAL));
printf("PCIX0_POM1LAH = %#010lx\n", in32r(PCIX0_POM1LAH));
printf("PCIX0_POM1SA = %#010lx\n", in32r(PCIX0_POM1SA));
printf("PCIX0_POM1PCILAL = %#010lx\n", in32r(PCIX0_POM1PCIAL));
printf("PCIX0_POM1PCILAH = %#010lx\n", in32r(PCIX0_POM1PCIAH));
printf("PCIX0_POM2SA = %#010lx\n", in32r(PCIX0_POM2SA));
printf("PCIX0_PIM0SA = %#010lx\n", in32r(PCIX0_PIM0SA));
printf("PCIX0_PIM0LAL = %#010lx\n", in32r(PCIX0_PIM0LAL));
printf("PCIX0_PIM0LAH = %#010lx\n", in32r(PCIX0_PIM0LAH));
printf("PCIX0_PIM1SA = %#010lx\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM1LAL = %#010lx\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM1LAH = %#010lx\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_PIM2SA = %#010lx\n", in32r(PCIX0_PIM1SA));
printf("PCIX0_PIM2LAL = %#010lx\n", in32r(PCIX0_PIM1LAL));
printf("PCIX0_PIM2LAH = %#010lx\n", in32r(PCIX0_PIM1LAH));
printf("PCIX0_XSTS = %#010lx\n", in32r(PCIX0_STS));
}
int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
show_xbridge_info();
return 0;
}
U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info,
"Show PCIX bridge info", "");
#define TAISHAN_PCI_DEV_ID0 0x800
#define TAISHAN_PCI_DEV_ID1 0x1000
void show_pcix_device_info(void)
{
int ii;
int dev;
u8 capp;
u8 xcapid;
u16 status;
u16 xcommand;
u32 xstatus;
for (ii = 0; ii < 2; ii++) {
if (ii == 0)
dev = TAISHAN_PCI_DEV_ID0;
else
dev = TAISHAN_PCI_DEV_ID1;
pci_read_config_word(dev, PCI_STATUS, &status);
if (status & PCI_STATUS_CAP_LIST) {
pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &capp);
pci_read_config_byte(dev, (int)(capp), &xcapid);
if (xcapid == 0x07) {
pci_read_config_word(dev, (int)(capp + 2),
&xcommand);
pci_read_config_dword(dev, (int)(capp + 4),
&xstatus);
printf("BUS0 dev%d Xcommand=%#06x,Xstatus=%#010x\n",
(ii + 1), xcommand, xstatus);
} else {
printf("BUS0 dev%d PCI-X CAP ID error,"
"CAP=%#04x,XCAPID=%#04x\n",
(ii + 1), capp, xcapid);
}
} else {
printf("BUS0 dev%d not found PCI_STATUS_CAP_LIST supporting\n",
ii + 1);
}
}
}
int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc,
char *argv[])
{
show_pcix_device_info();
return 0;
}
U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info,
"Show PCIX Device info", "");
extern void show_reset_reg(void);
int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
show_reset_reg();
return 0;
}
U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info,
"Show Reset REG info", "");
|
