1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
|
/*
* (C) Copyright 2008
* ATMEL Corporation.
*
* Rick Bronson <rick@efn.org>
*
* Configuation settings for the AT91SAM9260EK board.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
/* ARM asynchronous clock */
#define AT91C_MASTER_CLOCK 132096000 /* peripheral clock */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
#define CFG_HZ 1000
#define CONFIG_AT91SAM9260EK 1 /* on an AT91SAM9260EK Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
/* define this to include the functionality of boot.bin in u-boot */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (3*CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CONFIG_BAUDRATE 115200
/*
* Hardware drivers
*/
/* define one of these to choose the DBGU, USART0 or USART1 as console */
#define CONFIG_DBGU 1
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
#define BOARD_LATE_INIT 1
#define CONFIG_COMMANDS \
((CONFIG_CMD_DFL | \
CFG_CMD_NET | \
CFG_CMD_PING | \
CFG_CMD_ENV | \
CFG_CMD_USB | \
CFG_CMD_FLASH | \
CFG_CMD_NAND | \
CFG_CMD_AUTOSCRIPT | \
CFG_CMD_FAT ) & \
~(CFG_CMD_BDI | \
CFG_CMD_IMLS | \
CFG_CMD_IMI | \
CFG_CMD_FPGA | \
CFG_CMD_MISC | \
CFG_CMD_LOADS))
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#define NAND_MAX_CHIPS 1 /* Max number of NAND devices */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CFG_NAND_BASE 0x40000000
#define CONFIG_NEW_NAND_CODE
#define ADDR_COLUMN 1
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3
#define NAND_ChipID_UNKNOWN 0
#define NAND_MAX_FLOORS 1
#undef CFG_NAND_WP
/* These timings are specific to MT29F2G16AAB 256Mb (Micron)
* at MCK = 100 MHZ
*/
#define AT91C_SM_NWE_SETUP (2 << 0)
#define AT91C_SM_NCS_WR_SETUP (0 << 8)
#define AT91C_SM_NRD_SETUP (2 << 16)
#define AT91C_SM_NCS_RD_SETUP (0 << 24)
#define AT91C_SM_NWE_PULSE (4 << 0)
#define AT91C_SM_NCS_WR_PULSE (4 << 8)
#define AT91C_SM_NRD_PULSE (4 << 16)
#define AT91C_SM_NCS_RD_PULSE (4 << 24)
#define AT91C_SM_NWE_CYCLE (7 << 0)
#define AT91C_SM_NRD_CYCLE (7 << 16)
#define AT91C_SM_TDF (3 << 16)
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */
#define CFG_MEMTEST_START PHYS_SDRAM
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
#define CONFIG_DRIVER_ETHER 1
#define CONFIG_AT91C_USE_RMII 1
#define AT91C_PHY_ADDR 0
#define AT91C_ETH_TIMEOUT 120000
#define CONFIG_NET_RETRY_COUNT 5000
#define CONFIG_TFTP_TIMEOUT 2500
#define CONFIG_HAS_DATAFLASH 1
#define CFG_SPI_WRITE_TOUT (50*CFG_HZ)
/* AC Characteristics */
/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
#define DATAFLASH_TCSS (0x22 << 16)
#define DATAFLASH_TCHS (0x1 << 24)
#define CFG_MAX_DATAFLASH_BANKS 2
#define CFG_MAX_DATAFLASH_PAGES 16384
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
#define CFG_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* Logical adress for CS1 */
#define CFG_NO_FLASH 1
#define PHYS_FLASH_1 0x10000000
#define PHYS_FLASH_SIZE 0x800000 /* 2 megs main flash */
#define CFG_FLASH_BASE PHYS_FLASH_1
#define CFG_MAX_FLASH_BANKS 1
#define CFG_MAX_FLASH_SECT 256
#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
#ifdef CFG_ENV_IS_IN_NAND
#define CFG_ENV_OFFSET 0x60000 /* environment starts here */
#define CFG_ENV_OFFSET_REDUND 0x80000 /* redundant environment starts here */
#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128kB */
#endif
#ifdef CFG_ENV_IS_IN_DATAFLASH
#define CFG_ENV_OFFSET 0x4000
#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET)
#define CFG_ENV_SIZE 0x4000 /* 0x8000 */
#endif
#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
#endif
/* Add USB stuff */
#define CONFIG_USB_OHCI 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
#define LITTLEENDIAN 1
#define CFG_LOAD_ADDR 0x23f00000 /* default load address */
#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
#define CFG_CONSOLE_IS_SERIAL
#undef CFG_CONSOLE_IS_LCD
#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#ifndef __ASSEMBLY__
/*-----------------------------------------------------------------------
* Board specific extension for bd_info
*
* This structure is embedded in the global bd_info (bd_t) structure
* and can be used by the board specific code (eg board/...)
*/
struct bd_info_ext {
/* helper variable for board environment handling
*
* env_crc_valid == 0 => uninitialised
* env_crc_valid > 0 => environment crc in flash is valid
* env_crc_valid < 0 => environment crc in flash is invalid
*/
int env_crc_valid;
};
#endif
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif
#endif
|