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path: root/arch/riscv/kernel
AgeCommit message (Expand)Author
2022-04-15riscv module: remove (NOLOAD)Fangrui Song
2022-04-15riscv: Fix fill_callchain return valueNikita Shubin
2022-03-16riscv: Fix auipc+jalr relocation range checksEmil Renner Berthing
2022-01-20perf: Protect perf_guest_cbs with RCUSean Christopherson
2021-09-26drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()Thomas Gleixner
2021-05-22riscv: Workaround mcount name prior to clang-13Nathan Chancellor
2021-05-19RISC-V: Fix error code returned by riscv_hartid_to_cpuid()Anup Patel
2021-04-16riscv,entry: fix misaligned base for excp_vect_tableZihao Yu
2021-01-27riscv: Fix kernel time_init()Damien Le Moal
2020-11-18riscv: Set text_offset correctly for M-ModeSean Anderson
2020-10-01RISC-V: Take text_mutex in ftrace_init_nop()Palmer Dabbelt
2020-06-30RISC-V: Don't allow write+exec only page mapping request in mmapYash Shah
2020-06-03riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang
2020-05-20riscv: fix vdso build with lldIlie Halip
2020-03-25riscv: avoid the PIC offset of static percpu data in module beyond 2G limitsVincent Chen
2020-02-05riscv: delete temporary filesIlie Halip
2020-01-14riscv: Implement copy_thread_tlsAmanieu d'Antras
2020-01-09riscv: ftrace: correct the condition logic in function graph tracerZong Li
2019-10-28riscv: for C functions called only from assembly, mark with __visiblePaul Walmsley
2019-10-28riscv: fp: add missing __user pointer annotationsPaul Walmsley
2019-10-28riscv: add missing header file includesPaul Walmsley
2019-10-28riscv: mark some code and data as file-staticPaul Walmsley
2019-10-28riscv: add prototypes for assembly language functions from head.SPaul Walmsley
2019-10-25riscv: cleanup do_trap_breakChristoph Hellwig
2019-10-14riscv: remove the switch statement in do_trap_break()Vincent Chen
2019-10-09RISC-V: entry: Remove unneeded need_resched() loopValentin Schneider
2019-10-07riscv: Correct the handling of unexpected ebreak in do_trap_break()Vincent Chen
2019-10-07riscv: avoid sending a SIGTRAP to a user thread trapped in WARN()Vincent Chen
2019-10-07riscv: avoid kernel hangs when trapped in BUG()Vincent Chen
2019-10-01RISC-V: Clear load reservations while restoring hart contextsPalmer Dabbelt
2019-09-20riscv: Avoid interrupts being erroneously enabled in handle_exception()Vincent Chen
2019-09-20RISC-V: Export kernel symbols for kvmAtish Patra
2019-09-20arch/riscv: disable excess harts before picking main boot hartXiang Wang
2019-09-16Merge tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds
2019-09-16Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds
2019-09-13riscv: modify the Image header to improve compatibility with the ARM64 headerPaul Walmsley
2019-09-05riscv: cleanup riscv_cpuid_to_hartid_maskChristoph Hellwig
2019-09-05riscv: optimize send_ipi_singleChristoph Hellwig
2019-09-05riscv: cleanup send_ipi_maskChristoph Hellwig
2019-09-05riscv: refactor the IPI codeChristoph Hellwig
2019-09-05riscv: Add support for perf registers samplingMao Han
2019-09-04riscv: Add perf callchain supportMao Han
2019-08-30riscv: Using CSR numbers to access CSRsBin Meng
2019-08-30Merge tag 'common/for-v5.4-rc1/cpu-topology' into for-v5.4-rc1-branchPaul Walmsley
2019-08-14riscv: Correct the initialized flow of FP registerVincent Chen
2019-08-14Merge tag 'common/for-v5.4-rc1/cpu-topology' of git://git.kernel.org/pub/scm/...Will Deacon
2019-07-31riscv: Fix perf record without libelf supportMao Han
2019-07-22RISC-V: Parse cpu topology during boot.Atish Patra
2019-07-18Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds
2019-07-11RISC-V: Add an Image header that boot loader can parse.Atish Patra