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Move bus-width property to *main.dtsi, above the OTAP/ITAP
delay values. While there is no error with where it is
currently at, it is easier to read the MMC node if the
bus-width property is located above the OTAP/ITAP delay
values consistently across MMC nodes.
Add missing bus-width DTS property for sdchi2 in k3-am62-main.
Signed-off-by: Judith Mendez <jm@ti.com>
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Move ti,clkbuf-sel property above the OTAP/ITAP delay values.
While there is no error with where it is currently at, it is
easier to read the MMC node if ti,clkbuf-sel is located above
the OTAP/ITAP delay values consistently across MMC nodes.
Add missing ti,clkbuf-sel DTS property for sdhci0 in k3-am64-main.
Signed-off-by: Judith Mendez <jm@ti.com>
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Remove DLL properties which are not applicable for soft PHYs
since these PHYs do not have a DLL to enable.
Signed-off-by: Judith Mendez <jm@ti.com>
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Update MMC OTAP/ITAP values according to the datasheet
[0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2.
[0] https://www.ti.com/lit/ds/symlink/am62p.pdf
Signed-off-by: Judith Mendez <jm@ti.com>
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Update MMC0/MMC1 OTAP/ITAP delay values according to the
datasheet [0], refer to Table 7-79 for MMC0 and Table 7-97
for MMC1.
[0] https://www.ti.com/lit/ds/symlink/am62a7.pdf
Signed-off-by: Judith Mendez <jm@ti.com>
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Update MMC0/MMC1 OTAP/ITAP values according to the datasheet
[0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1.
Move ITAPDLY values after OTAPDLY values to make MMC
nodes more uniform across devices.
[0] https://www.ti.com/lit/ds/symlink/am6442.pdf
Signed-off-by: Judith Mendez <jm@ti.com>
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Add sdhci2 DT node in k3-am62a-main for mmc2. Add otap/itap
values according to the datasheet[0], Refer to Table 7-97.
[0] https://www.ti.com/lit/ds/symlink/am62a3.pdf
Signed-off-by: Judith Mendez <jm@ti.com>
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commit d36ad81d25a99 ("board: ti: common: add rtc setup to common folder")
I had mistakenly copied over the gpio debounce configuration into the
external 32k rtc crystal setup. Unfortunately this causing issues with
the DSP on the AM62Ax SoC family.
Because we have no need to configure debounce on our SK boards, let's
just rip this out for now.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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Nothing much has changed between the versions of the emif output. Some
changes to the PHY_PAD_CAL_IO_CFG_0, PHY PAD RST DRIVE, and
PHY_CAL_CLK_SELECT_0 should add some minor stability improvements.
Nonetheless, update to the latest characterization developments.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The fixup_memory_node() does no change in AM64, AM62A and AM62P when
ECC is not enabled. Instead, it causes an issue of fixing up the RAM
size as 2GB instead of 4GB and 8GB for AM62A and AM62P because the
fix up is done by the R5 SPL and R5 being a 32-bit processor, the
gd->bd->bi_dram[bank].start and gd->bd->bi_dram[bank].size values are
restricted to 32-bits. So, remove the fixup_memory_node() from
spl_perform_fixups() in AM64, AM62A and AM62P's evm files.
Fixes: 410888e38c7e ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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On AM69 board, build image was going beyond wrt defined
offsets.
So increasing offset for eMMC and OSPI boot. Along with
update in corresponding device tree.
Cc: Neha Francis <n-francis@ti.com>
Cc: Vaishnav Achath <vaishnav.a@ti.com>
Cc: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Beleswar Padhi <b-padhi@ti.com>
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OSPI boot was broken due to wrong pairing of DMA
Fixes: 61ea32c0eb0c ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Cc: MD Danish Anwar <danishanwar@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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AVS driver was getting probed with base device tree, which
leads i2c of derivative board (AM68) in bad state.
Moving AVS probe after detection of right device tree.
Fixes: eaa184009775 ("arm: k3: j721s2: Enable AVS")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Cc: Manorit Chawdhry <m-chawdhry@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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The output from the emif tool hasn't changed for a while now, however
there is still a difference from what we use.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The output from the emif tool hasn't changes in a long while however
there are some differences. Update to these latest settings.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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After a little debugging on the am62px some of these values will need to
be changed. Update to these new values to improve stability at higher IO
voltages.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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After a little bit of debugging and characterization at different IO
voltages, some of these values will need to change. Update to these
latest settings to improve stability at higher IO voltages.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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I do not think the R5 SPL will initialize non static variables (I didn't
find and evidence of it) so we want to ensure this is a constant.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The AM64x and some of the AM62xx family of devices use the same 16b
controller though only the AM64x is limited to 2GB addressable.
Annoyingly the address alias detection machinery defaults to the full
8GB for the AM64x. Reset this value to 2GB only if we're initializin DDR
on an am64x device
Signed-off-by: Bryan Brattlof <bb@ti.com>
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When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
fw_storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Enable ICSSG driver, DP83869 phy driver, REMOTEPROC and PRU_REMOTEPROC
in am64x_evm_a53_defconfig. All these configs are needed for ICSSG
driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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ICSSG1 provides dual Gigabit Ethernet support.
Add ICSSG1 ethernet node to am64x device tree.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs)
to manage/generate Industrial Ethernet functions such as time stamping.
Each IEP sub-module is sourced from an internal clock mux that can be
derived from either of the IP instance's ICSSG_IEP_GCLK or from another
internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG
instances. The IEP clock is currently configured to be derived
indirectly from the ICSSG_ICLK running at 250 MHz.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add support for AM64x by adding it's compatible in pruss driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add support for AM64x PRU cores by adding compatibles for AM64x.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
fw_storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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When CONFIG_TI_ICSSG_PRUETH is enabled, add config name check for the
icssg2 overlay in board_fit_config_match() API.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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We want SPL to apply DTB overlays (e.g. ICSSG2 overlay) so enable
SPL_LOAD_FIT_APPLY_OVERLAY.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Enable ICSSG driver in am65x_evm_a53_defconfig
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add ICSSG2 overlay and configuration to tispl and u-boot images.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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ICSSG2 provides dual Gigabit Ethernet support.
Add ICSSG2 ethernet node to an overlay k3-am654-icssg2.dts
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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The ICSSG IP on AM65x SoCs have two Industrial Ethernet Peripherals (IEPs)
to manage/generate Industrial Ethernet functions such as time stamping.
Each IEP sub-module is sourced from an internal clock mux that can be
sourced from either of the IP instance's ICSSG_IEP_GCLK or ICSSG_ICLK.
Add the IEP nodes for all the ICSSG instances.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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There are a few missing registers ranges in the udmap nodes
need to properly setup DMA for the am65x.
A fix has been added to the Linux kernel [0] to add these ranges and
merged. To keep DMA operational until the next DT sync from Linux, these
ranges were added to the *-u-boot.dtsi in the upstream u-boot [1].
Porting these DMA changes to ti-u-boot as these are needed for ICSSG
Ethernet driver to work.
And additional config register was added to the ringacc node in upstream
u-boot as part of DT sync from linux 6.7-rc1 [2]. Porting those changes
as well to ti-u-boot as those are also needed for ICSSG Ethernet driver to
work.
[0] https://lore.kernel.org/r/20231213135138.929517-2-vigneshr@ti.com
[1] https://source.denx.de/u-boot/u-boot/-/commit/5e00547e583f6d4349f3908d3491bf6ce0a8818c
[2] https://source.denx.de/u-boot/u-boot/-/commit/4dbdc84754ea2ad392ef7328da6d429cd8fd3c0a
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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The binding represents the MDIO controller as a child device tree
node of the MAC device tree node.
The U-Boot driver mostly ignores that child device tree node and just
hardcodes the resources it uses to support both the MAC and MDIO in a
single driver.
However, some resources like pinctrl muxing states are thus ignored.
This has been a problem with some device trees that will put some
pinctrl states on the MDIO device tree node.
Let's rework the driver a bit to create a dummy MDIO driver that we will
then get during our initialization to force the core to select the right
muxing.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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ICSSG firmware supports FDB commands. Add support to send FDB commands
from driver. Once rx_flow_id is obtained from dma, let firmware know that
we are using this rx_flow_id by sending a FDB command.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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This is the PURSS Ethernet driver for TI AM654 Sr2.0 and laterSoCs with
the ICSSG PRU Sub-system running EMAC firmware. This driver caters to
either of the slices of the icssg subsystem.
One and exactly one of the slices is supported as the u-boot ethernet
supports probing one interface at a time.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add icssg_queue.c file. This file introduces macros and APIs related to
ICSSG queues. These will be used by ICSSG Ethernet driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add icssg_config.h / .c and icssg_classifier.c files. These are firmware
configuration and classification related files. Add MII helper APIs and
MACROs. These APIs and MACROs will be later used by ICSSG Ethernet driver.
Also introduce icssg_prueth.h which has definition of prueth related
structures.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add firmware interface related headers and macros for ICSSG Ethernet
driver. These macros will be later used by the ICSSG ethernet driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Add APIs to set a firmware_name to a rproc and boot the rproc with the
same firmware.
Clients can call rproc_set_firmware() API to set firmware_name for a rproc
whereas rproc_boot() will load the firmware set by rproc_set_firmware() to
a buffer by calling request_firmware_into_buf(). rproc_boot() will then
load the firmware file to the remote processor and start the remote
processor.
Also include "fs-loader.h" and make remoteproc driver select FS_LOADER in
Kconfig so that we can call request_firmware_into_buf() from remoteproc
driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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The fs-loader driver reads env storage_interface and uses it to load
firmware file into memory using the medium set by env. Update the driver
to use env fw_storage_interface as this variable is only used to load
firmwares. This is to keep all variables used by fs-loader driver with
'fw_' prefix. All other variables have 'fw_' prefix except for
storage_interface.
The env storage_interface will act as fallback so that the
existing implementations do not break.
Also update the FS Loader documentation accordingly.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Use ring_idx to pair rings. ring_idx will be same as tx flow_id for all
non-negative flow_ids. For negative flow_ids, ring_idx will be tchan->id
added with bchan_cnt.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
latest changes added in the K3 Resource Partitioning Tool.
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
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Add config fragment to enable USB MSC boot.
USB Host boot is supported only from USB0 port. By default USB0
is configured in peripheral mode to support DFU. Inorder to support
USB Host boot, "dr_mode" property needs to be changed from "peripheral"
to "host" in the device tree.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
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Add config fragment to enable USB DFU support
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
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Update the USB0, USB1 nodes and enable them.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
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USB1 controller on J722S and AM62P are from different vendors.
Redefine the USB1 node description for J722S by deleting the
node inherited from AM62P dtsi.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
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Add SERDES0 and its wrapper description to support USB3
and SGMII interfaces.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
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Enable CONFIG_BOARD_HAS_32K_RTC_CRYSTAL to enable 32k crystal.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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Currently, the rtc clock is being set to 32552 instead of exact 32k.
Enable the 32k crystal and setup debounce conf registers by invoking
board_rtc_init call so that rtc clock is set accurately to 32768.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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