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authorHiago De Franco <hiago.franco@toradex.com>2025-05-28 09:53:50 -0300
committerHiago De Franco <hiago.franco@toradex.com>2025-05-28 10:03:25 -0300
commit006d2ab73e0580d0d8558ee0b360311b5e727595 (patch)
tree91d4dd650798789e4ba5b84b9c14afda482c82fe
parent66266d278b740d5e35c94f2f354a40b995832ae4 (diff)
verdin-am62p: panel-cap-touch-{10|7}inch-dsi: use same timings used by Aquilatoradex_ti-linux-6.6.y
Use the same timings previously used by Aquila boards, using the common display dtsi files. This will solve some flickering that is current happening with the AM62P and the Riverdi displays. With that, update the bridge lvds in/out node names to use the same naming scheme across Aquila AM69 and Verdin AM62P. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
-rw-r--r--overlays/verdin-am62p_panel-cap-touch-10inch-dsi_overlay.dts50
-rw-r--r--overlays/verdin-am62p_panel-cap-touch-7inch-dsi_overlay.dts50
2 files changed, 32 insertions, 68 deletions
diff --git a/overlays/verdin-am62p_panel-cap-touch-10inch-dsi_overlay.dts b/overlays/verdin-am62p_panel-cap-touch-10inch-dsi_overlay.dts
index cf7ecda..88e43b2 100644
--- a/overlays/verdin-am62p_panel-cap-touch-10inch-dsi_overlay.dts
+++ b/overlays/verdin-am62p_panel-cap-touch-10inch-dsi_overlay.dts
@@ -15,6 +15,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
+#include "display-rvt101hvdwc00b_overlay.dtsi"
+
/ {
compatible = "toradex,verdin-am62p";
};
@@ -32,36 +34,6 @@
/* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
pwms = <&epwm0 1 6666667 0>;
};
-
- panel-lvds {
- compatible = "panel-lvds";
- backlight = <&backlight_verdin_dsi>;
- data-mapping = "vesa-24";
- height-mm = <136>;
- width-mm = <217>;
-
- panel-timing {
- clock-frequency = <68900000 71100000 73400000>;
- de-active = <1>;
- hactive = <1280 1280 1280>;
- hback-porch = <88 88 88>;
- hfront-porch = <12 72 132>;
- hsync-active = <0>;
- hsync-len = <1 5 40>;
- pixelclk-active = <1>;
- vactive = <800 800 800>;
- vback-porch = <23 23 23>;
- vfront-porch = <1 15 49>;
- vsync-active = <0>;
- vsync-len = <1 10 20>;
- };
-
- port {
- panel_rvt101hvdnwc00b_in: endpoint {
- remote-endpoint = <&bridge_lvds_out>;
- };
- };
- };
};
&dphy_tx0 {
@@ -77,7 +49,7 @@
reg = <0>;
soc_dsi0_out: endpoint {
- remote-endpoint = <&bridge_dsi_in>;
+ remote-endpoint = <&dsi_lvds_bridge_in>;
};
};
@@ -134,7 +106,7 @@
port@0 {
reg = <0>;
- bridge_dsi_in: endpoint {
+ dsi_lvds_bridge_in: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&soc_dsi0_out>;
};
@@ -143,8 +115,8 @@
port@2 {
reg = <2>;
- bridge_lvds_out: endpoint {
- remote-endpoint = <&panel_rvt101hvdnwc00b_in>;
+ dsi_lvds_bridge_out: endpoint {
+ remote-endpoint = <&panel_in_rvt101hvdwc00>;
};
};
};
@@ -162,3 +134,13 @@
reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
};
};
+
+&panel_rvt101hvdwc00 {
+ backlight = <&backlight_verdin_dsi>;
+
+ port {
+ panel_in_rvt101hvdwc00: endpoint {
+ remote-endpoint = <&dsi_lvds_bridge_out>;
+ };
+ };
+};
diff --git a/overlays/verdin-am62p_panel-cap-touch-7inch-dsi_overlay.dts b/overlays/verdin-am62p_panel-cap-touch-7inch-dsi_overlay.dts
index 42a2716..24126f6 100644
--- a/overlays/verdin-am62p_panel-cap-touch-7inch-dsi_overlay.dts
+++ b/overlays/verdin-am62p_panel-cap-touch-7inch-dsi_overlay.dts
@@ -14,6 +14,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
+#include "display-rvt70hslnwca0_overlay.dtsi"
+
/ {
compatible = "toradex,verdin-am62p";
};
@@ -31,36 +33,6 @@
/* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
pwms = <&epwm0 1 6666667 0>;
};
-
- panel-lvds {
- compatible = "panel-lvds";
- backlight = <&backlight_verdin_dsi>;
- data-mapping = "vesa-24";
- height-mm = <86>;
- width-mm = <154>;
-
- panel-timing {
- clock-frequency = <40800000 51200000 67200000>;
- de-active = <1>;
- hactive = <1024>;
- hback-porch = <160 160 160>;
- hfront-porch = <16 160 216>;
- hsync-active = <0>;
- hsync-len = <1 5 140>;
- pixelclk-active = <1>;
- vactive = <600>;
- vback-porch = <23 23 23>;
- vfront-porch = <1 12 126>;
- vsync-active = <0>;
- vsync-len = <1 10 20>;
- };
-
- port {
- panel_rvt70hslnwca0_in: endpoint {
- remote-endpoint = <&bridge_lvds_out>;
- };
- };
- };
};
&dphy_tx0 {
@@ -76,7 +48,7 @@
reg = <0>;
soc_dsi0_out: endpoint {
- remote-endpoint = <&bridge_dsi_in>;
+ remote-endpoint = <&dsi_lvds_bridge_in>;
};
};
@@ -133,7 +105,7 @@
port@0 {
reg = <0>;
- bridge_dsi_in: endpoint {
+ dsi_lvds_bridge_in: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&soc_dsi0_out>;
};
@@ -142,8 +114,8 @@
port@2 {
reg = <2>;
- bridge_lvds_out: endpoint {
- remote-endpoint = <&panel_rvt70hslnwca0_in>;
+ dsi_lvds_bridge_out: endpoint {
+ remote-endpoint = <&panel_in_rvt70hslnwca0>;
};
};
};
@@ -161,3 +133,13 @@
reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
};
};
+
+&panel_rvt70hslnwca0 {
+ backlight = <&backlight_verdin_dsi>;
+
+ port {
+ panel_in_rvt70hslnwca0: endpoint {
+ remote-endpoint = <&dsi_lvds_bridge_out>;
+ };
+ };
+};