diff options
| author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | 2014-06-06 01:45:09 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-06-06 10:52:46 +0100 |
| commit | 01d7aafb3fbaafe2403780ef9ed497b3289ab1b9 (patch) | |
| tree | 822fc44ae1a02faa2f5994c1a4c6b89ddd666ef0 | |
| parent | 69e25c755722056b57892bebeb1892e3a6fe8774 (diff) | |
spi/pxa2xx: change default supported DMA burst size to 1
This is to fix the SPI DMA transfer failure for speed less than 1M.
If using current DMA burst size setting (16), the Rx data bytes are
invalid due to each data byte is multiplied according to the burst
size setting.
Let's said supposedly we shall receive the following 18 bytes of data:
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18
Instead, the data bytes received consist of "16 bytes of '01' +
2 bytes of '02'" :
01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 02 02
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
| -rw-r--r-- | drivers/spi/spi-pxa2xx-dma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c index f6759dc0153b..c41ff148a2b4 100644 --- a/drivers/spi/spi-pxa2xx-dma.c +++ b/drivers/spi/spi-pxa2xx-dma.c @@ -368,7 +368,7 @@ int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip, * otherwise we use the default. Also we use the default FIFO * thresholds for now. */ - *burst_code = chip_info ? chip_info->dma_burst_size : 16; + *burst_code = chip_info ? chip_info->dma_burst_size : 1; *threshold = SSCR1_RxTresh(RX_THRESH_DFLT) | SSCR1_TxTresh(TX_THRESH_DFLT); |