arm: tegra: Change voice call samplerate

Voice call samplerate is set to 16k.
Codec register setting calls are moved to libaudio
SRmode is set for vdac use case.

Change-Id: Ie602fe45f0a078da2eebddc3bda0740c2f04787f
Reviewed-on: http://git-master/r/50184
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

2 files changed, 31 insertions, 186 deletions

diff --git a/sound/soc/tegra/tegra_soc.h b/sound/soc/tegra/tegra_soc.h
index 68e74183a409..586625796283 100644
--- a/sound/soc/tegra/tegra_soc.h
+++ b/sound/soc/tegra/tegra_soc.h
@@ -72,10 +72,8 @@
 #define I2S2_CLK 		2000000
 #define TEGRA_DEFAULT_SR	44100
 
-#define TEGRA_SAMPLE_RATES \
-	(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
-	SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
-#define TEGRA_VOICE_SAMPLE_RATES SNDRV_PCM_RATE_8000
+#define TEGRA_SAMPLE_RATES (SNDRV_PCM_RATE_8000_96000)
+#define TEGRA_VOICE_SAMPLE_RATES SNDRV_PCM_RATE_16000
 
 #define DMA_STEP_SIZE_MIN 8
 #define DMA_REQ_QCOUNT 2
diff --git a/sound/soc/tegra/tegra_soc_wm8753.c b/sound/soc/tegra/tegra_soc_wm8753.c
index 980aa3c2c947..6f8ee0a40064 100644
--- a/sound/soc/tegra/tegra_soc_wm8753.c
+++ b/sound/soc/tegra/tegra_soc_wm8753.c
@@ -38,78 +38,9 @@
 #include <linux/delay.h>
 #include <linux/workqueue.h>
 
-#define WM8753_PWR1_VMIDSEL_1		1<<8
-#define WM8753_PWR1_VMIDSEL_0		1<<7
-#define WM8753_PWR1_VREF		1<<6
-#define WM8753_PWR1_MICB		1<<5
-#define WM8753_PWR1_DACL		1<<3
-#define WM8753_PWR1_DACR		1<<2
-
-#define WM8753_PWR2_MICAMP1EN		1<<8
-#define WM8753_PWR2_MICAMP2EN		1<<7
-#define WM8753_PWR2_ALCMIX		1<<6
-#define WM8753_PWR2_PGAL		1<<5
-#define WM8753_PWR2_PGAR		1<<4
-#define WM8753_PWR2_ADCL		1<<3
-#define WM8753_PWR2_ADCR		1<<2
-#define WM8753_PWR2_RXMIX		1<<1
-#define WM8753_PWR2_LINEMIX		1<<0
-
-#define WM8753_PWR3_LOUT1		1<<8
-#define WM8753_PWR3_ROUT1		1<<7
-#define WM8753_PWR3_LOUT2		1<<6
-#define WM8753_PWR3_ROUT2		1<<5
-#define WM8753_PWR3_OUT3		1<<4
-#define WM8753_PWR3_OUT4		1<<3
-#define WM8753_PWR3_MONO1		1<<2
-#define WM8753_PWR3_MONO2		1<<1
-
-#define WM8753_PWR4_RECMIX		1<<3
-#define WM8753_PWR4_MONOMIX		1<<2
-#define WM8753_PWR4_RIGHTMIX		1<<1
-#define WM8753_PWR4_LEFTMIX		1<<0
-
-#define WM8753_IOCTL_VXCLKTRI		1<<7
-#define WM8753_IOCTL_BCCLKTRI		1<<6
-#define WM8753_IOCTL_VXDTRI		1<<5
-#define WM8753_IOCTL_ADCTRI		1<<4
-#define WM8753_IOCTL_IFMODE_1		1<<3
-#define WM8753_IOCTL_IFMODE_0		1<<2
-#define WM8753_IOCTL_VXFSOE		1<<1
-#define WM8753_IOCTL_LRCOE		1<<0
-
-#define WM8753_LOUTM1_LD2LO		1<<8
-
-#define WM8753_ROUTM1_RD2RO		1<<8
-
-#define WM8753_ADCIN_MONOMIX_1		1<<5
-#define WM8753_ADCIN_MONOMIX_0		1<<4
-#define WM8753_ADCIN_RADCSEL_1		1<<3
-#define WM8753_ADCIN_RADCSEL_0		1<<2
-#define WM8753_ADCIN_LADCSEL_1		1<<1
-#define WM8753_ADCIN_LADCSEL_0		1<<0
-
-#define WM8753_INCTL1_MIC2BOOST_1	1<<8
-#define WM8753_INCTL1_MIC2BOOST_0	1<<7
-
-#define WM8753_INCTL2_MICMUX_1		1<<5
-#define WM8753_INCTL2_MICMUX_0		1<<4
-
-#define WM8753_ADC_DATSEL_1		1<<8
-#define WM8753_ADC_DATSEL_0		1<<7
-#define WM8753_ADC_ADCPOL_1		1<<6
-#define WM8753_ADC_ADCPOL_0		1<<5
-#define WM8753_ADC_VXFILT		1<<4
-#define WM8753_ADC_HPMODE_1		1<<3
-#define WM8753_ADC_HPMODE_0		1<<2
-#define WM8753_ADC_HPOR			1<<1
-#define WM8753_ADC_ADCHPD		1<<0
-
-#define WM8753_LINVOL_MAX		0x11F
-
-#define WM8753_RINVOL_MAX		0x11F
-
-#define WM8753_GPIO2_GP2M_2		1<<5
+#define WM8753_SRATE1_SRMODE	(1<<8)
+
+#define WM8753_GPIO2_GP2M_2	(1<<5)
 #define WM8753_GPIO2_GP2M_1 	1<<4
 #define WM8753_GPIO2_GP2M_0 	1<<3
 
@@ -127,7 +58,7 @@
 #define WM8753_INTEN_TSDIEN 	1<<7
 
 /* Board Specific GPIO configuration for Whistler */
-#define TEGRA_GPIO_PW3 			179
+#define TEGRA_GPIO_PW3		(179)
 
 enum headset_state {
 	BIT_NO_HEADSET = 0,
@@ -135,8 +66,7 @@ enum headset_state {
 	BIT_HEADSET_NO_MIC = (1 << 1),
 };
 
-static struct wm8753_headphone_jack
-{
+static struct wm8753_headphone_jack {
 	struct snd_jack *jack;
 	int gpio;
 	struct work_struct work;
@@ -153,17 +83,17 @@ extern struct snd_soc_dai tegra_spdif_dai;
 extern struct snd_soc_dai tegra_generic_codec_dai[];
 extern struct snd_soc_platform tegra_soc_platform;
 
+static bool vdac_enabled;
+
 static int tegra_hifi_hw_params(struct snd_pcm_substream *substream,
 				struct snd_pcm_hw_params *params)
 {
 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
 	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
-	struct snd_soc_codec *codec = codec_dai->codec;
 	struct tegra_audio_data* audio_data = rtd->socdev->codec_data;
 	enum dac_dap_data_format data_fmt;
 	int dai_flag = 0, sys_clk;
-	unsigned int value;
 	int err;
 
 	if (tegra_das_is_port_master(tegra_audio_codec_type_hifi))
@@ -205,109 +135,6 @@ static int tegra_hifi_hw_params(struct snd_pcm_substream *substream,
 		return err;
 	}
 
-	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-		/* Enables MICBIAS, VMIDSEL and VREF, DAC-L and DAC-R */
-		value = snd_soc_read(codec_dai->codec, WM8753_PWR1);
-		value |= (WM8753_PWR1_VMIDSEL_0 | WM8753_PWR1_VREF |
-				WM8753_PWR1_MICB | WM8753_PWR1_DACL |
-				WM8753_PWR1_DACR);
-		value &= ~(WM8753_PWR1_VMIDSEL_1);
-		snd_soc_write(codec_dai->codec, WM8753_PWR1, value);
-
-		/* Enables Lout1 and Rout1 */
-		value = snd_soc_read(codec_dai->codec, WM8753_PWR3);
-		value |= (WM8753_PWR3_LOUT1 | WM8753_PWR3_ROUT1);
-		snd_soc_write(codec_dai->codec, WM8753_PWR3, value);
-
-		/* Left and Right Mix Enabled */
-		value = snd_soc_read(codec_dai->codec, WM8753_PWR4);
-		value |= (WM8753_PWR4_RIGHTMIX | WM8753_PWR4_LEFTMIX);
-		snd_soc_write(codec_dai->codec, WM8753_PWR4, value);
-
-		/* Mode set to HiFi over HiFi interface and VXDOUT,ADCDAT,
-			VXCLK and BCLK pin enabled */
-		value = snd_soc_read(codec_dai->codec, WM8753_IOCTL);
-		value |= (WM8753_IOCTL_IFMODE_1);
-		value &= ~(WM8753_IOCTL_VXCLKTRI | WM8753_IOCTL_BCCLKTRI |
-				WM8753_IOCTL_VXDTRI | WM8753_IOCTL_ADCTRI |
-				WM8753_IOCTL_IFMODE_0 | WM8753_IOCTL_VXFSOE |
-				WM8753_IOCTL_LRCOE);
-		snd_soc_write(codec_dai->codec, WM8753_IOCTL, value);
-
-		/* L-DAC to L-Mix */
-		value = snd_soc_read(codec_dai->codec, WM8753_LOUTM1);
-		value |= WM8753_LOUTM1_LD2LO;
-		snd_soc_write(codec_dai->codec, WM8753_LOUTM1, value);
-
-		/* R-DAC to R-Mix */
-		value = snd_soc_read(codec_dai->codec, WM8753_ROUTM1);
-		value |= WM8753_ROUTM1_RD2RO;
-		snd_soc_write(codec_dai->codec, WM8753_ROUTM1, value);
-	}
-
-	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
-		/* PGA i/p's to L and R ADC and operation in stero mode */
-		value = snd_soc_read(codec_dai->codec, WM8753_ADCIN);
-		value &= ~(WM8753_ADCIN_MONOMIX_1 | WM8753_ADCIN_MONOMIX_0 |
-				WM8753_ADCIN_RADCSEL_1 | WM8753_ADCIN_RADCSEL_0 |
-				WM8753_ADCIN_LADCSEL_1 | WM8753_ADCIN_LADCSEL_0);
-		snd_soc_write(codec_dai->codec, WM8753_ADCIN, value);
-
-		/* 24 db boost for Mic2 */
-		value = snd_soc_read(codec_dai->codec, WM8753_INCTL1);
-		value |= (WM8753_INCTL1_MIC2BOOST_1);
-		value &= ~(WM8753_INCTL1_MIC2BOOST_0);
-		snd_soc_write(codec_dai->codec, WM8753_INCTL1, value);
-
-		/* Side-Tone-Mic2 preamp o/p */
-		value = snd_soc_read(codec_dai->codec, WM8753_INCTL2);
-		value |= (WM8753_INCTL2_MICMUX_1);
-		value &= ~(WM8753_INCTL2_MICMUX_0);
-		snd_soc_write(codec_dai->codec, WM8753_INCTL2, value);
-
-		/* L and R data from R-ADC */
-		value = snd_soc_read(codec_dai->codec, WM8753_ADC);
-		value |= (WM8753_ADC_DATSEL_1);
-		value &= ~(WM8753_ADC_DATSEL_0 | WM8753_ADC_ADCPOL_1 |
-				WM8753_ADC_ADCPOL_0 | WM8753_ADC_VXFILT |
-				WM8753_ADC_HPMODE_1 | WM8753_ADC_HPMODE_0 |
-				WM8753_ADC_HPOR | WM8753_ADC_ADCHPD);
-		snd_soc_write(codec_dai->codec, WM8753_ADC, value);
-
-		/* Disable Mute and set L-PGA Vol to max */
-		snd_soc_write(codec, WM8753_LINVOL, WM8753_LINVOL_MAX);
-
-		/* Disable Mute and set R-PGA Vol to max */
-		snd_soc_write(codec, WM8753_RINVOL, WM8753_RINVOL_MAX);
-
-		/* Enables MICBIAS, VMIDSEL and VREF */
-		value = snd_soc_read(codec_dai->codec, WM8753_PWR1);
-		value |= (WM8753_PWR1_VMIDSEL_0|WM8753_PWR1_VREF|
-				WM8753_PWR1_MICB);
-		value &= ~(WM8753_PWR1_VMIDSEL_1);
-		snd_soc_write(codec_dai->codec, WM8753_PWR1, value);
-
-		/* Enable Mic2 preamp, PGA-R and ADC-R (Mic1 preamp,ALC Mix,
-			PGA-L , ADC-L, RXMIX and LINEMIX disabled) */
-		value = snd_soc_read(codec_dai->codec, WM8753_PWR2);
-		value |= (WM8753_PWR2_MICAMP2EN | WM8753_PWR2_PGAR|
-					WM8753_PWR2_ADCR);
-		value &= ~(WM8753_PWR2_MICAMP1EN | WM8753_PWR2_ALCMIX |
-					WM8753_PWR2_PGAL | WM8753_PWR2_ADCL |
-					WM8753_PWR2_RXMIX | WM8753_PWR2_LINEMIX);
-		snd_soc_write(codec, WM8753_PWR2, value);
-
-		/* Mode set to HiFi over HiFi interface and VXDOUT,ADCDAT,
-			VXCLK and BCLK pin enabled */
-		value = snd_soc_read(codec_dai->codec, WM8753_IOCTL);
-		value |= (WM8753_IOCTL_IFMODE_1);
-		value &= ~(WM8753_IOCTL_VXCLKTRI | WM8753_IOCTL_BCCLKTRI |
-				WM8753_IOCTL_VXDTRI | WM8753_IOCTL_ADCTRI |
-				WM8753_IOCTL_IFMODE_0 | WM8753_IOCTL_VXFSOE |
-				WM8753_IOCTL_LRCOE);
-		snd_soc_write(codec_dai->codec, WM8753_IOCTL, value);
-	}
-
 	return 0;
 }
 
@@ -343,6 +170,7 @@ static int tegra_voice_hw_params(struct snd_pcm_substream *substream,
 
 		data_fmt = tegra_das_get_codec_data_fmt(
 				tegra_audio_codec_type_baseband);
+		vdac_enabled = true;
 	}
 	else {/* Tegra BT-SCO Voice */
 		master_port = tegra_das_is_port_master(
@@ -395,16 +223,35 @@ static int tegra_voice_hw_params(struct snd_pcm_substream *substream,
 		int pcmdiv = WM8753_PCM_DIV_6;
 		snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0,
 			sys_clk, 12288000);
-		if (params_rate(params) == 16000)
+		if (params_rate(params) == 16000) {
 			pcmdiv = WM8753_PCM_DIV_3;
-
+			/* BB expecting 2048Khz bclk*/
+			snd_soc_dai_set_clkdiv(codec_dai, WM8753_VXCLKDIV,
+							WM8753_VXCLK_DIV_2);
+		}
 		snd_soc_dai_set_clkdiv(codec_dai, WM8753_PCMDIV, pcmdiv);
 	}
+
+	if (vdac_enabled == true) {
+		int value = snd_soc_read(codec_dai->codec, WM8753_SRATE1);
+		value |= (WM8753_SRATE1_SRMODE);
+		snd_soc_write(codec_dai->codec, WM8753_SRATE1, value);
+	}
 	return 0;
 }
 
 static int tegra_voice_hw_free(struct snd_pcm_substream *substream)
 {
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+	if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE) &&
+	    (vdac_enabled == true)) {
+		int value = snd_soc_read(codec_dai->codec,
+				WM8753_SRATE1);
+		value &= ~(WM8753_SRATE1_SRMODE);
+		snd_soc_write(codec_dai->codec, WM8753_SRATE1, value);
+		vdac_enabled = false;
+	}
 	return 0;
 }