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authorJames Hogan <james.hogan@imgtec.com>2015-01-30 12:09:39 +0000
committerRalf Baechle <ralf@linux-mips.org>2015-03-27 19:42:48 +0100
commit1f3a2c6e229ccb8df8115b04d16ad4832767cf3a (patch)
tree9af45f0131586543307d1d116002679e44cabec1
parent466aec5f292be469e15b3dc3d17b731dab93727c (diff)
MIPS: MSA: Fix big-endian FPR_IDX implementation
The maximum word size is 64-bits since MSA state is saved using st.d which stores two 64-bit words, therefore reimplement FPR_IDX using xor, and only within each 64-bit word. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9169/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/processor.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index b5dcbee01fd7..9b3b48e21c22 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -105,7 +105,7 @@ union fpureg {
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# define FPR_IDX(width, idx) (idx)
#else
-# define FPR_IDX(width, idx) ((FPU_REG_WIDTH / (width)) - 1 - (idx))
+# define FPR_IDX(width, idx) ((idx) ^ ((64 / (width)) - 1))
#endif
#define BUILD_FPR_ACCESS(width) \