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| author | Nicolas Frattaroli <nicolas.frattaroli@collabora.com> | 2025-12-20 19:49:52 +0100 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@collabora.com> | 2026-01-13 17:05:59 +0100 |
| commit | 2568b8b0860eede10b39109aaa3e51900737b5d6 (patch) | |
| tree | fbfe11ef6336c9769199715c85fa7bb3520fe5cf | |
| parent | 1f61d735b8595f80ae5cfbbe11390a49b7f45911 (diff) | |
dt-bindings: gpu: mali-valhall-csf: Add shader-present nvmem cell
On the MediaTek MT8196 SoC, the bitmask for which shader cores are
present and functional is not the one in the Mali GPU's registers, but
in an external efuse.
Add the nvmem cell properties to describe such a setup, and make them
required on MT8196.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://patch.msgid.link/20251220-mt8196-shader-present-v2-1-45b1ff1dfab0@collabora.com
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml index bee9faf1d3f8..8eccd4338a2b 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml @@ -51,6 +51,14 @@ properties: - stacks - const: stacks + nvmem-cells: + items: + - description: bitmask of functional shader cores + + nvmem-cell-names: + items: + - const: shader-present + mali-supply: true operating-points-v2: true @@ -108,6 +116,8 @@ allOf: properties: clocks: minItems: 3 + nvmem-cells: false + nvmem-cell-names: false power-domains: maxItems: 1 power-domain-names: false @@ -133,6 +143,8 @@ allOf: - const: core - const: stacks required: + - nvmem-cells + - nvmem-cell-names - power-domains examples: @@ -179,6 +191,8 @@ examples: <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>, <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "job", "mmu", "gpu"; + nvmem-cells = <&shader_present>; + nvmem-cell-names = "shader-present"; power-domains = <&gpufreq>; }; |