diff options
| author | Hans Zhang <18255117159@163.com> | 2026-05-18 08:42:46 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-06-23 14:36:37 -0500 |
| commit | 2b0d1a605ef22c063be9de475d7a66c311b710f4 (patch) | |
| tree | 0d19c9561613073f0f3c4ef21a881507d9d3ce8c | |
| parent | d24e3fab6ee23c2d7076b0e5ffe5c7210cc9dae3 (diff) | |
PCI: rzg3s-host: Use common pci_host_common_link_train_delay() helper
Replace the unconditional msleep(100) with the common helper
pci_host_common_link_train_delay(). The helper only waits when
max_link_speed > 2, as required by PCIe r6.0 sec 6.6.1.
This avoids unnecessary delay for Gen1/Gen2 links while retaining
the mandatory 100 ms for higher speeds.
Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260518004246.1384532-8-18255117159@163.com
| -rw-r--r-- | drivers/pci/controller/pcie-rzg3s-host.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c index d86e7516dcc2..66f687304c1c 100644 --- a/drivers/pci/controller/pcie-rzg3s-host.c +++ b/drivers/pci/controller/pcie-rzg3s-host.c @@ -35,6 +35,7 @@ #include <linux/slab.h> #include <linux/units.h> +#include "pci-host-common.h" #include "../pci.h" /* AXI registers */ @@ -1663,7 +1664,7 @@ rzg3s_pcie_host_setup(struct rzg3s_pcie_host *host, if (ret) dev_info(dev, "Failed to set max link speed\n"); - msleep(PCIE_RESET_CONFIG_WAIT_MS); + pci_host_common_link_train_delay(host->max_link_speed); return 0; |