diff options
| author | Deepak Gupta <debug@rivosinc.com> | 2026-01-25 21:09:55 -0700 |
|---|---|---|
| committer | Paul Walmsley <pjw@kernel.org> | 2026-01-29 02:38:40 -0700 |
| commit | 30c3099036a9544ec24e899abc8a81a7cc030f99 (patch) | |
| tree | c647b6b85ae5133a935e6febaa3749bb7c5a9c3d | |
| parent | 462a94fb8ae8ba0d4d3901c7283b4af052ab8804 (diff) | |
riscv/hwprobe: add zicfilp / zicfiss enumeration in hwprobe
Add enumeration of the zicfilp and zicfiss extensions in the hwprobe syscall.
Reviewed-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6
Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com>
Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-20-b55691eacf4f@rivosinc.com
[pjw@kernel.org: updated to apply; extend into RISCV_HWPROBE_KEY_IMA_EXT_1; clean patch description]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
| -rw-r--r-- | arch/riscv/include/uapi/asm/hwprobe.h | 3 | ||||
| -rw-r--r-- | arch/riscv/kernel/sys_hwprobe.c | 5 |
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index ed2621a5a47d..9139edba0aec 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -86,6 +86,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZICBOP (1ULL << 60) #define RISCV_HWPROBE_EXT_ZILSD (1ULL << 61) #define RISCV_HWPROBE_EXT_ZCLSD (1ULL << 62) +#define RISCV_HWPROBE_EXT_ZICFILP (1ULL << 63) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) @@ -114,6 +115,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0 14 #define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE 15 #define RISCV_HWPROBE_KEY_IMA_EXT_1 16 +#define RISCV_HWPROBE_EXT_ZICFISS (1ULL << 0) + /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ /* Flags */ diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index 53731ace7984..1659d31fd288 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -126,6 +126,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(isainfo->isa, ZICBOM, pair->value, missing); EXT_KEY(isainfo->isa, ZICBOP, pair->value, missing); EXT_KEY(isainfo->isa, ZICBOZ, pair->value, missing); + EXT_KEY(isainfo->isa, ZICFILP, pair->value, missing); EXT_KEY(isainfo->isa, ZICNTR, pair->value, missing); EXT_KEY(isainfo->isa, ZICOND, pair->value, missing); EXT_KEY(isainfo->isa, ZIHINTNTL, pair->value, missing); @@ -195,7 +196,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, * doesn't have. */ for_each_cpu(cpu, cpus) { - /* struct riscv_isainfo *isainfo = &hart_isa[cpu]; */ + struct riscv_isainfo *isainfo = &hart_isa[cpu]; /* * Only use EXT_KEY() for extensions which can be @@ -203,7 +204,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, * configuration, as no other checks, besides presence * in the hart_isa bitmap, are made. */ - /* Nothing here yet */ + EXT_KEY(isainfo->isa, ZICFISS, pair->value, missing); } /* Now turn off reporting features if any CPU is missing it. */ |