diff options
| author | Huacai Chen <chenhuacai@loongson.cn> | 2026-02-03 14:26:58 +0800 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-02-04 20:37:37 -0800 |
| commit | 42a940ef18455eafa2de7cf5fffe7abeba43e250 (patch) | |
| tree | 781367676d8f35712885557e4a6bf018a784b9d3 | |
| parent | 309dd9942155c090b774cec29c5982922fece446 (diff) | |
net: stmmac: Fix typo from clk_scr_i to clk_csr_i
In include/linux/stmmac.h clk_csr_i is spelled as clk_scr_i by mistake,
so correct the typo.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Reviewed-by: Yanteng Si <siyanteng@cqsoftware.com.cn>
Link: https://patch.msgid.link/20260203062658.2156653-1-chenhuacai@loongson.cn
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| -rw-r--r-- | include/linux/stmmac.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 5199451dd0bc..2ea109bb4461 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -28,14 +28,14 @@ * This could also be configured at run time using CPU freq framework. */ /* MDC Clock Selection define*/ -#define STMMAC_CSR_60_100M 0x0 /* MDC = clk_scr_i/42 */ -#define STMMAC_CSR_100_150M 0x1 /* MDC = clk_scr_i/62 */ -#define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */ -#define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ -#define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ -#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/124 */ -#define STMMAC_CSR_300_500M 0x6 /* MDC = clk_scr_i/204 */ -#define STMMAC_CSR_500_800M 0x7 /* MDC = clk_scr_i/324 */ +#define STMMAC_CSR_60_100M 0x0 /* MDC = clk_csr_i/42 */ +#define STMMAC_CSR_100_150M 0x1 /* MDC = clk_csr_i/62 */ +#define STMMAC_CSR_20_35M 0x2 /* MDC = clk_csr_i/16 */ +#define STMMAC_CSR_35_60M 0x3 /* MDC = clk_csr_i/26 */ +#define STMMAC_CSR_150_250M 0x4 /* MDC = clk_csr_i/102 */ +#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_csr_i/124 */ +#define STMMAC_CSR_300_500M 0x6 /* MDC = clk_csr_i/204 */ +#define STMMAC_CSR_500_800M 0x7 /* MDC = clk_csr_i/324 */ /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0 |