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authorKrishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>2026-01-09 13:53:32 +0530
committerBjorn Helgaas <bhelgaas@google.com>2026-02-06 16:54:11 -0600
commit44d2f70b1fd72c339c72983fcffa181beae3e113 (patch)
treea485d12e7018d623ffe734977583ba5b46b1b185
parentf06e0ad226fdb875cfd6278882ef28fe817283c5 (diff)
PCI: Add ACS quirk for Qualcomm Hamoa & Glymur
The Qualcomm Hamoa & Glymur Root Ports don't advertise an ACS capability, but they do provide ACS-like features to disable peer transactions and validate bus numbers in requests. Add an ACS quirk for Hamoa & Glymur. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260109-acs_quirk-v1-1-82adf95a89ae@oss.qualcomm.com
-rw-r--r--drivers/pci/quirks.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6e3b9d7ca7ee..eff77433fbc1 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5125,6 +5125,10 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
/* QCOM SA8775P root port */
{ PCI_VENDOR_ID_QCOM, 0x0115, pci_quirk_qcom_rp_acs },
+ /* QCOM Hamoa root port */
+ { PCI_VENDOR_ID_QCOM, 0x0111, pci_quirk_qcom_rp_acs },
+ /* QCOM Glymur root port */
+ { PCI_VENDOR_ID_QCOM, 0x0120, pci_quirk_qcom_rp_acs },
/* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */
{ PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs },
/* Intel PCH root ports */