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authorLu Baolu <baolu.lu@linux.intel.com>2025-09-18 13:02:04 +0800
committerJoerg Roedel <joerg.roedel@amd.com>2025-09-19 09:43:21 +0200
commit5bd5ab53e7b8c87908341accb3ad8da555d6b778 (patch)
treed0447cd5145edb0885f9519df0e73dcdb49057ff
parent7d4e40410283cc8c404170d0787b8d2a2458e3a1 (diff)
iommu/vt-d: debugfs: Avoid dumping context command register
The register-based cache invalidation interface is in the process of being replaced by the queued invalidation interface. The VT-d architecture allows hardware implementations with a queued invalidation interface to not implement the registers used for cache invalidation. Currently, the debugfs interface dumps the Context Command Register unconditionally, which is not reasonable. Remove it to avoid potential access to non-present registers. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20250917025051.143853-1-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
-rw-r--r--drivers/iommu/intel/debugfs.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/iommu/intel/debugfs.c b/drivers/iommu/intel/debugfs.c
index 765edb3740e2..617fd81a80f0 100644
--- a/drivers/iommu/intel/debugfs.c
+++ b/drivers/iommu/intel/debugfs.c
@@ -62,7 +62,6 @@ static const struct iommu_regset iommu_regs_64[] = {
IOMMU_REGSET_ENTRY(CAP),
IOMMU_REGSET_ENTRY(ECAP),
IOMMU_REGSET_ENTRY(RTADDR),
- IOMMU_REGSET_ENTRY(CCMD),
IOMMU_REGSET_ENTRY(PHMBASE),
IOMMU_REGSET_ENTRY(PHMLIMIT),
IOMMU_REGSET_ENTRY(IQH),