diff options
| author | Julien Panis <jpanis@baylibre.com> | 2022-07-29 18:00:57 +0200 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2022-08-03 18:54:13 -0500 |
| commit | 678e7dad8f82baabb69ace1fdab6bf1fbffe2685 (patch) | |
| tree | 96e0ed47d6445bca43a8d8a78bad8076cf1bf0e4 | |
| parent | 95b90aa828165df6c45d6bb0e1cce905e83a66a7 (diff) | |
arm64: dts: ti: k3-am62: add watchdog nodes
Add nodes for watchdogs :
- 5 in main domain
- 1 in MCU domain
- 1 in wakeup domain
Signed-off-by: Julien Panis <jpanis@baylibre.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 45 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 9 |
3 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 48063c842fd2..0ccef88d2943 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -716,6 +716,51 @@ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + main_rti0: watchdog@e000000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x0e000000 0x00 0x100>; + clocks = <&k3_clks 125 0>; + power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 125 0>; + assigned-clock-parents = <&k3_clks 125 2>; + }; + + main_rti1: watchdog@e010000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x0e010000 0x00 0x100>; + clocks = <&k3_clks 126 0>; + power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 126 0>; + assigned-clock-parents = <&k3_clks 126 2>; + }; + + main_rti2: watchdog@e020000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x0e020000 0x00 0x100>; + clocks = <&k3_clks 127 0>; + power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 127 0>; + assigned-clock-parents = <&k3_clks 127 2>; + }; + + main_rti3: watchdog@e030000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x0e030000 0x00 0x100>; + clocks = <&k3_clks 128 0>; + power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 128 0>; + assigned-clock-parents = <&k3_clks 128 2>; + }; + + main_rti15: watchdog@e0f0000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x0e0f0000 0x00 0x100>; + clocks = <&k3_clks 130 0>; + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 130 0>; + assigned-clock-parents = <&k3_clks 130 2>; + }; + epwm0: pwm@23000000 { compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; #pwm-cells = <3>; diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi index a1cc13da6ff1..72c2ec9be146 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -82,6 +82,15 @@ clock-names = "gpio"; }; + mcu_rti0: watchdog@4880000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x04880000 0x00 0x100>; + clocks = <&k3_clks 131 0>; + power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 131 0>; + assigned-clock-parents = <&k3_clks 131 2>; + }; + mcu_m4fss: m4fss@5000000 { compatible = "ti,am64-m4fss"; reg = <0x00 0x5000000 0x00 0x30000>, diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index 4d6756fd977f..9bcaf85a54fc 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -39,6 +39,15 @@ clock-names = "fck"; }; + wkup_rti0: watchdog@2b000000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x2b000000 0x00 0x100>; + clocks = <&k3_clks 132 0>; + power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 132 0>; + assigned-clock-parents = <&k3_clks 132 2>; + }; + wkup_rtc0: rtc@2b1f0000 { compatible = "ti,am62-rtc"; reg = <0x00 0x2b1f0000 0x00 0x100>; |