diff options
author | Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> | 2025-05-23 11:50:35 +0530 |
---|---|---|
committer | Animesh Manna <animesh.manna@intel.com> | 2025-05-26 13:18:15 +0530 |
commit | 796b6df0f8f57c40e95bd49294cf5f869eab3e9b (patch) | |
tree | 826f473acba4b2358be224990f11e24829e1a6c2 | |
parent | 2c41d62f6fb16d591df17b29edaa81ea56569bb3 (diff) |
drm/i915/dsb: add intel_dsb_gosub_finish()
A DSB buffer which will be used for GOSUB execution does not need
the DEWAKE mechanism but still need to be 64 bit aligned. Add helper
to finish preparation of a dsb buffer to be executed with GOSUB
instruction.
v2: Add a cacheline of noops at the end of GOSUB buffer (Ville)
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-6-chaitanya.kumar.borah@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.c | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index cd32b59adf18..04c2096df2dc 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -606,6 +606,19 @@ void intel_dsb_gosub(struct intel_dsb *dsb, intel_dsb_align_tail(dsb); } +void intel_dsb_gosub_finish(struct intel_dsb *dsb) +{ + intel_dsb_align_tail(dsb); + + /* + * "All subroutines called by the GOSUB instruction + * must end with a cacheline of NOPs" + */ + intel_dsb_noop(dsb, 8); + + intel_dsb_buffer_flush_map(&dsb->dsb_buf); +} + void intel_dsb_finish(struct intel_dsb *dsb) { struct intel_crtc *crtc = dsb->crtc; diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 8b2cf0a7b7e6..6900acd603b8 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -31,6 +31,7 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state, enum intel_dsb_id dsb_id, unsigned int max_cmds); void intel_dsb_finish(struct intel_dsb *dsb); +void intel_dsb_gosub_finish(struct intel_dsb *dsb); void intel_dsb_cleanup(struct intel_dsb *dsb); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); |