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authorArnd Bergmann <arnd@arndb.de>2026-09-29 12:41:12 +0200
committerBjorn Andersson <andersson@kernel.org>2026-09-30 21:52:44 -0500
commit7ee8eb0ebeef2e7bbf2ec8ebc43bf43f2a10a1d7 (patch)
treecd276b2a839efad8d87da4364c48be41d55d20da
parent5ad7eb6a944eea8471f496442c9a3609a286437f (diff)
arm64: dts: qcom: shikra: fix sdhc interrupts property
The gicv3 on this chip uses a 4-cell interrupt specifier, which includes the affinity, but the newly added mmc node uses the 3-cell format: arch/arm64/boot/dts/qcom/shikra.dtsi:4151.4-27: Warning (interrupts_property): /soc@0/mmc@4784000:#interrupt-cells: size is (24), expected multiple of 16 Add a zero affinity, same as for the other I/O devices on this chip. Fixes: c8e3d40457f1 ("arm64: dts: qcom: shikra: Add SD Card support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260929104127.3156764-1-arnd@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/shikra.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 9cebd5862bca..205e70ce0748 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -1470,8 +1470,8 @@
compatible = "qcom,shikra-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0 0x04784000 0x0 0x1000>;
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "hc_irq",
"pwr_irq";