diff options
| author | Shin Son <shin.son@samsung.com> | 2025-04-28 20:35:17 +0900 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-04-30 09:24:25 +0200 |
| commit | aa833db4b82205275f4a4c08554b3dde99dae0c7 (patch) | |
| tree | b5968b9ad8a52108ec4590208dd6c53f3daec7e2 | |
| parent | 2a4067c89e4137c477ca6f367e65ace0f2132922 (diff) | |
arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes
Add cmu_cpucl1/2(CPU Cluster 1 and CPU Cluster 2) clocks
for switch, cluster domains respectively.
Signed-off-by: Shin Son <shin.son@samsung.com>
Link: https://lore.kernel.org/r/20250428113517.426987-5-shin.son@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index 9350c53f935e..2cb8041c8a9f 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -1090,6 +1090,32 @@ "cluster", "dbg"; }; + + cmu_cpucl1: clock-controller@1ed00000 { + compatible = "samsung,exynosautov920-cmu-cpucl1"; + reg = <0x1ed00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_CPUCL1_SWITCH>, + <&cmu_top DOUT_CLKCMU_CPUCL1_CLUSTER>; + clock-names = "oscclk", + "switch", + "cluster"; + }; + + cmu_cpucl2: clock-controller@1ee00000 { + compatible = "samsung,exynosautov920-cmu-cpucl2"; + reg = <0x1ee00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_CPUCL2_SWITCH>, + <&cmu_top DOUT_CLKCMU_CPUCL2_CLUSTER>; + clock-names = "oscclk", + "switch", + "cluster"; + }; }; timer { |