diff options
| author | Imre Deak <imre.deak@intel.com> | 2025-08-05 10:36:58 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-08-13 15:03:25 +0300 |
| commit | cca7c083a3f622164a3615ed243e6a5ccdd1dd10 (patch) | |
| tree | 136517790f15795d248cf6f114c4ed98a672bac1 | |
| parent | 76ed3b0226db373ce033291077c1c20e1eaf5d2d (diff) | |
dmc/i915/tc: Report pin assignment NONE in TBT-alt mode
The pin assignment is only relevant in case the PHY is owned by the
display, that is in legacy and DP-alt mode. In TBT-alt mode the PHY is
owned by the TBT FW/driver and so the pin assignment/configuration is
managed by those components. A follow-up change will cache the pin
assignment value in all the TypeC modes - querying this by calling
get_pin_assignment() - prepare for that here, by reporting pin
assignment NONE in the TBT-alt mode.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250805073700.642107-18-imre.deak@intel.com
Signed-off-by: Imre Deak <imre.deak@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_tc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 073c434fd378..3e53332f804f 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -287,6 +287,9 @@ get_pin_assignment(struct intel_tc_port *tc) u32 mask; u32 val; + if (tc->mode == TC_PORT_TBT_ALT) + return INTEL_TC_PIN_ASSIGNMENT_NONE; + if (DISPLAY_VER(display) >= 20) { reg = TCSS_DDI_STATUS(tc_port); mask = TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK; |