diff options
| author | Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> | 2026-09-17 11:03:27 +0200 |
|---|---|---|
| committer | Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> | 2026-09-17 11:49:25 +0200 |
| commit | dcb5df182b37587d5ad6bb4388751bf5180957ac (patch) | |
| tree | b513622eaa882617e2d93218d64100bf8a600a2c | |
| parent | 912df33f296e6c4ced8c0a5e7998d570a0b82214 (diff) | |
pinctrl: qcom: qcs8300: Fix intr_target_width
The default width of the interrupt target field doesn't match the actual
register layout. Fix it.
Fixes: 0c4cd2cc87c8 ("pinctrl: qcom: add the tlmm driver for QCS8300 platforms")
Assisted-by: LLM
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Link: https://patch.msgid.link/20260917-topic-tlmm_intr_width_fixes-v1-3-3bc1d056aa6b@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-qcs8300.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs8300.c b/drivers/pinctrl/qcom/pinctrl-qcs8300.c index 9a904d809e11..fec86818c511 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs8300.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs8300.c @@ -45,6 +45,7 @@ .intr_enable_bit = 0, \ .intr_status_bit = 0, \ .intr_target_bit = 5, \ + .intr_target_width = 4, \ .intr_target_kpss_val = 3, \ .intr_raw_status_bit = 4, \ .intr_polarity_bit = 1, \ |