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authorMarek Vasut <marex@nabladev.com>2026-07-11 22:59:37 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2026-10-01 11:36:53 +0200
commitdcbad3d38c06c321cdf768cf5dce36a5aaee043f (patch)
tree8db66da0acb89a50641d30c185d0de55c35f3cb1
parent26c47e0f1ce723aa63daf5c0007c52b77af4b606 (diff)
arm64: dts: st: Add pinmux nodes for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board
Add new pinmux nodes for DH electronics STM32MP2 DHCOS SoM and BB board. The following pinmux nodes are added: - ETH2 pins - I2C8 pins - MCO1 pins - SDMMC1,2,3 pins - SPI1,8 pins - UART8,9 pins - USART1,2,6 pins Signed-off-by: Marek Vasut <marex@nabladev.com> Link: https://lore.kernel.org/r/20260711210131.236025-9-marex@nabladev.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r--arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi461
1 files changed, 451 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 68cc89cbe754..75d08fe33ec5 100644
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -185,6 +185,30 @@
};
/omit-if-no-ref/
+ eth2_mdio_pins_a: eth2-mdio-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 4, AF11)>; /* ETH_MDC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ };
+
+ /omit-if-no-ref/
+ eth2_mdio_sleep_pins_a: eth2-mdio-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_MDC */
+ <STM32_PINMUX('C', 5, ANALOG)>; /* ETH_MDIO */
+ };
+ };
+
+ /omit-if-no-ref/
eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
@@ -206,6 +230,60 @@
};
/omit-if-no-ref/
+ eth2_rgmii_pins_b: eth2-rgmii-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ st,io-sync = "data on both edges";
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
+ <STM32_PINMUX('F', 7, AF10)>; /* ETH_RGMII_GTX_CLK */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
+ bias-disable;
+ st,io-sync = "data on both edges";
+ };
+ pins4 {
+ pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ eth2_rgmii_sleep_pins_b: eth2-rgmii-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */
+ <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */
+ <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */
+ <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */
+ };
+ };
+
+ /omit-if-no-ref/
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('G', 13, AF9)>, /* I2C1_SCL */
@@ -356,6 +434,16 @@
};
/omit-if-no-ref/
+ mco1_pins_a: mco1-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 6, AF1)>; /* MCO1 */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
+
+ /omit-if-no-ref/
ospi_port1_clk_pins_a: ospi-port1-clk-0 {
pins {
pinmux = <STM32_PINMUX('D', 0, AF10)>; /* OSPI1_CLK */
@@ -670,6 +758,19 @@
};
/omit-if-no-ref/
+ sdmmc2_d47_pins_a: sdmmc2-d47-0 {
+ pins {
+ pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */
+ <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */
+ <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */
+ <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 13, ANALOG)>, /* SDMMC2_D0 */
@@ -682,12 +783,29 @@
};
/omit-if-no-ref/
- sdmmc2_d47_pins_a: sdmmc2-d47-0 {
+ sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
pins {
- pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */
- <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */
- <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */
+ pinmux = <STM32_PINMUX('E', 10, ANALOG)>, /* SDMMC2_D4 */
+ <STM32_PINMUX('E', 9, ANALOG)>, /* SDMMC2_D5 */
+ <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC2_D6 */
+ <STM32_PINMUX('E', 7, ANALOG)>; /* SDMMC2_D7 */
+ };
+ };
+
+ /omit-if-no-ref/
+ sdmmc3_b4_pins_a: sdmmc3-b4-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
+ <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
+ <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
+ <STM32_PINMUX('I', 11, AF10)>, /* SDMMC3_D3 */
+ <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
+ slew-rate = <0>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
@@ -695,12 +813,59 @@
};
/omit-if-no-ref/
- sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
+ sdmmc3_b4_pins_b: sdmmc3-b4-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
+ <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
+ <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
+ <STM32_PINMUX('D', 14, AF12)>, /* SDMMC3_D3 */
+ <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
+ slew-rate = <0>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
+ <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
+ <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
+ <STM32_PINMUX('D', 14, AF10)>; /* SDMMC3_D3 */
+ slew-rate = <2>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
+ slew-rate = <3>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
+ slew-rate = <2>;
+ drive-open-drain;
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
pins {
- pinmux = <STM32_PINMUX('E', 10, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('E', 9, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('E', 7, ANALOG)>; /* SDMMC2_D7 */
+ pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC3_D0 */
+ <STM32_PINMUX('D', 13, ANALOG)>, /* SDMMC3_D1 */
+ <STM32_PINMUX('B', 12, ANALOG)>, /* SDMMC3_D2 */
+ <STM32_PINMUX('D', 14, ANALOG)>, /* SDMMC3_D3 */
+ <STM32_PINMUX('B', 13, ANALOG)>, /* SDMMC3_CK */
+ <STM32_PINMUX('D', 12, ANALOG)>; /* SDMMC3_CMD */
};
};
@@ -729,6 +894,30 @@
};
/omit-if-no-ref/
+ spi1_pins_b: spi1-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 6, AF3)>, /* SPI1_SCK */
+ <STM32_PINMUX('H', 7, AF2)>; /* SPI1_MOSI */
+ drive-push-pull;
+ bias-disable;
+ slew-rate = <1>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('H', 8, AF2)>; /* SPI1_MISO */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ spi1_sleep_pins_b: spi1-sleep-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 6, ANALOG)>, /* SPI1_SCK */
+ <STM32_PINMUX('H', 7, ANALOG)>, /* SPI1_MOSI */
+ <STM32_PINMUX('H', 8, ANALOG)>; /* SPI1_MISO */
+ };
+ };
+
+ /omit-if-no-ref/
spi3_pins_a: spi3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */
@@ -802,6 +991,50 @@
};
/omit-if-no-ref/
+ usart1_pins_a: usart1-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 3, AF6)>, /* USART1_TX */
+ <STM32_PINMUX('A', 1, AF5)>; /* USART1_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 2, AF6)>, /* USART1_RX */
+ <STM32_PINMUX('A', 7, AF6)>; /* USART1_CTS_NSS */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart1_idle_pins_a: usart1-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 3, ANALOG)>, /* USART1_TX */
+ <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 1, AF5)>; /* USART1_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('A', 2, AF6)>; /* USART1_RX */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart1_sleep_pins_a: usart1-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 3, ANALOG)>, /* USART1_TX */
+ <STM32_PINMUX('A', 1, ANALOG)>, /* USART1_RTS */
+ <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
+ <STM32_PINMUX('A', 2, ANALOG)>; /* USART1_RX */
+ };
+ };
+
+ /omit-if-no-ref/
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
@@ -835,6 +1068,50 @@
};
/omit-if-no-ref/
+ usart2_pins_b: usart2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, AF6)>, /* USART2_TX */
+ <STM32_PINMUX('A', 5, AF6)>; /* USART2_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>, /* USART2_RX */
+ <STM32_PINMUX('A', 9, AF6)>; /* USART2_CTS_NSS */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart2_idle_pins_b: usart2-idle-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
+ <STM32_PINMUX('A', 9, ANALOG)>; /* USART2_CTS_NSS */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 5, AF6)>; /* USART2_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart2_sleep_pins_b: usart2-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
+ <STM32_PINMUX('A', 5, ANALOG)>, /* USART2_RTS */
+ <STM32_PINMUX('A', 9, ANALOG)>, /* USART2_CTS_NSS */
+ <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
+ };
+ };
+
+ /omit-if-no-ref/
usart6_pins_a: usart6-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */
@@ -877,6 +1154,127 @@
<STM32_PINMUX('F', 14, ANALOG)>; /* USART6_RX */
};
};
+
+ /omit-if-no-ref/
+ usart6_pins_b: usart6-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 5, AF6)>; /* USART6_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 4, AF6)>; /* USART6_RX */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart6_idle_pins_b: usart6-idle-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 5, ANALOG)>; /* USART6_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 4, AF6)>; /* USART6_RX */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ usart6_sleep_pins_b: usart6-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART6_TX */
+ <STM32_PINMUX('F', 4, ANALOG)>; /* USART6_RX */
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_pins_a: uart8-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('I', 11, AF5)>, /* UART8_TX */
+ <STM32_PINMUX('B', 15, AF3)>; /* UART8_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 11, AF6)>, /* UART8_RX */
+ <STM32_PINMUX('H', 5, AF6)>; /* UART8_CTS_NSS */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_idle_pins_a: uart8-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('I', 11, ANALOG)>, /* UART8_TX */
+ <STM32_PINMUX('H', 5, ANALOG)>; /* UART8_CTS_NSS */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 15, AF3)>; /* UART8_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('F', 11, AF6)>; /* UART8_RX */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart8_sleep_pins_a: uart8-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 11, ANALOG)>, /* UART8_TX */
+ <STM32_PINMUX('B', 15, ANALOG)>, /* UART8_RTS */
+ <STM32_PINMUX('H', 5, ANALOG)>, /* UART8_CTS_NSS */
+ <STM32_PINMUX('F', 11, ANALOG)>; /* UART8_RX */
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_pins_a: uart9-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 8, AF6)>, /* UART9_TX */
+ <STM32_PINMUX('F', 12, AF6)>; /* UART9_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('I', 5, AF6)>, /* UART9_RX */
+ <STM32_PINMUX('G', 7, AF6)>; /* UART9_CTS_NSS */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_idle_pins_a: uart9-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 8, ANALOG)>, /* UART9_TX */
+ <STM32_PINMUX('G', 7, ANALOG)>; /* UART9_CTS_NSS */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 12, AF6)>; /* UART9_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('I', 5, AF6)>; /* UART9_RX */
+ bias-pull-up;
+ };
+ };
+
+ /omit-if-no-ref/
+ uart9_sleep_pins_a: uart9-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 8, ANALOG)>, /* UART9_TX */
+ <STM32_PINMUX('F', 12, ANALOG)>, /* UART9_RTS */
+ <STM32_PINMUX('G', 7, ANALOG)>, /* UART9_CTS_NSS */
+ <STM32_PINMUX('I', 5, ANALOG)>; /* UART9_RX */
+ };
+ };
};
&pinctrl_z {
@@ -900,6 +1298,25 @@
};
/omit-if-no-ref/
+ i2c8_pins_b: i2c8-1 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C1_SCL */
+ <STM32_PINMUX('Z', 9, AF8)>; /* I2C1_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ /omit-if-no-ref/
+ i2c8_sleep_pins_b: i2c8-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C1_SCL */
+ <STM32_PINMUX('Z', 9, ANALOG)>; /* I2C1_SDA */
+ };
+ };
+
+ /omit-if-no-ref/
spi8_pins_a: spi8-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
@@ -922,4 +1339,28 @@
<STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */
};
};
+
+ /omit-if-no-ref/
+ spi8_pins_b: spi8-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('Z', 5, AF3)>, /* SPI8_SCK */
+ <STM32_PINMUX('Z', 7, AF3)>; /* SPI8_MOSI */
+ drive-push-pull;
+ bias-disable;
+ slew-rate = <1>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('Z', 8, AF3)>; /* SPI8_MISO */
+ bias-disable;
+ };
+ };
+
+ /omit-if-no-ref/
+ spi8_sleep_pins_b: spi8-sleep-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('Z', 5, ANALOG)>, /* SPI8_SCK */
+ <STM32_PINMUX('Z', 7, ANALOG)>, /* SPI8_MOSI */
+ <STM32_PINMUX('Z', 8, ANALOG)>; /* SPI8_MISO */
+ };
+ };
};