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authorKrishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>2026-09-17 17:24:19 +0530
committerBjorn Andersson <andersson@kernel.org>2026-09-27 21:25:34 -0500
commiteec036783b2e633302bcf277ae36742dfd3402fc (patch)
treebd85219c5cd165872eee825d3ce5875a69f6ec1d
parent6ade8b5856b6cd442145bcf81d067ff771b73b6d (diff)
arm64: dts: qcom: sm8750: Fix PCIe WAKE# GPIO polarity
The PCIe WAKE# signal is active-low as defined in the PCIe Base Specification. Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW instead of GPIO_ACTIVE_HIGH. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Link: https://patch.msgid.link/20260917-root_port-v2-11-0d627d0856d5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sm8750-mtp.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
index b665d7a3af42..64bc1cec612e 100644
--- a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
@@ -1127,7 +1127,7 @@
};
&pcieport0 {
- wake-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
reset-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
wifi@0 {