diff options
| author | Abel Vesa <abel.vesa@oss.qualcomm.com> | 2026-05-15 14:21:51 +0300 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-05-23 11:04:06 +0200 |
| commit | f2c49ae0ce2ea518c140cbd8fca352c5a6f43bd0 (patch) | |
| tree | 944c36c13f81457f4d7cef5625762842c2b56e2e | |
| parent | ea024873fe4316e4dc1d18657b8059b73f72b5d0 (diff) | |
dt-bindings: pinctrl: qcom,eliza-tlmm: Merge QUP1_SE4 lane functions
QUP1_SE4 uses GPIO36 and GPIO37 for two selectable lane pairs. The
previous split added one function name per lane. Since these are usually
configured in pairs in devicetree, it makes more sense to have them
grouped.
So replace the per-lane qup1_se4_l[0-3] names with names for the two
selectable pairs, qup1_se4_01 and qup1_se4_23.
Fixes: 1bd5c56253c5 ("dt-bindings: pinctrl: qcom,eliza-tlmm: Split QUP1_SE4 lanes")
Suggested-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml index fa0177529277..aaaeca8e7bb7 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml @@ -88,8 +88,8 @@ $defs: qlink_little_request, qlink_wmss, qspi0, qspi_clk, qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2_mira, qup1_se2_l2_mirb, qup1_se2_l3_mira, qup1_se2_l3_mirb, - qup1_se3, qup1_se4_l0, qup1_se4_l1, qup1_se4_l2, - qup1_se4_l3, qup1_se5, qup1_se6, qup1_se6_l1_mira, + qup1_se3, qup1_se4_01, qup1_se4_23, + qup1_se5, qup1_se6, qup1_se6_l1_mira, qup1_se6_l1_mirb, qup1_se6_l3_mira, qup1_se6_l3_mirb, qup1_se7, qup1_se7_l0_mira, qup1_se7_l0_mirb, qup1_se7_l1_mira, qup1_se7_l1_mirb, qup2_se0, qup2_se1, |