diff options
| author | Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> | 2026-02-12 15:30:42 -0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2026-03-05 15:52:39 +0100 |
| commit | f82fabe18c75a7703e4bd81a9eabc9aa2303e1fb (patch) | |
| tree | a442eb4d6917c8bc09b0fac90632dc89214ec410 | |
| parent | 22e729c5e5e0c5a35ae9fbc691bb7635dae3378b (diff) | |
thermal: intel: int340x: processor: Move RAPL defaults to MMIO driver
Previously, the MMIO and MSR RAPL interfaces shared the same set of
RAPL defaults provided by common code. However, unlike the MSR
interface, the MMIO RAPL interface does not require CPU-specific
variations in its default handling. Keeping the RAPL defaults in
the RAPL common driver therefore provides no additional benefit.
Move the MMIO defaults into the MMIO interface driver. This change
includes the following updates:
* Introduce a MMIO-local rapl_defaults instance with the appropriate
default callbacks.
* Assign the MMIO-specific rapl_defaults to priv->defaults during
MMIO driver initialization.
No functional changes are expected.
Co-developed-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://patch.msgid.link/20260212233044.329790-11-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| -rw-r--r-- | drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c index e56b18aeda71..5dbeb0a43c8c 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c @@ -19,6 +19,13 @@ static const struct rapl_mmio_regs rapl_mmio_default = { .limits[RAPL_DOMAIN_DRAM] = BIT(POWER_LIMIT2), }; +static const struct rapl_defaults rapl_defaults_mmio = { + .floor_freq_reg_addr = 0, + .check_unit = rapl_default_check_unit, + .set_floor_freq = rapl_default_set_floor_freq, + .compute_time_window = rapl_default_compute_time_window, +}; + static int rapl_mmio_read_raw(int cpu, struct reg_action *ra, bool atomic) { if (!ra->reg.mmio) @@ -67,6 +74,7 @@ int proc_thermal_rapl_add(struct pci_dev *pdev, struct proc_thermal_device *proc rapl_mmio_priv.read_raw = rapl_mmio_read_raw; rapl_mmio_priv.write_raw = rapl_mmio_write_raw; + rapl_mmio_priv.defaults = &rapl_defaults_mmio; rapl_mmio_priv.control_type = powercap_register_control_type(NULL, "intel-rapl-mmio", NULL); if (IS_ERR(rapl_mmio_priv.control_type)) { |