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authorLinus Torvalds <torvalds@linux-foundation.org>2026-10-20 13:00:41 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2026-10-20 13:00:41 -1000
commit4cbdd58dfa7aaad679bf62f81cdbc96a6cb7c6ae (patch)
treee18f6f4b0ee07a3e43d815b6ab3f29af04bf88fa /Documentation/ABI/testing/sysfs-bus-iio-chemical-sgp40
parent5b6dca02b3e2254d2fd5706d76d7ab4610a67296 (diff)
parentf5a78ecccd98a04c47cea1cd63c2a2fdce8a4b48 (diff)
Merge tag 'perf-core-2026-10-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipHEADmaster
Pull perf events updates from Ingo Molnar: - Support SIMD/eGPRs/SSP register sampling in perf (Dapeng Mi, Kan Liang) - Turn amd_uncore_ctx events into a flexible array (Rosen Penev) - Finish the work related to fixing the guest PEBS path to not set unwanted PERF_GLOBAL_CTRL bits, for which urgent fixes are upstream already (Sean Christopherson) - Drop redundant counter slot searches in the AMD uncore driver (Usama Arif) - Don't WARN when the ext_regs_buf allocation fails (vineash) - Annotate x86_pmu::hybrid_pmu with __counted_by_ptr (Thorsten Blum) * tag 'perf-core-2026-10-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits) perf/x86: Don't WARN when the ext_regs_buf allocation fails perf/x86/amd/uncore: Free counter slot by index perf/x86/amd/uncore: Remove redundant event slot scan perf/x86/intel: Check only PMC bits in PEBS_ENABLED when detecting host PEBS usage KVM: VMX: Only tell perf to enable PEBS counters for fully enabled PMCs KVM: VMX: Drop a redundant pmu->global_ctrl check when processing pebs_enable perf/x86/intel: KVM: Handle cross-mapped PEBS PMCs entirely within KVM perf/x86: KVM: Have perf define a dedicated struct for getting guest PEBS data perf/x86/intel: Invert names of intel_ctrl_{guest,host}_mask perf/x86/intel: Annotate x86_pmu::hybrid_pmu with __counted_by_ptr perf/x86/amd/uncore: Turn amd_uncore_ctx events into a flexible array perf/x86/intel: Add sanity check for PEBS record/fragment size perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs perf/x86/intel: Advertise PERF_PMU_CAP_SIMD_REGS capability perf/x86/intel: Support arch-PEBS based SIMD/eGPRs sampling perf/x86: Support SSP sampling using sample_regs_* fields perf/x86: Support eGPRs sampling using sample_regs_* fields perf: Enhance perf_reg_validate() with simd_enabled argument perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields perf/x86: Support ZMM sampling using sample_simd_vec_reg_* fields ...
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