diff options
| author | Thierry Bultel <thierry.bultel.yh@bp.renesas.com> | 2025-05-15 16:18:17 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-05-26 13:51:00 +0200 |
| commit | 4e591b890afa0cbc3479f3b88fa7dc1d28972761 (patch) | |
| tree | caeeb8f02494f52164909397d10cb08152876d6d /Documentation/devicetree/bindings/clock | |
| parent | 6147c5f081708485e32c656931f6a57b14618fcc (diff) | |
dt-bindings: clock: renesas,cpg-mssr: Document RZ/T2H support
Document RZ/T2H (a.k.a. r9a09g077) cpg-mssr (Clock Pulse Generator)
binding.
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250515141828.43444-3-thierry.bultel.yh@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml | 46 |
1 files changed, 35 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml index 77ce3615c65a..708ab6bd7d44 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -52,9 +52,15 @@ properties: - renesas,r8a779f0-cpg-mssr # R-Car S4-8 - renesas,r8a779g0-cpg-mssr # R-Car V4H - renesas,r8a779h0-cpg-mssr # R-Car V4M + - renesas,r9a09g077-cpg-mssr # RZ/T2H reg: - maxItems: 1 + minItems: 1 + items: + - description: base address of register block 0 + - description: base address of register block 1 + description: base addresses of clock controller. Some controllers + (like r9a09g077) use two blocks instead of a single one. clocks: minItems: 1 @@ -92,16 +98,6 @@ properties: the datasheet. const: 1 -if: - not: - properties: - compatible: - items: - enum: - - renesas,r7s9210-cpg-mssr -then: - required: - - '#reset-cells' required: - compatible @@ -111,6 +107,34 @@ required: - '#clock-cells' - '#power-domain-cells' +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-cpg-mssr + then: + properties: + reg: + minItems: 2 + clock-names: + items: + - const: extal + else: + properties: + reg: + maxItems: 1 + - if: + not: + properties: + compatible: + items: + enum: + - renesas,r7s9210-cpg-mssr + then: + required: + - '#reset-cells' + additionalProperties: false examples: |