diff options
| author | Franck LENORMAND <franck.lenormand@nxp.com> | 2020-03-04 10:58:16 +0100 |
|---|---|---|
| committer | Franck LENORMAND <franck.lenormand@nxp.com> | 2020-03-12 09:29:51 +0100 |
| commit | 7dd4eb4742e9c77e0ef9b458b0a48ec71bdead79 (patch) | |
| tree | d5b73b3423ad5ec2f0d9c3b57360ab73955182db /Documentation/devicetree/bindings/mailbox | |
| parent | 13b8e3b1fa0946938fe3836cf2a4d45d9291bb6d (diff) | |
MLK-23421: dt-bindings: mailbox: imx-mu: add SECO MU support
i.MX8/8X SECO MU is dedicated for communication between kernel
and SECO. To use SECO MU more effectivly, add "fsl,imx8-seco-mu"
compatible to support fast IPC.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mailbox')
| -rw-r--r-- | Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt index 9c43357c5924..2dd64b63b10c 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt @@ -23,6 +23,8 @@ Required properties: be included together with SoC specific compatible. There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible to support it. + To communicate with i.MX8 SCU, "fsl,imx8-mu-seco" could be + used for fast IPC - reg : Should contain the registers location and length - interrupts : Interrupt number. The interrupt specifier format depends on the interrupt controller parent. @@ -54,3 +56,10 @@ lsio_mu0: mailbox@5d1b0000 { interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <2>; }; +sec_mu0: mailbox@31560000 { + compatible = "fsl,imx8-mu-seco"; + reg = <0x31560000 0x10000>; + interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + power-domains = <&pd IMX_SC_R_SECO_MU_2>; +}; |