diff options
| author | Frank Li <Frank.Li@nxp.com> | 2025-05-28 12:53:50 -0400 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2025-09-23 10:56:05 +0200 |
| commit | ffc5870fc4e0ea72bf73ad5ab1d648aa0b4f7cbf (patch) | |
| tree | 222644d6917e22a07aab8e2dbf49dcb346a09d72 /Documentation/devicetree/bindings/timer | |
| parent | 409f8fe03e08f92bf5be96cedbcd7a3e8fb2eeaf (diff) | |
dt-bindings: timer: Add fsl,timrot.yaml
Add fsl,timrot.yaml for i.MX23/i.MX28 timer.
Also add a generic fallback compatible string "fsl,timrot" for legacy
devices, which have existed for over 15 years.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250528165351.691848-1-Frank.Li@nxp.com
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
| -rw-r--r-- | Documentation/devicetree/bindings/timer/fsl,timrot.yaml | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/fsl,timrot.yaml b/Documentation/devicetree/bindings/timer/fsl,timrot.yaml new file mode 100644 index 000000000000..d181f274ef9f --- /dev/null +++ b/Documentation/devicetree/bindings/timer/fsl,timrot.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/fsl,timrot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MXS Timer + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +properties: + compatible: + items: + - enum: + - fsl,imx23-timrot + - fsl,imx28-timrot + - const: fsl,timrot + + reg: + maxItems: 1 + + interrupts: + items: + - description: irq for timer0 + - description: irq for timer1 + - description: irq for timer2 + - description: irq for timer3 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + timer: timer@80068000 { + compatible = "fsl,imx28-timrot", "fsl,timrot"; + reg = <0x80068000 0x2000>; + interrupts = <48>, <49>, <50>, <51>; + clocks = <&clks 26>; + }; |