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authorBjorn Helgaas <bhelgaas@google.com>2026-08-21 16:40:44 -0500
committerBjorn Helgaas <bhelgaas@google.com>2026-08-21 16:40:44 -0500
commit3d3fce9435088be669e4473425877259e1cabac3 (patch)
treed0a234c0bd2fe306efc25cd55ee5043a036bfa53 /Documentation/devicetree
parent2a66fae91e356ae0713f7e7fd3caddd089ac2c46 (diff)
parent22a415e623e9ebc79cf0b5c83064af8aa11acdd7 (diff)
Merge branch 'pci/controller/dwc-ultrarisc'
- Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them in the driver (Jia Wang) - Use module_platform_driver() since this may be built as a module, though not removable because IRQs can't be safely disposed (Jia Wang) * pci/controller/dwc-ultrarisc: PCI: ultrarisc: Use module_platform_driver() PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
index 512b935bf5d1..d9d1488e915a 100644
--- a/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml
@@ -43,6 +43,18 @@ properties:
- description: Legacy INTC interrupt
- description: Legacy INTD interrupt
+ clocks:
+ items:
+ - description: PCIe core clock
+ - description: Data Bus Interface (DBI) clock
+ - description: Auxiliary clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: dbi
+ - const: aux
+
interrupt-names:
items:
- const: msi
@@ -55,6 +67,8 @@ required:
- compatible
- reg
- reg-names
+ - clocks
+ - clock-names
- interrupts
- interrupt-names
@@ -71,6 +85,8 @@ examples:
reg = <0x0 0x21000000 0x0 0x01000000>,
<0x0 0x4fff0000 0x0 0x00010000>;
reg-names = "dbi", "config";
+ clocks = <&clkc 9>, <&clkc 7>, <&clkc 10>;
+ clock-names = "core", "dbi", "aux";
ranges = <0x81000000 0x0 0x4fbf0000 0x0 0x4fbf0000 0x0 0x00400000>,
<0x82000000 0x0 0x40000000 0x0 0x40000000 0x0 0x0fbf0000>,
<0xc3000000 0x40 0x00000000 0x40 0x00000000 0xd 0x00000000>;