diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-10-22 06:44:27 -1000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-10-22 06:44:27 -1000 |
| commit | b0e1eda687a2f19a8fa3958303fbb45d493ea46b (patch) | |
| tree | 5b93d55489e7299b5649c5afbd66e24c55cacbe7 /Documentation/devicetree | |
| parent | 7be4bc52fd9e0e55dc9a2e0232b89427d2c4b614 (diff) | |
| parent | 00e917df050d79ac26ec700717680ad6421d2808 (diff) | |
Merge tag 'pwm/for-7.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux
Pull pwm updates from Uwe Kleine-König:
"The usual mix of fixes for older issues, devicetree changes and
cleanups.
Part of this is a shared branch that introduces device-managed
variants of atomic_notifier_chain_register() and
blocking_notifier_chain_register()"
* tag 'pwm/for-7.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux:
dt-bindings: pwm: Add IPQ5210 binding
pwm: tiehrpwm: Clear period on disable to allow reconfiguration
pwm: Allow 32-bit tasks to use the character device
pwm: lp3943: fix NULL pointer dereference for an unconfigured channel
pwm: mtk-disp: Fix period readback
pwm: ipq: Prevent potential 32-bit integer overflow in hi_div calculation
pwm: loongson: Reload PWM configuration through counter reset
pwm: Fix typos in comments
dt-bindings: pwm: Convert TI PWM Subsystem to DT schema
docs: pwm: Fix bracket and punctuation
pwm: iqs620a: Use devm_blocking_notifier_chain_register()
pwm: renesas-tpu: Fix runtime PM reference leak
notifier: add device-managed registration APIs
Diffstat (limited to 'Documentation/devicetree')
3 files changed, 83 insertions, 58 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt deleted file mode 100644 index 4633697fbda1..000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt +++ /dev/null @@ -1,58 +0,0 @@ -TI SOC based PWM Subsystem - -Required properties: -- compatible: Must be "ti,<soc>-pwmss". - for am33xx - compatible = "ti,am33xx-pwmss"; - for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss" - -- reg: physical base address and size of the registers map. -- address-cells: Specify the number of u32 entries needed in child nodes. - Should set to 1. -- size-cells: specify number of u32 entries needed to specify child nodes size - in reg property. Should set to 1. -- ranges: describes the address mapping of a memory-mapped bus. Should set to - physical address map of child's base address, physical address within - parent's address space and length of the address map. For am33xx, - 3 set of child register maps present, ECAP register space, EQEP - register space, EHRPWM register space. - -Also child nodes should also populated under PWMSS DT node. - -Example: -epwmss0: epwmss@48300000 { /* PWMSS for am33xx */ - compatible = "ti,am33xx-pwmss"; - reg = <0x48300000 0x10>; - ti,hwmods = "epwmss0"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x48300100 0x48300100 0x80 /* ECAP */ - 0x48300180 0x48300180 0x80 /* EQEP */ - 0x48300200 0x48300200 0x80>; /* EHRPWM */ - - /* child nodes go here */ -}; - -epwmss0: epwmss@48300000 { /* PWMSS for am4372 */ - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss" - reg = <0x48300000 0x10>; - ti,hwmods = "epwmss0"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x48300100 0x48300100 0x80 /* ECAP */ - 0x48300180 0x48300180 0x80 /* EQEP */ - 0x48300200 0x48300200 0x80>; /* EHRPWM */ - - /* child nodes go here */ -}; - -epwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */ - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"; - reg = <0x4843e000 0x30>; - ti,hwmods = "epwmss0"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - /* child nodes go here */ -}; diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml index f9f1f652e752..c6b9004dd30e 100644 --- a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml @@ -15,6 +15,7 @@ properties: - items: - enum: - qcom,ipq5018-pwm + - qcom,ipq5210-pwm - qcom,ipq5332-pwm - qcom,ipq9574-pwm - const: qcom,ipq6018-pwm diff --git a/Documentation/devicetree/bindings/pwm/ti,am33xx-pwmss.yaml b/Documentation/devicetree/bindings/pwm/ti,am33xx-pwmss.yaml new file mode 100644 index 000000000000..89ce6b02b70c --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/ti,am33xx-pwmss.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/ti,am33xx-pwmss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments SoC PWM Subsystem + +maintainers: + - Eduard Bostina <egbostina@gmail.com> + +properties: + compatible: + oneOf: + - const: ti,am33xx-pwmss + - items: + - enum: + - ti,am4372-pwmss + - ti,dra746-pwmss + - const: ti,am33xx-pwmss + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^(ecap|eqep|pwm|counter)@[0-9a-f]+$": + type: object + description: Child nodes for ECAP, EQEP (counter), and EHRPWM + required: + - compatible + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + pwm@48300000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48300000 0x10>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x48300100 0x48300100 0x80>, /* ECAP */ + <0x48300180 0x48300180 0x80>, /* EQEP */ + <0x48300200 0x48300200 0x80>; /* EHRPWM */ + + pwm@48300100 { + compatible = "ti,am3352-ecap"; + #pwm-cells = <3>; + reg = <0x48300100 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "fck"; + }; + + counter@48300180 { + compatible = "ti,am3352-eqep"; + reg = <0x48300180 0x80>; + clocks = <&l4ls_gclk>; + interrupts = <79>; + }; + + pwm@48300200 { + compatible = "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x80>; + clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; + clock-names = "tbclk", "fck"; + }; + }; |
