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authorDave Jiang <dave.jiang@intel.com>2026-10-13 09:01:39 -0700
committerDave Jiang <dave.jiang@intel.com>2026-10-13 09:01:39 -0700
commitd304df5f329302fff4658cd6ed8f93aec4b94d27 (patch)
tree7733586cca27a7347a37e9542eedbed049f6d8c9 /Documentation/driver-api
parent91320b84095afcaf9e4f676eef5b05346d60eb79 (diff)
parente4478834aa09fd28abaaf774a4bcaa4bbe6804e5 (diff)
Merge branch 'for-7.4/cxl-dcd' into cxl-for-next
Part 1 of DCD support. Functionality disabled. Documentation/cxl: Document DPA partition layout and ordering rules cxl/core: Enforce partition order/simplify partition calls cxl/mem: Configure dynamic capacity interrupts cxl/pci: Factor out interrupt policy check cxl/events: Split event msgnum configuration from irq setup cxl/cdat: Gather DSMAS data for DCD partitions cxl/mem: Read dynamic capacity configuration from the device cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
Diffstat (limited to 'Documentation/driver-api')
-rw-r--r--Documentation/driver-api/cxl/linux/cxl-driver.rst35
-rw-r--r--Documentation/driver-api/cxl/maturity-map.rst4
2 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst
index dd6dd17dc536..212df4fb8d63 100644
--- a/Documentation/driver-api/cxl/linux/cxl-driver.rst
+++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst
@@ -181,6 +181,41 @@ A Memory Device is a discrete base object that is not a port. While the
physical device it belongs to may also host an `endpoint`, the relationship
between an `endpoint` and a `memdev` is not captured in sysfs.
+DPA Partitions
+~~~~~~~~~~~~~~
+A memory device presents its capacity as one flat `Device Physical Address`
+(DPA) space divided into `partitions`, which Linux lays out in a fixed
+order::
+
+ DPA 0 end
+ +---------------+---------------+---------------------------+
+ | ram | pmem | dynamic_ram_1 |
+ +---------------+---------------+---------------------------+
+ part[0] part[1] part[2]
+
+Part of that order is required by the CXL specification and part of it is a
+Linux choice.
+
+The `ram` and `pmem` order is mandated. CXL r4.0 section 8.2.10.9.2.1 "Get
+Partition Info" (4100h), Table 8-310, mandates that volatile capacity starts
+at DPA 0 and pmem starts at the DPA immediately following it.
+
+Dynamic Capacity partitions only need to be 256MB aligned according to
+CXL r4.0 section 8.2.10.9.9.1 "Get Dynamic Capacity Configuration"
+(opcode 4800h), Table 8-347. So a device could leave a gap between ram/pmem
+(static) capacity and its first DC partition, or between one DC partition
+and the next.
+
+Linux chooses not to support gaps between static and dynamic capacity: the
+first DC partition must begin at the DPA immediately following static
+capacity -- after pmem, after ram on a device with no pmem, or at DPA 0 on
+a device with no static capacity at all.
+
+Currently, only one dynamic partition is supported. A device may report up
+to eight (CXL r4.0 Table 8-346); Linux configures the first as its
+`dynamic_ram_1` partition. Gaps between DC partitions are not checked, since
+only the first is used.
+
Port Relationships
~~~~~~~~~~~~~~~~~~
In our example described above, there are four host bridges attached to the
diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
index 282c1102dd81..fefd31899229 100644
--- a/Documentation/driver-api/cxl/maturity-map.rst
+++ b/Documentation/driver-api/cxl/maturity-map.rst
@@ -150,6 +150,10 @@ Memory-pooling
* [1] Hotplug of LDs (via PCI hotplug)
* [0] Dynamic Capacity Device (DCD) Support
+ * [1] DC partition enumeration / configuration (Get DC Config, CDAT DSMAS, event interrupts)
+ * [0] Extent add / release event handling
+ * [0] DC-backed DAX regions
+
Multi-host sharing
------------------