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authorFugang Duan <b38611@freescale.com>2015-08-14 14:46:23 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-20 14:28:52 -0600
commit2e9a6b1ae0865ce8bb1406306e5df0d79f3de5d0 (patch)
treed5bfa96ea1d1fab7e0df0569061935d5187834b1 /Documentation
parentb5a52cb65a85bc66486dd29fe4e2778a7d4e9720 (diff)
MLK-11360-01 crypto: caam_snvs: add snvs clock management
caam_snvs driver involves snvs HP registers access that needs to enable snvs clock source. The patch add the clock management. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/crypto/fsl-sec4.txt9
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
index e4022776ac6e..711d2b19086b 100644
--- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
@@ -364,6 +364,15 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
Definition: A standard property. Specifies the physical
address and length of the SNVS LP configuration registers.
+ - clocks
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the source clock for
+ snvs register access. If i.MX clk driver defines the clock node,
+ it needs user to specify the clocks in device tree for all modules
+ with snvs LP/HP registers access. The modules involved snvs LP/HP
+ registers access are snvs-power key, snvs-rtc, and caam.
+
EXAMPLE
sec_mon_rtc_lp@314000 {
compatible = "fsl,sec-v4.0-mon-rtc-lp";