diff options
| author | Matthew Brost <matthew.brost@intel.com> | 2026-03-12 07:17:56 -0700 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2026-03-12 07:23:23 -0700 |
| commit | 42d3b66d4cdbacfc9d120d2301b8de89cc29a914 (patch) | |
| tree | 999800b4737152481da268f2450088ab2f557115 /Documentation | |
| parent | 635e3eba1ebcd5b92856e975e1d3859b487dc88b (diff) | |
| parent | 58351f46de26bcc4403f9972f7aed430d15cbd03 (diff) | |
Merge drm/drm-next into drm-xe-next
Backmerging to bring in 7.00-rc3. Important ahead GPU SVM merging THP
support.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Diffstat (limited to 'Documentation')
956 files changed, 29433 insertions, 10300 deletions
diff --git a/Documentation/.renames.txt b/Documentation/.renames.txt index c0bd5d3dc8b9..a37d68471d50 100644 --- a/Documentation/.renames.txt +++ b/Documentation/.renames.txt @@ -819,7 +819,6 @@ networking/device_drivers/intel/ixgbe networking/device_drivers/ethernet/intel/i networking/device_drivers/intel/ixgbevf networking/device_drivers/ethernet/intel/ixgbevf networking/device_drivers/marvell/octeontx2 networking/device_drivers/ethernet/marvell/octeontx2 networking/device_drivers/microsoft/netvsc networking/device_drivers/ethernet/microsoft/netvsc -networking/device_drivers/neterion/s2io networking/device_drivers/ethernet/neterion/s2io networking/device_drivers/netronome/nfp networking/device_drivers/ethernet/netronome/nfp networking/device_drivers/pensando/ionic networking/device_drivers/ethernet/pensando/ionic networking/device_drivers/qualcomm/rmnet networking/device_drivers/cellular/qualcomm/rmnet diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block index 0ed10aeff86b..09a9d4aca0fd 100644 --- a/Documentation/ABI/stable/sysfs-block +++ b/Documentation/ABI/stable/sysfs-block @@ -609,6 +609,51 @@ Description: enabled, and whether tags are shared. +What: /sys/block/<disk>/queue/async_depth +Date: August 2025 +Contact: linux-block@vger.kernel.org +Description: + [RW] Controls how many asynchronous requests may be allocated + in the block layer. The value is always capped at nr_requests. + + When no elevator is active (none): + + - async_depth is always equal to nr_requests. + + For bfq scheduler: + + - By default, async_depth is set to 75% of nr_requests. + Internal limits are then derived from this value: + + * Sync writes: limited to async_depth (≈75% of nr_requests). + * Async I/O: limited to ~2/3 of async_depth (≈50% of + nr_requests). + + If a bfq_queue is weight-raised: + + * Sync writes: limited to ~1/2 of async_depth (≈37% of + nr_requests). + * Async I/O: limited to ~1/4 of async_depth (≈18% of + nr_requests). + + - If the user writes a custom value to async_depth, BFQ will + recompute these limits proportionally based on the new value. + + For Kyber: + + - By default async_depth is set to 75% of nr_requests. + - If the user writes a custom value to async_depth, then it + overrides the default and directly controls the limit for + writes and async I/O. + + For mq-deadline: + + - By default async_depth is set to nr_requests. + - If the user writes a custom value to async_depth, then it + overrides the default and directly controls the limit for + writes and async I/O. + + What: /sys/block/<disk>/queue/nr_zones Date: November 2018 Contact: Damien Le Moal <damien.lemoal@wdc.com> diff --git a/Documentation/ABI/stable/sysfs-driver-dma-idxd b/Documentation/ABI/stable/sysfs-driver-dma-idxd index 4a355e6747ae..08d030159f09 100644 --- a/Documentation/ABI/stable/sysfs-driver-dma-idxd +++ b/Documentation/ABI/stable/sysfs-driver-dma-idxd @@ -136,6 +136,21 @@ Description: The last executed device administrative command's status/error. Also last configuration error overloaded. Writing to it will clear the status. +What: /sys/bus/dsa/devices/dsa<m>/dsacaps +Date: April 5, 2026 +KernelVersion: 6.20.0 +Contact: dmaengine@vger.kernel.org +Description: The DSA3 specification introduces three new capability + registers: dsacap[0-2]. User components (e.g., configuration + libraries and workload applications) require this information + to properly utilize the DSA3 features. + This includes SGL capability support, Enabling hardware-specific + optimizations, Configuring memory, etc. + The output format is '<dsacap2>,<dsacap1>,<dsacap0>' where each + DSA cap value is a 64 bit hex value. + This attribute should only be visible on DSA devices of version + 3 or later. + What: /sys/bus/dsa/devices/dsa<m>/iaa_cap Date: Sept 14, 2022 KernelVersion: 6.0.0 diff --git a/Documentation/ABI/stable/sysfs-driver-speakup b/Documentation/ABI/stable/sysfs-driver-speakup index bcb6831aa114..8b508b4a7a00 100644 --- a/Documentation/ABI/stable/sysfs-driver-speakup +++ b/Documentation/ABI/stable/sysfs-driver-speakup @@ -23,8 +23,7 @@ What: /sys/accessibility/speakup/bleep_time KernelVersion: 2.6 Contact: speakup@linux-speakup.org Description: This controls the duration of the PC speaker beeps speakup - produces. - TODO: What are the units? Jiffies? + produces, in milliseconds. What: /sys/accessibility/speakup/cursor_time KernelVersion: 2.6 diff --git a/Documentation/ABI/stable/sysfs-kernel-time-aux-clocks b/Documentation/ABI/stable/sysfs-kernel-time-aux-clocks index 825508f42af6..e1a894c8dd1b 100644 --- a/Documentation/ABI/stable/sysfs-kernel-time-aux-clocks +++ b/Documentation/ABI/stable/sysfs-kernel-time-aux-clocks @@ -1,5 +1,5 @@ What: /sys/kernel/time/aux_clocks/<ID>/enable Date: May 2025 -Contact: Thomas Gleixner <tglx@linutronix.de> +Contact: Thomas Gleixner <tglx@kernel.org> Description: Controls the enablement of auxiliary clock timekeepers. diff --git a/Documentation/ABI/testing/configfs-tsm-report b/Documentation/ABI/testing/configfs-tsm-report index 534408bc1408..7a6a5045a7d5 100644 --- a/Documentation/ABI/testing/configfs-tsm-report +++ b/Documentation/ABI/testing/configfs-tsm-report @@ -17,6 +17,12 @@ Description: where the implementation is conveyed via the @provider attribute. + This interface fails reads and sets errno to EFBIG when the + report generated by @provider exceeds the configfs-tsm-report + internal maximums. Contact the platform provider for the + compatible security module, driver, and attestation library + combination. + What: /sys/kernel/config/tsm/report/$name/auxblob Date: October, 2023 KernelVersion: v6.7 @@ -31,6 +37,9 @@ Description: Standardization v2.03 Section 4.1.8.1 MSG_REPORT_REQ. https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf + See "EFBIG" comment in the @outblob description for potential + error conditions. + What: /sys/kernel/config/tsm/report/$name/manifestblob Date: January, 2024 KernelVersion: v6.10 @@ -43,6 +52,9 @@ Description: See 'service_provider' for information on the format of the manifest blob. + See "EFBIG" comment in the @outblob description for potential + error conditions. + What: /sys/kernel/config/tsm/report/$name/provider Date: September, 2023 KernelVersion: v6.7 @@ -61,6 +73,10 @@ Description: Library Revision 0.8 Appendix 4,5 https://download.01.org/intel-sgx/latest/dcap-latest/linux/docs/Intel_TDX_DCAP_Quoting_Library_API.pdf + Intel TDX platforms with DICE-based attestation use CBOR Web Token + (CWT) format for the Quote payload. This is indicated by the Quote + size exceeding 8KB. + What: /sys/kernel/config/tsm/report/$name/generation Date: September, 2023 KernelVersion: v6.7 diff --git a/Documentation/ABI/testing/configfs-usb-gadget-midi b/Documentation/ABI/testing/configfs-usb-gadget-midi index 07389cddd51a..d6bd67bb91fc 100644 --- a/Documentation/ABI/testing/configfs-usb-gadget-midi +++ b/Documentation/ABI/testing/configfs-usb-gadget-midi @@ -4,11 +4,12 @@ KernelVersion: 3.19 Description: The attributes: - ========== ==================================== - index index value for the USB MIDI adapter - id ID string for the USB MIDI adapter - buflen MIDI buffer length - qlen USB read request queue length - in_ports number of MIDI input ports - out_ports number of MIDI output ports - ========== ==================================== + ================ ==================================== + index index value for the USB MIDI adapter + id ID string for the USB MIDI adapter + buflen MIDI buffer length + qlen USB read request queue length + in_ports number of MIDI input ports + out_ports number of MIDI output ports + interface_string USB AudioControl interface string + ================ ==================================== diff --git a/Documentation/ABI/testing/pstore b/Documentation/ABI/testing/pstore index d3cff4a7ee10..dfe2d9801c3a 100644 --- a/Documentation/ABI/testing/pstore +++ b/Documentation/ABI/testing/pstore @@ -26,7 +26,7 @@ Description: Generic interface to platform dependent persistent storage. Once the information in a file has been read, removing the file will signal to the underlying persistent storage - device that it can reclaim the space for later re-use:: + device that it can reclaim the space for later reuse:: $ rm /sys/fs/pstore/dmesg-erst-1 diff --git a/Documentation/ABI/testing/sysfs-block-zram b/Documentation/ABI/testing/sysfs-block-zram index 36c57de0a10a..e538d4850d61 100644 --- a/Documentation/ABI/testing/sysfs-block-zram +++ b/Documentation/ABI/testing/sysfs-block-zram @@ -150,3 +150,17 @@ Contact: Sergey Senozhatsky <senozhatsky@chromium.org> Description: The algorithm_params file is write-only and is used to setup compression algorithm parameters. + +What: /sys/block/zram<id>/writeback_compressed +Date: Decemeber 2025 +Contact: Richard Chang <richardycc@google.com> +Description: + The writeback_compressed device atrribute toggles compressed + writeback feature. + +What: /sys/block/zram<id>/writeback_batch_size +Date: November 2025 +Contact: Sergey Senozhatsky <senozhatsky@chromium.org> +Description: + The writeback_batch_size device atrribute sets the maximum + number of in-flight writeback operations. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source index 321e3ee1fc9d..c8c58914116e 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source @@ -1,7 +1,7 @@ What: /sys/bus/coresight/devices/dummy_source<N>/enable_source Date: Dec 2024 KernelVersion: 6.14 -Contact: Mao Jinlong <quic_jinlmao@quicinc.com> +Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com> Description: (RW) Enable/disable tracing of dummy source. A sink should be activated before enabling the source. The path of coresight components linking the source to the sink is configured and managed automatically by the @@ -10,7 +10,7 @@ Description: (RW) Enable/disable tracing of dummy source. A sink should be activ What: /sys/bus/coresight/devices/dummy_source<N>/traceid Date: Dec 2024 KernelVersion: 6.14 -Contact: Mao Jinlong <quic_jinlmao@quicinc.com> +Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com> Description: (R) Show the trace ID that will appear in the trace stream coming from this trace entity. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda new file mode 100644 index 000000000000..650431feae45 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda @@ -0,0 +1,69 @@ +What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Enable/disable cross trigger synchronization sequence interface. + +What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Enable/disable cross trigger FLAG packet request interface. + +What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Enable/disable cross trigger FREQ packet request interface. + +What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Enable/disable the timestamp for all FREQ packets. + +What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Configure the CMB/MCMB channel mode for all enabled ports. + Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode. + +What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Set global (all ports) flush request bit. The bit remains set until a + global flush request sequence completes. + +What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Set mode the of the syncr counter. + mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests + mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K + data by writing a value 13 to the COUNT[11:7] field. + +What: /sys/bus/coresight/devices/<tpda-name>/syncr_count +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Set value the of the syncr counter. + Range: 0-4095 + +What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req +Date: December 2025 +KernelVersion: 6.20 +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com> +Description: + (RW) Configure the bit i to requests a flush operation of port i on the TPDA. + The requested bit(s) remain set until the flush request completes. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index 98f1c6545027..f8016df64532 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -1,7 +1,7 @@ What: /sys/bus/coresight/devices/<tpdm-name>/integration_test Date: January 2023 KernelVersion: 6.2 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Run integration test for tpdm. Integration test will generate test data for tpdm. It can help to make @@ -15,7 +15,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Reset the dataset of the tpdm. @@ -25,7 +25,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the trigger type of the DSB for tpdm. @@ -36,7 +36,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the trigger timestamp of the DSB for tpdm. @@ -47,7 +47,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the programming mode of the DSB for tpdm. @@ -61,7 +61,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the index number of the edge detection for the DSB subunit TPDM. Since there are at most 256 edge detections, this @@ -70,7 +70,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: Write a data to control the edge detection corresponding to the index number. Before writing data to this sysfs file, @@ -86,7 +86,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: Write a data to mask the edge detection corresponding to the index number. Before writing data to this sysfs file, "ctrl_idx" should @@ -98,21 +98,21 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: Read a set of the edge control value of the DSB in TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: Read a set of the edge control mask of the DSB in TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the value of the trigger pattern for the DSB subunit TPDM. @@ -120,7 +120,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the mask of the trigger pattern for the DSB subunit TPDM. @@ -128,21 +128,21 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the value of the pattern for the DSB subunit TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the mask of the pattern for the DSB subunit TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Set the pattern timestamp of DSB tpdm. Read the pattern timestamp of DSB tpdm. @@ -154,7 +154,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Set the pattern type of DSB tpdm. Read the pattern type of DSB tpdm. @@ -166,7 +166,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31] Date: March 2023 KernelVersion: 6.7 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the MSR(mux select register) for the DSB subunit TPDM. @@ -174,7 +174,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Set the data collection mode of CMB tpdm. Continuous change creates CMB data set elements on every CMBCLK edge. Trace-on-change creates CMB data set elements only when a new @@ -188,7 +188,7 @@ Description: (Write) Set the data collection mode of CMB tpdm. Continuous What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the value of the trigger pattern for the CMB subunit TPDM. @@ -196,7 +196,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the mask of the trigger pattern for the CMB subunit TPDM. @@ -204,21 +204,21 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the value of the pattern for the CMB subunit TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the mask of the pattern for the CMB subunit TPDM. What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (Write) Set the pattern timestamp of CMB tpdm. Read the pattern timestamp of CMB tpdm. @@ -230,7 +230,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the trigger timestamp of the CMB for tpdm. @@ -241,7 +241,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Read or write the status of timestamp upon all interface. Only value 0 and 1 can be written to this node. Set this node to 1 to request @@ -253,7 +253,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31] Date: January 2024 KernelVersion: 6.9 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the MSR(mux select register) for the CMB subunit TPDM. @@ -261,7 +261,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane Date: Feb 2025 KernelVersion 6.15 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get which lane participates in the output pattern match cross trigger mechanism for the MCMB subunit TPDM. @@ -269,7 +269,7 @@ Description: What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select Date: Feb 2025 KernelVersion 6.15 -Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com> Description: (RW) Set/Get the enablement of the individual lane. diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-rdpmc b/Documentation/ABI/testing/sysfs-bus-event_source-devices-rdpmc new file mode 100644 index 000000000000..59ec18bbb418 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-rdpmc @@ -0,0 +1,44 @@ +What: /sys/bus/event_source/devices/cpu.../rdpmc +Date: November 2011 +KernelVersion: 3.10 +Contact: Linux kernel mailing list linux-kernel@vger.kernel.org +Description: The /sys/bus/event_source/devices/cpu.../rdpmc attribute + is used to show/manage if rdpmc instruction can be + executed in user space. This attribute supports 3 numbers. + - rdpmc = 0 + user space rdpmc is globally disabled for all PMU + counters. + - rdpmc = 1 + user space rdpmc is globally enabled only in event mmap + ioctl called time window. If the mmap region is unmapped, + user space rdpmc is disabled again. + - rdpmc = 2 + user space rdpmc is globally enabled for all PMU + counters. + + In the Intel platforms supporting counter level's user + space rdpmc disable feature (CPUID.23H.EBX[2] = 1), the + meaning of 3 numbers is extended to + - rdpmc = 0 + global user space rdpmc and counter level's user space + rdpmc of all counters are both disabled. + - rdpmc = 1 + No changes on behavior of global user space rdpmc. + counter level's rdpmc of system-wide events is disabled + but counter level's rdpmc of non-system-wide events is + enabled. + - rdpmc = 2 + global user space rdpmc and counter level's user space + rdpmc of all counters are both enabled unconditionally. + + The default value of rdpmc is 1. + + Please notice: + - global user space rdpmc's behavior would change + immediately along with the rdpmc value's change, + but the behavior of counter level's user space rdpmc + won't take effect immediately until the event is + reactivated or recreated. + - The rdpmc attribute is global, even for x86 hybrid + platforms. For example, changing cpu_core/rdpmc will + also change cpu_atom/rdpmc. diff --git a/Documentation/ABI/testing/sysfs-bus-i3c b/Documentation/ABI/testing/sysfs-bus-i3c index c812ab180ff4..c1e048957a01 100644 --- a/Documentation/ABI/testing/sysfs-bus-i3c +++ b/Documentation/ABI/testing/sysfs-bus-i3c @@ -161,3 +161,14 @@ Contact: linux-i3c@vger.kernel.org Description: These directories are just symbolic links to /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>. + +What: /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>/dev_nack_retry_count +KernelVersion: 6.18 +Contact: linux-i3c@vger.kernel.org +Description: + Expose the dev_nak_retry_count which controls the number of + automatic retries that will be performed by the controller when + the target device returns a NACK response. A value of 0 disables + the automatic retries. Exist only when I3C constroller supports + this retry on nack feature. + diff --git a/Documentation/ABI/testing/sysfs-bus-iio-cros-ec b/Documentation/ABI/testing/sysfs-bus-iio-cros-ec index 9e3926243797..3de1dfc98389 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-cros-ec +++ b/Documentation/ABI/testing/sysfs-bus-iio-cros-ec @@ -3,9 +3,12 @@ Date: July 2015 KernelVersion: 4.7 Contact: linux-iio@vger.kernel.org Description: - Writing '1' will perform a FOC (Fast Online Calibration). The - corresponding calibration offsets can be read from `*_calibbias` - entries. + Writing '1' either perform a FOC (Fast Online Calibration) or + enter calibration mode. + Writing '0` exits calibration mode. It is a NOP for FOC enabled + sensors. + The corresponding calibration offsets can be read from `*_calibbias` + entries. What: /sys/bus/iio/devices/iio:deviceX/id Date: September 2017 diff --git a/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd b/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd index fc82aa4e54b0..d10e6de3adb2 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd +++ b/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd @@ -85,3 +85,45 @@ Description: up to 5000. The default value is 64 ms. This polling interval is used while DbC is enabled but has no active data transfers. + +What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_serial +Date: January 2026 +Contact: Åukasz Bartosik <ukaszb@chromium.org> +Description: + The dbc_serial attribute allows to change the serial number + string descriptor presented by the debug device when a host + requests a string descriptor with iSerialNumber index. + Index is found in the iSerialNumber field in the device + descriptor. + Value can only be changed while debug capability (DbC) is in + disabled state to prevent USB device descriptor change while + connected to a USB host. + The default value is "0001". + The field length can be from 1 to 126 characters. + +What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_product +Date: January 2026 +Contact: Åukasz Bartosik <ukaszb@chromium.org> +Description: + The dbc_product attribute allows to change the product string + descriptor presented by the debug device when a host requests + a string descriptor with iProduct index. + Index is found in the iProduct field in the device descriptor. + Value can only be changed while debug capability (DbC) is in + disabled state to prevent USB device descriptor change while + connected to a USB host. + The default value is "Linux USB Debug Target". + The field length can be from 1 to 126 characters. + +What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_manufacturer +Date: January 2026 +Contact: Åukasz Bartosik <ukaszb@chromium.org> +Description: + The dbc_manufacturer attribute allows to change the manufacturer + string descriptor presented by the debug device when a host + requests a string descriptor with iManufacturer index. + Value can only be changed while debug capability (DbC) is in + disabled state to prevent USB device descriptor change while + connected to a USB host. + The default value is "Linux Foundation". + The field length can be from 1 to 126 characters. diff --git a/Documentation/ABI/testing/sysfs-class-spi-eeprom b/Documentation/ABI/testing/sysfs-class-spi-eeprom index 1ff757982079..f4bc7d9454cf 100644 --- a/Documentation/ABI/testing/sysfs-class-spi-eeprom +++ b/Documentation/ABI/testing/sysfs-class-spi-eeprom @@ -17,3 +17,14 @@ Description: from the device. This is a read-only attribute. + +What: /sys/class/spi_master/spi<bus>/spi<bus>.<dev>/jedec_id +Date: January 2026 +KernelVersion: 6.19 +Contact: Patrick Wicki <patrick.wicki@siemens.com> +Description: + Contains the raw JEDEC ID bytes returned by the RDID (0x9f) command. The + bytes are exposed as a hex string in big-endian order as read from the + device. + + This is a read-only attribute. diff --git a/Documentation/ABI/testing/sysfs-class-tee b/Documentation/ABI/testing/sysfs-class-tee index c9144d16003e..1a0a3050aaa9 100644 --- a/Documentation/ABI/testing/sysfs-class-tee +++ b/Documentation/ABI/testing/sysfs-class-tee @@ -13,3 +13,13 @@ Description: space if the variable is absent. The primary purpose of this variable is to let systemd know whether tee-supplicant is needed in the early boot with initramfs. + +What: /sys/class/tee/tee{,priv}X/revision +Date: Jan 2026 +KernelVersion: 6.19 +Contact: op-tee@lists.trustedfirmware.org +Description: + Read-only revision string reported by the TEE driver. This is + for diagnostics only and must not be used to infer feature + support. Use TEE_IOC_VERSION for capability and compatibility + checks. diff --git a/Documentation/ABI/testing/sysfs-class-tsm b/Documentation/ABI/testing/sysfs-class-tsm index 6fc1a5ac6da1..2949468deaf7 100644 --- a/Documentation/ABI/testing/sysfs-class-tsm +++ b/Documentation/ABI/testing/sysfs-class-tsm @@ -7,13 +7,3 @@ Description: signals when the PCI layer is able to support establishment of link encryption and other device-security features coordinated through a platform tsm. - -What: /sys/class/tsm/tsmN/streamH.R.E -Contact: linux-pci@vger.kernel.org -Description: - (RO) When a host bridge has established a secure connection via - the platform TSM, symlink appears. The primary function of this - is have a system global review of TSM resource consumption - across host bridges. The link points to the endpoint PCI device - and matches the same link published by the host bridge. See - Documentation/ABI/testing/sysfs-devices-pci-host-bridge. diff --git a/Documentation/ABI/testing/sysfs-class-typec b/Documentation/ABI/testing/sysfs-class-typec index 38e101c17a00..737b76828b50 100644 --- a/Documentation/ABI/testing/sysfs-class-typec +++ b/Documentation/ABI/testing/sysfs-class-typec @@ -162,6 +162,17 @@ Description: Lists the supported USB Modes. The default USB mode that is used - usb3 (USB 3.2) - usb4 (USB4) +What: /sys/class/typec/<port>/<alt-mode>/priority +Date: July 2025 +Contact: Andrei Kuchynski <akuchynski@chromium.org> +Description: + Displays and allows setting the priority for a specific alternate mode. + The priority is an integer in the range 0-255. A lower numerical value + indicates a higher priority (0 is the highest). + If the new value is already in use by another mode, the priority of the + conflicting mode and any subsequent modes will be incremented until they + are all unique. + USB Type-C partner devices (eg. /sys/class/typec/port0-partner/) What: /sys/class/typec/<port>-partner/accessory_mode diff --git a/Documentation/ABI/testing/sysfs-devices-soc b/Documentation/ABI/testing/sysfs-devices-soc index 5269808ec35f..cb6776a4afe0 100644 --- a/Documentation/ABI/testing/sysfs-devices-soc +++ b/Documentation/ABI/testing/sysfs-devices-soc @@ -17,14 +17,14 @@ Date: January 2012 contact: Lee Jones <lee@kernel.org> Description: Read-only attribute common to all SoCs. Contains the SoC machine - name (e.g. Ux500). + name (e.g. DB8500). What: /sys/devices/socX/family Date: January 2012 contact: Lee Jones <lee@kernel.org> Description: Read-only attribute common to all SoCs. Contains SoC family name - (e.g. DB8500). + (e.g. ux500). On many of ARM based silicon with SMCCC v1.2+ compliant firmware this will contain the JEDEC JEP106 manufacturer’s identification diff --git a/Documentation/ABI/testing/sysfs-driver-ccp b/Documentation/ABI/testing/sysfs-driver-ccp index ee6b787eee7a..6ec74b9a292a 100644 --- a/Documentation/ABI/testing/sysfs-driver-ccp +++ b/Documentation/ABI/testing/sysfs-driver-ccp @@ -8,6 +8,21 @@ Description: 0: Not fused 1: Fused +What: /sys/bus/pci/devices/<BDF>/boot_integrity +Date: April 2026 +KernelVersion: 6.20 +Contact: mario.limonciello@amd.com +Description: + The /sys/bus/pci/devices/<BDF>/boot_integrity reports + whether the AMD CPU or APU is used for a hardware root of trust + during the boot process. + Possible values: + 0: Not hardware root of trust. + 1: Hardware root of trust + + NOTE: Vendors may provide design specific alternative hardware + root of trust implementations. + What: /sys/bus/pci/devices/<BDF>/debug_lock_on Date: June 2022 KernelVersion: 5.19 diff --git a/Documentation/ABI/testing/sysfs-driver-uniwill-laptop b/Documentation/ABI/testing/sysfs-driver-uniwill-laptop index eaeb659793d2..2df70792968f 100644 --- a/Documentation/ABI/testing/sysfs-driver-uniwill-laptop +++ b/Documentation/ABI/testing/sysfs-driver-uniwill-laptop @@ -1,4 +1,4 @@ -What: /sys/bus/platform/devices/INOU0000:XX/fn_lock_toggle_enable +What: /sys/bus/platform/devices/INOU0000:XX/fn_lock Date: November 2025 KernelVersion: 6.19 Contact: Armin Wolf <W_Armin@gmx.de> @@ -8,15 +8,15 @@ Description: Reading this file returns the current enable status of the FN lock functionality. -What: /sys/bus/platform/devices/INOU0000:XX/super_key_toggle_enable +What: /sys/bus/platform/devices/INOU0000:XX/super_key_enable Date: November 2025 KernelVersion: 6.19 Contact: Armin Wolf <W_Armin@gmx.de> Description: - Allows userspace applications to enable/disable the super key functionality - of the integrated keyboard by writing "1"/"0" into this file. + Allows userspace applications to enable/disable the super key of the integrated + keyboard by writing "1"/"0" into this file. - Reading this file returns the current enable status of the super key functionality. + Reading this file returns the current enable status of the super key. What: /sys/bus/platform/devices/INOU0000:XX/touchpad_toggle_enable Date: November 2025 diff --git a/Documentation/ABI/testing/sysfs-firmware-plpks b/Documentation/ABI/testing/sysfs-firmware-plpks new file mode 100644 index 000000000000..cba061e4eee2 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-firmware-plpks @@ -0,0 +1,58 @@ +What: /sys/firmware/plpks/config +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: This optional directory contains read-only config attributes as + defined by the PLPKS implementation. All data is in ASCII + format. + +What: /sys/firmware/plpks/config/version +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Config version as reported by the hypervisor in ASCII decimal + format. + +What: /sys/firmware/plpks/config/max_object_size +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Maximum allowed size of objects in the keystore in bytes, + represented in ASCII decimal format. + + This is not necessarily the same as the max size that can be + written to an update file as writes can contain more than + object data, you should use the size of the update file for + that purpose. + +What: /sys/firmware/plpks/config/total_size +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Total size of the PLPKS in bytes, represented in ASCII decimal + format. + +What: /sys/firmware/plpks/config/used_space +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Current space consumed by the key store, in bytes, represented + in ASCII decimal format. + +What: /sys/firmware/plpks/config/supported_policies +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Bitmask of supported policy flags by the hypervisor, represented + as an 8 byte hexadecimal ASCII string. Consult the hypervisor + documentation for what these flags are. + +What: /sys/firmware/plpks/config/signed_update_algorithms +Date: February 2023 +Contact: Nayna Jain <nayna@linux.ibm.com> +Description: Bitmask of flags indicating which algorithms the hypervisor + supports for signed update of objects, represented as a 16 byte + hexadecimal ASCII string. Consult the hypervisor documentation + for what these flags mean. + +What: /sys/firmware/plpks/config/wrapping_features +Date: November 2025 +Contact: Srish Srinivasan <ssrish@linux.ibm.com> +Description: Bitmask of the wrapping features indicating the wrapping + algorithms that are supported for the H_PKS_WRAP_OBJECT requests + , represented as a 8 byte hexadecimal ASCII string. Consult the + hypervisor documentation for what these flags mean. diff --git a/Documentation/ABI/testing/sysfs-fs-erofs b/Documentation/ABI/testing/sysfs-fs-erofs index 76d9808ed581..e4cf6fc6a106 100644 --- a/Documentation/ABI/testing/sysfs-fs-erofs +++ b/Documentation/ABI/testing/sysfs-fs-erofs @@ -3,19 +3,23 @@ Date: November 2021 Contact: "Huang Jianan" <huangjianan@oppo.com> Description: Shows all enabled kernel features. Supported features: - zero_padding, compr_cfgs, big_pcluster, chunked_file, - device_table, compr_head2, sb_chksum, ztailpacking, - dedupe, fragments, 48bit, metabox. + compr_cfgs, big_pcluster, chunked_file, device_table, + compr_head2, sb_chksum, ztailpacking, dedupe, fragments, + 48bit, metabox. What: /sys/fs/erofs/<disk>/sync_decompress Date: November 2021 Contact: "Huang Jianan" <huangjianan@oppo.com> -Description: Control strategy of sync decompression: +Description: Control strategy of synchronous decompression. Synchronous + decompression tries to decompress in the reader thread for + synchronous reads and small asynchronous reads (<= 12 KiB): - - 0 (default, auto): enable for readpage, and enable for - readahead on atomic contexts only. - - 1 (force on): enable for readpage and readahead. - - 2 (force off): disable for all situations. + - 0 (auto, default): apply to synchronous reads only, but will + switch to 1 (force on) if any decompression + request is detected in atomic contexts; + - 1 (force on): apply to synchronous reads and small + asynchronous reads; + - 2 (force off): disable synchronous decompression completely. What: /sys/fs/erofs/<disk>/drop_caches Date: November 2024 diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 770470e0598b..c1d2b3fd9c65 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -520,7 +520,7 @@ What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio Date: January 2021 Contact: "Daeho Jeong" <daehojeong@google.com> Description: Give a way to change checkpoint merge daemon's io priority. - Its default value is "be,3", which means "BE" I/O class and + Its default value is "rt,3", which means "RT" I/O class and I/O priority "3". We can select the class between "rt" and "be", and set the I/O priority within valid range of it. "," delimiter is necessary in between I/O class and priority number. @@ -732,7 +732,7 @@ Description: Support configuring fault injection type, should be FAULT_TRUNCATE 0x00000400 FAULT_READ_IO 0x00000800 FAULT_CHECKPOINT 0x00001000 - FAULT_DISCARD 0x00002000 + FAULT_DISCARD 0x00002000 (obsolete) FAULT_WRITE_IO 0x00004000 FAULT_SLAB_ALLOC 0x00008000 FAULT_DQUOT_INIT 0x00010000 @@ -741,8 +741,10 @@ Description: Support configuring fault injection type, should be FAULT_BLKADDR_CONSISTENCE 0x00080000 FAULT_NO_SEGMENT 0x00100000 FAULT_INCONSISTENT_FOOTER 0x00200000 - FAULT_TIMEOUT 0x00400000 (1000ms) + FAULT_ATOMIC_TIMEOUT 0x00400000 (1000ms) FAULT_VMALLOC 0x00800000 + FAULT_LOCK_TIMEOUT 0x01000000 (1000ms) + FAULT_SKIP_WRITE 0x02000000 =========================== ========== What: /sys/fs/f2fs/<disk>/discard_io_aware_gran @@ -939,3 +941,57 @@ Description: Controls write priority in multi-devices setups. A value of 0 means allocate_section_policy = 1 Prioritize writing to section before allocate_section_hint allocate_section_policy = 2 Prioritize writing to section after allocate_section_hint =========================== ========================================================== + +What: /sys/fs/f2fs/<disk>/max_lock_elapsed_time +Date: December 2025 +Contact: "Chao Yu" <chao@kernel.org> +Description: This is a threshold, once a thread enters critical region that lock covers, total + elapsed time exceeds this threshold, f2fs will print tracepoint to dump information + of related context. This sysfs entry can be used to control the value of threshold, + by default, the value is 500 ms. + +What: /sys/fs/f2fs/<disk>/inject_timeout_type +Date: December 2025 +Contact: "Chao Yu" <chao@kernel.org> +Description: This sysfs entry can be used to change type of injected timeout: + ========== =============================== + Flag_Value Flag_Description + ========== =============================== + 0x00000000 No timeout (default) + 0x00000001 Simulate running time + 0x00000002 Simulate IO type sleep time + 0x00000003 Simulate Non-IO type sleep time + 0x00000004 Simulate runnable time + ========== =============================== + +What: /sys/fs/f2fs/<disk>/adjust_lock_priority +Date: January 2026 +Contact: "Chao Yu" <chao@kernel.org> +Description: This sysfs entry can be used to enable/disable to adjust priority for task + which is in critical region covered by lock. + ========== ================== + Flag_Value Flag_Description + ========== ================== + 0x00000000 Disabled (default) + 0x00000001 cp_rwsem + 0x00000002 node_change + 0x00000004 node_write + 0x00000008 gc_lock + 0x00000010 cp_global + 0x00000020 io_rwsem + ========== ================== + +What: /sys/fs/f2fs/<disk>/lock_duration_priority +Date: January 2026 +Contact: "Chao Yu" <chao@kernel.org> +Description: f2fs can tune priority of thread which has entered into critical region covered by + f2fs rwsemphore lock. This sysfs entry can be used to control priority value, the + range is [100,139], by default the value is 120. + +What: /sys/fs/f2fs/<disk>/critical_task_priority +Date: February 2026 +Contact: "Chao Yu" <chao@kernel.org> +Description: It can be used to tune priority of f2fs critical task, e.g. f2fs_ckpt, f2fs_gc + threads, limitation as below: + - it requires user has CAP_SYS_NICE capability. + - the range is [100, 139], by default the value is 100. diff --git a/Documentation/ABI/testing/sysfs-kernel-dmabuf-buffers b/Documentation/ABI/testing/sysfs-kernel-dmabuf-buffers deleted file mode 100644 index 5d3bc997dc64..000000000000 --- a/Documentation/ABI/testing/sysfs-kernel-dmabuf-buffers +++ /dev/null @@ -1,24 +0,0 @@ -What: /sys/kernel/dmabuf/buffers -Date: May 2021 -KernelVersion: v5.13 -Contact: Hridya Valsaraju <hridya@google.com> -Description: The /sys/kernel/dmabuf/buffers directory contains a - snapshot of the internal state of every DMA-BUF. - /sys/kernel/dmabuf/buffers/<inode_number> will contain the - statistics for the DMA-BUF with the unique inode number - <inode_number> -Users: kernel memory tuning/debugging tools - -What: /sys/kernel/dmabuf/buffers/<inode_number>/exporter_name -Date: May 2021 -KernelVersion: v5.13 -Contact: Hridya Valsaraju <hridya@google.com> -Description: This file is read-only and contains the name of the exporter of - the DMA-BUF. - -What: /sys/kernel/dmabuf/buffers/<inode_number>/size -Date: May 2021 -KernelVersion: v5.13 -Contact: Hridya Valsaraju <hridya@google.com> -Description: This file is read-only and specifies the size of the DMA-BUF in - bytes. diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-damon b/Documentation/ABI/testing/sysfs-kernel-mm-damon index 4fb8b7a6d625..f2af2ddedd32 100644 --- a/Documentation/ABI/testing/sysfs-kernel-mm-damon +++ b/Documentation/ABI/testing/sysfs-kernel-mm-damon @@ -516,6 +516,19 @@ Contact: SeongJae Park <sj@kernel.org> Description: Reading this file returns the number of the exceed events of the scheme's quotas. +What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/stats/nr_snapshots +Date: Dec 2025 +Contact: SeongJae Park <sj@kernel.org> +Description: Reading this file returns the total number of DAMON snapshots + that the scheme has tried to be applied. + +What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/stats/max_nr_snapshots +Date: Dec 2025 +Contact: SeongJae Park <sj@kernel.org> +Description: Writing a number to this file sets the upper limit of + nr_snapshots that deactivates the scheme when the limit is + reached or exceeded. + What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/tried_regions/total_bytes Date: Jul 2023 Contact: SeongJae Park <sj@kernel.org> diff --git a/Documentation/ABI/testing/sysfs-secvar b/Documentation/ABI/testing/sysfs-secvar index 1016967a730f..c52a5fd15709 100644 --- a/Documentation/ABI/testing/sysfs-secvar +++ b/Documentation/ABI/testing/sysfs-secvar @@ -63,68 +63,3 @@ Contact: Nayna Jain <nayna@linux.ibm.com> Description: A write-only file that is used to submit the new value for the variable. The size of the file represents the maximum size of the variable data that can be written. - -What: /sys/firmware/secvar/config -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: This optional directory contains read-only config attributes as - defined by the secure variable implementation. All data is in - ASCII format. The directory is only created if the backing - implementation provides variables to populate it, which at - present is only PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/version -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Config version as reported by the hypervisor in ASCII decimal - format. - - Currently only provided by PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/max_object_size -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Maximum allowed size of objects in the keystore in bytes, - represented in ASCII decimal format. - - This is not necessarily the same as the max size that can be - written to an update file as writes can contain more than - object data, you should use the size of the update file for - that purpose. - - Currently only provided by PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/total_size -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Total size of the PLPKS in bytes, represented in ASCII decimal - format. - - Currently only provided by PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/used_space -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Current space consumed by the key store, in bytes, represented - in ASCII decimal format. - - Currently only provided by PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/supported_policies -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Bitmask of supported policy flags by the hypervisor, - represented as an 8 byte hexadecimal ASCII string. Consult the - hypervisor documentation for what these flags are. - - Currently only provided by PLPKS on the pseries platform. - -What: /sys/firmware/secvar/config/signed_update_algorithms -Date: February 2023 -Contact: Nayna Jain <nayna@linux.ibm.com> -Description: Bitmask of flags indicating which algorithms the hypervisor - supports for signed update of objects, represented as a 16 byte - hexadecimal ASCII string. Consult the hypervisor documentation - for what these flags mean. - - Currently only provided by PLPKS on the pseries platform. diff --git a/Documentation/Makefile b/Documentation/Makefile index e96ac6dcac4f..377a449656c8 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -98,7 +98,8 @@ dochelp: @echo ' cleandocs - clean all generated files' @echo @echo ' make SPHINXDIRS="s1 s2" [target] Generate only docs of folder s1, s2' - @echo ' top level values for SPHINXDIRS are: $(_SPHINXDIRS)' + @echo ' top level values for SPHINXDIRS are:' + @echo '$(_SPHINXDIRS)' | fmt -s -w 75 -g 75 | sed 's/^/ /' @echo ' you may also use a subdirectory like SPHINXDIRS=userspace-api/media,' @echo ' provided that there is an index.rst file at the subdirectory.' @echo diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 0741c8cbd74e..4697377adeae 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -95,6 +95,30 @@ by the PCI endpoint function driver. Register space of the function driver is usually configured using this API. + Some endpoint controllers also support calling pci_epc_set_bar() again + for the same BAR (without calling pci_epc_clear_bar()) to update inbound + address translations after the host has programmed the BAR base address. + Endpoint function drivers can check this capability via the + dynamic_inbound_mapping EPC feature bit. + + When pci_epf_bar.num_submap is non-zero, the endpoint function driver is + requesting BAR subrange mapping using pci_epf_bar.submap. This requires + the EPC to advertise support via the subrange_mapping EPC feature bit. + + When an EPF driver wants to make use of the inbound subrange mapping + feature, it requires that the BAR base address has been programmed by + the host during enumeration. Thus, it needs to call pci_epc_set_bar() + twice for the same BAR (requires dynamic_inbound_mapping): first with + num_submap set to zero and configuring the BAR size, then after the PCIe + link is up and the host enumerates the endpoint and programs the BAR + base address, again with num_submap set to non-zero value. + + Note that when making use of the inbound subrange mapping feature, the + EPF driver must not call pci_epc_clear_bar() between the two + pci_epc_set_bar() calls, because clearing the BAR can clear/disable the + BAR register or BAR decode on the endpoint while the host still expects + the assigned BAR address to remain valid. + * pci_epc_clear_bar() The PCI endpoint function driver should use pci_epc_clear_bar() to reset diff --git a/Documentation/PCI/endpoint/pci-test-howto.rst b/Documentation/PCI/endpoint/pci-test-howto.rst index dd66858cde46..a822866b1fb0 100644 --- a/Documentation/PCI/endpoint/pci-test-howto.rst +++ b/Documentation/PCI/endpoint/pci-test-howto.rst @@ -84,6 +84,25 @@ device, the following commands can be used:: # echo 32 > functions/pci_epf_test/func1/msi_interrupts # echo 2048 > functions/pci_epf_test/func1/msix_interrupts +By default, pci-epf-test uses the following BAR sizes:: + + # grep . functions/pci_epf_test/func1/pci_epf_test.0/bar?_size + functions/pci_epf_test/func1/pci_epf_test.0/bar0_size:131072 + functions/pci_epf_test/func1/pci_epf_test.0/bar1_size:131072 + functions/pci_epf_test/func1/pci_epf_test.0/bar2_size:131072 + functions/pci_epf_test/func1/pci_epf_test.0/bar3_size:131072 + functions/pci_epf_test/func1/pci_epf_test.0/bar4_size:131072 + functions/pci_epf_test/func1/pci_epf_test.0/bar5_size:1048576 + +The user can override a default value using e.g.:: + # echo 1048576 > functions/pci_epf_test/func1/pci_epf_test.0/bar1_size + +Overriding the default BAR sizes can only be done before binding the +pci-epf-test device to a PCI endpoint controller driver. + +Note: Some endpoint controllers might have fixed-size BARs or reserved BARs; +for such controllers, the corresponding BAR size in configfs will be ignored. + Binding pci-epf-test Device to EP Controller -------------------------------------------- diff --git a/Documentation/PCI/endpoint/pci-vntb-howto.rst b/Documentation/PCI/endpoint/pci-vntb-howto.rst index 9a7a2f0a6849..3679f5c30254 100644 --- a/Documentation/PCI/endpoint/pci-vntb-howto.rst +++ b/Documentation/PCI/endpoint/pci-vntb-howto.rst @@ -52,14 +52,14 @@ pci-epf-vntb device, the following commands can be used:: # cd /sys/kernel/config/pci_ep/ # mkdir functions/pci_epf_vntb/func1 -The "mkdir func1" above creates the pci-epf-ntb function device that will +The "mkdir func1" above creates the pci-epf-vntb function device that will be probed by pci_epf_vntb driver. The PCI endpoint framework populates the directory with the following configurable fields:: - # ls functions/pci_epf_ntb/func1 - baseclass_code deviceid msi_interrupts pci-epf-ntb.0 + # ls functions/pci_epf_vntb/func1 + baseclass_code deviceid msi_interrupts pci-epf-vntb.0 progif_code secondary subsys_id vendorid cache_line_size interrupt_pin msix_interrupts primary revid subclass_code subsys_vendor_id @@ -111,13 +111,13 @@ A sample configuration for virtual NTB driver for virtual PCI bus:: # echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid # echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number -Binding pci-epf-ntb Device to EP Controller +Binding pci-epf-vntb Device to EP Controller -------------------------------------------- NTB function device should be attached to PCI endpoint controllers connected to the host. - # ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary + # ln -s controllers/5f010000.pcie_ep functions/pci_epf_vntb/func1/primary Once the above step is completed, the PCI endpoint controllers are ready to establish a link with the host. @@ -139,7 +139,7 @@ lspci Output at Host side ------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01) @@ -152,7 +152,7 @@ lspci Output at EP Side / Virtual PCI bus ----------------------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff) diff --git a/Documentation/PCI/msi-howto.rst b/Documentation/PCI/msi-howto.rst index 0692c9aec66f..667ebe2156b4 100644 --- a/Documentation/PCI/msi-howto.rst +++ b/Documentation/PCI/msi-howto.rst @@ -98,7 +98,7 @@ function:: which allocates up to max_vecs interrupt vectors for a PCI device. It returns the number of vectors allocated or a negative error. If the device -has a requirements for a minimum number of vectors the driver can pass a +has a requirement for a minimum number of vectors the driver can pass a min_vecs argument set to this limit, and the PCI core will return -ENOSPC if it can't meet the minimum number of vectors. @@ -127,7 +127,7 @@ not be able to allocate as many vectors for MSI as it could for MSI-X. On some platforms, MSI interrupts must all be targeted at the same set of CPUs whereas MSI-X interrupts can all be targeted at different CPUs. -If a device supports neither MSI-X or MSI it will fall back to a single +If a device supports neither MSI-X nor MSI it will fall back to a single legacy IRQ vector. The typical usage of MSI or MSI-X interrupts is to allocate as many vectors @@ -203,7 +203,7 @@ How to tell whether MSI/MSI-X is enabled on a device ---------------------------------------------------- Using 'lspci -v' (as root) may show some devices with "MSI", "Message -Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities +Signaled Interrupts" or "MSI-X" capabilities. Each of these capabilities has an 'Enable' flag which is followed with either "+" (enabled) or "-" (disabled). diff --git a/Documentation/PCI/pci-error-recovery.rst b/Documentation/PCI/pci-error-recovery.rst index 43bc4e3665b4..43838723fde9 100644 --- a/Documentation/PCI/pci-error-recovery.rst +++ b/Documentation/PCI/pci-error-recovery.rst @@ -460,7 +460,6 @@ That is, the recovery API only requires that: - drivers/net/e1000e - drivers/net/ixgbe - drivers/net/cxgb3 - - drivers/net/s2io.c The cor_error_detected() callback is invoked in handle_error_source() when the error severity is "correctable". The callback is optional and allows diff --git a/Documentation/RCU/Design/Requirements/Requirements.rst b/Documentation/RCU/Design/Requirements/Requirements.rst index ba417a08b93d..b5cdbba3ec2e 100644 --- a/Documentation/RCU/Design/Requirements/Requirements.rst +++ b/Documentation/RCU/Design/Requirements/Requirements.rst @@ -2780,12 +2780,12 @@ Tasks Trace RCU ~~~~~~~~~~~~~~~ Some forms of tracing need to sleep in readers, but cannot tolerate -SRCU's read-side overhead, which includes a full memory barrier in both -srcu_read_lock() and srcu_read_unlock(). This need is handled by a -Tasks Trace RCU that uses scheduler locking and IPIs to synchronize with -readers. Real-time systems that cannot tolerate IPIs may build their -kernels with ``CONFIG_TASKS_TRACE_RCU_READ_MB=y``, which avoids the IPIs at -the expense of adding full memory barriers to the read-side primitives. +SRCU's read-side overhead, which includes a full memory barrier in +both srcu_read_lock() and srcu_read_unlock(). This need is handled by +a Tasks Trace RCU API implemented as thin wrappers around SRCU-fast, +which avoids the read-side memory barriers, at least for architectures +that apply noinstr to kernel entry/exit code (or that build with +``CONFIG_TASKS_TRACE_RCU_NO_MB=y``. The tasks-trace-RCU API is also reasonably compact, consisting of rcu_read_lock_trace(), rcu_read_unlock_trace(), diff --git a/Documentation/RCU/index.rst b/Documentation/RCU/index.rst index ef26c78507d3..035871687ee2 100644 --- a/Documentation/RCU/index.rst +++ b/Documentation/RCU/index.rst @@ -28,10 +28,3 @@ RCU Handbook Design/Expedited-Grace-Periods/Expedited-Grace-Periods Design/Requirements/Requirements Design/Data-Structures/Data-Structures - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/accel/index.rst b/Documentation/accel/index.rst index d8fa332d60a8..cbc7d4c3876a 100644 --- a/Documentation/accel/index.rst +++ b/Documentation/accel/index.rst @@ -11,10 +11,3 @@ Compute Accelerators amdxdna/index qaic/index rocket/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/accounting/delay-accounting.rst b/Documentation/accounting/delay-accounting.rst index 86d7902a657f..e209c46241b0 100644 --- a/Documentation/accounting/delay-accounting.rst +++ b/Documentation/accounting/delay-accounting.rst @@ -107,22 +107,22 @@ Get sum and peak of delays, since system boot, for all pids with tgid 242:: TGID 242 - CPU count real total virtual total delay total delay average delay max delay min - 39 156000000 156576579 2111069 0.054ms 0.212296ms 0.031307ms - IO count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms - SWAP count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms - RECLAIM count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms - THRASHING count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms - COMPACT count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms - WPCOPY count delay total delay average delay max delay min - 156 11215873 0.072ms 0.207403ms 0.033913ms - IRQ count delay total delay average delay max delay min - 0 0 0.000ms 0.000000ms 0.000000ms + CPU count real total virtual total delay total delay average delay max delay min delay max timestamp + 46 188000000 192348334 4098012 0.089ms 0.429260ms 0.051205ms 2026-01-15T15:06:58 + IO count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A + SWAP count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A + RECLAIM count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A + THRASHING count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A + COMPACT count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A + WPCOPY count delay total delay average delay max delay min delay max timestamp + 182 19413338 0.107ms 0.547353ms 0.022462ms 2026-01-15T15:05:24 + IRQ count delay total delay average delay max delay min delay max timestamp + 0 0 0.000ms 0.000000ms 0.000000ms N/A Get IO accounting for pid 1, it works only with -p:: diff --git a/Documentation/admin-guide/LSM/landlock.rst b/Documentation/admin-guide/LSM/landlock.rst index 9e61607def08..9923874e2156 100644 --- a/Documentation/admin-guide/LSM/landlock.rst +++ b/Documentation/admin-guide/LSM/landlock.rst @@ -6,7 +6,7 @@ Landlock: system-wide management ================================ :Author: Mickaël Salaün -:Date: March 2025 +:Date: January 2026 Landlock can leverage the audit framework to log events. @@ -38,6 +38,37 @@ AUDIT_LANDLOCK_ACCESS domain=195ba459b blockers=fs.refer path="/usr/bin" dev="vda2" ino=351 domain=195ba459b blockers=fs.make_reg,fs.refer path="/usr/local" dev="vda2" ino=365 + + The ``blockers`` field uses dot-separated prefixes to indicate the type of + restriction that caused the denial: + + **fs.*** - Filesystem access rights (ABI 1+): + - fs.execute, fs.write_file, fs.read_file, fs.read_dir + - fs.remove_dir, fs.remove_file + - fs.make_char, fs.make_dir, fs.make_reg, fs.make_sock + - fs.make_fifo, fs.make_block, fs.make_sym + - fs.refer (ABI 2+) + - fs.truncate (ABI 3+) + - fs.ioctl_dev (ABI 5+) + + **net.*** - Network access rights (ABI 4+): + - net.bind_tcp - TCP port binding was denied + - net.connect_tcp - TCP connection was denied + + **scope.*** - IPC scoping restrictions (ABI 6+): + - scope.abstract_unix_socket - Abstract UNIX socket connection denied + - scope.signal - Signal sending denied + + Multiple blockers can appear in a single event (comma-separated) when + multiple access rights are missing. For example, creating a regular file + in a directory that lacks both ``make_reg`` and ``refer`` rights would show + ``blockers=fs.make_reg,fs.refer``. + + The object identification fields (path, dev, ino for filesystem; opid, + ocomm for signals) depend on the type of access being blocked and provide + context about what resource was involved in the denial. + + AUDIT_LANDLOCK_DOMAIN This record type describes the status of a Landlock domain. The ``status`` field can be either ``allocated`` or ``deallocated``. @@ -86,7 +117,7 @@ This command generates two events, each identified with a unique serial number following a timestamp (``msg=audit(1729738800.268:30)``). The first event (serial ``30``) contains 4 records. The first record (``type=LANDLOCK_ACCESS``) shows an access denied by the domain `1a6fdc66f`. -The cause of this denial is signal scopping restriction +The cause of this denial is signal scoping restriction (``blockers=scope.signal``). The process that would have receive this signal is the init process (``opid=1 ocomm="systemd"``). diff --git a/Documentation/admin-guide/README.rst b/Documentation/admin-guide/README.rst index 05301f03b717..77fec1de6dc8 100644 --- a/Documentation/admin-guide/README.rst +++ b/Documentation/admin-guide/README.rst @@ -53,7 +53,7 @@ Documentation these typically contain kernel-specific installation notes for some drivers for example. Please read the :ref:`Documentation/process/changes.rst <changes>` file, as it - contains information about the problems, which may result by upgrading + contains information about the problems which may result from upgrading your kernel. Installing the kernel source diff --git a/Documentation/admin-guide/aoe/index.rst b/Documentation/admin-guide/aoe/index.rst index d71c5df15922..564354bbce57 100644 --- a/Documentation/admin-guide/aoe/index.rst +++ b/Documentation/admin-guide/aoe/index.rst @@ -8,10 +8,3 @@ ATA over Ethernet (AoE) aoe todo examples - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/auxdisplay/index.rst b/Documentation/admin-guide/auxdisplay/index.rst index e466f0595248..31eae08255fd 100644 --- a/Documentation/admin-guide/auxdisplay/index.rst +++ b/Documentation/admin-guide/auxdisplay/index.rst @@ -7,10 +7,3 @@ Auxiliary Display Support ks0108.rst cfag12864b.rst - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst index 3e273c1bb749..94bb7f2245ee 100644 --- a/Documentation/admin-guide/blockdev/zram.rst +++ b/Documentation/admin-guide/blockdev/zram.rst @@ -214,6 +214,9 @@ mem_limit WO specifies the maximum amount of memory ZRAM can writeback_limit WO specifies the maximum amount of write IO zram can write out to backing device as 4KB unit writeback_limit_enable RW show and set writeback_limit feature +writeback_batch_size RW show and set maximum number of in-flight + writeback operations +writeback_compressed RW show and set compressed writeback feature comp_algorithm RW show and change the compression algorithm algorithm_params WO setup compression algorithm parameters compact WO trigger memory compaction @@ -222,7 +225,6 @@ backing_dev RW set up backend storage for zram to write out idle WO mark allocated slot as idle ====================== ====== =============================================== - User space is advised to use the following files to read the device statistics. File /sys/block/zram<id>/stat @@ -434,6 +436,26 @@ system reboot, echo 1 > /sys/block/zramX/reset) so keeping how many of writeback happened until you reset the zram to allocate extra writeback budget in next setting is user's job. +By default zram stores written back pages in decompressed (raw) form, which +means that writeback operation involves decompression of the page before +writing it to the backing device. This behavior can be changed by enabling +`writeback_compressed` feature, which causes zram to write compressed pages +to the backing device, thus avoiding decompression overhead. To enable +this feature, execute:: + + $ echo yes > /sys/block/zramX/writeback_compressed + +Note that this feature should be configured before the `zramX` device is +initialized. + +Depending on backing device storage type, writeback operation may benefit +from a higher number of in-flight write requests (batched writes). The +number of maximum in-flight writeback operations can be configured via +`writeback_batch_size` attribute. To change the default value (which is 32), +execute:: + + $ echo 64 > /sys/block/zramX/writeback_batch_size + If admin wants to measure writeback count in a certain period, they could know it via /sys/block/zram0/bd_stat's 3rd column. diff --git a/Documentation/admin-guide/bootconfig.rst b/Documentation/admin-guide/bootconfig.rst index 7a86042c9b6d..f712758472d5 100644 --- a/Documentation/admin-guide/bootconfig.rst +++ b/Documentation/admin-guide/bootconfig.rst @@ -20,18 +20,26 @@ Config File Syntax The boot config syntax is a simple structured key-value. Each key consists of dot-connected-words, and key and value are connected by ``=``. The value -has to be terminated by semi-colon (``;``) or newline (``\n``). -For array value, array entries are separated by comma (``,``). :: - - KEY[.WORD[...]] = VALUE[, VALUE2[...]][;] - -Unlike the kernel command line syntax, spaces are OK around the comma and ``=``. +string has to be terminated by the following delimiters described below. Each key word must contain only alphabets, numbers, dash (``-``) or underscore (``_``). And each value only contains printable characters or spaces except for delimiters such as semi-colon (``;``), new-line (``\n``), comma (``,``), hash (``#``) and closing brace (``}``). +If the ``=`` is followed by whitespace up to one of these delimiters, the +key is assigned an empty value. + +For arrays, the array values are comma (``,``) separated, and comments and +line breaks with newline (``\n``) are allowed between array values for +readability. Thus the first entry of the array must be on the same line as +the key.:: + + KEY[.WORD[...]] = VALUE[, VALUE2[...]][;] + +Unlike the kernel command line syntax, white spaces (including tabs) are +ignored around the comma and ``=``. + If you want to use those delimiters in a value, you can use either double- quotes (``"VALUE"``) or single-quotes (``'VALUE'``) to quote it. Note that you can not escape these quotes. @@ -138,8 +146,8 @@ This is parsed as below:: foo = value bar = 1, 2, 3 -Note that you can not put a comment between value and delimiter(``,`` or -``;``). This means following config has a syntax error :: +Note that you can NOT put a comment or a newline between value and delimiter +(``,`` or ``;``). This means following config has a syntax error :: key = 1 # comment ,2 diff --git a/Documentation/admin-guide/bug-hunting.rst b/Documentation/admin-guide/bug-hunting.rst index 7da0504388ec..3901b43c96df 100644 --- a/Documentation/admin-guide/bug-hunting.rst +++ b/Documentation/admin-guide/bug-hunting.rst @@ -52,14 +52,14 @@ line is usually required to identify and handle the bug. Along this chapter, we'll refer to "Oops" for all kinds of stack traces that need to be analyzed. If the kernel is compiled with ``CONFIG_DEBUG_INFO``, you can enhance the -quality of the stack trace by using file:`scripts/decode_stacktrace.sh`. +quality of the stack trace by using ``scripts/decode_stacktrace.sh``. Modules linked in ----------------- Modules that are tainted or are being loaded or unloaded are marked with "(...)", where the taint flags are described in -file:`Documentation/admin-guide/tainted-kernels.rst`, "being loaded" is +Documentation/admin-guide/tainted-kernels.rst, "being loaded" is annotated with "+", and "being unloaded" is annotated with "-". @@ -235,7 +235,7 @@ Dave Miller):: mov 0x8(%ebp), %ebx ! %ebx = skb->sk mov 0x13c(%ebx), %eax ! %eax = inet_sk(sk)->opt -file:`scripts/decodecode` can be used to automate most of this, depending +``scripts/decodecode`` can be used to automate most of this, depending on what CPU architecture is being debugged. Reporting the bug diff --git a/Documentation/admin-guide/cgroup-v1/hugetlb.rst b/Documentation/admin-guide/cgroup-v1/hugetlb.rst index 493a8e386700..b5f3873b7d3a 100644 --- a/Documentation/admin-guide/cgroup-v1/hugetlb.rst +++ b/Documentation/admin-guide/cgroup-v1/hugetlb.rst @@ -77,7 +77,7 @@ control group and enforces the limit during page fault. Since HugeTLB doesn't support page reclaim, enforcing the limit at page fault time implies that, the application will get SIGBUS signal if it tries to fault in HugeTLB pages beyond its limit. Therefore the application needs to know exactly how many -HugeTLB pages it uses before hand, and the sysadmin needs to make sure that +HugeTLB pages it uses beforehand, and the sysadmin needs to make sure that there are enough available on the machine for all the users to avoid processes getting SIGBUS. @@ -91,23 +91,23 @@ getting SIGBUS. hugetlb.<hugepagesize>.rsvd.usage_in_bytes hugetlb.<hugepagesize>.rsvd.failcnt -The HugeTLB controller allows to limit the HugeTLB reservations per control +The HugeTLB controller allows limiting the HugeTLB reservations per control group and enforces the controller limit at reservation time and at the fault of HugeTLB memory for which no reservation exists. Since reservation limits are -enforced at reservation time (on mmap or shget), reservation limits never causes -the application to get SIGBUS signal if the memory was reserved before hand. For +enforced at reservation time (on mmap or shget), reservation limits never cause +the application to get SIGBUS signal if the memory was reserved beforehand. For MAP_NORESERVE allocations, the reservation limit behaves the same as the fault limit, enforcing memory usage at fault time and causing the application to receive a SIGBUS if it's crossing its limit. Reservation limits are superior to page fault limits described above, since reservation limits are enforced at reservation time (on mmap or shget), and -never causes the application to get SIGBUS signal if the memory was reserved -before hand. This allows for easier fallback to alternatives such as +never cause the application to get SIGBUS signal if the memory was reserved +beforehand. This allows for easier fallback to alternatives such as non-HugeTLB memory for example. In the case of page fault accounting, it's very -hard to avoid processes getting SIGBUS since the sysadmin needs precisely know -the HugeTLB usage of all the tasks in the system and make sure there is enough -pages to satisfy all requests. Avoiding tasks getting SIGBUS on overcommited +hard to avoid processes getting SIGBUS since the sysadmin needs to precisely know +the HugeTLB usage of all the tasks in the system and make sure there are enough +pages to satisfy all requests. Avoiding tasks getting SIGBUS on overcommitted systems is practically impossible with page fault accounting. diff --git a/Documentation/admin-guide/cgroup-v1/index.rst b/Documentation/admin-guide/cgroup-v1/index.rst index 99fbc8a64ba9..14897a8d32b3 100644 --- a/Documentation/admin-guide/cgroup-v1/index.rst +++ b/Documentation/admin-guide/cgroup-v1/index.rst @@ -22,10 +22,3 @@ Control Groups version 1 net_prio pids rdma - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/cgroup-v1/memory.rst b/Documentation/admin-guide/cgroup-v1/memory.rst index d6b1db8cc7eb..7db63c002922 100644 --- a/Documentation/admin-guide/cgroup-v1/memory.rst +++ b/Documentation/admin-guide/cgroup-v1/memory.rst @@ -311,9 +311,8 @@ Lock order is as follows:: folio_lock mm->page_table_lock or split pte_lock - folio_memcg_lock (memcg->move_lock) - mapping->i_pages lock - lruvec->lru_lock. + mapping->i_pages lock + lruvec->lru_lock. Per-node-per-memcgroup LRU (cgroup's private LRU) is guarded by lruvec->lru_lock; the folio LRU flag is cleared before diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index 7f5b59d95fce..91beaa6798ce 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -737,9 +737,6 @@ combinations are invalid and should be rejected. Also, if the resource is mandatory for execution of processes, process migrations may be rejected. -"cpu.rt.max" hard-allocates realtime slices and is an example of this -type. - Interface Files =============== @@ -2561,10 +2558,10 @@ Cpuset Interface Files Users can manually set it to a value that is different from "cpuset.cpus". One constraint in setting it is that the list of CPUs must be exclusive with respect to "cpuset.cpus.exclusive" - of its sibling. If "cpuset.cpus.exclusive" of a sibling cgroup - isn't set, its "cpuset.cpus" value, if set, cannot be a subset - of it to leave at least one CPU available when the exclusive - CPUs are taken away. + and "cpuset.cpus.exclusive.effective" of its siblings. Another + constraint is that it cannot be a superset of "cpuset.cpus" + of its sibling in order to leave at least one CPU available to + that sibling when the exclusive CPUs are taken away. For a parent cgroup, any one of its exclusive CPUs can only be distributed to at most one of its child cgroups. Having an @@ -2584,9 +2581,9 @@ Cpuset Interface Files of this file will always be a subset of its parent's "cpuset.cpus.exclusive.effective" if its parent is not the root cgroup. It will also be a subset of "cpuset.cpus.exclusive" - if it is set. If "cpuset.cpus.exclusive" is not set, it is - treated to have an implicit value of "cpuset.cpus" in the - formation of local partition. + if it is set. This file should only be non-empty if either + "cpuset.cpus.exclusive" is set or when the current cpuset is + a valid partition root. cpuset.cpus.isolated A read-only and root cgroup only multiple values file. @@ -2618,13 +2615,22 @@ Cpuset Interface Files There are two types of partitions - local and remote. A local partition is one whose parent cgroup is also a valid partition root. A remote partition is one whose parent cgroup is not a - valid partition root itself. Writing to "cpuset.cpus.exclusive" - is optional for the creation of a local partition as its - "cpuset.cpus.exclusive" file will assume an implicit value that - is the same as "cpuset.cpus" if it is not set. Writing the - proper "cpuset.cpus.exclusive" values down the cgroup hierarchy - before the target partition root is mandatory for the creation - of a remote partition. + valid partition root itself. + + Writing to "cpuset.cpus.exclusive" is optional for the creation + of a local partition as its "cpuset.cpus.exclusive" file will + assume an implicit value that is the same as "cpuset.cpus" if it + is not set. Writing the proper "cpuset.cpus.exclusive" values + down the cgroup hierarchy before the target partition root is + mandatory for the creation of a remote partition. + + Not all the CPUs requested in "cpuset.cpus.exclusive" can be + used to form a new partition. Only those that were present + in its parent's "cpuset.cpus.exclusive.effective" control + file can be used. For partitions created without setting + "cpuset.cpus.exclusive", exclusive CPUs specified in sibling's + "cpuset.cpus.exclusive" or "cpuset.cpus.exclusive.effective" + also cannot be used. Currently, a remote partition cannot be created under a local partition. All the ancestors of a remote partition root except @@ -2632,6 +2638,10 @@ Cpuset Interface Files The root cgroup is always a partition root and its state cannot be changed. All other non-root cgroups start out as "member". + Even though the "cpuset.cpus.exclusive*" and "cpuset.cpus" + control files are not present in the root cgroup, they are + implicitly the same as the "/sys/devices/system/cpu/possible" + sysfs file. When set to "root", the current cgroup is the root of a new partition or scheduling domain. The set of exclusive CPUs is @@ -2816,7 +2826,7 @@ DMEM Interface Files HugeTLB ------- -The HugeTLB controller allows to limit the HugeTLB usage per control group and +The HugeTLB controller allows limiting the HugeTLB usage per control group and enforces the controller limit during page fault. HugeTLB Interface Files diff --git a/Documentation/admin-guide/cifs/index.rst b/Documentation/admin-guide/cifs/index.rst index fad5268635f5..58ab58a71a82 100644 --- a/Documentation/admin-guide/cifs/index.rst +++ b/Documentation/admin-guide/cifs/index.rst @@ -12,10 +12,3 @@ CIFS todo changes authors - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/device-mapper/dm-raid.rst b/Documentation/admin-guide/device-mapper/dm-raid.rst index e11f10764770..3780f6e6b6bb 100644 --- a/Documentation/admin-guide/device-mapper/dm-raid.rst +++ b/Documentation/admin-guide/device-mapper/dm-raid.rst @@ -433,7 +433,7 @@ Table line examples: 8192 1960886272 linear 8:0 0 2048 # previous data segment # Mapping table for e.g. raid5_rs reshape causing the size of the raid device to double-fold once the reshape finishes. -# Check the status output (e.g. "dmsetup status $RaidDev") for progess. +# Check the status output (e.g. "dmsetup status $RaidDev") for progress. 0 $((2 * 1960886272)) raid raid5 7 0 region_size 2048 data_offset 8192 delta_disk 1 2 /dev/dm-0 /dev/dm-1 /dev/dm-2 /dev/dm-3 diff --git a/Documentation/admin-guide/device-mapper/index.rst b/Documentation/admin-guide/device-mapper/index.rst index f1c1f4b824ba..030d854628ac 100644 --- a/Documentation/admin-guide/device-mapper/index.rst +++ b/Documentation/admin-guide/device-mapper/index.rst @@ -40,10 +40,3 @@ Device Mapper verity writecache zero - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/devices.rst b/Documentation/admin-guide/devices.rst index e3776d77374b..b103ba52776a 100644 --- a/Documentation/admin-guide/devices.rst +++ b/Documentation/admin-guide/devices.rst @@ -97,9 +97,12 @@ It is recommended that these links exist on all systems: /dev/bttv0 video0 symbolic Backward compatibility /dev/radio radio0 symbolic Backward compatibility /dev/i2o* /dev/i2o/* symbolic Backward compatibility -/dev/scd? sr? hard Alternate SCSI CD-ROM name =============== =============== =============== =============================== +Suggested earlier ``/dev/scd?`` alternative names for ``/dev/sr?`` +CD-ROM and other optical drives (using SCSI commands) were removed +in ``udev`` version 174 that was released in 2011. + Locally defined links +++++++++++++++++++++ @@ -112,7 +115,6 @@ exist, they should have the following uses. /dev/mouse mouse port symbolic Current mouse device /dev/tape tape device symbolic Current tape device /dev/cdrom CD-ROM device symbolic Current CD-ROM device -/dev/cdwriter CD-writer symbolic Current CD-writer device /dev/scanner scanner symbolic Current scanner device /dev/modem modem port symbolic Current dialout device /dev/root root device symbolic Current root filesystem @@ -126,8 +128,8 @@ exists, ``/dev/modem`` should point to the appropriate primary TTY device For SCSI devices, ``/dev/tape`` and ``/dev/cdrom`` should point to the *cooked* devices (``/dev/st*`` and ``/dev/sr*``, respectively), whereas -``/dev/cdwriter`` and /dev/scanner should point to the appropriate generic -SCSI devices (/dev/sg*). +``/dev/scanner`` should point to the appropriate generic +SCSI device (``/dev/sg*``). ``/dev/mouse`` may point to a primary serial TTY device, a hardware mouse device, or a socket for a mouse driver program (e.g. ``/dev/gpmdata``). diff --git a/Documentation/admin-guide/devices.txt b/Documentation/admin-guide/devices.txt index 94c98be1329a..440633642fea 100644 --- a/Documentation/admin-guide/devices.txt +++ b/Documentation/admin-guide/devices.txt @@ -352,7 +352,7 @@ 216 = /dev/fujitsu/apanel Fujitsu/Siemens application panel 217 = /dev/ni/natmotn National Instruments Motion 218 = /dev/kchuid Inter-process chuid control - 219 = /dev/modems/mwave MWave modem firmware upload + 219 = 220 = /dev/mptctl Message passing technology (MPT) control 221 = /dev/mvista/hssdsi Montavista PICMG hot swap system driver 222 = /dev/mvista/hasi Montavista PICMG high availability @@ -389,11 +389,11 @@ ... 11 block SCSI CD-ROM devices - 0 = /dev/scd0 First SCSI CD-ROM - 1 = /dev/scd1 Second SCSI CD-ROM + 0 = /dev/sr0 First SCSI CD-ROM + 1 = /dev/sr1 Second SCSI CD-ROM ... - The prefix /dev/sr (instead of /dev/scd) has been deprecated. + In the past the prefix /dev/scd (instead of /dev/sr) was used and even recommended. 12 char QIC-02 tape 2 = /dev/ntpqic11 QIC-11, no rewind-on-close diff --git a/Documentation/admin-guide/gpio/index.rst b/Documentation/admin-guide/gpio/index.rst index 712f379731cb..082646851029 100644 --- a/Documentation/admin-guide/gpio/index.rst +++ b/Documentation/admin-guide/gpio/index.rst @@ -12,10 +12,3 @@ GPIO gpio-sim gpio-virtuser Obsolete APIs <obsolete> - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst index 259d79fbeb94..b734f8a2a2c4 100644 --- a/Documentation/admin-guide/index.rst +++ b/Documentation/admin-guide/index.rst @@ -189,10 +189,3 @@ A few hard-to-categorize and generally obsolete documents. ldm unicode - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/initrd.rst b/Documentation/admin-guide/initrd.rst index 67bbad8806e8..6c1660a4c5cc 100644 --- a/Documentation/admin-guide/initrd.rst +++ b/Documentation/admin-guide/initrd.rst @@ -297,7 +297,7 @@ as follows: 8) now the system is bootable and additional installation tasks can be performed -The key role of initrd here is to re-use the configuration data during +The key role of initrd here is to reuse the configuration data during normal system operation without requiring the use of a bloated "generic" kernel or re-compiling or re-linking the kernel. diff --git a/Documentation/admin-guide/kdump/index.rst b/Documentation/admin-guide/kdump/index.rst index 8e2ebd0383cd..cf5d7c868b74 100644 --- a/Documentation/admin-guide/kdump/index.rst +++ b/Documentation/admin-guide/kdump/index.rst @@ -11,10 +11,3 @@ information. kdump vmcoreinfo - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/admin-guide/kdump/kdump.rst b/Documentation/admin-guide/kdump/kdump.rst index 7b011eb116a7..7587caadbae1 100644 --- a/Documentation/admin-guide/kdump/kdump.rst +++ b/Documentation/admin-guide/kdump/kdump.rst @@ -591,7 +591,7 @@ with /sys/kernel/config/crash_dm_crypt_keys for setup, cat /sys/kernel/config/crash_dm_crypt_keys/count 2 - # To support CPU/memory hot-plugging, re-use keys already saved to reserved + # To support CPU/memory hot-plugging, reuse keys already saved to reserved # memory echo true > /sys/kernel/config/crash_dm_crypt_key/reuse diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index a8d0afde7f85..55ffc0f8858a 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -74,6 +74,7 @@ TPM TPM drivers are enabled. UMS USB Mass Storage support is enabled. USB USB support is enabled. + NVME NVMe support is enabled USBHID USB Human Interface Device support is enabled. V4L Video For Linux support is enabled. VGA The VGA console has been enabled. @@ -125,6 +126,8 @@ Kernel parameters may result in duplicate corrected error reports. nospcr -- disable console in ACPI SPCR table as default _serial_ console on ARM64 + spcr -- enable console in ACPI SPCR table as + default _serial_ console on x86 For ARM64, ONLY "acpi=off", "acpi=on", "acpi=force" or "acpi=nospcr" are available For RISCV64, ONLY "acpi=off", "acpi=on" or "acpi=force" @@ -1370,6 +1373,13 @@ Kernel parameters For details see: Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst + dm_verity.keyring_unsealed= + [KNL] When set to 1, leave the dm-verity keyring + unsealed after initialization so userspace can + provision keys. Once the keyring is restricted + it becomes active and is searched during signature + verification. + driver_async_probe= [KNL] List of driver names to be probed asynchronously. * matches with all driver names. If * is specified, the @@ -1969,6 +1979,9 @@ Kernel parameters param "no_hash_pointers" is an alias for this mode. + For controlling hashing dynamically at runtime, + use the "kernel.kptr_restrict" sysctl instead. + hashdist= [KNL,NUMA] Large hashes allocated during boot are distributed across NUMA nodes. Defaults on for 64-bit NUMA, off otherwise. @@ -2675,6 +2688,15 @@ Kernel parameters 1 - Bypass the IOMMU for DMA. unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH. + iommu.debug_pagealloc= + [KNL,EARLY] When CONFIG_IOMMU_DEBUG_PAGEALLOC is set, this + parameter enables the feature at boot time. By default, it + is disabled and the system behaves the same way as a kernel + built without CONFIG_IOMMU_DEBUG_PAGEALLOC. + Format: { "0" | "1" } + 0 - Sanitizer disabled. + 1 - Sanitizer enabled, expect runtime overhead. + io7= [HW] IO7 for Marvel-based Alpha systems See comment before marvel_specify_io7 in arch/alpha/kernel/core_marvel.c. @@ -2917,6 +2939,41 @@ Kernel parameters for Movable pages. "nn[KMGTPE]", "nn%", and "mirror" are exclusive, so you cannot specify multiple forms. + kfence.burst= [MM,KFENCE] The number of additional successive + allocations to be attempted through KFENCE for each + sample interval. + Format: <unsigned integer> + Default: 0 + + kfence.check_on_panic= + [MM,KFENCE] Whether to check all KFENCE-managed objects' + canaries on panic. + Format: <bool> + Default: false + + kfence.deferrable= + [MM,KFENCE] Whether to use a deferrable timer to trigger + allocations. This avoids forcing CPU wake-ups if the + system is idle, at the risk of a less predictable + sample interval. + Format: <bool> + Default: CONFIG_KFENCE_DEFERRABLE + + kfence.sample_interval= + [MM,KFENCE] KFENCE's sample interval in milliseconds. + Format: <unsigned integer> + 0 - Disable KFENCE. + >0 - Enabled KFENCE with given sample interval. + Default: CONFIG_KFENCE_SAMPLE_INTERVAL + + kfence.skip_covered_thresh= + [MM,KFENCE] If pool utilization reaches this threshold + (pool usage%), KFENCE limits currently covered + allocations of the same source from further filling + up the pool. + Format: <unsigned integer> + Default: 75 + kgdbdbgp= [KGDB,HW,EARLY] kgdb over EHCI usb debug port. Format: <Controller#>[,poll interval] The controller # is the number of the ehci usb debug @@ -3044,6 +3101,26 @@ Kernel parameters Default is Y (on). + kvm.enable_pmu=[KVM,X86] + If enabled, KVM will virtualize PMU functionality based + on the virtual CPU model defined by userspace. This + can be overridden on a per-VM basis via + KVM_CAP_PMU_CAPABILITY. + + If disabled, KVM will not virtualize PMU functionality, + e.g. MSRs, PMCs, PMIs, etc., even if userspace defines + a virtual CPU model that contains PMU assets. + + Note, KVM's vPMU support implicitly requires running + with an in-kernel local APIC, e.g. to deliver PMIs to + the guest. Running without an in-kernel local APIC is + not supported, though KVM will allow such a combination + (with severely degraded functionality). + + See also enable_mediated_pmu. + + Default is Y (on). + kvm.enable_virt_at_load=[KVM,ARM64,LOONGARCH,MIPS,RISCV,X86] If enabled, KVM will enable virtualization in hardware when KVM is loaded, and disable virtualization when KVM @@ -3090,6 +3167,35 @@ Kernel parameters If the value is 0 (the default), KVM will pick a period based on the ratio, such that a page is zapped after 1 hour on average. + kvm-{amd,intel}.enable_mediated_pmu=[KVM,AMD,INTEL] + If enabled, KVM will provide a mediated virtual PMU, + instead of the default perf-based virtual PMU (if + kvm.enable_pmu is true and PMU is enumerated via the + virtual CPU model). + + With a perf-based vPMU, KVM operates as a user of perf, + i.e. emulates guest PMU counters using perf events. + KVM-created perf events are managed by perf as regular + (guest-only) events, e.g. are scheduled in/out, contend + for hardware resources, etc. Using a perf-based vPMU + allows guest and host usage of the PMU to co-exist, but + incurs non-trivial overhead and can result in silently + dropped guest events (due to resource contention). + + With a mediated vPMU, hardware PMU state is context + switched around the world switch to/from the guest. + KVM mediates which events the guest can utilize, but + gives the guest direct access to all other PMU assets + when possible (KVM may intercept some accesses if the + virtual CPU model provides a subset of hardware PMU + functionality). Using a mediated vPMU significantly + reduces PMU virtualization overhead and eliminates lost + guest events, but is mutually exclusive with using perf + to profile KVM guests and adds latency to most VM-Exits + (to context switch PMU state). + + Default is N (off). + kvm-amd.nested= [KVM,AMD] Control nested virtualization feature in KVM/SVM. Default is 1 (enabled). @@ -3412,6 +3518,11 @@ Kernel parameters * [no]logdir: Enable or disable access to the general purpose log directory. + * max_sec=<sectors>: Set the transfer size limit, in + number of 512-byte sectors, to the value specified in + <sectors>. The value specified in <sectors> has to be + a non-zero positive integer. + * max_sec_128: Set transfer size limit to 128 sectors. * max_sec_1024: Set or clear transfer size limit to @@ -3437,7 +3548,10 @@ Kernel parameters If there are multiple matching configurations changing the same attribute, the last one is used. - load_ramdisk= [RAM] [Deprecated] + liveupdate= [KNL,EARLY] + Format: <bool> + Enable Live Update Orchestrator (LUO). + Default: off. lockd.nlm_grace_period=P [NFS] Assign grace period. Format: <integer> @@ -3998,6 +4112,7 @@ Kernel parameters spectre_v2_user=off [X86] srbds=off [X86,INTEL] ssbd=force-off [ARM64] + tsa=off [X86,AMD] tsx_async_abort=off [X86] vmscape=off [X86] @@ -4444,8 +4559,10 @@ Kernel parameters Note that this argument takes precedence over the CONFIG_RCU_NOCB_CPU_DEFAULT_ALL option. - noinitrd [RAM] Tells the kernel not to load any configured - initial RAM disk. + noinitrd [Deprecated,RAM] Tells the kernel not to load any configured + initial RAM disk. Currently this parameter applies to + initrd only, not to initramfs. But it applies to both + in EFI mode. nointremap [X86-64,Intel-IOMMU,EARLY] Do not enable interrupt remapping. @@ -4545,7 +4662,7 @@ Kernel parameters nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT). Equivalent to smt=1. - [KNL,X86,PPC,S390] Disable symmetric multithreading (SMT). + [KNL,LOONGARCH,X86,PPC,S390] Disable symmetric multithreading (SMT). nosmt=force: Force disable SMT, cannot be undone via the sysfs control file. @@ -4671,6 +4788,18 @@ Kernel parameters This can be set from sysctl after boot. See Documentation/admin-guide/sysctl/vm.rst for details. + nvme.quirks= [NVME] A list of quirk entries to augment the built-in + nvme quirk list. List entries are separated by a + '-' character. + Each entry has the form VendorID:ProductID:quirk_names. + The IDs are 4-digits hex numbers and quirk_names is a + list of quirk names separated by commas. A quirk name + can be prefixed by '^', meaning that the specified + quirk must be disabled. + + Example: + nvme.quirks=7710:2267:bogus_nid,^identify_cns-9900:7711:broken_msi + ohci1394_dma=early [HW,EARLY] enable debugging via the ohci1394 driver. See Documentation/core-api/debugging-via-ohci1394.rst for more info. @@ -4753,6 +4882,21 @@ Kernel parameters panic_on_warn=1 panic() instead of WARN(). Useful to cause kdump on a WARN(). + panic_force_cpu= + [KNL,SMP] Force panic handling to execute on a specific CPU. + Format: <cpu number> + Some platforms require panic handling to occur on a + specific CPU for the crash kernel to function correctly. + This can be due to firmware limitations, interrupt routing + constraints, or platform-specific requirements where only + a particular CPU can safely enter the crash kernel. + When set, panic() will redirect execution to the specified + CPU before proceeding with the normal panic and kexec flow. + If the target CPU is offline or unavailable, panic proceeds + on the current CPU. + This option should only be used for systems with the above + constraints as it might cause the panic operation to be less reliable. + panic_print= Bitmask for printing system info when panic happens. User can chose combination of the following bits: bit 0: print all tasks info @@ -5402,8 +5546,6 @@ Kernel parameters Param: <number> - step/bucket size as a power of 2 for statistical time based profiling. - prompt_ramdisk= [RAM] [Deprecated] - prot_virt= [S390] enable hosting protected virtual machines isolated from the hypervisor (if hardware supports that). If enabled, the default kernel base address @@ -5460,7 +5602,7 @@ Kernel parameters ramdisk_size= [RAM] Sizes of RAM disks in kilobytes See Documentation/admin-guide/blockdev/ramdisk.rst. - ramdisk_start= [RAM] RAM disk image start address + ramdisk_start= [Deprecated,RAM] RAM disk image start address random.trust_cpu=off [KNL,EARLY] Disable trusting the use of the CPU's @@ -6249,13 +6391,6 @@ Kernel parameters dynamically) adjusted. This parameter is intended for use in testing. - rcupdate.rcu_task_ipi_delay= [KNL] - Set time in jiffies during which RCU tasks will - avoid sending IPIs, starting with the beginning - of a given grace period. Setting a large - number avoids disturbing real-time workloads, - but lengthens grace periods. - rcupdate.rcu_task_lazy_lim= [KNL] Number of callbacks on a given CPU that will cancel laziness on that CPU. Use -1 to disable @@ -6299,14 +6434,6 @@ Kernel parameters of zero will disable batching. Batching is always disabled for synchronize_rcu_tasks(). - rcupdate.rcu_tasks_trace_lazy_ms= [KNL] - Set timeout in milliseconds RCU Tasks - Trace asynchronous callback batching for - call_rcu_tasks_trace(). A negative value - will take the default. A value of zero will - disable batching. Batching is always disabled - for synchronize_rcu_tasks_trace(). - rcupdate.rcu_self_test= [KNL] Run the RCU early boot self tests @@ -6325,9 +6452,14 @@ Kernel parameters rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba, smba, bmec, abmc, sdciae. + mba, smba, bmec, abmc, sdciae, energy[:guid], + perf[:guid]. E.g. to turn on cmt and turn off mba use: rdt=cmt,!mba + To turn off all energy telemetry monitoring and ensure that + perf telemetry monitoring associated with guid 0x12345 + is enabled use: + rdt=!energy,perf:0x12345 reboot= [KNL] Format (x86 or x86_64): @@ -6571,6 +6703,14 @@ Kernel parameters replacement properties are not found. See the Kconfig entry for RISCV_ISA_FALLBACK. + riscv_nousercfi= + all Disable user CFI ABI to userspace even if cpu extension + are available. + bcfi Disable user backward CFI ABI to userspace even if + the shadow stack extension is available. + fcfi Disable user forward CFI ABI to userspace even if the + landing pad extension is available. + ro [KNL] Mount root device read-only on boot rodata= [KNL,EARLY] @@ -6600,6 +6740,11 @@ Kernel parameters rootflags= [KNL] Set root filesystem mount option string + rseq_slice_ext= [KNL] RSEQ based time slice extension + Format: boolean + Control enablement of RSEQ based time slice extension. + Default is 'on'. + initramfs_options= [KNL] Specify mount options for for the initramfs mount. @@ -6934,12 +7079,12 @@ Kernel parameters softlockup_panic= [KNL] Should the soft-lockup detector generate panics. - Format: 0 | 1 + Format: <int> - A value of 1 instructs the soft-lockup detector - to panic the machine when a soft-lockup occurs. It is - also controlled by the kernel.softlockup_panic sysctl - and CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC, which is the + A value of non-zero instructs the soft-lockup detector + to panic the machine when a soft-lockup duration exceeds + N thresholds. It is also controlled by the kernel.softlockup_panic + sysctl and CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC, which is the respective build-time switch to that functionality. softlockup_all_cpu_backtrace= @@ -7755,6 +7900,7 @@ Kernel parameters - "tee" - "caam" - "dcp" + - "pkwm" If not specified then it defaults to iterating through the trust source list starting with TPM and assigns the first trust source as a backend which is initialized @@ -8336,7 +8482,16 @@ Kernel parameters CONFIG_WQ_WATCHDOG. It sets the number times of the stall to trigger panic. - The default is 0, which disables the panic on stall. + The default is set by CONFIG_BOOTPARAM_WQ_STALL_PANIC, + which is 0 (disabled) if not configured. + + workqueue.panic_on_stall_time=<uint> + Panic when a workqueue stall has been continuous for + the specified number of seconds. Unlike panic_on_stall + which counts accumulated stall events, this triggers + based on the duration of a single continuous stall. + + The default is 0, which disables the time-based panic. workqueue.cpu_intensive_thresh_us= Per-cpu work items which run for longer than this @@ -8414,6 +8569,11 @@ Kernel parameters save/restore/migration must be enabled to handle larger domains. + xen_console_io [XEN,EARLY] + Boolean option to enable/disable the usage of the Xen + console_io hypercalls to read and write to the console. + Mostly useful for debugging and development. + xen_emul_unplug= [HW,X86,XEN,EARLY] Unplug Xen emulated devices Format: [unplug0,][unplug1] diff --git a/Documentation/admin-guide/laptops/alienware-wmi.rst b/Documentation/admin-guide/laptops/alienware-wmi.rst index 27a32a8057da..e532c60db8e2 100644 --- a/Documentation/admin-guide/laptops/alienware-wmi.rst +++ b/Documentation/admin-guide/laptops/alienware-wmi.rst @@ -105,7 +105,7 @@ information. Manual fan control on the other hand, is not exposed directly by the AWCC interface. Instead it let's us control a fan `boost` value. This `boost` value -has the following aproximate behavior over the fan pwm: +has the following approximate behavior over the fan pwm: :: diff --git a/Documentation/admin-guide/laptops/index.rst b/Documentation/admin-guide/laptops/index.rst index 6432c251dc95..c0b911d05c59 100644 --- a/Documentation/admin-guide/laptops/index.rst +++ b/Documentation/admin-guide/laptops/index.rst @@ -10,7 +10,6 @@ Laptop Drivers alienware-wmi asus-laptop disk-shock-protection - laptop-mode lg-laptop samsung-galaxybook sony-laptop diff --git a/Documentation/admin-guide/laptops/laptop-mode.rst b/Documentation/admin-guide/laptops/laptop-mode.rst deleted file mode 100644 index 66eb9cd918b5..000000000000 --- a/Documentation/admin-guide/laptops/laptop-mode.rst +++ /dev/null @@ -1,770 +0,0 @@ -=============================================== -How to conserve battery power using laptop-mode -=============================================== - -Document Author: Bart Samwel (bart@samwel.tk) - -Date created: January 2, 2004 - -Last modified: December 06, 2004 - -Introduction ------------- - -Laptop mode is used to minimize the time that the hard disk needs to be spun up, -to conserve battery power on laptops. It has been reported to cause significant -power savings. - -.. Contents - - * Introduction - * Installation - * Caveats - * The Details - * Tips & Tricks - * Control script - * ACPI integration - * Monitoring tool - - -Installation ------------- - -To use laptop mode, you don't need to set any kernel configuration options -or anything. Simply install all the files included in this document, and -laptop mode will automatically be started when you're on battery. For -your convenience, a tarball containing an installer can be downloaded at: - - http://www.samwel.tk/laptop_mode/laptop_mode/ - -To configure laptop mode, you need to edit the configuration file, which is -located in /etc/default/laptop-mode on Debian-based systems, or in -/etc/sysconfig/laptop-mode on other systems. - -Unfortunately, automatic enabling of laptop mode does not work for -laptops that don't have ACPI. On those laptops, you need to start laptop -mode manually. To start laptop mode, run "laptop_mode start", and to -stop it, run "laptop_mode stop". (Note: The laptop mode tools package now -has experimental support for APM, you might want to try that first.) - - -Caveats -------- - -* The downside of laptop mode is that you have a chance of losing up to 10 - minutes of work. If you cannot afford this, don't use it! The supplied ACPI - scripts automatically turn off laptop mode when the battery almost runs out, - so that you won't lose any data at the end of your battery life. - -* Most desktop hard drives have a very limited lifetime measured in spindown - cycles, typically about 50.000 times (it's usually listed on the spec sheet). - Check your drive's rating, and don't wear down your drive's lifetime if you - don't need to. - -* If you mount some of your ext3 filesystems with the -n option, then - the control script will not be able to remount them correctly. You must set - DO_REMOUNTS=0 in the control script, otherwise it will remount them with the - wrong options -- or it will fail because it cannot write to /etc/mtab. - -* If you have your filesystems listed as type "auto" in fstab, like I did, then - the control script will not recognize them as filesystems that need remounting. - You must list the filesystems with their true type instead. - -* It has been reported that some versions of the mutt mail client use file access - times to determine whether a folder contains new mail. If you use mutt and - experience this, you must disable the noatime remounting by setting the option - DO_REMOUNT_NOATIME to 0 in the configuration file. - - -The Details ------------ - -Laptop mode is controlled by the knob /proc/sys/vm/laptop_mode. This knob is -present for all kernels that have the laptop mode patch, regardless of any -configuration options. When the knob is set, any physical disk I/O (that might -have caused the hard disk to spin up) causes Linux to flush all dirty blocks. The -result of this is that after a disk has spun down, it will not be spun up -anymore to write dirty blocks, because those blocks had already been written -immediately after the most recent read operation. The value of the laptop_mode -knob determines the time between the occurrence of disk I/O and when the flush -is triggered. A sensible value for the knob is 5 seconds. Setting the knob to -0 disables laptop mode. - -To increase the effectiveness of the laptop_mode strategy, the laptop_mode -control script increases dirty_expire_centisecs and dirty_writeback_centisecs in -/proc/sys/vm to about 10 minutes (by default), which means that pages that are -dirtied are not forced to be written to disk as often. The control script also -changes the dirty background ratio, so that background writeback of dirty pages -is not done anymore. Combined with a higher commit value (also 10 minutes) for -ext3 filesystem (also done automatically by the control script), -this results in concentration of disk activity in a small time interval which -occurs only once every 10 minutes, or whenever the disk is forced to spin up by -a cache miss. The disk can then be spun down in the periods of inactivity. - - -Configuration -------------- - -The laptop mode configuration file is located in /etc/default/laptop-mode on -Debian-based systems, or in /etc/sysconfig/laptop-mode on other systems. It -contains the following options: - -MAX_AGE: - -Maximum time, in seconds, of hard drive spindown time that you are -comfortable with. Worst case, it's possible that you could lose this -amount of work if your battery fails while you're in laptop mode. - -MINIMUM_BATTERY_MINUTES: - -Automatically disable laptop mode if the remaining number of minutes of -battery power is less than this value. Default is 10 minutes. - -AC_HD/BATT_HD: - -The idle timeout that should be set on your hard drive when laptop mode -is active (BATT_HD) and when it is not active (AC_HD). The defaults are -20 seconds (value 4) for BATT_HD and 2 hours (value 244) for AC_HD. The -possible values are those listed in the manual page for "hdparm" for the -"-S" option. - -HD: - -The devices for which the spindown timeout should be adjusted by laptop mode. -Default is /dev/hda. If you specify multiple devices, separate them by a space. - -READAHEAD: - -Disk readahead, in 512-byte sectors, while laptop mode is active. A large -readahead can prevent disk accesses for things like executable pages (which are -loaded on demand while the application executes) and sequentially accessed data -(MP3s). - -DO_REMOUNTS: - -The control script automatically remounts any mounted journaled filesystems -with appropriate commit interval options. When this option is set to 0, this -feature is disabled. - -DO_REMOUNT_NOATIME: - -When remounting, should the filesystems be remounted with the noatime option? -Normally, this is set to "1" (enabled), but there may be programs that require -access time recording. - -DIRTY_RATIO: - -The percentage of memory that is allowed to contain "dirty" or unsaved data -before a writeback is forced, while laptop mode is active. Corresponds to -the /proc/sys/vm/dirty_ratio sysctl. - -DIRTY_BACKGROUND_RATIO: - -The percentage of memory that is allowed to contain "dirty" or unsaved data -after a forced writeback is done due to an exceeding of DIRTY_RATIO. Set -this nice and low. This corresponds to the /proc/sys/vm/dirty_background_ratio -sysctl. - -Note that the behaviour of dirty_background_ratio is quite different -when laptop mode is active and when it isn't. When laptop mode is inactive, -dirty_background_ratio is the threshold percentage at which background writeouts -start taking place. When laptop mode is active, however, background writeouts -are disabled, and the dirty_background_ratio only determines how much writeback -is done when dirty_ratio is reached. - -DO_CPU: - -Enable CPU frequency scaling when in laptop mode. (Requires CPUFreq to be setup. -See Documentation/admin-guide/pm/cpufreq.rst for more info. Disabled by default.) - -CPU_MAXFREQ: - -When on battery, what is the maximum CPU speed that the system should use? Legal -values are "slowest" for the slowest speed that your CPU is able to operate at, -or a value listed in /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies. - - -Tips & Tricks -------------- - -* Bartek Kania reports getting up to 50 minutes of extra battery life (on top - of his regular 3 to 3.5 hours) using a spindown time of 5 seconds (BATT_HD=1). - -* You can spin down the disk while playing MP3, by setting disk readahead - to 8MB (READAHEAD=16384). Effectively, the disk will read a complete MP3 at - once, and will then spin down while the MP3 is playing. (Thanks to Bartek - Kania.) - -* Drew Scott Daniels observed: "I don't know why, but when I decrease the number - of colours that my display uses it consumes less battery power. I've seen - this on powerbooks too. I hope that this is a piece of information that - might be useful to the Laptop Mode patch or its users." - -* In syslog.conf, you can prefix entries with a dash `-` to omit syncing the - file after every logging. When you're using laptop-mode and your disk doesn't - spin down, this is a likely culprit. - -* Richard Atterer observed that laptop mode does not work well with noflushd - (http://noflushd.sourceforge.net/), it seems that noflushd prevents laptop-mode - from doing its thing. - -* If you're worried about your data, you might want to consider using a USB - memory stick or something like that as a "working area". (Be aware though - that flash memory can only handle a limited number of writes, and overuse - may wear out your memory stick pretty quickly. Do _not_ use journalling - filesystems on flash memory sticks.) - - -Configuration file for control and ACPI battery scripts -------------------------------------------------------- - -This allows the tunables to be changed for the scripts via an external -configuration file - -It should be installed as /etc/default/laptop-mode on Debian, and as -/etc/sysconfig/laptop-mode on Red Hat, SUSE, Mandrake, and other work-alikes. - -Config file:: - - # Maximum time, in seconds, of hard drive spindown time that you are - # comfortable with. Worst case, it's possible that you could lose this - # amount of work if your battery fails you while in laptop mode. - #MAX_AGE=600 - - # Automatically disable laptop mode when the number of minutes of battery - # that you have left goes below this threshold. - MINIMUM_BATTERY_MINUTES=10 - - # Read-ahead, in 512-byte sectors. You can spin down the disk while playing MP3/OGG - # by setting the disk readahead to 8MB (READAHEAD=16384). Effectively, the disk - # will read a complete MP3 at once, and will then spin down while the MP3/OGG is - # playing. - #READAHEAD=4096 - - # Shall we remount journaled fs. with appropriate commit interval? (1=yes) - #DO_REMOUNTS=1 - - # And shall we add the "noatime" option to that as well? (1=yes) - #DO_REMOUNT_NOATIME=1 - - # Dirty synchronous ratio. At this percentage of dirty pages the process - # which - # calls write() does its own writeback - #DIRTY_RATIO=40 - - # - # Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been - # exceeded, the kernel will wake flusher threads which will then reduce the - # amount of dirty memory to dirty_background_ratio. Set this nice and low, - # so once some writeout has commenced, we do a lot of it. - # - #DIRTY_BACKGROUND_RATIO=5 - - # kernel default dirty buffer age - #DEF_AGE=30 - #DEF_UPDATE=5 - #DEF_DIRTY_BACKGROUND_RATIO=10 - #DEF_DIRTY_RATIO=40 - #DEF_XFS_AGE_BUFFER=15 - #DEF_XFS_SYNC_INTERVAL=30 - #DEF_XFS_BUFD_INTERVAL=1 - - # This must be adjusted manually to the value of HZ in the running kernel - # on 2.4, until the XFS people change their 2.4 external interfaces to work in - # centisecs. This can be automated, but it's a work in progress that still - # needs# some fixes. On 2.6 kernels, XFS uses USER_HZ instead of HZ for - # external interfaces, and that is currently always set to 100. So you don't - # need to change this on 2.6. - #XFS_HZ=100 - - # Should the maximum CPU frequency be adjusted down while on battery? - # Requires CPUFreq to be setup. - # See Documentation/admin-guide/pm/cpufreq.rst for more info - #DO_CPU=0 - - # When on battery what is the maximum CPU speed that the system should - # use? Legal values are "slowest" for the slowest speed that your - # CPU is able to operate at, or a value listed in: - # /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies - # Only applicable if DO_CPU=1. - #CPU_MAXFREQ=slowest - - # Idle timeout for your hard drive (man hdparm for valid values, -S option) - # Default is 2 hours on AC (AC_HD=244) and 20 seconds for battery (BATT_HD=4). - #AC_HD=244 - #BATT_HD=4 - - # The drives for which to adjust the idle timeout. Separate them by a space, - # e.g. HD="/dev/hda /dev/hdb". - #HD="/dev/hda" - - # Set the spindown timeout on a hard drive? - #DO_HD=1 - - -Control script --------------- - -Please note that this control script works for the Linux 2.4 and 2.6 series (thanks -to Kiko Piris). - -Control script:: - - #!/bin/bash - - # start or stop laptop_mode, best run by a power management daemon when - # ac gets connected/disconnected from a laptop - # - # install as /sbin/laptop_mode - # - # Contributors to this script: Kiko Piris - # Bart Samwel - # Micha Feigin - # Andrew Morton - # Herve Eychenne - # Dax Kelson - # - # Original Linux 2.4 version by: Jens Axboe - - ############################################################################# - - # Source config - if [ -f /etc/default/laptop-mode ] ; then - # Debian - . /etc/default/laptop-mode - elif [ -f /etc/sysconfig/laptop-mode ] ; then - # Others - . /etc/sysconfig/laptop-mode - fi - - # Don't raise an error if the config file is incomplete - # set defaults instead: - - # Maximum time, in seconds, of hard drive spindown time that you are - # comfortable with. Worst case, it's possible that you could lose this - # amount of work if your battery fails you while in laptop mode. - MAX_AGE=${MAX_AGE:-'600'} - - # Read-ahead, in kilobytes - READAHEAD=${READAHEAD:-'4096'} - - # Shall we remount journaled fs. with appropriate commit interval? (1=yes) - DO_REMOUNTS=${DO_REMOUNTS:-'1'} - - # And shall we add the "noatime" option to that as well? (1=yes) - DO_REMOUNT_NOATIME=${DO_REMOUNT_NOATIME:-'1'} - - # Shall we adjust the idle timeout on a hard drive? - DO_HD=${DO_HD:-'1'} - - # Adjust idle timeout on which hard drive? - HD="${HD:-'/dev/hda'}" - - # spindown time for HD (hdparm -S values) - AC_HD=${AC_HD:-'244'} - BATT_HD=${BATT_HD:-'4'} - - # Dirty synchronous ratio. At this percentage of dirty pages the process which - # calls write() does its own writeback - DIRTY_RATIO=${DIRTY_RATIO:-'40'} - - # cpu frequency scaling - # See Documentation/admin-guide/pm/cpufreq.rst for more info - DO_CPU=${CPU_MANAGE:-'0'} - CPU_MAXFREQ=${CPU_MAXFREQ:-'slowest'} - - # - # Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been - # exceeded, the kernel will wake flusher threads which will then reduce the - # amount of dirty memory to dirty_background_ratio. Set this nice and low, - # so once some writeout has commenced, we do a lot of it. - # - DIRTY_BACKGROUND_RATIO=${DIRTY_BACKGROUND_RATIO:-'5'} - - # kernel default dirty buffer age - DEF_AGE=${DEF_AGE:-'30'} - DEF_UPDATE=${DEF_UPDATE:-'5'} - DEF_DIRTY_BACKGROUND_RATIO=${DEF_DIRTY_BACKGROUND_RATIO:-'10'} - DEF_DIRTY_RATIO=${DEF_DIRTY_RATIO:-'40'} - DEF_XFS_AGE_BUFFER=${DEF_XFS_AGE_BUFFER:-'15'} - DEF_XFS_SYNC_INTERVAL=${DEF_XFS_SYNC_INTERVAL:-'30'} - DEF_XFS_BUFD_INTERVAL=${DEF_XFS_BUFD_INTERVAL:-'1'} - - # This must be adjusted manually to the value of HZ in the running kernel - # on 2.4, until the XFS people change their 2.4 external interfaces to work in - # centisecs. This can be automated, but it's a work in progress that still needs - # some fixes. On 2.6 kernels, XFS uses USER_HZ instead of HZ for external - # interfaces, and that is currently always set to 100. So you don't need to - # change this on 2.6. - XFS_HZ=${XFS_HZ:-'100'} - - ############################################################################# - - KLEVEL="$(uname -r | - { - IFS='.' read a b c - echo $a.$b - } - )" - case "$KLEVEL" in - "2.4"|"2.6") - ;; - *) - echo "Unhandled kernel version: $KLEVEL ('uname -r' = '$(uname -r)')" >&2 - exit 1 - ;; - esac - - if [ ! -e /proc/sys/vm/laptop_mode ] ; then - echo "Kernel is not patched with laptop_mode patch." >&2 - exit 1 - fi - - if [ ! -w /proc/sys/vm/laptop_mode ] ; then - echo "You do not have enough privileges to enable laptop_mode." >&2 - exit 1 - fi - - # Remove an option (the first parameter) of the form option=<number> from - # a mount options string (the rest of the parameters). - parse_mount_opts () { - OPT="$1" - shift - echo ",$*," | sed \ - -e 's/,'"$OPT"'=[0-9]*,/,/g' \ - -e 's/,,*/,/g' \ - -e 's/^,//' \ - -e 's/,$//' - } - - # Remove an option (the first parameter) without any arguments from - # a mount option string (the rest of the parameters). - parse_nonumber_mount_opts () { - OPT="$1" - shift - echo ",$*," | sed \ - -e 's/,'"$OPT"',/,/g' \ - -e 's/,,*/,/g' \ - -e 's/^,//' \ - -e 's/,$//' - } - - # Find out the state of a yes/no option (e.g. "atime"/"noatime") in - # fstab for a given filesystem, and use this state to replace the - # value of the option in another mount options string. The device - # is the first argument, the option name the second, and the default - # value the third. The remainder is the mount options string. - # - # Example: - # parse_yesno_opts_wfstab /dev/hda1 atime atime defaults,noatime - # - # If fstab contains, say, "rw" for this filesystem, then the result - # will be "defaults,atime". - parse_yesno_opts_wfstab () { - L_DEV="$1" - OPT="$2" - DEF_OPT="$3" - shift 3 - L_OPTS="$*" - PARSEDOPTS1="$(parse_nonumber_mount_opts $OPT $L_OPTS)" - PARSEDOPTS1="$(parse_nonumber_mount_opts no$OPT $PARSEDOPTS1)" - # Watch for a default atime in fstab - FSTAB_OPTS="$(awk '$1 == "'$L_DEV'" { print $4 }' /etc/fstab)" - if echo "$FSTAB_OPTS" | grep "$OPT" > /dev/null ; then - # option specified in fstab: extract the value and use it - if echo "$FSTAB_OPTS" | grep "no$OPT" > /dev/null ; then - echo "$PARSEDOPTS1,no$OPT" - else - # no$OPT not found -- so we must have $OPT. - echo "$PARSEDOPTS1,$OPT" - fi - else - # option not specified in fstab -- choose the default. - echo "$PARSEDOPTS1,$DEF_OPT" - fi - } - - # Find out the state of a numbered option (e.g. "commit=NNN") in - # fstab for a given filesystem, and use this state to replace the - # value of the option in another mount options string. The device - # is the first argument, and the option name the second. The - # remainder is the mount options string in which the replacement - # must be done. - # - # Example: - # parse_mount_opts_wfstab /dev/hda1 commit defaults,commit=7 - # - # If fstab contains, say, "commit=3,rw" for this filesystem, then the - # result will be "rw,commit=3". - parse_mount_opts_wfstab () { - L_DEV="$1" - OPT="$2" - shift 2 - L_OPTS="$*" - PARSEDOPTS1="$(parse_mount_opts $OPT $L_OPTS)" - # Watch for a default commit in fstab - FSTAB_OPTS="$(awk '$1 == "'$L_DEV'" { print $4 }' /etc/fstab)" - if echo "$FSTAB_OPTS" | grep "$OPT=" > /dev/null ; then - # option specified in fstab: extract the value, and use it - echo -n "$PARSEDOPTS1,$OPT=" - echo ",$FSTAB_OPTS," | sed \ - -e 's/.*,'"$OPT"'=//' \ - -e 's/,.*//' - else - # option not specified in fstab: set it to 0 - echo "$PARSEDOPTS1,$OPT=0" - fi - } - - deduce_fstype () { - MP="$1" - # My root filesystem unfortunately has - # type "unknown" in /etc/mtab. If we encounter - # "unknown", we try to get the type from fstab. - cat /etc/fstab | - grep -v '^#' | - while read FSTAB_DEV FSTAB_MP FSTAB_FST FSTAB_OPTS FSTAB_DUMP FSTAB_DUMP ; do - if [ "$FSTAB_MP" = "$MP" ]; then - echo $FSTAB_FST - exit 0 - fi - done - } - - if [ $DO_REMOUNT_NOATIME -eq 1 ] ; then - NOATIME_OPT=",noatime" - fi - - case "$1" in - start) - AGE=$((100*$MAX_AGE)) - XFS_AGE=$(($XFS_HZ*$MAX_AGE)) - echo -n "Starting laptop_mode" - - if [ -d /proc/sys/vm/pagebuf ] ; then - # (For 2.4 and early 2.6.) - # This only needs to be set, not reset -- it is only used when - # laptop mode is enabled. - echo $XFS_AGE > /proc/sys/vm/pagebuf/lm_flush_age - echo $XFS_AGE > /proc/sys/fs/xfs/lm_sync_interval - elif [ -f /proc/sys/fs/xfs/lm_age_buffer ] ; then - # (A couple of early 2.6 laptop mode patches had these.) - # The same goes for these. - echo $XFS_AGE > /proc/sys/fs/xfs/lm_age_buffer - echo $XFS_AGE > /proc/sys/fs/xfs/lm_sync_interval - elif [ -f /proc/sys/fs/xfs/age_buffer ] ; then - # (2.6.6) - # But not for these -- they are also used in normal - # operation. - echo $XFS_AGE > /proc/sys/fs/xfs/age_buffer - echo $XFS_AGE > /proc/sys/fs/xfs/sync_interval - elif [ -f /proc/sys/fs/xfs/age_buffer_centisecs ] ; then - # (2.6.7 upwards) - # And not for these either. These are in centisecs, - # not USER_HZ, so we have to use $AGE, not $XFS_AGE. - echo $AGE > /proc/sys/fs/xfs/age_buffer_centisecs - echo $AGE > /proc/sys/fs/xfs/xfssyncd_centisecs - echo 3000 > /proc/sys/fs/xfs/xfsbufd_centisecs - fi - - case "$KLEVEL" in - "2.4") - echo 1 > /proc/sys/vm/laptop_mode - echo "30 500 0 0 $AGE $AGE 60 20 0" > /proc/sys/vm/bdflush - ;; - "2.6") - echo 5 > /proc/sys/vm/laptop_mode - echo "$AGE" > /proc/sys/vm/dirty_writeback_centisecs - echo "$AGE" > /proc/sys/vm/dirty_expire_centisecs - echo "$DIRTY_RATIO" > /proc/sys/vm/dirty_ratio - echo "$DIRTY_BACKGROUND_RATIO" > /proc/sys/vm/dirty_background_ratio - ;; - esac - if [ $DO_REMOUNTS -eq 1 ]; then - cat /etc/mtab | while read DEV MP FST OPTS DUMP PASS ; do - PARSEDOPTS="$(parse_mount_opts "$OPTS")" - if [ "$FST" = 'unknown' ]; then - FST=$(deduce_fstype $MP) - fi - case "$FST" in - "ext3") - PARSEDOPTS="$(parse_mount_opts commit "$OPTS")" - mount $DEV -t $FST $MP -o remount,$PARSEDOPTS,commit=$MAX_AGE$NOATIME_OPT - ;; - "xfs") - mount $DEV -t $FST $MP -o remount,$OPTS$NOATIME_OPT - ;; - esac - if [ -b $DEV ] ; then - blockdev --setra $(($READAHEAD * 2)) $DEV - fi - done - fi - if [ $DO_HD -eq 1 ] ; then - for THISHD in $HD ; do - /sbin/hdparm -S $BATT_HD $THISHD > /dev/null 2>&1 - /sbin/hdparm -B 1 $THISHD > /dev/null 2>&1 - done - fi - if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then - if [ $CPU_MAXFREQ = 'slowest' ]; then - CPU_MAXFREQ=`cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq` - fi - echo $CPU_MAXFREQ > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq - fi - echo "." - ;; - stop) - U_AGE=$((100*$DEF_UPDATE)) - B_AGE=$((100*$DEF_AGE)) - echo -n "Stopping laptop_mode" - echo 0 > /proc/sys/vm/laptop_mode - if [ -f /proc/sys/fs/xfs/age_buffer -a ! -f /proc/sys/fs/xfs/lm_age_buffer ] ; then - # These need to be restored, if there are no lm_*. - echo $(($XFS_HZ*$DEF_XFS_AGE_BUFFER)) > /proc/sys/fs/xfs/age_buffer - echo $(($XFS_HZ*$DEF_XFS_SYNC_INTERVAL)) > /proc/sys/fs/xfs/sync_interval - elif [ -f /proc/sys/fs/xfs/age_buffer_centisecs ] ; then - # These need to be restored as well. - echo $((100*$DEF_XFS_AGE_BUFFER)) > /proc/sys/fs/xfs/age_buffer_centisecs - echo $((100*$DEF_XFS_SYNC_INTERVAL)) > /proc/sys/fs/xfs/xfssyncd_centisecs - echo $((100*$DEF_XFS_BUFD_INTERVAL)) > /proc/sys/fs/xfs/xfsbufd_centisecs - fi - case "$KLEVEL" in - "2.4") - echo "30 500 0 0 $U_AGE $B_AGE 60 20 0" > /proc/sys/vm/bdflush - ;; - "2.6") - echo "$U_AGE" > /proc/sys/vm/dirty_writeback_centisecs - echo "$B_AGE" > /proc/sys/vm/dirty_expire_centisecs - echo "$DEF_DIRTY_RATIO" > /proc/sys/vm/dirty_ratio - echo "$DEF_DIRTY_BACKGROUND_RATIO" > /proc/sys/vm/dirty_background_ratio - ;; - esac - if [ $DO_REMOUNTS -eq 1 ] ; then - cat /etc/mtab | while read DEV MP FST OPTS DUMP PASS ; do - # Reset commit and atime options to defaults. - if [ "$FST" = 'unknown' ]; then - FST=$(deduce_fstype $MP) - fi - case "$FST" in - "ext3") - PARSEDOPTS="$(parse_mount_opts_wfstab $DEV commit $OPTS)" - PARSEDOPTS="$(parse_yesno_opts_wfstab $DEV atime atime $PARSEDOPTS)" - mount $DEV -t $FST $MP -o remount,$PARSEDOPTS - ;; - "xfs") - PARSEDOPTS="$(parse_yesno_opts_wfstab $DEV atime atime $OPTS)" - mount $DEV -t $FST $MP -o remount,$PARSEDOPTS - ;; - esac - if [ -b $DEV ] ; then - blockdev --setra 256 $DEV - fi - done - fi - if [ $DO_HD -eq 1 ] ; then - for THISHD in $HD ; do - /sbin/hdparm -S $AC_HD $THISHD > /dev/null 2>&1 - /sbin/hdparm -B 255 $THISHD > /dev/null 2>&1 - done - fi - if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then - echo `cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq` > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq - fi - echo "." - ;; - *) - echo "Usage: $0 {start|stop}" 2>&1 - exit 1 - ;; - - esac - - exit 0 - - -ACPI integration ----------------- - -Dax Kelson submitted this so that the ACPI acpid daemon will -kick off the laptop_mode script and run hdparm. The part that -automatically disables laptop mode when the battery is low was -written by Jan Topinski. - -/etc/acpi/events/ac_adapter:: - - event=ac_adapter - action=/etc/acpi/actions/ac.sh %e - -/etc/acpi/events/battery:: - - event=battery.* - action=/etc/acpi/actions/battery.sh %e - -/etc/acpi/actions/ac.sh:: - - #!/bin/bash - - # ac on/offline event handler - - status=`awk '/^state: / { print $2 }' /proc/acpi/ac_adapter/$2/state` - - case $status in - "on-line") - /sbin/laptop_mode stop - exit 0 - ;; - "off-line") - /sbin/laptop_mode start - exit 0 - ;; - esac - - -/etc/acpi/actions/battery.sh:: - - #! /bin/bash - - # Automatically disable laptop mode when the battery almost runs out. - - BATT_INFO=/proc/acpi/battery/$2/state - - if [[ -f /proc/sys/vm/laptop_mode ]] - then - LM=`cat /proc/sys/vm/laptop_mode` - if [[ $LM -gt 0 ]] - then - if [[ -f $BATT_INFO ]] - then - # Source the config file only now that we know we need - if [ -f /etc/default/laptop-mode ] ; then - # Debian - . /etc/default/laptop-mode - elif [ -f /etc/sysconfig/laptop-mode ] ; then - # Others - . /etc/sysconfig/laptop-mode - fi - MINIMUM_BATTERY_MINUTES=${MINIMUM_BATTERY_MINUTES:-'10'} - - ACTION="`cat $BATT_INFO | grep charging | cut -c 26-`" - if [[ ACTION -eq "discharging" ]] - then - PRESENT_RATE=`cat $BATT_INFO | grep "present rate:" | sed "s/.* \([0-9][0-9]* \).*/\1/" ` - REMAINING=`cat $BATT_INFO | grep "remaining capacity:" | sed "s/.* \([0-9][0-9]* \).*/\1/" ` - fi - if (($REMAINING * 60 / $PRESENT_RATE < $MINIMUM_BATTERY_MINUTES)) - then - /sbin/laptop_mode stop - fi - else - logger -p daemon.warning "You are using laptop mode and your battery interface $BATT_INFO is missing. This may lead to loss of data when the battery runs out. Check kernel ACPI support and /proc/acpi/battery folder, and edit /etc/acpi/battery.sh to set BATT_INFO to the correct path." - fi - fi - fi - - -Monitoring tool ---------------- - -Bartek Kania submitted this, it can be used to measure how much time your disk -spends spun up/down. See tools/laptop/dslm/dslm.c diff --git a/Documentation/admin-guide/laptops/thinkpad-acpi.rst b/Documentation/admin-guide/laptops/thinkpad-acpi.rst index 4ab0fef7d440..03951ed6b628 100644 --- a/Documentation/admin-guide/laptops/thinkpad-acpi.rst +++ b/Documentation/admin-guide/laptops/thinkpad-acpi.rst @@ -54,6 +54,7 @@ detailed description): - Setting keyboard language - WWAN Antenna type - Auxmac + - Hardware damage detection capability A compatibility table by model and feature is maintained on the web site, http://ibm-acpi.sf.net/. I appreciate any success or failure @@ -1576,6 +1577,42 @@ percentage level, above which charging will stop. The exact semantics of the attributes may be found in Documentation/ABI/testing/sysfs-class-power. +Hardware damage detection capability +------------------------------------ + +sysfs attributes: hwdd_status, hwdd_detail + +Thinkpads are adding the ability to detect and report hardware damage. +Add new sysfs interface to identify the damaged device status. +Initial support is available for the USB-C replaceable connector. + +The command to check device damaged status is:: + + cat /sys/devices/platform/thinkpad_acpi/hwdd_status + +This value displays status of device damaged. + +- 0 = Not Damaged +- 1 = Damaged + +The command to check location of damaged device is:: + + cat /sys/devices/platform/thinkpad_acpi/hwdd_detail + +This value displays location of damaged device having 1 line per damaged "item". +For example: + +if no damage is detected: + +- No damage detected + +if damage detected: + +- TYPE-C: Base, Right side, Center port + +The property is read-only. If feature is not supported then sysfs +attribute is not created. + Multiple Commands, Module Parameters ------------------------------------ diff --git a/Documentation/admin-guide/laptops/toshiba_haps.rst b/Documentation/admin-guide/laptops/toshiba_haps.rst index d28b6c3f2849..0226225b82e1 100644 --- a/Documentation/admin-guide/laptops/toshiba_haps.rst +++ b/Documentation/admin-guide/laptops/toshiba_haps.rst @@ -43,7 +43,7 @@ RSSS Shuts down the HDD protection interface for a few seconds, ==== ===================================================================== Note: - The presence of Solid State Drives (SSD) can make this driver to fail loading, + The presence of Solid State Drives (SSD) can cause this driver to fail loading, given the fact that such drives have no movable parts, and thus, not requiring any "protection" as well as failing during the evaluation of the _STA method found under this device. diff --git a/Documentation/admin-guide/laptops/uniwill-laptop.rst b/Documentation/admin-guide/laptops/uniwill-laptop.rst index a16baf15516b..aff5f57a6bd4 100644 --- a/Documentation/admin-guide/laptops/uniwill-laptop.rst +++ b/Documentation/admin-guide/laptops/uniwill-laptop.rst @@ -24,7 +24,7 @@ Keyboard settings The ``uniwill-laptop`` driver allows the user to enable/disable: - - the FN and super key lock functionality of the integrated keyboard + - the FN lock and super key of the integrated keyboard - the touchpad toggle functionality of the integrated touchpad See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details. diff --git a/Documentation/admin-guide/media/mgb4.rst b/Documentation/admin-guide/media/mgb4.rst index 5ac69b833a7a..0a8a56e837f7 100644 --- a/Documentation/admin-guide/media/mgb4.rst +++ b/Documentation/admin-guide/media/mgb4.rst @@ -31,9 +31,11 @@ Global (PCI card) parameters | 0 - No module present | 1 - FPDL3 - | 2 - GMSL (one serializer, two daisy chained deserializers) - | 3 - GMSL (one serializer, two deserializers) - | 4 - GMSL (two deserializers with two daisy chain outputs) + | 2 - GMSL3 (one serializer, two daisy chained deserializers) + | 3 - GMSL3 (one serializer, two deserializers) + | 4 - GMSL3 (two deserializers with two daisy chain outputs) + | 6 - GMSL1 + | 8 - GMSL3 coax **module_version** (R): Module version number. Zero in case of a missing module. @@ -42,7 +44,8 @@ Global (PCI card) parameters Firmware type. | 1 - FPDL3 - | 2 - GMSL + | 2 - GMSL3 + | 3 - GMSL1 **fw_version** (R): Firmware version number. diff --git a/Documentation/admin-guide/mm/damon/lru_sort.rst b/Documentation/admin-guide/mm/damon/lru_sort.rst index 72a943202676..20a8378d5a94 100644 --- a/Documentation/admin-guide/mm/damon/lru_sort.rst +++ b/Documentation/admin-guide/mm/damon/lru_sort.rst @@ -79,6 +79,43 @@ of parametrs except ``enabled`` again. Once the re-reading is done, this parameter is set as ``N``. If invalid parameters are found while the re-reading, DAMON_LRU_SORT will be disabled. +active_mem_bp +------------- + +Desired active to [in]active memory ratio in bp (1/10,000). + +While keeping the caps that set by other quotas, DAMON_LRU_SORT automatically +increases and decreases the effective level of the quota aiming the LRU +[de]prioritizations of the hot and cold memory resulting in this active to +[in]active memory ratio. Value zero means disabling this auto-tuning feature. + +Disabled by default. + +Auto-tune monitoring intervals +------------------------------ + +If this parameter is set as ``Y``, DAMON_LRU_SORT automatically tunes DAMON's +sampling and aggregation intervals. The auto-tuning aims to capture meaningful +amount of access events in each DAMON-snapshot, while keeping the sampling +interval 5 milliseconds in minimum, and 10 seconds in maximum. Setting this as +``N`` disables the auto-tuning. + +Disabled by default. + +filter_young_pages +------------------ + +Filter [non-]young pages accordingly for LRU [de]prioritizations. + +If this is set, check page level access (youngness) once again before each +LRU [de]prioritization operation. LRU prioritization operation is skipped +if the page has not accessed since the last check (not young). LRU +deprioritization operation is skipped if the page has accessed since the +last check (young). The feature is enabled or disabled if this parameter is +set as ``Y`` or ``N``, respectively. + +Disabled by default. + hot_thres_access_freq --------------------- diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst index 9991dad60fcf..b0f3969b6b3b 100644 --- a/Documentation/admin-guide/mm/damon/usage.rst +++ b/Documentation/admin-guide/mm/damon/usage.rst @@ -6,6 +6,11 @@ Detailed Usages DAMON provides below interfaces for different users. +- *Special-purpose DAMON modules.* + :ref:`This <damon_modules_special_purpose>` is for people who are building, + distributing, and/or administrating the kernel with special-purpose DAMON + usages. Using this, users can use DAMON's major features for the given + purposes in build, boot, or runtime in simple ways. - *DAMON user space tool.* `This <https://github.com/damonitor/damo>`_ is for privileged people such as system administrators who want a just-working human-friendly interface. @@ -87,7 +92,7 @@ comma (","). │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests │ │ │ │ │ │ │ │ 0/id,weight - │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds + │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds,nr_snapshots,max_nr_snapshots │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed │ │ │ │ │ │ │ │ ... @@ -543,10 +548,14 @@ online analysis or tuning of the schemes. Refer to :ref:`design doc The statistics can be retrieved by reading the files under ``stats`` directory (``nr_tried``, ``sz_tried``, ``nr_applied``, ``sz_applied``, -``sz_ops_filter_passed``, and ``qt_exceeds``), respectively. The files are not -updated in real time, so you should ask DAMON sysfs interface to update the -content of the files for the stats by writing a special keyword, -``update_schemes_stats`` to the relevant ``kdamonds/<N>/state`` file. +``sz_ops_filter_passed``, ``qt_exceeds``, ``nr_snapshots`` and +``max_nr_snapshots``), respectively. + +The files are not updated in real time by default. Users should ask DAMON +sysfs interface to periodically update those using ``refresh_ms``, or do a one +time update by writing a special keyword, ``update_schemes_stats`` to the +relevant ``kdamonds/<N>/state`` file. Refer to :ref:`kdamond directory +<sysfs_kdamond>` for more details. .. _sysfs_schemes_tried_regions: diff --git a/Documentation/admin-guide/mm/memory-hotplug.rst b/Documentation/admin-guide/mm/memory-hotplug.rst index 33c886f3d198..0207f8725142 100644 --- a/Documentation/admin-guide/mm/memory-hotplug.rst +++ b/Documentation/admin-guide/mm/memory-hotplug.rst @@ -603,17 +603,18 @@ ZONE_MOVABLE, especially when fine-tuning zone ratios: memory for metadata and page tables in the direct map; having a lot of offline memory blocks is not a typical case, though. -- Memory ballooning without balloon compaction is incompatible with - ZONE_MOVABLE. Only some implementations, such as virtio-balloon and - pseries CMM, fully support balloon compaction. +- Memory ballooning without support for balloon memory migration is incompatible + with ZONE_MOVABLE. Only some implementations, such as virtio-balloon and + pseries CMM, fully support balloon memory migration. - Further, the CONFIG_BALLOON_COMPACTION kernel configuration option might be + Further, the CONFIG_BALLOON_MIGRATION kernel configuration option might be disabled. In that case, balloon inflation will only perform unmovable allocations and silently create a zone imbalance, usually triggered by inflation requests from the hypervisor. -- Gigantic pages are unmovable, resulting in user space consuming a - lot of unmovable memory. +- Gigantic pages are unmovable when an architecture does not support + huge page migration and/or the ``movable_gigantic_pages`` sysctl is false. + See Documentation/admin-guide/sysctl/vm.rst for more info on this sysctl. - Huge pages are unmovable when an architectures does not support huge page migration, resulting in a similar issue as with gigantic pages. @@ -672,6 +673,15 @@ block might fail: - Concurrent activity that operates on the same physical memory area, such as allocating gigantic pages, can result in temporary offlining failures. +- When an admin sets the ``movable_gigantic_pages`` sysctl to true, gigantic + pages are allowed in ZONE_MOVABLE. This only allows migratable gigantic + pages to be allocated; however, if there are no eligible destination gigantic + pages at offline, the offlining operation will fail. + + Users leveraging ``movable_gigantic_pages`` should weigh the value of + ZONE_MOVABLE for increasing the reliability of gigantic page allocation + against the potential loss of hot-unplug reliability. + - Out of memory when dissolving huge pages, especially when HugeTLB Vmemmap Optimization (HVO) is enabled. diff --git a/Documentation/admin-guide/mm/nommu-mmap.rst b/Documentation/admin-guide/mm/nommu-mmap.rst index 530fed08de2c..8a1949b3690f 100644 --- a/Documentation/admin-guide/mm/nommu-mmap.rst +++ b/Documentation/admin-guide/mm/nommu-mmap.rst @@ -38,7 +38,7 @@ and it's also much more restricted in the latter case: In the no-MMU case: - - If one exists, the kernel will re-use an existing mapping to the + - If one exists, the kernel will reuse an existing mapping to the same segment of the same file if that has compatible permissions, even if this was created by another process. diff --git a/Documentation/admin-guide/module-signing.rst b/Documentation/admin-guide/module-signing.rst index a8667a777490..7f2f127dc76f 100644 --- a/Documentation/admin-guide/module-signing.rst +++ b/Documentation/admin-guide/module-signing.rst @@ -28,10 +28,12 @@ trusted userspace bits. This facility uses X.509 ITU-T standard certificates to encode the public keys involved. The signatures are not themselves encoded in any industrial standard -type. The built-in facility currently only supports the RSA & NIST P-384 ECDSA -public key signing standard (though it is pluggable and permits others to be -used). The possible hash algorithms that can be used are SHA-2 and SHA-3 of -sizes 256, 384, and 512 (the algorithm is selected by data in the signature). +type. The built-in facility currently only supports the RSA, NIST P-384 ECDSA +and NIST FIPS-204 ML-DSA public key signing standards (though it is pluggable +and permits others to be used). For RSA and ECDSA, the possible hash +algorithms that can be used are SHA-2 and SHA-3 of sizes 256, 384, and 512 (the +algorithm is selected by data in the signature); ML-DSA does its own hashing, +but is allowed to be used with a SHA512 hash for signed attributes. ========================== @@ -146,9 +148,9 @@ into vmlinux) using parameters in the:: file (which is also generated if it does not already exist). -One can select between RSA (``MODULE_SIG_KEY_TYPE_RSA``) and ECDSA -(``MODULE_SIG_KEY_TYPE_ECDSA``) to generate either RSA 4k or NIST -P-384 keypair. +One can select between RSA (``MODULE_SIG_KEY_TYPE_RSA``), ECDSA +(``MODULE_SIG_KEY_TYPE_ECDSA``) and ML-DSA (``MODULE_SIG_KEY_TYPE_MLDSA_*``) to +generate an RSA 4k, a NIST P-384 keypair or an ML-DSA 44, 65 or 87 keypair. It is strongly recommended that you provide your own x509.genkey file. diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst index 738d7b4dc33a..dbe6d23a5d67 100644 --- a/Documentation/admin-guide/pm/cpufreq.rst +++ b/Documentation/admin-guide/pm/cpufreq.rst @@ -439,7 +439,7 @@ This governor exposes only one tunable: ``rate_limit_us`` Minimum time (in microseconds) that has to pass between two consecutive runs of governor computations (default: 1.5 times the scaling driver's - transition latency or the maximum 2ms). + transition latency or 1ms if the driver does not provide a latency value). The purpose of this tunable is to reduce the scheduler context overhead of the governor which might be excessive without it. diff --git a/Documentation/admin-guide/pm/intel_idle.rst b/Documentation/admin-guide/pm/intel_idle.rst index ed6f055d4b14..188d52cd26e8 100644 --- a/Documentation/admin-guide/pm/intel_idle.rst +++ b/Documentation/admin-guide/pm/intel_idle.rst @@ -260,6 +260,17 @@ mode to off when the CPU is in any one of the available idle states. This may help performance of a sibling CPU at the expense of a slightly higher wakeup latency for the idle CPU. +The ``table`` argument allows customization of idle state latency and target +residency. The syntax is a comma-separated list of ``name:latency:residency`` +entries, where ``name`` is the idle state name, ``latency`` is the exit latency +in microseconds, and ``residency`` is the target residency in microseconds. It +is not necessary to specify all idle states; only those to be customized. For +example, ``C1:1:3,C6:50:100`` sets the exit latency and target residency for +C1 and C6 to 1/3 and 50/100 microseconds, respectively. Remaining idle states +keep their default values. The driver verifies that deeper idle states have +higher latency and target residency than shallower ones. Also, target +residency cannot be smaller than exit latency. If any of these conditions is +not met, the driver ignores the entire ``table`` parameter. .. _intel-idle-core-and-package-idle-states: diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index 239da22c4e28..9aed74e65cf4 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -591,6 +591,9 @@ if leaking kernel pointer values to unprivileged users is a concern. When ``kptr_restrict`` is set to 2, kernel pointers printed using %pK will be replaced with 0s regardless of privileges. +For disabling these security restrictions early at boot time (and once +for all), use the ``hash_pointers`` boot parameter instead. + softlockup_sys_info & hardlockup_sys_info ========================================= A comma separated list of extra system information to be dumped when @@ -1235,12 +1238,6 @@ that support this feature. == =========================================================================== -real-root-dev -============= - -See Documentation/admin-guide/initrd.rst. - - reboot-cmd (SPARC only) ======================= diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst index 369a738a6819..3b2ad61995d4 100644 --- a/Documentation/admin-guide/sysctl/net.rst +++ b/Documentation/admin-guide/sysctl/net.rst @@ -40,8 +40,8 @@ Table : Subdirectories in /proc/sys/net bridge Bridging rose X.25 PLP layer core General parameter tipc TIPC ethernet Ethernet protocol unix Unix domain sockets - ipv4 IP version 4 x25 X.25 protocol - ipv6 IP version 6 + ipv4 IP version 4 vsock VSOCK sockets + ipv6 IP version 6 x25 X.25 protocol ========= =================== = ========== =================== 1. /proc/sys/net/core - Network core options @@ -303,24 +303,33 @@ netdev_max_backlog Maximum number of packets, queued on the INPUT side, when the interface receives packets faster than kernel can process them. +qdisc_max_burst +------------------ + +Maximum number of packets that can be temporarily stored before +reaching qdisc. + +Default: 1000 + netdev_rss_key -------------- -RSS (Receive Side Scaling) enabled drivers use a 40 bytes host key that is -randomly generated. +RSS (Receive Side Scaling) enabled drivers use a host key that +is randomly generated. Some user space might need to gather its content even if drivers do not provide ethtool -x support yet. :: myhost:~# cat /proc/sys/net/core/netdev_rss_key - 84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (52 bytes total) + 84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (256 bytes total) -File contains nul bytes if no driver ever called netdev_rss_key_fill() function. +File contains all nul bytes if no driver ever called netdev_rss_key_fill() +function. Note: - /proc/sys/net/core/netdev_rss_key contains 52 bytes of key, - but most drivers only use 40 bytes of it. + /proc/sys/net/core/netdev_rss_key contains 256 bytes of key, + but many drivers only use 40 or 52 bytes of it. :: @@ -542,3 +551,54 @@ originally may have been issued in the correct sequential order. If named_timeout is nonzero, failed topology updates will be placed on a defer queue until another event arrives that clears the error, or until the timeout expires. Value is in milliseconds. + +6. /proc/sys/net/vsock - VSOCK sockets +-------------------------------------- + +VSOCK sockets (AF_VSOCK) provide communication between virtual machines and +their hosts. The behavior of VSOCK sockets in a network namespace is determined +by the namespace's mode (``global`` or ``local``), which controls how CIDs +(Context IDs) are allocated and how sockets interact across namespaces. + +ns_mode +------- + +Read-only. Reports the current namespace's mode, set at namespace creation +and immutable thereafter. + +Values: + + - ``global`` - the namespace shares system-wide CID allocation and + its sockets can reach any VM or socket in any global namespace. + Sockets in this namespace cannot reach sockets in local + namespaces. + - ``local`` - the namespace has private CID allocation and its + sockets can only connect to VMs or sockets within the same + namespace. + +The init_net mode is always ``global``. + +child_ns_mode +------------- + +Controls what mode newly created child namespaces will inherit. At namespace +creation, ``ns_mode`` is inherited from the parent's ``child_ns_mode``. The +initial value matches the namespace's own ``ns_mode``. + +Values: + + - ``global`` - child namespaces will share system-wide CID allocation + and their sockets will be able to reach any VM or socket in any + global namespace. + - ``local`` - child namespaces will have private CID allocation and + their sockets will only be able to connect within their own + namespace. + +The first write to ``child_ns_mode`` locks its value. Subsequent writes of the +same value succeed, but writing a different value returns ``-EBUSY``. + +Changing ``child_ns_mode`` only affects namespaces created after the change; +it does not modify the current namespace or any existing children. + +A namespace with ``ns_mode`` set to ``local`` cannot change +``child_ns_mode`` to ``global`` (returns ``-EPERM``). diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 4d71211fdad8..97e12359775c 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -41,7 +41,6 @@ Currently, these files are in /proc/sys/vm: - extfrag_threshold - highmem_is_dirtyable - hugetlb_shm_group -- laptop_mode - legacy_va_layout - lowmem_reserve_ratio - max_map_count @@ -54,6 +53,7 @@ Currently, these files are in /proc/sys/vm: - mmap_min_addr - mmap_rnd_bits - mmap_rnd_compat_bits +- movable_gigantic_pages - nr_hugepages - nr_hugepages_mempolicy - nr_overcommit_hugepages @@ -231,6 +231,8 @@ eventually gets pushed out to disk. This tunable is used to define when dirty inode is old enough to be eligible for writeback by the kernel flusher threads. And, it is also used as the interval to wakeup dirtytime_writeback thread. +Setting this to zero disables periodic dirtytime writeback. + dirty_writeback_centisecs ========================= @@ -363,13 +365,6 @@ hugetlb_shm_group contains group id that is allowed to create SysV shared memory segment using hugetlb page. -laptop_mode -=========== - -laptop_mode is a knob that controls "laptop mode". All the things that are -controlled by this knob are discussed in Documentation/admin-guide/laptops/laptop-mode.rst. - - legacy_va_layout ================ @@ -494,6 +489,10 @@ memory allocations. The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT. +When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid +warnings produced by allocations made while profiling is disabled and freed +when it's enabled. + memory_failure_early_kill ========================= @@ -624,6 +623,33 @@ This value can be changed after boot using the /proc/sys/vm/mmap_rnd_compat_bits tunable +movable_gigantic_pages +====================== + +This parameter controls whether gigantic pages may be allocated from +ZONE_MOVABLE. If set to non-zero, gigantic pages can be allocated +from ZONE_MOVABLE. ZONE_MOVABLE memory may be created via the kernel +boot parameter `kernelcore` or via memory hotplug as discussed in +Documentation/admin-guide/mm/memory-hotplug.rst. + +Support may depend on specific architecture. + +Note that using ZONE_MOVABLE gigantic pages make memory hotremove unreliable. + +Memory hot-remove operations will block indefinitely until the admin reserves +sufficient gigantic pages to service migration requests associated with the +memory offlining process. As HugeTLB gigantic page reservation is a manual +process (via `nodeN/hugepages/.../nr_hugepages` interfaces) this may not be +obvious when just attempting to offline a block of memory. + +Additionally, as multiple gigantic pages may be reserved on a single block, +it may appear that gigantic pages are available for migration when in reality +they are in the process of being removed. For example if `memoryN` contains +two gigantic pages, one reserved and one allocated, and an admin attempts to +offline that block, this operations may hang indefinitely unless another +reserved gigantic page is available on another block `memoryM`. + + nr_hugepages ============ diff --git a/Documentation/admin-guide/thunderbolt.rst b/Documentation/admin-guide/thunderbolt.rst index 07303c1346fb..89df26553aa0 100644 --- a/Documentation/admin-guide/thunderbolt.rst +++ b/Documentation/admin-guide/thunderbolt.rst @@ -370,7 +370,7 @@ is built-in to the kernel image, there is no need to do anything. The driver will create one virtual ethernet interface per Thunderbolt port which are named like ``thunderbolt0`` and so on. From this point -you can either use standard userspace tools like ``ifconfig`` to +you can either use standard userspace tools like ``ip`` to configure the interface or let your GUI handle it automatically. Forcing power diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index c85cd327af28..746ea60eed3f 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -215,6 +215,14 @@ When mounting an XFS filesystem, the following options are accepted. inconsistent namespace presentation during or after a failover event. + errortag=tagname + When specified, enables the error inject tag named "tagname" with the + default frequency. Can be specified multiple times to enable multiple + errortags. Specifying this option on remount will reset the error tag + to the default value if it was set to any other value before. + This option is only supported when CONFIG_XFS_DEBUG is enabled, and + will not be reflected in /proc/self/mounts. + Deprecation of V4 Format ======================== diff --git a/Documentation/arch/arc/index.rst b/Documentation/arch/arc/index.rst index 7b098d4a5e3e..10bf8c2701bf 100644 --- a/Documentation/arch/arc/index.rst +++ b/Documentation/arch/arc/index.rst @@ -8,10 +8,3 @@ ARC architecture arc features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/arm/index.rst b/Documentation/arch/arm/index.rst index fd43502ae924..afe17db294c4 100644 --- a/Documentation/arch/arm/index.rst +++ b/Documentation/arch/arm/index.rst @@ -75,11 +75,3 @@ SoC-specific documents sti/overview vfp/release-notes - - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/arm/keystone/knav-qmss.rst b/Documentation/arch/arm/keystone/knav-qmss.rst index 7f7638d80b42..f9a77eb462b2 100644 --- a/Documentation/arch/arm/keystone/knav-qmss.rst +++ b/Documentation/arch/arm/keystone/knav-qmss.rst @@ -39,7 +39,7 @@ CPPI/QMSS Low Level Driver document (docs/CPPI_QMSS_LLD_SDS.pdf) at git://git.ti.com/keystone-rtos/qmss-lld.git -k2_qmss_pdsp_acc48_k2_le_1_0_0_9.bin firmware supports upto 48 accumulator +k2_qmss_pdsp_acc48_k2_le_1_0_0_9.bin firmware supports up to 48 accumulator channels. This firmware is available under ti-keystone folder of firmware.git at diff --git a/Documentation/arch/arm/keystone/overview.rst b/Documentation/arch/arm/keystone/overview.rst index cd90298c493c..bf791b2fc43f 100644 --- a/Documentation/arch/arm/keystone/overview.rst +++ b/Documentation/arch/arm/keystone/overview.rst @@ -65,7 +65,7 @@ specified through DTS. Following are the DTS used: The device tree documentation for the keystone machines are located at - Documentation/devicetree/bindings/arm/keystone/keystone.txt + Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml Document Author --------------- diff --git a/Documentation/arch/arm64/arm-acpi.rst b/Documentation/arch/arm64/arm-acpi.rst index e59e4505d0d9..e74c8ab71429 100644 --- a/Documentation/arch/arm64/arm-acpi.rst +++ b/Documentation/arch/arm64/arm-acpi.rst @@ -306,9 +306,9 @@ that looks like this: Name(KEY0, "value0"). An ACPI device driver would then retrieve the value of the property by evaluating the KEY0 object. However, using Name() this way has multiple problems: (1) ACPI limits names ("KEY0") to four characters unlike DT; (2) there is no industry -wide registry that maintains a list of names, minimizing re-use; (3) +wide registry that maintains a list of names, minimizing reuse; (3) there is also no registry for the definition of property values ("value0"), -again making re-use difficult; and (4) how does one maintain backward +again making reuse difficult; and (4) how does one maintain backward compatibility as new hardware comes out? The _DSD method was created to solve precisely these sorts of problems; Linux drivers should ALWAYS use the _DSD method for device properties and nothing else. diff --git a/Documentation/arch/arm64/asymmetric-32bit.rst b/Documentation/arch/arm64/asymmetric-32bit.rst index 57b8d7476f71..fc0c350c5e00 100644 --- a/Documentation/arch/arm64/asymmetric-32bit.rst +++ b/Documentation/arch/arm64/asymmetric-32bit.rst @@ -154,10 +154,14 @@ mode will return to host userspace with an ``exit_reason`` of ``KVM_EXIT_FAIL_ENTRY`` and will remain non-runnable until successfully re-initialised by a subsequent ``KVM_ARM_VCPU_INIT`` operation. -NOHZ FULL ---------- +SCHEDULER DOMAIN ISOLATION +-------------------------- -To avoid perturbing an adaptive-ticks CPU (specified using -``nohz_full=``) when a 32-bit task is forcefully migrated, these CPUs +To avoid perturbing a boot-defined domain isolated CPU (specified using +``isolcpus=[domain]``) when a 32-bit task is forcefully migrated, these CPUs are treated as 64-bit-only when support for asymmetric 32-bit systems is enabled. + +However as opposed to boot-defined domain isolation, runtime-defined domain +isolation using cpuset isolated partition is not advised on asymmetric +32-bit systems and will result in undefined behaviour. diff --git a/Documentation/arch/arm64/booting.rst b/Documentation/arch/arm64/booting.rst index 26efca09aef3..13ef311dace8 100644 --- a/Documentation/arch/arm64/booting.rst +++ b/Documentation/arch/arm64/booting.rst @@ -556,6 +556,18 @@ Before jumping into the kernel, the following conditions must be met: - MDCR_EL3.TPM (bit 6) must be initialized to 0b0 + For CPUs with support for 64-byte loads and stores without status (FEAT_LS64): + + - If the kernel is entered at EL1 and EL2 is present: + + - HCRX_EL2.EnALS (bit 1) must be initialised to 0b1. + + For CPUs with support for 64-byte stores with status (FEAT_LS64_V): + + - If the kernel is entered at EL1 and EL2 is present: + + - HCRX_EL2.EnASR (bit 2) must be initialised to 0b1. + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level. Where the values documented diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index a15df4956849..97315ae6c0da 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -444,6 +444,13 @@ HWCAP3_MTE_STORE_ONLY HWCAP3_LSFE Functionality implied by ID_AA64ISAR3_EL1.LSFE == 0b0001 +HWCAP3_LS64 + Functionality implied by ID_AA64ISAR1_EL1.LS64 == 0b0001. Note that + the function of instruction ld64b/st64b requires support by CPU, system + and target (device) memory location and HWCAP3_LS64 implies the support + of CPU. User should only use ld64b/st64b on supported target (device) + memory location, otherwise fallback to the non-atomic alternatives. + 4. Unused AT_HWCAP bits ----------------------- diff --git a/Documentation/arch/arm64/index.rst b/Documentation/arch/arm64/index.rst index 6a012c98bdcd..af52edc8c0ac 100644 --- a/Documentation/arch/arm64/index.rst +++ b/Documentation/arch/arm64/index.rst @@ -33,10 +33,3 @@ ARM64 Architecture tagged-pointers features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index a7ec57060f64..4c300caad901 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -212,6 +212,7 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | SI L1 | #4311569 | ARM64_ERRATUM_4311569 | +----------------+-----------------+-----------------+-----------------------------+ | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/Documentation/arch/loongarch/index.rst b/Documentation/arch/loongarch/index.rst index c779bfa00c05..df590b117240 100644 --- a/Documentation/arch/loongarch/index.rst +++ b/Documentation/arch/loongarch/index.rst @@ -13,10 +13,3 @@ LoongArch Architecture irq-chip-model features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/m68k/index.rst b/Documentation/arch/m68k/index.rst index 0f890dbb5fe2..c334026e0ae1 100644 --- a/Documentation/arch/m68k/index.rst +++ b/Documentation/arch/m68k/index.rst @@ -11,10 +11,3 @@ m68k Architecture buddha-driver features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/mips/index.rst b/Documentation/arch/mips/index.rst index 037f85a08fe3..703e195b933d 100644 --- a/Documentation/arch/mips/index.rst +++ b/Documentation/arch/mips/index.rst @@ -12,10 +12,3 @@ MIPS-specific Documentation ingenic-tcu features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/openrisc/index.rst b/Documentation/arch/openrisc/index.rst index 6879f998b87a..79fe8b0c2c41 100644 --- a/Documentation/arch/openrisc/index.rst +++ b/Documentation/arch/openrisc/index.rst @@ -11,10 +11,3 @@ OpenRISC Architecture todo features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/parisc/index.rst b/Documentation/arch/parisc/index.rst index 240685751825..15ccc787fd4f 100644 --- a/Documentation/arch/parisc/index.rst +++ b/Documentation/arch/parisc/index.rst @@ -11,10 +11,3 @@ PA-RISC Architecture registers features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/powerpc/index.rst b/Documentation/arch/powerpc/index.rst index 1be2ee3f0361..40419bea8e10 100644 --- a/Documentation/arch/powerpc/index.rst +++ b/Documentation/arch/powerpc/index.rst @@ -40,10 +40,3 @@ powerpc vpa-dtl features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/powerpc/papr_hcalls.rst b/Documentation/arch/powerpc/papr_hcalls.rst index 805e1cb9bab9..14e39f095a1c 100644 --- a/Documentation/arch/powerpc/papr_hcalls.rst +++ b/Documentation/arch/powerpc/papr_hcalls.rst @@ -300,6 +300,49 @@ H_HTM supports setup, configuration, control and dumping of Hardware Trace Macro (HTM) function and its data. HTM buffer stores tracing data for functions like core instruction, core LLAT and nest. +**H_PKS_GEN_KEY** + +| Input: authorization, objectlabel, objectlabellen, policy, out, outlen +| Out: *Hypervisor Generated Key, or None when the wrapping key policy is set* +| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2, + H_P3, H_P4, H_P5, H_P6, H_Authority, H_Nomem, H_Busy, H_Resource, + H_Aborted* + +H_PKS_GEN_KEY is used to have the hypervisor generate a new random key. +This key is stored as an object in the Power LPAR Platform KeyStore with +the provided object label. With the wrapping key policy set the key is only +visible to the hypervisor, while the key's label would still be visible to +the user. Generation of wrapping keys is supported only for a key size of +32 bytes. + +**H_PKS_WRAP_OBJECT** + +| Input: authorization, wrapkeylabel, wrapkeylabellen, objectwrapflags, in, +| inlen, out, outlen, continue-token +| Out: *continue-token, byte size of wrapped object, wrapped object* +| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2, + H_P3, H_P4, H_P5, H_P6, H_P7, H_P8, H_P9, H_Authority, H_Invalid_Key, + H_NOT_FOUND, H_Busy, H_LongBusy, H_Aborted* + +H_PKS_WRAP_OBJECT is used to wrap an object using a wrapping key stored in the +Power LPAR Platform KeyStore and return the wrapped object to the caller. The +caller provides a label to a wrapping key with the 'wrapping key' policy set, +which must have been previously created with H_PKS_GEN_KEY. The provided object +is then encrypted with the wrapping key and additional metadata and the result +is returned to the caller. + + +**H_PKS_UNWRAP_OBJECT** + +| Input: authorization, objectwrapflags, in, inlen, out, outlen, continue-token +| Out: *continue-token, byte size of unwrapped object, unwrapped object* +| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2, + H_P3, H_P4, H_P5, H_P6, H_P7, H_Authority, H_Unsupported, H_Bad_Data, + H_NOT_FOUND, H_Invalid_Key, H_Busy, H_LongBusy, H_Aborted* + +H_PKS_UNWRAP_OBJECT is used to unwrap an object that was previously warapped with +H_PKS_WRAP_OBJECT. + References ========== .. [1] "Power Architecture Platform Reference" diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 06c5280b728a..c420a8349bc6 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -67,7 +67,7 @@ The following keys are defined: programs (it may still be executed in userspace via a kernel-controlled mechanism such as the vDSO). -* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing the extensions +* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing extensions that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. @@ -281,6 +281,14 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_EXT_ZICBOP`: The Zicbop extension is supported, as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. + * :c:macro:`RISCV_HWPROBE_EXT_ZILSD`: The Zilsd extension is supported as + defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating + load/store pair for RV32 with the main manual") of the riscv-isa-manual. + + * :c:macro:`RISCV_HWPROBE_EXT_ZCLSD`: The Zclsd extension is supported as + defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating + load/store pair for RV32 with the main manual") of the riscv-isa-manual. + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was mistakenly classified as a bitmask rather than a value. @@ -379,3 +387,7 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE`: An unsigned int which represents the size of the Zicbop block in bytes. + +* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_1`: A bitmask containing additional + extensions that are compatible with the + :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index eecf347ce849..ac535c52d509 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -14,12 +14,7 @@ RISC-V architecture uabi vector cmodx + zicfilp + zicfiss features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/riscv/uabi.rst b/Documentation/arch/riscv/uabi.rst index 243e40062e34..0c5299e00762 100644 --- a/Documentation/arch/riscv/uabi.rst +++ b/Documentation/arch/riscv/uabi.rst @@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo ------------------------------------ The canonical order of ISA extension names in the ISA string is defined in -chapter 27 of the unprivileged specification. +Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA +(Document Version 20191213). + The specification uses vague wording, such as should, when it comes to ordering, so for our purposes the following rules apply: diff --git a/Documentation/arch/riscv/zicfilp.rst b/Documentation/arch/riscv/zicfilp.rst new file mode 100644 index 000000000000..78a3e01ff68c --- /dev/null +++ b/Documentation/arch/riscv/zicfilp.rst @@ -0,0 +1,122 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta <debug@rivosinc.com> +:Date: 12 January 2024 + +==================================================== +Tracking indirect control transfers on RISC-V Linux +==================================================== + +This document briefly describes the interface provided to userspace by Linux +to enable indirect branch tracking for user mode applications on RISC-V. + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in crashes. However, in the +hands of a creative adversary, these can result in a variety of +security issues. + +Some of those security issues can be code re-use attacks, where an +adversary can use corrupt function pointers, chaining them together to +perform jump oriented programming (JOP) or call oriented programming +(COP) and thus compromise control flow integrity (CFI) of the program. + +Function pointers live in read-write memory and thus are susceptible +to corruption. This can allow an adversary to control the program +counter (PC) value. On RISC-V, the zicfilp extension enforces a +restriction on such indirect control transfers: + +- Indirect control transfers must land on a landing pad instruction ``lpad``. + There are two exceptions to this rule: + + - rs1 = x1 or rs1 = x5, i.e. a return from a function and returns are + protected using shadow stack (see zicfiss.rst) + + - rs1 = x7. On RISC-V, the compiler usually does the following to reach a + function which is beyond the offset of possible J-type instruction:: + + auipc x7, <imm> + jalr (x7) + + This form of indirect control transfer is immutable and doesn't + rely on memory. Thus rs1=x7 is exempted from tracking and + these are considered software guarded jumps. + +The ``lpad`` instruction is a pseudo-op of ``auipc rd, <imm_20bit>`` +with ``rd=x0``. This is a HINT op. The ``lpad`` instruction must be +aligned on a 4 byte boundary. It compares the 20 bit immediate with +x7. If ``imm_20bit`` == 0, the CPU doesn't perform any comparison with +``x7``. If ``imm_20bit`` != 0, then ``imm_20bit`` must match ``x7`` +else CPU will raise ``software check exception`` (``cause=18``) with +``*tval = 2``. + +The compiler can generate a hash over function signatures and set them +up (truncated to 20 bits) in x7 at callsites. Function prologues can +have ``lpad`` instructions encoded with the same function hash. This +further reduces the number of valid program counter addresses a call +site can reach. + +2. ELF and psABI +----------------- + +The toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_FCFI` for +property :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in the notes +section of the object file. + +3. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in their +address spaces. It's a difficult task to make sure all the +dependencies have been compiled with indirect branch support. Thus +it's left to the dynamic loader to enable indirect branch tracking for +the program. + +4. prctl() enabling +-------------------- + +:c:macro:`PR_SET_INDIR_BR_LP_STATUS` / :c:macro:`PR_GET_INDIR_BR_LP_STATUS` / +:c:macro:`PR_LOCK_INDIR_BR_LP_STATUS` are three prctls added to manage indirect +branch tracking. These prctls are architecture-agnostic and return -EINVAL if +the underlying functionality is not supported. + +* prctl(PR_SET_INDIR_BR_LP_STATUS, unsigned long arg) + +If arg1 is :c:macro:`PR_INDIR_BR_LP_ENABLE` and if CPU supports +``zicfilp`` then the kernel will enable indirect branch tracking for the +task. The dynamic loader can issue this :c:macro:`prctl` once it has +determined that all the objects loaded in the address space support +indirect branch tracking. Additionally, if there is a `dlopen` to an +object which wasn't compiled with ``zicfilp``, the dynamic loader can +issue this prctl with arg1 set to 0 (i.e. :c:macro:`PR_INDIR_BR_LP_ENABLE` +cleared). + +* prctl(PR_GET_INDIR_BR_LP_STATUS, unsigned long * arg) + +Returns the current status of indirect branch tracking. If enabled +it'll return :c:macro:`PR_INDIR_BR_LP_ENABLE` + +* prctl(PR_LOCK_INDIR_BR_LP_STATUS, unsigned long arg) + +Locks the current status of indirect branch tracking on the task. User +space may want to run with a strict security posture and wouldn't want +loading of objects without ``zicfilp`` support in them, to disallow +disabling of indirect branch tracking. In this case, user space can +use this prctl to lock the current settings. + +5. violations related to indirect branch tracking +-------------------------------------------------- + +Pertaining to indirect branch tracking, the CPU raises a software +check exception in the following conditions: + +- missing ``lpad`` after indirect call / jmp +- ``lpad`` not on 4 byte boundary +- ``imm_20bit`` embedded in ``lpad`` instruction doesn't match with ``x7`` + +In all 3 cases, ``*tval = 2`` is captured and software check exception is +raised (``cause=18``). + +The kernel will treat this as :c:macro:`SIGSEGV` with code = +:c:macro:`SEGV_CPERR` and follow the normal course of signal delivery. diff --git a/Documentation/arch/riscv/zicfiss.rst b/Documentation/arch/riscv/zicfiss.rst new file mode 100644 index 000000000000..4d5f7addc26d --- /dev/null +++ b/Documentation/arch/riscv/zicfiss.rst @@ -0,0 +1,194 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta <debug@rivosinc.com> +:Date: 12 January 2024 + +========================================================= +Shadow stack to protect function returns on RISC-V Linux +========================================================= + +This document briefly describes the interface provided to userspace by Linux +to enable shadow stacks for user mode applications on RISC-V. + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in crashes. However, in the +hands of a creative adversary, these issues can result in a variety of +security problems. + +Some of those security issues can be code re-use attacks on programs +where an adversary can use corrupt return addresses present on the +stack. chaining them together to perform return oriented programming +(ROP) and thus compromising the control flow integrity (CFI) of the +program. + +Return addresses live on the stack in read-write memory. Therefore +they are susceptible to corruption, which allows an adversary to +control the program counter. On RISC-V, the ``zicfiss`` extension +provides an alternate stack (the "shadow stack") on which return +addresses can be safely placed in the prologue of the function and +retrieved in the epilogue. The ``zicfiss`` extension makes the +following changes: + +- PTE encodings for shadow stack virtual memory + An earlier reserved encoding in first stage translation i.e. + PTE.R=0, PTE.W=1, PTE.X=0 becomes the PTE encoding for shadow stack pages. + +- The ``sspush x1/x5`` instruction pushes (stores) ``x1/x5`` to shadow stack. + +- The ``sspopchk x1/x5`` instruction pops (loads) from shadow stack and compares + with ``x1/x5`` and if not equal, the CPU raises a ``software check exception`` + with ``*tval = 3`` + +The compiler toolchain ensures that function prologues have ``sspush +x1/x5`` to save the return address on shadow stack in addition to the +regular stack. Similarly, function epilogues have ``ld x5, +offset(x2)`` followed by ``sspopchk x5`` to ensure that a popped value +from the regular stack matches with the popped value from the shadow +stack. + +2. Shadow stack protections and linux memory manager +----------------------------------------------------- + +As mentioned earlier, shadow stacks get new page table encodings that +have some special properties assigned to them, along with instructions +that operate on the shadow stacks: + +- Regular stores to shadow stack memory raise store access faults. This + protects shadow stack memory from stray writes. + +- Regular loads from shadow stack memory are allowed. This allows + stack trace utilities or backtrace functions to read the true call + stack and ensure that it has not been tampered with. + +- Only shadow stack instructions can generate shadow stack loads or + shadow stack stores. + +- Shadow stack loads and stores on read-only memory raise AMO/store + page faults. Thus both ``sspush x1/x5`` and ``sspopchk x1/x5`` will + raise AMO/store page fault. This simplies COW handling in kernel + during fork(). The kernel can convert shadow stack pages into + read-only memory (as it does for regular read-write memory). As + soon as subsequent ``sspush`` or ``sspopchk`` instructions in + userspace are encountered, the kernel can perform COW. + +- Shadow stack loads and stores on read-write or read-write-execute + memory raise an access fault. This is a fatal condition because + shadow stack loads and stores should never be operating on + read-write or read-write-execute memory. + +3. ELF and psABI +----------------- + +The toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_BCFI` for +property :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in the notes +section of the object file. + +4. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in their +address space. It's a difficult task to make sure all the +dependencies have been compiled with shadow stack support. Thus +it's left to the dynamic loader to enable shadow stacks for the +program. + +5. prctl() enabling +-------------------- + +:c:macro:`PR_SET_SHADOW_STACK_STATUS` / :c:macro:`PR_GET_SHADOW_STACK_STATUS` / +:c:macro:`PR_LOCK_SHADOW_STACK_STATUS` are three prctls added to manage shadow +stack enabling for tasks. These prctls are architecture-agnostic and return +-EINVAL if not implemented. + +* prctl(PR_SET_SHADOW_STACK_STATUS, unsigned long arg) + +If arg = :c:macro:`PR_SHADOW_STACK_ENABLE` and if CPU supports +``zicfiss`` then the kernel will enable shadow stacks for the task. +The dynamic loader can issue this :c:macro:`prctl` once it has +determined that all the objects loaded in address space have support +for shadow stacks. Additionally, if there is a :c:macro:`dlopen` to +an object which wasn't compiled with ``zicfiss``, the dynamic loader +can issue this prctl with arg set to 0 (i.e. +:c:macro:`PR_SHADOW_STACK_ENABLE` being clear) + +* prctl(PR_GET_SHADOW_STACK_STATUS, unsigned long * arg) + +Returns the current status of indirect branch tracking. If enabled +it'll return :c:macro:`PR_SHADOW_STACK_ENABLE`. + +* prctl(PR_LOCK_SHADOW_STACK_STATUS, unsigned long arg) + +Locks the current status of shadow stack enabling on the +task. Userspace may want to run with a strict security posture and +wouldn't want loading of objects without ``zicfiss`` support. In this +case userspace can use this prctl to disallow disabling of shadow +stacks on the current task. + +5. violations related to returns with shadow stack enabled +----------------------------------------------------------- + +Pertaining to shadow stacks, the CPU raises a ``software check +exception`` upon executing ``sspopchk x1/x5`` if ``x1/x5`` doesn't +match the top of shadow stack. If a mismatch happens, then the CPU +sets ``*tval = 3`` and raises the exception. + +The Linux kernel will treat this as a :c:macro:`SIGSEGV` with code = +:c:macro:`SEGV_CPERR` and follow the normal course of signal delivery. + +6. Shadow stack tokens +----------------------- + +Regular stores on shadow stacks are not allowed and thus can't be +tampered with via arbitrary stray writes. However, one method of +pivoting / switching to a shadow stack is simply writing to the CSR +``CSR_SSP``. This will change the active shadow stack for the +program. Writes to ``CSR_SSP`` in the program should be mostly +limited to context switches, stack unwinds, or longjmp or similar +mechanisms (like context switching of Green Threads) in languages like +Go and Rust. CSR_SSP writes can be problematic because an attacker can +use memory corruption bugs and leverage context switching routines to +pivot to any shadow stack. Shadow stack tokens can help mitigate this +problem by making sure that: + +- When software is switching away from a shadow stack, the shadow + stack pointer should be saved on the shadow stack itself (this is + called the ``shadow stack token``). + +- When software is switching to a shadow stack, it should read the + ``shadow stack token`` from the shadow stack pointer and verify that + the ``shadow stack token`` itself is a pointer to the shadow stack + itself. + +- Once the token verification is done, software can perform the write + to ``CSR_SSP`` to switch shadow stacks. + +Here "software" could refer to the user mode task runtime itself, +managing various contexts as part of a single thread. Or "software" +could refer to the kernel, when the kernel has to deliver a signal to +a user task and must save the shadow stack pointer. The kernel can +perform similar procedure itself by saving a token on the user mode +task's shadow stack. This way, whenever :c:macro:`sigreturn` happens, +the kernel can read and verify the token and then switch to the shadow +stack. Using this mechanism, the kernel helps the user task so that +any corruption issue in the user task is not exploited by adversaries +arbitrarily using :c:macro:`sigreturn`. Adversaries will have to make +sure that there is a valid ``shadow stack token`` in addition to +invoking :c:macro:`sigreturn`. + +7. Signal shadow stack +----------------------- +The following structure has been added to sigcontext for RISC-V:: + + struct __sc_riscv_cfi_state { + unsigned long ss_ptr; + }; + +As part of signal delivery, the shadow stack token is saved on the +current shadow stack itself. The updated pointer is saved away in the +:c:macro:`ss_ptr` field in :c:macro:`__sc_riscv_cfi_state` under +:c:macro:`sigcontext`. The existing shadow stack allocation is used +for signal delivery. During :c:macro:`sigreturn`, kernel will obtain +:c:macro:`ss_ptr` from :c:macro:`sigcontext`, verify the saved +token on the shadow stack, and switch the shadow stack. diff --git a/Documentation/arch/s390/driver-model.rst b/Documentation/arch/s390/driver-model.rst index e7488f02bb78..14f801e0d793 100644 --- a/Documentation/arch/s390/driver-model.rst +++ b/Documentation/arch/s390/driver-model.rst @@ -279,7 +279,7 @@ status - Can be 'online' or 'offline'. Piping 'on' or 'off' sets the chpid logically online/offline. Piping 'on' to an online chpid triggers path reprobing for all devices - the chpid connects to. This can be used to force the kernel to re-use + the chpid connects to. This can be used to force the kernel to reuse a channel path the user knows to be online, but the machine hasn't created a machine check for. diff --git a/Documentation/arch/s390/index.rst b/Documentation/arch/s390/index.rst index e75a6e5d2505..769434f0625b 100644 --- a/Documentation/arch/s390/index.rst +++ b/Documentation/arch/s390/index.rst @@ -22,10 +22,3 @@ s390 Architecture text_files features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/arch/s390/mm.rst b/Documentation/arch/s390/mm.rst index 084adad5eef9..19681157c6f2 100644 --- a/Documentation/arch/s390/mm.rst +++ b/Documentation/arch/s390/mm.rst @@ -109,3 +109,7 @@ Virtual memory layout | KASAN shadow | KASAN untracked | | +------------------+ ASCE limit + | | + | CONFIG_ILLEGAL_POINTER_VALUE causes memory access fault + | | + +------------------+ diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst index a094f55c10b0..8bb411f0d70d 100644 --- a/Documentation/arch/x86/amd_hsmp.rst +++ b/Documentation/arch/x86/amd_hsmp.rst @@ -14,7 +14,7 @@ set of mailbox registers. More details on the interface can be found in chapter "7 Host System Management Port (HSMP)" of the family/model PPR -Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +Eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 HSMP interface is supported on EPYC line of server CPUs and MI300A (APU). @@ -185,7 +185,7 @@ what happened. The transaction returns 0 on success. More details on the interface and message definitions can be found in chapter "7 Host System Management Port (HSMP)" of the respective family/model PPR -eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 User space C-APIs are made available by linking against the esmi library, which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html. diff --git a/Documentation/arch/x86/iommu.rst b/Documentation/arch/x86/iommu.rst index 41fbadfe2221..79c33560299b 100644 --- a/Documentation/arch/x86/iommu.rst +++ b/Documentation/arch/x86/iommu.rst @@ -2,10 +2,11 @@ x86 IOMMU Support ================= -The architecture specs can be obtained from the below locations. +The architecture specs can be obtained from the vendor websites. +Search for the following documents to obtain the latest versions: -- Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf -- AMD: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_3_07_PUB.pdf +- Intel: Intel Virtualization Technology for Directed I/O Architecture Specification (ID: D51397) +- AMD: AMD I/O Virtualization Technology (IOMMU) Specification (ID: 48882) This guide gives a quick cheat sheet for some basic understanding. diff --git a/Documentation/arch/x86/shstk.rst b/Documentation/arch/x86/shstk.rst index 60260e809baf..30b4e4f362ba 100644 --- a/Documentation/arch/x86/shstk.rst +++ b/Documentation/arch/x86/shstk.rst @@ -165,7 +165,7 @@ in the page fault error code. When a task forks a child, its shadow stack PTEs are copied and both the parent's and the child's shadow stack PTEs are cleared of the dirty bit. Upon the next shadow stack access, the resulting shadow stack page fault -is handled by page copy/re-use. +is handled by page copy/reuse. When a pthread child is created, the kernel allocates a new shadow stack for the new thread. New shadow stack creation behaves like mmap() with respect diff --git a/Documentation/arch/x86/topology.rst b/Documentation/arch/x86/topology.rst index 86bec8ac2c4d..f779a68875c5 100644 --- a/Documentation/arch/x86/topology.rst +++ b/Documentation/arch/x86/topology.rst @@ -17,7 +17,7 @@ with the generic one and look at this one in parallel for the x86 specifics. Needless to say, code should use the generic functions - this file is *only* here to *document* the inner workings of x86 topology. -Started by Thomas Gleixner <tglx@linutronix.de> and Borislav Petkov <bp@alien8.de>. +Started by Thomas Gleixner <tglx@kernel.org> and Borislav Petkov <bp@alien8.de>. The main aim of the topology facilities is to present adequate interfaces to code which needs to know/query/use the structure of the running system wrt diff --git a/Documentation/block/biovecs.rst b/Documentation/block/biovecs.rst index b9dc0c9dbee4..11126ed6f40f 100644 --- a/Documentation/block/biovecs.rst +++ b/Documentation/block/biovecs.rst @@ -135,7 +135,6 @@ Usage of helpers: bio_first_bvec_all() bio_first_page_all() bio_first_folio_all() - bio_last_bvec_all() * The following helpers iterate over single-page segment. The passed 'struct bio_vec' will contain a single-page IO vector during the iteration:: diff --git a/Documentation/block/inline-encryption.rst b/Documentation/block/inline-encryption.rst index 6380e6ab492b..7e0703a12dfb 100644 --- a/Documentation/block/inline-encryption.rst +++ b/Documentation/block/inline-encryption.rst @@ -206,6 +206,12 @@ it to a bio, given the blk_crypto_key and the data unit number that will be used for en/decryption. Users don't need to worry about freeing the bio_crypt_ctx later, as that happens automatically when the bio is freed or reset. +To submit a bio that uses inline encryption, users must call +``blk_crypto_submit_bio()`` instead of the usual ``submit_bio()``. This will +submit the bio to the underlying driver if it supports inline crypto, or else +call the blk-crypto fallback routines before submitting normal bios to the +underlying drivers. + Finally, when done using inline encryption with a blk_crypto_key on a block_device, users must call ``blk_crypto_evict_key()``. This ensures that the key is evicted from all keyslots it may be programmed into and unlinked from diff --git a/Documentation/block/ublk.rst b/Documentation/block/ublk.rst index 8c4030bcabb6..6ad28039663d 100644 --- a/Documentation/block/ublk.rst +++ b/Documentation/block/ublk.rst @@ -260,9 +260,12 @@ The following IO commands are communicated via io_uring passthrough command, and each command is only for forwarding the IO and committing the result with specified IO tag in the command data: -- ``UBLK_IO_FETCH_REQ`` +Traditional Per-I/O Commands +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - Sent from the server IO pthread for fetching future incoming IO requests +- ``UBLK_U_IO_FETCH_REQ`` + + Sent from the server I/O pthread for fetching future incoming I/O requests destined to ``/dev/ublkb*``. This command is sent only once from the server IO pthread for ublk driver to setup IO forward environment. @@ -278,7 +281,7 @@ with specified IO tag in the command data: supported by the driver, daemons must be per-queue instead - i.e. all I/Os associated to a single qid must be handled by the same task. -- ``UBLK_IO_COMMIT_AND_FETCH_REQ`` +- ``UBLK_U_IO_COMMIT_AND_FETCH_REQ`` When an IO request is destined to ``/dev/ublkb*``, the driver stores the IO's ``ublksrv_io_desc`` to the specified mapped area; then the @@ -293,7 +296,7 @@ with specified IO tag in the command data: requests with the same IO tag. That is, ``UBLK_IO_COMMIT_AND_FETCH_REQ`` is reused for both fetching request and committing back IO result. -- ``UBLK_IO_NEED_GET_DATA`` +- ``UBLK_U_IO_NEED_GET_DATA`` With ``UBLK_F_NEED_GET_DATA`` enabled, the WRITE request will be firstly issued to ublk server without data copy. Then, IO backend of ublk server @@ -322,6 +325,59 @@ with specified IO tag in the command data: ``UBLK_IO_COMMIT_AND_FETCH_REQ`` to the server, ublkdrv needs to copy the server buffer (pages) read to the IO request pages. +Batch I/O Commands (UBLK_F_BATCH_IO) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The ``UBLK_F_BATCH_IO`` feature provides an alternative high-performance +I/O handling model that replaces the traditional per-I/O commands with +per-queue batch commands. This significantly reduces communication overhead +and enables better load balancing across multiple server tasks. + +Key differences from traditional mode: + +- **Per-queue vs Per-I/O**: Commands operate on queues rather than individual I/Os +- **Batch processing**: Multiple I/Os are handled in single operations +- **Multishot commands**: Use io_uring multishot for reduced submission overhead +- **Flexible task assignment**: Any task can handle any I/O (no per-I/O daemons) +- **Better load balancing**: Tasks can adjust their workload dynamically + +Batch I/O Commands: + +- ``UBLK_U_IO_PREP_IO_CMDS`` + + Prepares multiple I/O commands in batch. The server provides a buffer + containing multiple I/O descriptors that will be processed together. + This reduces the number of individual command submissions required. + +- ``UBLK_U_IO_COMMIT_IO_CMDS`` + + Commits results for multiple I/O operations in batch, and prepares the + I/O descriptors to accept new requests. The server provides a buffer + containing the results of multiple completed I/Os, allowing efficient + bulk completion of requests. + +- ``UBLK_U_IO_FETCH_IO_CMDS`` + + **Multishot command** for fetching I/O commands in batch. This is the key + command that enables high-performance batch processing: + + * Uses io_uring multishot capability for reduced submission overhead + * Single command can fetch multiple I/O requests over time + * Buffer size determines maximum batch size per operation + * Multiple fetch commands can be submitted for load balancing + * Only one fetch command is active at any time per queue + * Supports dynamic load balancing across multiple server tasks + + It is one typical multishot io_uring request with provided buffer, and it + won't be completed until any failure is triggered. + + Each task can submit ``UBLK_U_IO_FETCH_IO_CMDS`` with different buffer + sizes to control how much work it handles. This enables sophisticated + load balancing strategies in multi-threaded servers. + +Migration: Applications using traditional commands (``UBLK_U_IO_FETCH_REQ``, +``UBLK_U_IO_COMMIT_AND_FETCH_REQ``) cannot use batch mode simultaneously. + Zero copy --------- diff --git a/Documentation/bpf/bpf_prog_run.rst b/Documentation/bpf/bpf_prog_run.rst index 4868c909df5c..81ef768c75a3 100644 --- a/Documentation/bpf/bpf_prog_run.rst +++ b/Documentation/bpf/bpf_prog_run.rst @@ -34,11 +34,12 @@ following types: - ``BPF_PROG_TYPE_LWT_IN`` - ``BPF_PROG_TYPE_LWT_OUT`` - ``BPF_PROG_TYPE_LWT_XMIT`` -- ``BPF_PROG_TYPE_LWT_SEG6LOCAL`` - ``BPF_PROG_TYPE_FLOW_DISSECTOR`` - ``BPF_PROG_TYPE_STRUCT_OPS`` - ``BPF_PROG_TYPE_RAW_TRACEPOINT`` - ``BPF_PROG_TYPE_SYSCALL`` +- ``BPF_PROG_TYPE_TRACING`` +- ``BPF_PROG_TYPE_NETFILTER`` When using the ``BPF_PROG_RUN`` command, userspace supplies an input context object and (for program types operating on network packets) a buffer containing diff --git a/Documentation/bpf/index.rst b/Documentation/bpf/index.rst index 0bb5cb8157f1..0d5c6f659266 100644 --- a/Documentation/bpf/index.rst +++ b/Documentation/bpf/index.rst @@ -34,12 +34,5 @@ that goes into great technical depth about the BPF Architecture. other redirect -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` - .. Links: .. _BPF and XDP Reference Guide: https://docs.cilium.io/en/latest/bpf/ diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst index e38941370b90..75e6c078e0e7 100644 --- a/Documentation/bpf/kfuncs.rst +++ b/Documentation/bpf/kfuncs.rst @@ -50,7 +50,70 @@ A wrapper kfunc is often needed when we need to annotate parameters of the kfunc. Otherwise one may directly make the kfunc visible to the BPF program by registering it with the BPF subsystem. See :ref:`BPF_kfunc_nodef`. -2.2 Annotating kfunc parameters +2.2 kfunc Parameters +-------------------- + +All kfuncs now require trusted arguments by default. This means that all +pointer arguments must be valid, and all pointers to BTF objects must be +passed in their unmodified form (at a zero offset, and without having been +obtained from walking another pointer, with exceptions described below). + +There are two types of pointers to kernel objects which are considered "trusted": + +1. Pointers which are passed as tracepoint or struct_ops callback arguments. +2. Pointers which were returned from a KF_ACQUIRE kfunc. + +Pointers to non-BTF objects (e.g. scalar pointers) may also be passed to +kfuncs, and may have a non-zero offset. + +The definition of "valid" pointers is subject to change at any time, and has +absolutely no ABI stability guarantees. + +As mentioned above, a nested pointer obtained from walking a trusted pointer is +no longer trusted, with one exception. If a struct type has a field that is +guaranteed to be valid (trusted or rcu, as in KF_RCU description below) as long +as its parent pointer is valid, the following macros can be used to express +that to the verifier: + +* ``BTF_TYPE_SAFE_TRUSTED`` +* ``BTF_TYPE_SAFE_RCU`` +* ``BTF_TYPE_SAFE_RCU_OR_NULL`` + +For example, + +.. code-block:: c + + BTF_TYPE_SAFE_TRUSTED(struct socket) { + struct sock *sk; + }; + +or + +.. code-block:: c + + BTF_TYPE_SAFE_RCU(struct task_struct) { + const cpumask_t *cpus_ptr; + struct css_set __rcu *cgroups; + struct task_struct __rcu *real_parent; + struct task_struct *group_leader; + }; + +In other words, you must: + +1. Wrap the valid pointer type in a ``BTF_TYPE_SAFE_*`` macro. + +2. Specify the type and name of the valid nested field. This field must match + the field in the original type definition exactly. + +A new type declared by a ``BTF_TYPE_SAFE_*`` macro also needs to be emitted so +that it appears in BTF. For example, ``BTF_TYPE_SAFE_TRUSTED(struct socket)`` +is emitted in the ``type_is_trusted()`` function as follows: + +.. code-block:: c + + BTF_TYPE_EMIT(BTF_TYPE_SAFE_TRUSTED(struct socket)); + +2.3 Annotating kfunc parameters ------------------------------- Similar to BPF helpers, there is sometime need for additional context required @@ -58,7 +121,7 @@ by the verifier to make the usage of kernel functions safer and more useful. Hence, we can annotate a parameter by suffixing the name of the argument of the kfunc with a __tag, where tag may be one of the supported annotations. -2.2.1 __sz Annotation +2.3.1 __sz Annotation --------------------- This annotation is used to indicate a memory and size pair in the argument list. @@ -74,7 +137,7 @@ argument as its size. By default, without __sz annotation, the size of the type of the pointer is used. Without __sz annotation, a kfunc cannot accept a void pointer. -2.2.2 __k Annotation +2.3.2 __k Annotation -------------------- This annotation is only understood for scalar arguments, where it indicates that @@ -98,7 +161,7 @@ Hence, whenever a constant scalar argument is accepted by a kfunc which is not a size parameter, and the value of the constant matters for program safety, __k suffix should be used. -2.2.3 __uninit Annotation +2.3.3 __uninit Annotation ------------------------- This annotation is used to indicate that the argument will be treated as @@ -115,27 +178,36 @@ Here, the dynptr will be treated as an uninitialized dynptr. Without this annotation, the verifier will reject the program if the dynptr passed in is not initialized. -2.2.4 __opt Annotation -------------------------- +2.3.4 __nullable Annotation +--------------------------- -This annotation is used to indicate that the buffer associated with an __sz or __szk -argument may be null. If the function is passed a nullptr in place of the buffer, -the verifier will not check that length is appropriate for the buffer. The kfunc is -responsible for checking if this buffer is null before using it. +This annotation is used to indicate that the pointer argument may be NULL. +The verifier will allow passing NULL for such arguments. An example is given below:: - __bpf_kfunc void *bpf_dynptr_slice(..., void *buffer__opt, u32 buffer__szk) + __bpf_kfunc void bpf_task_release(struct task_struct *task__nullable) { ... } -Here, the buffer may be null. If buffer is not null, it at least of size buffer_szk. -Either way, the returned buffer is either NULL, or of size buffer_szk. Without this -annotation, the verifier will reject the program if a null pointer is passed in with -a nonzero size. +Here, the task pointer may be NULL. The kfunc is responsible for checking if +the pointer is NULL before dereferencing it. + +The __nullable annotation can be combined with other annotations. For example, +when used with __sz or __szk annotations for memory and size pairs, the +verifier will skip size validation when a NULL pointer is passed, but will +still process the size argument to extract constant size information when +needed:: + + __bpf_kfunc void *bpf_dynptr_slice(..., void *buffer__nullable, + u32 buffer__szk) + +Here, the buffer may be NULL. If the buffer is not NULL, it must be at least +buffer__szk bytes in size. The kfunc is responsible for checking if the buffer +is NULL before using it. -2.2.5 __str Annotation +2.3.5 __str Annotation ---------------------------- This annotation is used to indicate that the argument is a constant string. @@ -160,26 +232,9 @@ Or:: ... } -2.2.6 __prog Annotation ---------------------------- -This annotation is used to indicate that the argument needs to be fixed up to -the bpf_prog_aux of the caller BPF program. Any value passed into this argument -is ignored, and rewritten by the verifier. - -An example is given below:: - - __bpf_kfunc int bpf_wq_set_callback_impl(struct bpf_wq *wq, - int (callback_fn)(void *map, int *key, void *value), - unsigned int flags, - void *aux__prog) - { - struct bpf_prog_aux *aux = aux__prog; - ... - } - .. _BPF_kfunc_nodef: -2.3 Using an existing kernel function +2.4 Using an existing kernel function ------------------------------------- When an existing function in the kernel is fit for consumption by BPF programs, @@ -187,7 +242,7 @@ it can be directly registered with the BPF subsystem. However, care must still be taken to review the context in which it will be invoked by the BPF program and whether it is safe to do so. -2.4 Annotating kfuncs +2.5 Annotating kfuncs --------------------- In addition to kfuncs' arguments, verifier may need more information about the @@ -216,7 +271,7 @@ protected. An example is given below:: ... } -2.4.1 KF_ACQUIRE flag +2.5.1 KF_ACQUIRE flag --------------------- The KF_ACQUIRE flag is used to indicate that the kfunc returns a pointer to a @@ -226,7 +281,7 @@ referenced kptr (by invoking bpf_kptr_xchg). If not, the verifier fails the loading of the BPF program until no lingering references remain in all possible explored states of the program. -2.4.2 KF_RET_NULL flag +2.5.2 KF_RET_NULL flag ---------------------- The KF_RET_NULL flag is used to indicate that the pointer returned by the kfunc @@ -235,87 +290,21 @@ returned from the kfunc before making use of it (dereferencing or passing to another helper). This flag is often used in pairing with KF_ACQUIRE flag, but both are orthogonal to each other. -2.4.3 KF_RELEASE flag +2.5.3 KF_RELEASE flag --------------------- The KF_RELEASE flag is used to indicate that the kfunc releases the pointer passed in to it. There can be only one referenced pointer that can be passed in. All copies of the pointer being released are invalidated as a result of -invoking kfunc with this flag. KF_RELEASE kfuncs automatically receive the -protection afforded by the KF_TRUSTED_ARGS flag described below. - -2.4.4 KF_TRUSTED_ARGS flag --------------------------- +invoking kfunc with this flag. -The KF_TRUSTED_ARGS flag is used for kfuncs taking pointer arguments. It -indicates that the all pointer arguments are valid, and that all pointers to -BTF objects have been passed in their unmodified form (that is, at a zero -offset, and without having been obtained from walking another pointer, with one -exception described below). - -There are two types of pointers to kernel objects which are considered "valid": - -1. Pointers which are passed as tracepoint or struct_ops callback arguments. -2. Pointers which were returned from a KF_ACQUIRE kfunc. - -Pointers to non-BTF objects (e.g. scalar pointers) may also be passed to -KF_TRUSTED_ARGS kfuncs, and may have a non-zero offset. - -The definition of "valid" pointers is subject to change at any time, and has -absolutely no ABI stability guarantees. - -As mentioned above, a nested pointer obtained from walking a trusted pointer is -no longer trusted, with one exception. If a struct type has a field that is -guaranteed to be valid (trusted or rcu, as in KF_RCU description below) as long -as its parent pointer is valid, the following macros can be used to express -that to the verifier: - -* ``BTF_TYPE_SAFE_TRUSTED`` -* ``BTF_TYPE_SAFE_RCU`` -* ``BTF_TYPE_SAFE_RCU_OR_NULL`` - -For example, - -.. code-block:: c - - BTF_TYPE_SAFE_TRUSTED(struct socket) { - struct sock *sk; - }; - -or - -.. code-block:: c - - BTF_TYPE_SAFE_RCU(struct task_struct) { - const cpumask_t *cpus_ptr; - struct css_set __rcu *cgroups; - struct task_struct __rcu *real_parent; - struct task_struct *group_leader; - }; - -In other words, you must: - -1. Wrap the valid pointer type in a ``BTF_TYPE_SAFE_*`` macro. - -2. Specify the type and name of the valid nested field. This field must match - the field in the original type definition exactly. - -A new type declared by a ``BTF_TYPE_SAFE_*`` macro also needs to be emitted so -that it appears in BTF. For example, ``BTF_TYPE_SAFE_TRUSTED(struct socket)`` -is emitted in the ``type_is_trusted()`` function as follows: - -.. code-block:: c - - BTF_TYPE_EMIT(BTF_TYPE_SAFE_TRUSTED(struct socket)); - - -2.4.5 KF_SLEEPABLE flag +2.5.4 KF_SLEEPABLE flag ----------------------- The KF_SLEEPABLE flag is used for kfuncs that may sleep. Such kfuncs can only be called by sleepable BPF programs (BPF_F_SLEEPABLE). -2.4.6 KF_DESTRUCTIVE flag +2.5.5 KF_DESTRUCTIVE flag -------------------------- The KF_DESTRUCTIVE flag is used to indicate functions calling which is @@ -324,18 +313,19 @@ rebooting or panicking. Due to this additional restrictions apply to these calls. At the moment they only require CAP_SYS_BOOT capability, but more can be added later. -2.4.7 KF_RCU flag +2.5.6 KF_RCU flag ----------------- -The KF_RCU flag is a weaker version of KF_TRUSTED_ARGS. The kfuncs marked with -KF_RCU expect either PTR_TRUSTED or MEM_RCU arguments. The verifier guarantees -that the objects are valid and there is no use-after-free. The pointers are not -NULL, but the object's refcount could have reached zero. The kfuncs need to -consider doing refcnt != 0 check, especially when returning a KF_ACQUIRE -pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should very likely -also be KF_RET_NULL. +The KF_RCU flag allows kfuncs to opt out of the default trusted args +requirement and accept RCU pointers with weaker guarantees. The kfuncs marked +with KF_RCU expect either PTR_TRUSTED or MEM_RCU arguments. The verifier +guarantees that the objects are valid and there is no use-after-free. The +pointers are not NULL, but the object's refcount could have reached zero. The +kfuncs need to consider doing refcnt != 0 check, especially when returning a +KF_ACQUIRE pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should +very likely also be KF_RET_NULL. -2.4.8 KF_RCU_PROTECTED flag +2.5.7 KF_RCU_PROTECTED flag --------------------------- The KF_RCU_PROTECTED flag is used to indicate that the kfunc must be invoked in @@ -354,7 +344,7 @@ RCU protection but do not take RCU protected arguments. .. _KF_deprecated_flag: -2.4.9 KF_DEPRECATED flag +2.5.8 KF_DEPRECATED flag ------------------------ The KF_DEPRECATED flag is used for kfuncs which are scheduled to be @@ -374,7 +364,39 @@ encouraged to make their use-cases known as early as possible, and participate in upstream discussions regarding whether to keep, change, deprecate, or remove those kfuncs if and when such discussions occur. -2.5 Registering the kfuncs +2.5.9 KF_IMPLICIT_ARGS flag +------------------------------------ + +The KF_IMPLICIT_ARGS flag is used to indicate that the BPF signature +of the kfunc is different from it's kernel signature, and the values +for implicit arguments are provided at load time by the verifier. + +Only arguments of specific types are implicit. +Currently only ``struct bpf_prog_aux *`` type is supported. + +A kfunc with KF_IMPLICIT_ARGS flag therefore has two types in BTF: one +function matching the kernel declaration (with _impl suffix in the +name by convention), and another matching the intended BPF API. + +Verifier only allows calls to the non-_impl version of a kfunc, that +uses a signature without the implicit arguments. + +Example declaration: + +.. code-block:: c + + __bpf_kfunc int bpf_task_work_schedule_signal(struct task_struct *task, struct bpf_task_work *tw, + void *map__map, bpf_task_work_callback_t callback, + struct bpf_prog_aux *aux) { ... } + +Example usage in BPF program: + +.. code-block:: c + + /* note that the last argument is omitted */ + bpf_task_work_schedule_signal(task, &work->tw, &arrmap, task_work_callback); + +2.6 Registering the kfuncs -------------------------- Once the kfunc is prepared for use, the final step to making it visible is @@ -397,7 +419,7 @@ type. An example is shown below:: } late_initcall(init_subsystem); -2.6 Specifying no-cast aliases with ___init +2.7 Specifying no-cast aliases with ___init -------------------------------------------- The verifier will always enforce that the BTF type of a pointer passed to a diff --git a/Documentation/cdrom/index.rst b/Documentation/cdrom/index.rst index 3ac4f716612f..50050e219910 100644 --- a/Documentation/cdrom/index.rst +++ b/Documentation/cdrom/index.rst @@ -8,10 +8,3 @@ CD-ROM :maxdepth: 1 cdrom-standard - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/conf.py b/Documentation/conf.py index 1ea2ae5c6276..679861503a25 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -13,10 +13,15 @@ from textwrap import dedent import sphinx -# If extensions (or modules to document with autodoc) are in another directory, -# add these directories to sys.path here. If the directory is relative to the -# documentation root, use os.path.abspath to make it absolute, like shown here. -sys.path.insert(0, os.path.abspath("sphinx")) +# Location of Documentation/ directory +kern_doc_dir = os.path.dirname(os.path.abspath(__file__)) + +# Add location of Sphinx extensions +sys.path.insert(0, os.path.join(kern_doc_dir, "sphinx")) + +# Allow sphinx.ext.autodoc to document files at tools and scripts +sys.path.append(os.path.join(kern_doc_dir, "..", "tools")) +sys.path.append(os.path.join(kern_doc_dir, "..", "scripts")) # Minimal supported version needs_sphinx = "3.4.3" @@ -32,15 +37,12 @@ else: # Include patterns that don't contain directory names, in glob format include_patterns = ["**.rst"] -# Location of Documentation/ directory -doctree = os.path.abspath(".") - # Exclude of patterns that don't contain directory names, in glob format. exclude_patterns = [] # List of patterns that contain directory names in glob format. dyn_include_patterns = [] -dyn_exclude_patterns = ["output"] +dyn_exclude_patterns = ["output", "sphinx-includes"] # Currently, only netlink/specs has a parser for yaml. # Prefer using include patterns if available, as it is faster @@ -51,6 +53,9 @@ else: dyn_exclude_patterns.append("devicetree/bindings/**.yaml") dyn_exclude_patterns.append("core-api/kho/bindings/**.yaml") +# Link to man pages +manpages_url = 'https://man7.org/linux/man-pages/man{section}/{page}.{section}.html' + # Properly handle directory patterns and LaTeX docs # ------------------------------------------------- @@ -70,7 +75,7 @@ def config_init(app, config): # setup include_patterns dynamically if has_include_patterns: for p in dyn_include_patterns: - full = os.path.join(doctree, p) + full = os.path.join(kern_doc_dir, p) rel_path = os.path.relpath(full, start=app.srcdir) if rel_path.startswith("../"): @@ -80,7 +85,7 @@ def config_init(app, config): # setup exclude_patterns dynamically for p in dyn_exclude_patterns: - full = os.path.join(doctree, p) + full = os.path.join(kern_doc_dir, p) rel_path = os.path.relpath(full, start=app.srcdir) if rel_path.startswith("../"): @@ -92,7 +97,7 @@ def config_init(app, config): # of the app.srcdir. Add them here # Handle the case where SPHINXDIRS is used - if not os.path.samefile(doctree, app.srcdir): + if not os.path.samefile(kern_doc_dir, app.srcdir): # Add a tag to mark that the build is actually a subproject tags.add("subproject") @@ -151,6 +156,7 @@ extensions = [ "maintainers_include", "parser_yaml", "rstFlatTable", + "sphinx.ext.autodoc", "sphinx.ext.autosectionlabel", "sphinx.ext.ifconfig", "translations", @@ -579,13 +585,32 @@ pdf_documents = [ ("kernel-documentation", "Kernel", "Kernel", "J. Random Bozo"), ] -# kernel-doc extension configuration for running Sphinx directly (e.g. by Read -# the Docs). In a normal build, these are supplied from the Makefile via command -# line arguments. -kerneldoc_bin = "../scripts/kernel-doc.py" kerneldoc_srctree = ".." +# Add index link at the end of the root document for SPHINXDIRS builds. +def add_subproject_index(app, docname, content): + # Only care about root documents + if docname != master_doc: + return + + # Add the index link at the root of translations, but not at the root of + # individual translations. They have their own language specific links. + rel = os.path.relpath(app.srcdir, start=kern_doc_dir).split('/') + if rel[0] == 'translations' and len(rel) > 1: + return + + # Only add the link for SPHINXDIRS HTML builds + if not app.builder.tags.has('subproject') or not app.builder.tags.has('html'): + return + + # The include directive needs a relative path from the srcdir + rel = os.path.relpath(os.path.join(kern_doc_dir, 'sphinx-includes/subproject-index.rst'), + start=app.srcdir) + + content[0] += f'\n.. include:: {rel}\n\n' + def setup(app): """Patterns need to be updated at init time on older Sphinx versions""" app.connect('config-inited', config_init) + app.connect('source-read', add_subproject_index) diff --git a/Documentation/core-api/cpu_hotplug.rst b/Documentation/core-api/cpu_hotplug.rst index e1b0eeabbb5e..9b4afca9fd09 100644 --- a/Documentation/core-api/cpu_hotplug.rst +++ b/Documentation/core-api/cpu_hotplug.rst @@ -8,7 +8,7 @@ CPU hotplug in the Kernel Srivatsa Vaddagiri <vatsa@in.ibm.com>, Ashok Raj <ashok.raj@intel.com>, Joel Schopp <jschopp@austin.ibm.com>, - Thomas Gleixner <tglx@linutronix.de> + Thomas Gleixner <tglx@kernel.org> Introduction ============ diff --git a/Documentation/core-api/dma-api-howto.rst b/Documentation/core-api/dma-api-howto.rst index 96fce2a9aa90..e97743ab0f26 100644 --- a/Documentation/core-api/dma-api-howto.rst +++ b/Documentation/core-api/dma-api-howto.rst @@ -146,6 +146,58 @@ What about block I/O and networking buffers? The block I/O and networking subsystems make sure that the buffers they use are valid for you to DMA from/to. +__dma_from_device_group_begin/end annotations +============================================= + +As explained previously, when a structure contains a DMA_FROM_DEVICE / +DMA_BIDIRECTIONAL buffer (device writes to memory) alongside fields that the +CPU writes to, cache line sharing between the DMA buffer and CPU-written fields +can cause data corruption on CPUs with DMA-incoherent caches. + +The ``__dma_from_device_group_begin(GROUP)/__dma_from_device_group_end(GROUP)`` +macros ensure proper alignment to prevent this:: + + struct my_device { + spinlock_t lock1; + __dma_from_device_group_begin(); + char dma_buffer1[16]; + char dma_buffer2[16]; + __dma_from_device_group_end(); + spinlock_t lock2; + }; + +To isolate a DMA buffer from adjacent fields, use +``__dma_from_device_group_begin(GROUP)`` before the first DMA buffer +field and ``__dma_from_device_group_end(GROUP)`` after the last DMA +buffer field (with the same GROUP name). This protects both the head +and tail of the buffer from cache line sharing. + +The GROUP parameter is an optional identifier that names the DMA buffer group +(in case you have several in the same structure):: + + struct my_device { + spinlock_t lock1; + __dma_from_device_group_begin(buffer1); + char dma_buffer1[16]; + __dma_from_device_group_end(buffer1); + spinlock_t lock2; + __dma_from_device_group_begin(buffer2); + char dma_buffer2[16]; + __dma_from_device_group_end(buffer2); + }; + +On cache-coherent platforms these macros expand to zero-length array markers. +On non-coherent platforms, they also ensure the minimal DMA alignment, which +can be as large as 128 bytes. + +.. note:: + + It is allowed (though somewhat fragile) to include extra fields, not + intended for DMA from the device, within the group (in order to pack the + structure tightly) - but only as long as the CPU does not write these + fields while any fields in the group are mapped for DMA_FROM_DEVICE or + DMA_BIDIRECTIONAL. + DMA addressing capabilities =========================== diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst index 0bdc2be65e57..1d7bfad73b1c 100644 --- a/Documentation/core-api/dma-attributes.rst +++ b/Documentation/core-api/dma-attributes.rst @@ -148,3 +148,12 @@ DMA_ATTR_MMIO is appropriate. For architectures that require cache flushing for DMA coherence DMA_ATTR_MMIO will not perform any cache flushing. The address provided must never be mapped cacheable into the CPU. + +DMA_ATTR_CPU_CACHE_CLEAN +------------------------ + +This attribute indicates the CPU will not dirty any cacheline overlapping this +DMA_FROM_DEVICE/DMA_BIDIRECTIONAL buffer while it is mapped. This allows +multiple small buffers to safely share a cacheline without risk of data +corruption, suppressing DMA debug warnings about overlapping mappings. +All mappings sharing a cacheline should have this attribute. diff --git a/Documentation/core-api/genericirq.rst b/Documentation/core-api/genericirq.rst index 582bde9bf5a9..b16d751d4b98 100644 --- a/Documentation/core-api/genericirq.rst +++ b/Documentation/core-api/genericirq.rst @@ -439,6 +439,6 @@ Credits The following people have contributed to this document: -1. Thomas Gleixner tglx@linutronix.de +1. Thomas Gleixner tglx@kernel.org 2. Ingo Molnar mingo@elte.hu diff --git a/Documentation/core-api/housekeeping.rst b/Documentation/core-api/housekeeping.rst new file mode 100644 index 000000000000..e5417302774c --- /dev/null +++ b/Documentation/core-api/housekeeping.rst @@ -0,0 +1,111 @@ +====================================== +Housekeeping +====================================== + + +CPU Isolation moves away kernel work that may otherwise run on any CPU. +The purpose of its related features is to reduce the OS jitter that some +extreme workloads can't stand, such as in some DPDK usecases. + +The kernel work moved away by CPU isolation is commonly described as +"housekeeping" because it includes ground work that performs cleanups, +statistics maintainance and actions relying on them, memory release, +various deferrals etc... + +Sometimes housekeeping is just some unbound work (unbound workqueues, +unbound timers, ...) that gets easily assigned to non-isolated CPUs. +But sometimes housekeeping is tied to a specific CPU and requires +elaborated tricks to be offloaded to non-isolated CPUs (RCU_NOCB, remote +scheduler tick, etc...). + +Thus, a housekeeping CPU can be considered as the reverse of an isolated +CPU. It is simply a CPU that can execute housekeeping work. There must +always be at least one online housekeeping CPU at any time. The CPUs that +are not isolated are automatically assigned as housekeeping. + +Housekeeping is currently divided in four features described +by the ``enum hk_type type``: + +1. HK_TYPE_DOMAIN matches the work moved away by scheduler domain + isolation performed through ``isolcpus=domain`` boot parameter or + isolated cpuset partitions in cgroup v2. This includes scheduler + load balancing, unbound workqueues and timers. + +2. HK_TYPE_KERNEL_NOISE matches the work moved away by tick isolation + performed through ``nohz_full=`` or ``isolcpus=nohz`` boot + parameters. This includes remote scheduler tick, vmstat and lockup + watchdog. + +3. HK_TYPE_MANAGED_IRQ matches the IRQ handlers moved away by managed + IRQ isolation performed through ``isolcpus=managed_irq``. + +4. HK_TYPE_DOMAIN_BOOT matches the work moved away by scheduler domain + isolation performed through ``isolcpus=domain`` only. It is similar + to HK_TYPE_DOMAIN except it ignores the isolation performed by + cpusets. + + +Housekeeping cpumasks +================================= + +Housekeeping cpumasks include the CPUs that can execute the work moved +away by the matching isolation feature. These cpumasks are returned by +the following function:: + + const struct cpumask *housekeeping_cpumask(enum hk_type type) + +By default, if neither ``nohz_full=``, nor ``isolcpus``, nor cpuset's +isolated partitions are used, which covers most usecases, this function +returns the cpu_possible_mask. + +Otherwise the function returns the cpumask complement of the isolation +feature. For example: + +With isolcpus=domain,7 the following will return a mask with all possible +CPUs except 7:: + + housekeeping_cpumask(HK_TYPE_DOMAIN) + +Similarly with nohz_full=5,6 the following will return a mask with all +possible CPUs except 5,6:: + + housekeeping_cpumask(HK_TYPE_KERNEL_NOISE) + + +Synchronization against cpusets +================================= + +Cpuset can modify the HK_TYPE_DOMAIN housekeeping cpumask while creating, +modifying or deleting an isolated partition. + +The users of HK_TYPE_DOMAIN cpumask must then make sure to synchronize +properly against cpuset in order to make sure that: + +1. The cpumask snapshot stays coherent. + +2. No housekeeping work is queued on a newly made isolated CPU. + +3. Pending housekeeping work that was queued to a non isolated + CPU which just turned isolated through cpuset must be flushed + before the related created/modified isolated partition is made + available to userspace. + +This synchronization is maintained by an RCU based scheme. The cpuset update +side waits for an RCU grace period after updating the HK_TYPE_DOMAIN +cpumask and before flushing pending works. On the read side, care must be +taken to gather the housekeeping target election and the work enqueue within +the same RCU read side critical section. + +A typical layout example would look like this on the update side +(``housekeeping_update()``):: + + rcu_assign_pointer(housekeeping_cpumasks[type], trial); + synchronize_rcu(); + flush_workqueue(example_workqueue); + +And then on the read side:: + + rcu_read_lock(); + cpu = housekeeping_any_cpu(HK_TYPE_DOMAIN); + queue_work_on(cpu, example_workqueue, work); + rcu_read_unlock(); diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index 5eb0fbbbc323..13769d5c40bf 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -25,6 +25,7 @@ it. symbol-namespaces asm-annotations real-time/index + housekeeping.rst Data structures and low-level utilities ======================================= @@ -140,10 +141,3 @@ Documents that don't fit elsewhere or which have yet to be categorized. librs liveupdate netlink - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/core-api/kho/abi.rst b/Documentation/core-api/kho/abi.rst new file mode 100644 index 000000000000..2e63be3486cf --- /dev/null +++ b/Documentation/core-api/kho/abi.rst @@ -0,0 +1,28 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +================== +Kexec Handover ABI +================== + +Core Kexec Handover ABI +======================== + +.. kernel-doc:: include/linux/kho/abi/kexec_handover.h + :doc: Kexec Handover ABI + +vmalloc preservation ABI +======================== + +.. kernel-doc:: include/linux/kho/abi/kexec_handover.h + :doc: Kexec Handover ABI for vmalloc Preservation + +memblock preservation ABI +========================= + +.. kernel-doc:: include/linux/kho/abi/memblock.h + :doc: memblock kexec handover ABI + +See Also +======== + +- :doc:`/admin-guide/mm/kho` diff --git a/Documentation/core-api/kho/bindings/kho.yaml b/Documentation/core-api/kho/bindings/kho.yaml deleted file mode 100644 index 11e8ab7b219d..000000000000 --- a/Documentation/core-api/kho/bindings/kho.yaml +++ /dev/null @@ -1,43 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -title: Kexec HandOver (KHO) root tree - -maintainers: - - Mike Rapoport <rppt@kernel.org> - - Changyuan Lyu <changyuanl@google.com> - -description: | - System memory preserved by KHO across kexec. - -properties: - compatible: - enum: - - kho-v1 - - preserved-memory-map: - description: | - physical address (u64) of an in-memory structure describing all preserved - folios and memory ranges. - -patternProperties: - "$[0-9a-f_]+^": - $ref: sub-fdt.yaml# - description: physical address of a KHO user's own FDT. - -required: - - compatible - - preserved-memory-map - -additionalProperties: false - -examples: - - | - kho { - compatible = "kho-v1"; - preserved-memory-map = <0xf0be16 0x1000000>; - - memblock { - fdt = <0x80cc16 0x1000000>; - }; - }; diff --git a/Documentation/core-api/kho/bindings/memblock/memblock.yaml b/Documentation/core-api/kho/bindings/memblock/memblock.yaml deleted file mode 100644 index d388c28eb91d..000000000000 --- a/Documentation/core-api/kho/bindings/memblock/memblock.yaml +++ /dev/null @@ -1,39 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -title: Memblock reserved memory - -maintainers: - - Mike Rapoport <rppt@kernel.org> - -description: | - Memblock can serialize its current memory reservations created with - reserve_mem command line option across kexec through KHO. - The post-KHO kernel can then consume these reservations and they are - guaranteed to have the same physical address. - -properties: - compatible: - enum: - - reserve-mem-v1 - -patternProperties: - "$[0-9a-f_]+^": - $ref: reserve-mem.yaml# - description: reserved memory regions - -required: - - compatible - -additionalProperties: false - -examples: - - | - memblock { - compatible = "memblock-v1"; - n1 { - compatible = "reserve-mem-v1"; - start = <0xc06b 0x4000000>; - size = <0x04 0x00>; - }; - }; diff --git a/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml b/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml deleted file mode 100644 index 10282d3d1bcd..000000000000 --- a/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -title: Memblock reserved memory regions - -maintainers: - - Mike Rapoport <rppt@kernel.org> - -description: | - Memblock can serialize its current memory reservations created with - reserve_mem command line option across kexec through KHO. - This object describes each such region. - -properties: - compatible: - enum: - - reserve-mem-v1 - - start: - description: | - physical address (u64) of the reserved memory region. - - size: - description: | - size (u64) of the reserved memory region. - -required: - - compatible - - start - - size - -additionalProperties: false - -examples: - - | - n1 { - compatible = "reserve-mem-v1"; - start = <0xc06b 0x4000000>; - size = <0x04 0x00>; - }; diff --git a/Documentation/core-api/kho/bindings/sub-fdt.yaml b/Documentation/core-api/kho/bindings/sub-fdt.yaml deleted file mode 100644 index b9a3d2d24850..000000000000 --- a/Documentation/core-api/kho/bindings/sub-fdt.yaml +++ /dev/null @@ -1,27 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -title: KHO users' FDT address - -maintainers: - - Mike Rapoport <rppt@kernel.org> - - Changyuan Lyu <changyuanl@google.com> - -description: | - Physical address of an FDT blob registered by a KHO user. - -properties: - fdt: - description: | - physical address (u64) of an FDT blob. - -required: - - fdt - -additionalProperties: false - -examples: - - | - memblock { - fdt = <0x80cc16 0x1000000>; - }; diff --git a/Documentation/core-api/kho/concepts.rst b/Documentation/core-api/kho/concepts.rst deleted file mode 100644 index d626d1dbd678..000000000000 --- a/Documentation/core-api/kho/concepts.rst +++ /dev/null @@ -1,74 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0-or-later -.. _kho-concepts: - -======================= -Kexec Handover Concepts -======================= - -Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory -regions, which could contain serialized system states, across kexec. - -It introduces multiple concepts: - -KHO FDT -======= - -Every KHO kexec carries a KHO specific flattened device tree (FDT) blob -that describes preserved memory regions. These regions contain either -serialized subsystem states, or in-memory data that shall not be touched -across kexec. After KHO, subsystems can retrieve and restore preserved -memory regions from KHO FDT. - -KHO only uses the FDT container format and libfdt library, but does not -adhere to the same property semantics that normal device trees do: Properties -are passed in native endianness and standardized properties like ``regs`` and -``ranges`` do not exist, hence there are no ``#...-cells`` properties. - -KHO is still under development. The FDT schema is unstable and would change -in the future. - -Scratch Regions -=============== - -To boot into kexec, we need to have a physically contiguous memory range that -contains no handed over memory. Kexec then places the target kernel and initrd -into that region. The new kernel exclusively uses this region for memory -allocations before during boot up to the initialization of the page allocator. - -We guarantee that we always have such regions through the scratch regions: On -first boot KHO allocates several physically contiguous memory regions. Since -after kexec these regions will be used by early memory allocations, there is a -scratch region per NUMA node plus a scratch region to satisfy allocations -requests that do not require particular NUMA node assignment. -By default, size of the scratch region is calculated based on amount of memory -allocated during boot. The ``kho_scratch`` kernel command line option may be -used to explicitly define size of the scratch regions. -The scratch regions are declared as CMA when page allocator is initialized so -that their memory can be used during system lifetime. CMA gives us the -guarantee that no handover pages land in that region, because handover pages -must be at a static physical memory location and CMA enforces that only -movable pages can be located inside. - -After KHO kexec, we ignore the ``kho_scratch`` kernel command line option and -instead reuse the exact same region that was originally allocated. This allows -us to recursively execute any amount of KHO kexecs. Because we used this region -for boot memory allocations and as target memory for kexec blobs, some parts -of that memory region may be reserved. These reservations are irrelevant for -the next KHO, because kexec can overwrite even the original kernel. - -.. _kho-finalization-phase: - -KHO finalization phase -====================== - -To enable user space based kexec file loader, the kernel needs to be able to -provide the FDT that describes the current kernel's state before -performing the actual kexec. The process of generating that FDT is -called serialization. When the FDT is generated, some properties -of the system may become immutable because they are already written down -in the FDT. That state is called the KHO finalization phase. - -Public API -========== -.. kernel-doc:: kernel/liveupdate/kexec_handover.c - :export: diff --git a/Documentation/core-api/kho/fdt.rst b/Documentation/core-api/kho/fdt.rst deleted file mode 100644 index 62505285d60d..000000000000 --- a/Documentation/core-api/kho/fdt.rst +++ /dev/null @@ -1,80 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0-or-later - -======= -KHO FDT -======= - -KHO uses the flattened device tree (FDT) container format and libfdt -library to create and parse the data that is passed between the -kernels. The properties in KHO FDT are stored in native format. -It includes the physical address of an in-memory structure describing -all preserved memory regions, as well as physical addresses of KHO users' -own FDTs. Interpreting those sub FDTs is the responsibility of KHO users. - -KHO nodes and properties -======================== - -Property ``preserved-memory-map`` ---------------------------------- - -KHO saves a special property named ``preserved-memory-map`` under the root node. -This node contains the physical address of an in-memory structure for KHO to -preserve memory regions across kexec. - -Property ``compatible`` ------------------------ - -The ``compatible`` property determines compatibility between the kernel -that created the KHO FDT and the kernel that attempts to load it. -If the kernel that loads the KHO FDT is not compatible with it, the entire -KHO process will be bypassed. - -Property ``fdt`` ----------------- - -Generally, a KHO user serialize its state into its own FDT and instructs -KHO to preserve the underlying memory, such that after kexec, the new kernel -can recover its state from the preserved FDT. - -A KHO user thus can create a node in KHO root tree and save the physical address -of its own FDT in that node's property ``fdt`` . - -Examples -======== - -The following example demonstrates KHO FDT that preserves two memory -regions created with ``reserve_mem`` kernel command line parameter:: - - /dts-v1/; - - / { - compatible = "kho-v1"; - - preserved-memory-map = <0x40be16 0x1000000>; - - memblock { - fdt = <0x1517 0x1000000>; - }; - }; - -where the ``memblock`` node contains an FDT that is requested by the -subsystem memblock for preservation. The FDT contains the following -serialized data:: - - /dts-v1/; - - / { - compatible = "memblock-v1"; - - n1 { - compatible = "reserve-mem-v1"; - start = <0xc06b 0x4000000>; - size = <0x04 0x00>; - }; - - n2 { - compatible = "reserve-mem-v1"; - start = <0xc067 0x4000000>; - size = <0x04 0x00>; - }; - }; diff --git a/Documentation/core-api/kho/index.rst b/Documentation/core-api/kho/index.rst index 0c63b0c5c143..dcc6a36cc134 100644 --- a/Documentation/core-api/kho/index.rst +++ b/Documentation/core-api/kho/index.rst @@ -1,13 +1,89 @@ .. SPDX-License-Identifier: GPL-2.0-or-later +.. _kho-concepts: + ======================== Kexec Handover Subsystem ======================== +Overview +======== + +Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory +regions, which could contain serialized system states, across kexec. + +KHO uses :ref:`flattened device tree (FDT) <kho_fdt>` to pass information about +the preserved state from pre-exec kernel to post-kexec kernel and :ref:`scratch +memory regions <kho_scratch>` to ensure integrity of the preserved memory. + +.. _kho_fdt: + +KHO FDT +======= +Every KHO kexec carries a KHO specific flattened device tree (FDT) blob that +describes the preserved state. The FDT includes properties describing preserved +memory regions and nodes that hold subsystem specific state. + +The preserved memory regions contain either serialized subsystem states, or +in-memory data that shall not be touched across kexec. After KHO, subsystems +can retrieve and restore the preserved state from KHO FDT. + +Subsystems participating in KHO can define their own format for state +serialization and preservation. + +KHO FDT and structures defined by the subsystems form an ABI between pre-kexec +and post-kexec kernels. This ABI is defined by header files in +``include/linux/kho/abi`` directory. + .. toctree:: :maxdepth: 1 - concepts - fdt + abi.rst + +.. _kho_scratch: + +Scratch Regions +=============== + +To boot into kexec, we need to have a physically contiguous memory range that +contains no handed over memory. Kexec then places the target kernel and initrd +into that region. The new kernel exclusively uses this region for memory +allocations before during boot up to the initialization of the page allocator. + +We guarantee that we always have such regions through the scratch regions: On +first boot KHO allocates several physically contiguous memory regions. Since +after kexec these regions will be used by early memory allocations, there is a +scratch region per NUMA node plus a scratch region to satisfy allocations +requests that do not require particular NUMA node assignment. +By default, size of the scratch region is calculated based on amount of memory +allocated during boot. The ``kho_scratch`` kernel command line option may be +used to explicitly define size of the scratch regions. +The scratch regions are declared as CMA when page allocator is initialized so +that their memory can be used during system lifetime. CMA gives us the +guarantee that no handover pages land in that region, because handover pages +must be at a static physical memory location and CMA enforces that only +movable pages can be located inside. + +After KHO kexec, we ignore the ``kho_scratch`` kernel command line option and +instead reuse the exact same region that was originally allocated. This allows +us to recursively execute any amount of KHO kexecs. Because we used this region +for boot memory allocations and as target memory for kexec blobs, some parts +of that memory region may be reserved. These reservations are irrelevant for +the next KHO, because kexec can overwrite even the original kernel. + +.. _kho-finalization-phase: + +KHO finalization phase +====================== + +To enable user space based kexec file loader, the kernel needs to be able to +provide the FDT that describes the current kernel's state before +performing the actual kexec. The process of generating that FDT is +called serialization. When the FDT is generated, some properties +of the system may become immutable because they are already written down +in the FDT. That state is called the KHO finalization phase. + +See Also +======== -.. only:: subproject and html +- :doc:`/admin-guide/mm/kho` diff --git a/Documentation/core-api/kobject.rst b/Documentation/core-api/kobject.rst index 7310247310a0..5f6c61bc03bf 100644 --- a/Documentation/core-api/kobject.rst +++ b/Documentation/core-api/kobject.rst @@ -78,7 +78,7 @@ just a matter of using the kobj member. Code that works with kobjects will often have the opposite problem, however: given a struct kobject pointer, what is the pointer to the containing structure? You must avoid tricks (such as assuming that the kobject is at the beginning of the structure) -and, instead, use the container_of() macro, found in ``<linux/kernel.h>``:: +and, instead, use the container_of() macro, found in ``<linux/container_of.h>``:: container_of(ptr, type, member) diff --git a/Documentation/core-api/librs.rst b/Documentation/core-api/librs.rst index 6010f5bc5bf9..0d88893dbc03 100644 --- a/Documentation/core-api/librs.rst +++ b/Documentation/core-api/librs.rst @@ -209,4 +209,4 @@ testing. Thanks a lot. The following people have contributed to this document: -Thomas Gleixner\ tglx@linutronix.de +Thomas Gleixner\ tglx@kernel.org diff --git a/Documentation/core-api/list.rst b/Documentation/core-api/list.rst index 86873ce9adbf..241464ca0549 100644 --- a/Documentation/core-api/list.rst +++ b/Documentation/core-api/list.rst @@ -774,3 +774,12 @@ Full List API .. kernel-doc:: include/linux/list.h :internal: + +Private List API +================ + +.. kernel-doc:: include/linux/list_private.h + :doc: Private List Primitives + +.. kernel-doc:: include/linux/list_private.h + :internal: diff --git a/Documentation/core-api/liveupdate.rst b/Documentation/core-api/liveupdate.rst index 7960eb15a81f..5a292d0f3706 100644 --- a/Documentation/core-api/liveupdate.rst +++ b/Documentation/core-api/liveupdate.rst @@ -18,6 +18,11 @@ LUO Preserving File Descriptors .. kernel-doc:: kernel/liveupdate/luo_file.c :doc: LUO File Descriptors +LUO File Lifecycle Bound Global Data +==================================== +.. kernel-doc:: kernel/liveupdate/luo_flb.c + :doc: LUO File Lifecycle Bound Global Data + Live Update Orchestrator ABI ============================ .. kernel-doc:: include/linux/kho/abi/luo.h @@ -40,6 +45,9 @@ Public API .. kernel-doc:: kernel/liveupdate/luo_core.c :export: +.. kernel-doc:: kernel/liveupdate/luo_flb.c + :export: + .. kernel-doc:: kernel/liveupdate/luo_file.c :export: @@ -48,6 +56,9 @@ Internal API .. kernel-doc:: kernel/liveupdate/luo_core.c :internal: +.. kernel-doc:: kernel/liveupdate/luo_flb.c + :internal: + .. kernel-doc:: kernel/liveupdate/luo_session.c :internal: @@ -58,4 +69,4 @@ See Also ======== - :doc:`Live Update uAPI </userspace-api/liveupdate>` -- :doc:`/core-api/kho/concepts` +- :doc:`/core-api/kho/index` diff --git a/Documentation/core-api/mm-api.rst b/Documentation/core-api/mm-api.rst index 68193a4cfcf5..aabdd3cba58e 100644 --- a/Documentation/core-api/mm-api.rst +++ b/Documentation/core-api/mm-api.rst @@ -130,5 +130,5 @@ More Memory Management Functions .. kernel-doc:: mm/vmscan.c .. kernel-doc:: mm/memory_hotplug.c .. kernel-doc:: mm/mmu_notifier.c -.. kernel-doc:: mm/balloon_compaction.c +.. kernel-doc:: mm/balloon.c .. kernel-doc:: mm/huge_memory.c diff --git a/Documentation/core-api/rbtree.rst b/Documentation/core-api/rbtree.rst index ed1a9fbc779e..cce80e19087b 100644 --- a/Documentation/core-api/rbtree.rst +++ b/Documentation/core-api/rbtree.rst @@ -197,7 +197,7 @@ Cached rbtrees -------------- Computing the leftmost (smallest) node is quite a common task for binary -search trees, such as for traversals or users relying on a the particular +search trees, such as for traversals or users relying on the particular order for their own logic. To this end, users can use 'struct rb_root_cached' to optimize O(logN) rb_first() calls to a simple pointer fetch avoiding potentially expensive tree iterations. This is done at negligible runtime @@ -255,7 +255,7 @@ affected subtrees. When erasing a node, the user must call rb_erase_augmented() instead of rb_erase(). rb_erase_augmented() calls back into user provided functions -to updated the augmented information on affected subtrees. +to update the augmented information on affected subtrees. In both cases, the callbacks are provided through struct rb_augment_callbacks. 3 callbacks must be defined: @@ -293,7 +293,7 @@ way making it possible to do efficient lookup and exact match. This "extra information" stored in each node is the maximum hi (max_hi) value among all the nodes that are its descendants. This -information can be maintained at each node just be looking at the node +information can be maintained at each node just by looking at the node and its immediate children. And this will be used in O(log n) lookup for lowest match (lowest start address among all possible matches) with something like:: diff --git a/Documentation/core-api/real-time/architecture-porting.rst b/Documentation/core-api/real-time/architecture-porting.rst index d822fac29922..c90a426d8062 100644 --- a/Documentation/core-api/real-time/architecture-porting.rst +++ b/Documentation/core-api/real-time/architecture-porting.rst @@ -35,7 +35,8 @@ POSIX CPU timers and KVM POSIX CPU timers must expire from thread context rather than directly within the timer interrupt. This behavior is enabled by setting the configuration option CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK. - When KVM is enabled, CONFIG_KVM_XFER_TO_GUEST_WORK must also be set to ensure + When virtualization support, such as KVM, is enabled, + CONFIG_VIRT_XFER_TO_GUEST_WORK must also be set to ensure that any pending work, such as POSIX timer expiration, is handled before transitioning into guest mode. diff --git a/Documentation/core-api/real-time/hardware.rst b/Documentation/core-api/real-time/hardware.rst new file mode 100644 index 000000000000..19f9bb3786e0 --- /dev/null +++ b/Documentation/core-api/real-time/hardware.rst @@ -0,0 +1,132 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Considering hardware +==================== + +:Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> + +The way a workload is handled can be influenced by the hardware it runs on. +Key components include the CPU, memory, and the buses that connect them. +These resources are shared among all applications on the system. +As a result, heavy utilization of one resource by a single application +can affect the deterministic handling of workloads in other applications. + +Below is a brief overview. + +System memory and cache +----------------------- + +Main memory and the associated caches are the most common shared resources among +tasks in a system. One task can dominate the available caches, forcing another +task to wait until a cache line is written back to main memory before it can +proceed. The impact of this contention varies based on write patterns and the +size of the caches available. Larger caches may reduce stalls because more lines +can be buffered before being written back. Conversely, certain write patterns +may trigger the cache controller to flush many lines at once, causing +applications to stall until the operation completes. + +This issue can be partly mitigated if applications do not share the same CPU +cache. The kernel is aware of the cache topology and exports this information to +user space. Tools such as **lstopo** from the Portable Hardware Locality (hwloc) +project (https://www.open-mpi.org/projects/hwloc/) can visualize the hierarchy. + +Avoiding shared L2 or L3 caches is not always possible. Even when cache sharing +is minimized, bottlenecks can still occur when accessing system memory. Memory +is used not only by the CPU but also by peripheral devices via DMA, such as +graphics cards or network adapters. + +In some cases, cache and memory bottlenecks can be controlled if the hardware +provides the necessary support. On x86 systems, Intel offers Cache Allocation +Technology (CAT), which enables cache partitioning among applications and +provides control over the interconnect. AMD provides similar functionality under +Platform Quality of Service (PQoS). On Arm64, the equivalent is Memory +System Resource Partitioning and Monitoring (MPAM). + +These features can be configured through the Linux Resource Control interface. +For details, see Documentation/filesystems/resctrl.rst. + +The perf tool can be used to monitor cache behavior. It can analyze +cache misses of an application and compare how they change under +different workloads on a neighboring CPU. Even more powerful, the perf +c2c tool can help identify cache-to-cache issues, where multiple CPU +cores repeatedly access and modify data on the same cache line. + +Hardware buses +-------------- + +Real-time systems often need to access hardware directly to perform their work. +Any latency in this process is undesirable, as it can affect the outcome of the +task. For example, on an I/O bus, a changed output may not become immediately +visible but instead appear with variable delay depending on the latency of the +bus used for communication. + +A bus such as PCI is relatively simple because register accesses are routed +directly to the connected device. In the worst case, a read operation stalls the +CPU until the device responds. + +A bus such as USB is more complex, involving multiple layers. A register read +or write is wrapped in a USB Request Block (URB), which is then sent by the +USB host controller to the device. Timing and latency are influenced by the +underlying USB bus. Requests cannot be sent immediately; they must align with +the next frame boundary according to the endpoint type and the host controller's +scheduling rules. This can introduce delays and additional latency. For example, +a network device connected via USB may still deliver sufficient throughput, but +the added latency when sending or receiving packets may fail to meet the +requirements of certain real-time use cases. + +Additional restrictions on bus latency can arise from power management. For +instance, PCIe with Active State Power Management (ASPM) enabled can suspend +the link between the device and the host. While this behavior is beneficial for +power savings, it delays device access and adds latency to responses. This issue +is not limited to PCIe; internal buses within a System-on-Chip (SoC) can also be +affected by power management mechanisms. + +Virtualization +-------------- + +In a virtualized environment such as KVM, each guest CPU is represented as a +thread on the host. If such a thread runs with real-time priority, the system +should be tested to confirm it can sustain this behavior over extended periods. +Because of its priority, the thread will not be preempted by lower-priority +threads (such as SCHED_OTHER), which may then receive no CPU time. This can +cause problems if a lower-priority thread is pinned to a CPU already occupied by +a real-time task and unable to make progress. Even if a CPU has been isolated, +the system may still (accidentally) start a per‑CPU thread on that CPU. +Ensuring that a guest CPU goes idle is difficult, as it requires avoiding both +task scheduling and interrupt handling. Furthermore, if the guest CPU does go +idle but the guest system is booted with the option **idle=poll**, the guest +CPU will never enter an idle state and will instead spin until an event +arrives. + +Device handling introduces additional considerations. Emulated PCI devices or +VirtIO devices require a counterpart on the host to complete requests. This +adds latency because the host must intercept and either process the request +directly or schedule a thread for its completion. These delays can be avoided if +the required PCI device is passed directly through to the guest. Some devices, +such as networking or storage controllers, support the PCIe SR-IOV feature. +SR-IOV allows a single PCIe device to be divided into multiple virtual functions, +which can then be assigned to different guests. + +Networking +---------- + +For low-latency networking, the full networking stack may be undesirable, as it +can introduce additional sources of delay. In this context, XDP can be used +as a shortcut to bypass much of the stack while still relying on the kernel's +network driver. + +The requirements are that the network driver must support XDP- preferably using +an "skb pool" and that the application must use an XDP socket. Additional +configuration may involve BPF filters, tuning networking queues, or configuring +qdiscs for time-based transmission. These techniques are often +applied in Time-Sensitive Networking (TSN) environments. + +Documenting all required steps exceeds the scope of this text. For detailed +guidance, see the TSN documentation at https://tsn.readthedocs.io. + +Another useful resource is the Linux Real-Time Communication Testbench +https://github.com/Linutronix/RTC-Testbench. +The goal of this project is to validate real-time network communication. It can +be thought of as a "cyclictest" for networking and also serves as a starting +point for application development. diff --git a/Documentation/core-api/real-time/index.rst b/Documentation/core-api/real-time/index.rst index 7e14c4ea3d59..f08d2395a22c 100644 --- a/Documentation/core-api/real-time/index.rst +++ b/Documentation/core-api/real-time/index.rst @@ -13,4 +13,5 @@ the required changes compared to a non-PREEMPT_RT configuration. theory differences + hardware architecture-porting diff --git a/Documentation/dev-tools/checkpatch.rst b/Documentation/dev-tools/checkpatch.rst index deb3f67a633c..dccede68698c 100644 --- a/Documentation/dev-tools/checkpatch.rst +++ b/Documentation/dev-tools/checkpatch.rst @@ -601,6 +601,11 @@ Commit message See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes + **BAD_COMMIT_SEPARATOR** + The commit separator is a single line with 3 dashes. + The regex match is '^---$' + Lines that start with 3 dashes and have more content on the same line + may confuse tools that apply patches. Comparison style ---------------- @@ -753,7 +758,7 @@ Macros, Attributes and Symbols sizeof(foo)/sizeof(foo[0]) for finding number of elements in an array. - The macro is defined in include/linux/kernel.h:: + The macro is defined in include/linux/array_size.h:: #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) diff --git a/Documentation/dev-tools/clang-format.rst b/Documentation/dev-tools/clang-format.rst index 1d089a847c1b..6c8a0df5a00c 100644 --- a/Documentation/dev-tools/clang-format.rst +++ b/Documentation/dev-tools/clang-format.rst @@ -88,7 +88,7 @@ Reformatting blocks of code By using an integration with your text editor, you can reformat arbitrary blocks (selections) of code with a single keystroke. This is specially -useful when moving code around, for complex code that is deeply intended, +useful when moving code around, for complex code that is deeply indented, for multi-line macros (and aligning their backslashes), etc. Remember that you can always tweak the changes afterwards in those cases diff --git a/Documentation/dev-tools/coccinelle.rst b/Documentation/dev-tools/coccinelle.rst index 6e70a1e9a3c0..c714780d458a 100644 --- a/Documentation/dev-tools/coccinelle.rst +++ b/Documentation/dev-tools/coccinelle.rst @@ -127,6 +127,18 @@ To enable verbose messages set the V= variable, for example:: make coccicheck MODE=report V=1 +By default, coccicheck will print debug logs to stdout and redirect stderr to +/dev/null. This can make coccicheck output difficult to read and understand. +Debug and error messages can instead be written to a debug file instead by +setting the ``DEBUG_FILE`` variable:: + + make coccicheck MODE=report DEBUG_FILE="cocci.log" + +Coccinelle cannot overwrite a debug file. Instead of repeatedly deleting a log +file, you could include the datetime in the debug file name:: + + make coccicheck MODE=report DEBUG_FILE="cocci-$(date -Iseconds).log" + Coccinelle parallelization -------------------------- @@ -208,11 +220,10 @@ include options matching the options used when we compile the kernel. You can learn what these options are by using V=1; you could then manually run Coccinelle with debug options added. -Alternatively you can debug running Coccinelle against SmPL patches -by asking for stderr to be redirected to stderr. By default stderr -is redirected to /dev/null; if you'd like to capture stderr you -can specify the ``DEBUG_FILE="file.txt"`` option to coccicheck. For -instance:: +An easier approach to debug running Coccinelle against SmPL patches is to ask +coccicheck to redirect stderr to a debug file. As mentioned in the examples, by +default stderr is redirected to /dev/null; if you'd like to capture stderr you +can specify the ``DEBUG_FILE="file.txt"`` option to coccicheck. For instance:: rm -f cocci.err make coccicheck COCCI=scripts/coccinelle/free/kfree.cocci MODE=report DEBUG_FILE=cocci.err diff --git a/Documentation/dev-tools/container.rst b/Documentation/dev-tools/container.rst new file mode 100644 index 000000000000..452415b64662 --- /dev/null +++ b/Documentation/dev-tools/container.rst @@ -0,0 +1,227 @@ +.. SPDX-License-Identifier: GPL-2.0-only +.. Copyright (C) 2025 Guillaume Tucker + +==================== +Containerized Builds +==================== + +The ``container`` tool can be used to run any command in the kernel source tree +from within a container. Doing so facilitates reproducing builds across +various platforms, for example when a test bot has reported an issue which +requires a specific version of a compiler or an external test suite. While +this can already be done by users who are familiar with containers, having a +dedicated tool in the kernel tree lowers the barrier to entry by solving common +problems once and for all (e.g. user id management). It also makes it easier +to share an exact command line leading to a particular result. The main use +case is likely to be kernel builds but virtually anything can be run: KUnit, +checkpatch etc. provided a suitable image is available. + + +Options +======= + +Command line syntax:: + + scripts/container -i IMAGE [OPTION]... CMD... + +Available options: + +``-e, --env-file ENV_FILE`` + + Path to an environment file to load in the container. + +``-g, --gid GID`` + + Group id to use inside the container. + +``-i, --image IMAGE`` + + Container image name (required). + +``-r, --runtime RUNTIME`` + + Container runtime name. Supported runtimes: ``docker``, ``podman``. + + If not specified, the first one found on the system will be used + i.e. Podman if present, otherwise Docker. + +``-s, --shell`` + + Run the container in an interactive shell. + +``-u, --uid UID`` + + User id to use inside the container. + + If the ``-g`` option is not specified, the user id will also be used for + the group id. + +``-v, --verbose`` + + Enable verbose output. + +``-h, --help`` + + Show the help message and exit. + + +Usage +===== + +It's entirely up to the user to choose which image to use and the ``CMD`` +arguments are passed directly as an arbitrary command line to run in the +container. The tool will take care of mounting the source tree as the current +working directory and adjust the user and group id as needed. + +The container image which would typically include a compiler toolchain is +provided by the user and selected via the ``-i`` option. The container runtime +can be selected with the ``-r`` option, which can be either ``docker`` or +``podman``. If none is specified, the first one found on the system will be +used while giving priority to Podman. Support for other runtimes may be added +later depending on their popularity among users. + +By default, commands are run non-interactively. The user can abort a running +container with SIGINT (Ctrl-C). To run commands interactively with a TTY, the +``--shell`` or ``-s`` option can be used. Signals will then be received by the +shell directly rather than the parent ``container`` process. To exit an +interactive shell, use Ctrl-D or ``exit``. + +.. note:: + + The only host requirement aside from a container runtime is Python 3.10 or + later. + +.. note:: + + Out-of-tree builds are not fully supported yet. The ``O=`` option can + however already be used with a relative path inside the source tree to keep + separate build outputs. A workaround to build outside the tree is to use + ``mount --bind``, see the examples section further down. + + +Environment Variables +===================== + +Environment variables are not propagated to the container so they have to be +either defined in the image itself or via the ``-e`` option using an +environment file. In some cases it makes more sense to have them defined in +the Containerfile used to create the image. For example, a Clang-only compiler +toolchain image may have ``LLVM=1`` defined. + +The local environment file is more useful for user-specific variables added +during development. It is passed as-is to the container runtime so its format +may vary. Typically, it will look like the output of ``env``. For example:: + + INSTALL_MOD_STRIP=1 + SOME_RANDOM_TEXT=One upon a time + +Please also note that ``make`` options can still be passed on the command line, +so while this can't be done since the first argument needs to be the +executable:: + + scripts/container -i docker.io/tuxmake/korg-clang LLVM=1 make # won't work + +this will work:: + + scripts/container -i docker.io/tuxmake/korg-clang make LLVM=1 + + +User IDs +======== + +This is an area where the behaviour will vary slightly depending on the +container runtime. The goal is to run commands as the user invoking the tool. +With Podman, a namespace is created to map the current user id to a different +one in the container (1000 by default). With Docker, while this is also +possible with recent versions it requires a special feature to be enabled in +the daemon so it's not used here for simplicity. Instead, the container is run +with the current user id directly. In both cases, this will provide the same +file permissions for the kernel source tree mounted as a volume. The only +difference is that when using Docker without a namespace, the user id may not +be the same as the default one set in the image. + +Say, we're using an image which sets up a default user with id 1000 and the +current user calling the ``container`` tool has id 1234. The kernel source +tree was checked out by this same user so the files belong to user 1234. With +Podman, the container will be running as user id 1000 with a mapping to id 1234 +so that the files from the mounted volume appear to belong to id 1000 inside +the container. With Docker and no namespace, the container will be running +with user id 1234 which can access the files in the volume but not in the user +1000 home directory. This shouldn't be an issue when running commands only in +the kernel tree but it is worth highlighting here as it might matter for +special corner cases. + +.. note:: + + Podman's `Docker compatibility + <https://podman-desktop.io/docs/migrating-from-docker/managing-docker-compatibility>`__ + mode to run ``docker`` commands on top of a Podman backend is more complex + and not fully supported yet. As such, Podman will take priority if both + runtimes are available on the system. + + +Examples +======== + +The TuxMake project provides a variety of prebuilt container images available +on `Docker Hub <https://hub.docker.com/u/tuxmake>`__. Here's the shortest +example to build a kernel using a TuxMake Clang image:: + + scripts/container -i docker.io/tuxmake/korg-clang -- make LLVM=1 defconfig + scripts/container -i docker.io/tuxmake/korg-clang -- make LLVM=1 -j$(nproc) + +.. note:: + + When running a command with options within the container, it should be + separated with a double dash ``--`` to not confuse them with the + ``container`` tool options. Plain commands with no options don't strictly + require the double dashes e.g.:: + + scripts/container -i docker.io/tuxmake/korg-clang make mrproper + +To run ``checkpatch.pl`` in a ``patches`` directory with a generic Perl image:: + + scripts/container -i perl:slim-trixie scripts/checkpatch.pl patches/* + +As an alternative to the TuxMake images, the examples below refer to +``kernel.org`` images which are based on the `kernel.org compiler toolchains +<https://mirrors.edge.kernel.org/pub/tools/>`__. These aren't (yet) officially +available in any public registry but users can build their own locally instead +using this `experimental repository +<https://gitlab.com/gtucker/korg-containers>`__ by running ``make +PREFIX=kernel.org/``. + +To build just ``bzImage`` using Clang:: + + scripts/container -i kernel.org/clang -- make bzImage -j$(nproc) + +Same with GCC 15 as a particular version tag:: + + scripts/container -i kernel.org/gcc:15 -- make bzImage -j$(nproc) + +For an out-of-tree build, a trick is to bind-mount the destination directory to +a relative path inside the source tree:: + + mkdir -p $HOME/tmp/my-kernel-build + mkdir -p build + sudo mount --bind $HOME/tmp/my-kernel-build build + scripts/container -i kernel.org/gcc -- make mrproper + scripts/container -i kernel.org/gcc -- make O=build defconfig + scripts/container -i kernel.org/gcc -- make O=build -j$(nproc) + +To run KUnit in an interactive shell and get the full output:: + + scripts/container -s -i kernel.org/gcc:kunit -- \ + tools/testing/kunit/kunit.py \ + run \ + --arch=x86_64 \ + --cross_compile=x86_64-linux- + +To just start an interactive shell:: + + scripts/container -si kernel.org/gcc bash + +To build the HTML documentation, which requires the ``kdocs`` image built with +``make PREFIX=kernel.org/ extra`` as it's not a compiler toolchain:: + + scripts/container -i kernel.org/kdocs make htmldocs diff --git a/Documentation/dev-tools/context-analysis.rst b/Documentation/dev-tools/context-analysis.rst new file mode 100644 index 000000000000..54d9ee28de98 --- /dev/null +++ b/Documentation/dev-tools/context-analysis.rst @@ -0,0 +1,169 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. Copyright (C) 2025, Google LLC. + +.. _context-analysis: + +Compiler-Based Context Analysis +=============================== + +Context Analysis is a language extension, which enables statically checking +that required contexts are active (or inactive) by acquiring and releasing +user-definable "context locks". An obvious application is lock-safety checking +for the kernel's various synchronization primitives (each of which represents a +"context lock"), and checking that locking rules are not violated. + +The Clang compiler currently supports the full set of context analysis +features. To enable for Clang, configure the kernel with:: + + CONFIG_WARN_CONTEXT_ANALYSIS=y + +The feature requires Clang 22 or later. + +The analysis is *opt-in by default*, and requires declaring which modules and +subsystems should be analyzed in the respective `Makefile`:: + + CONTEXT_ANALYSIS_mymodule.o := y + +Or for all translation units in the directory:: + + CONTEXT_ANALYSIS := y + +It is possible to enable the analysis tree-wide, however, which will result in +numerous false positive warnings currently and is *not* generally recommended:: + + CONFIG_WARN_CONTEXT_ANALYSIS_ALL=y + +Programming Model +----------------- + +The below describes the programming model around using context lock types. + +.. note:: + Enabling context analysis can be seen as enabling a dialect of Linux C with + a Context System. Some valid patterns involving complex control-flow are + constrained (such as conditional acquisition and later conditional release + in the same function). + +Context analysis is a way to specify permissibility of operations to depend on +context locks being held (or not held). Typically we are interested in +protecting data and code in a critical section by requiring a specific context +to be active, for example by holding a specific lock. The analysis ensures that +callers cannot perform an operation without the required context being active. + +Context locks are associated with named structs, along with functions that +operate on struct instances to acquire and release the associated context lock. + +Context locks can be held either exclusively or shared. This mechanism allows +assigning more precise privileges when a context is active, typically to +distinguish where a thread may only read (shared) or also write (exclusive) to +data guarded within a context. + +The set of contexts that are actually active in a given thread at a given point +in program execution is a run-time concept. The static analysis works by +calculating an approximation of that set, called the context environment. The +context environment is calculated for every program point, and describes the +set of contexts that are statically known to be active, or inactive, at that +particular point. This environment is a conservative approximation of the full +set of contexts that will actually be active in a thread at run-time. + +More details are also documented `here +<https://clang.llvm.org/docs/ThreadSafetyAnalysis.html>`_. + +.. note:: + Clang's analysis explicitly does not infer context locks acquired or + released by inline functions. It requires explicit annotations to (a) assert + that it's not a bug if a context lock is released or acquired, and (b) to + retain consistency between inline and non-inline function declarations. + +Supported Kernel Primitives +~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Currently the following synchronization primitives are supported: +`raw_spinlock_t`, `spinlock_t`, `rwlock_t`, `mutex`, `seqlock_t`, +`bit_spinlock`, RCU, SRCU (`srcu_struct`), `rw_semaphore`, `local_lock_t`, +`ww_mutex`. + +To initialize variables guarded by a context lock with an initialization +function (``type_init(&lock)``), prefer using ``guard(type_init)(&lock)`` or +``scoped_guard(type_init, &lock) { ... }`` to initialize such guarded members +or globals in the enclosing scope. This initializes the context lock and treats +the context as active within the initialization scope (initialization implies +exclusive access to the underlying object). + +For example:: + + struct my_data { + spinlock_t lock; + int counter __guarded_by(&lock); + }; + + void init_my_data(struct my_data *d) + { + ... + guard(spinlock_init)(&d->lock); + d->counter = 0; + ... + } + +Alternatively, initializing guarded variables can be done with context analysis +disabled, preferably in the smallest possible scope (due to lack of any other +checking): either with a ``context_unsafe(var = init)`` expression, or by +marking small initialization functions with the ``__context_unsafe(init)`` +attribute. + +Lockdep assertions, such as `lockdep_assert_held()`, inform the compiler's +context analysis that the associated synchronization primitive is held after +the assertion. This avoids false positives in complex control-flow scenarios +and encourages the use of Lockdep where static analysis is limited. For +example, this is useful when a function doesn't *always* require a lock, making +`__must_hold()` inappropriate. + +Keywords +~~~~~~~~ + +.. kernel-doc:: include/linux/compiler-context-analysis.h + :identifiers: context_lock_struct + token_context_lock token_context_lock_instance + __guarded_by __pt_guarded_by + __must_hold + __must_not_hold + __acquires + __cond_acquires + __releases + __must_hold_shared + __acquires_shared + __cond_acquires_shared + __releases_shared + __acquire + __release + __acquire_shared + __release_shared + __acquire_ret + __acquire_shared_ret + context_unsafe + __context_unsafe + disable_context_analysis enable_context_analysis + +.. note:: + The function attribute `__no_context_analysis` is reserved for internal + implementation of context lock types, and should be avoided in normal code. + +Background +---------- + +Clang originally called the feature `Thread Safety Analysis +<https://clang.llvm.org/docs/ThreadSafetyAnalysis.html>`_, with some keywords +and documentation still using the thread-safety-analysis-only terminology. This +was later changed and the feature became more flexible, gaining the ability to +define custom "capabilities". Its foundations can be found in `Capability +Systems <https://www.cs.cornell.edu/talc/papers/capabilities.pdf>`_, used to +specify the permissibility of operations to depend on some "capability" being +held (or not held). + +Because the feature is not just able to express capabilities related to +synchronization primitives, and "capability" is already overloaded in the +kernel, the naming chosen for the kernel departs from Clang's initial "Thread +Safety" and "capability" nomenclature; we refer to the feature as "Context +Analysis" to avoid confusion. The internal implementation still makes +references to Clang's terminology in a few places, such as `-Wthread-safety` +being the warning option that also still appears in diagnostic messages. diff --git a/Documentation/dev-tools/index.rst b/Documentation/dev-tools/index.rst index 4b8425e348ab..59cbb77b33ff 100644 --- a/Documentation/dev-tools/index.rst +++ b/Documentation/dev-tools/index.rst @@ -21,6 +21,7 @@ Documentation/process/debugging/index.rst checkpatch clang-format coccinelle + context-analysis sparse kcov gcov @@ -38,11 +39,4 @@ Documentation/process/debugging/index.rst gpio-sloppy-logic-analyzer autofdo propeller - - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` + container diff --git a/Documentation/dev-tools/kunit/run_wrapper.rst b/Documentation/dev-tools/kunit/run_wrapper.rst index 6697c71ee8ca..3c0b585dcfff 100644 --- a/Documentation/dev-tools/kunit/run_wrapper.rst +++ b/Documentation/dev-tools/kunit/run_wrapper.rst @@ -335,3 +335,12 @@ command line arguments: - ``--list_tests_attr``: If set, lists all tests that will be run and all of their attributes. + +Command-line completion +============================== + +The kunit_tool comes with a bash completion script: + +.. code-block:: bash + + source tools/testing/kunit/kunit-completion.sh diff --git a/Documentation/dev-tools/sparse.rst b/Documentation/dev-tools/sparse.rst index dc791c8d84d1..37b20170835d 100644 --- a/Documentation/dev-tools/sparse.rst +++ b/Documentation/dev-tools/sparse.rst @@ -53,25 +53,6 @@ sure that bitwise types don't get mixed up (little-endian vs big-endian vs cpu-endian vs whatever), and there the constant "0" really _is_ special. -Using sparse for lock checking ------------------------------- - -The following macros are undefined for gcc and defined during a sparse -run to use the "context" tracking feature of sparse, applied to -locking. These annotations tell sparse when a lock is held, with -regard to the annotated function's entry and exit. - -__must_hold - The specified lock is held on function entry and exit. - -__acquires - The specified lock is held on function exit, but not entry. - -__releases - The specified lock is held on function entry, but not exit. - -If the function enters and exits without the lock held, acquiring and -releasing the lock inside the function in a balanced way, no -annotation is needed. The three annotations above are for cases where -sparse would otherwise report a context imbalance. - Getting sparse -------------- diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 8d6f85f4455d..7b668f7fd400 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -56,7 +56,6 @@ DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd))) override DTC_FLAGS := \ -Wno-avoid_unnecessary_addr_size \ - -Wno-graph_child_address \ -Wno-unique_unit_address \ -Wunique_unit_address_if_enabled @@ -82,5 +81,8 @@ clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \ dt_compatible_check: $(obj)/processed-schema.json $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $< +PHONY += dt_binding_check_one +dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked + PHONY += dt_binding_check -dt_binding_check: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(CHK_DT_EXAMPLES) +dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index db61537b7115..13a3a9696821 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -9,6 +9,9 @@ title: Altera's SoCFPGA platform maintainers: - Dinh Nguyen <dinguyen@kernel.org> +description: + Altera/Intel boards with ARM 32/64 bits cores + properties: $nodename: const: "/" @@ -81,6 +84,30 @@ properties: - altr,socfpga-stratix10-swvp - const: altr,socfpga-stratix10 + - description: AgileX boards + items: + - enum: + - intel,n5x-socdk + - intel,socfpga-agilex-n6000 + - intel,socfpga-agilex-socdk + - intel,socfpga-agilex-socdk-emmc + - const: intel,socfpga-agilex + + - description: Agilex3 boards + items: + - enum: + - intel,socfpga-agilex3-socdk + - const: intel,socfpga-agilex3 + - const: intel,socfpga-agilex5 + + - description: Agilex5 boards + items: + - enum: + - intel,socfpga-agilex5-socdk + - intel,socfpga-agilex5-socdk-013b + - intel,socfpga-agilex5-socdk-nand + - const: intel,socfpga-agilex5 + - description: SoCFPGA VT items: - const: altr,socfpga-vt diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 08d9963fe925..a885278bc4e2 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -245,6 +245,14 @@ properties: items: - enum: - amlogic,aq222 + - const: amlogic,s805x2 + - const: amlogic,s4 + + - description: Boards with the Amlogic Meson S4 S905Y4 SoC + items: + - enum: + - khadas,vim1s + - const: amlogic,s905y4 - const: amlogic,s4 - description: Boards with the Amlogic S6 S905X5 SoC diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml index ed091dc0c10a..206681ccaa4c 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml @@ -31,7 +31,7 @@ maintainers: - Mike Leach <mike.leach@linaro.org> - Suzuki K Poulose <suzuki.poulose@arm.com> - James Clark <james.clark@linaro.org> - - Mao Jinlong <quic_jinlmao@quicinc.com> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com> - Hao Zhang <quic_hazha@quicinc.com> properties: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml index 78337be42b55..0b1e12ae95c3 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml @@ -30,7 +30,7 @@ maintainers: - Mike Leach <mike.leach@linaro.org> - Suzuki K Poulose <suzuki.poulose@arm.com> - James Clark <james.clark@linaro.org> - - Mao Jinlong <quic_jinlmao@quicinc.com> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com> - Hao Zhang <quic_hazha@quicinc.com> properties: diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 6430218ba1ce..ba04576f0ad6 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -157,6 +157,12 @@ patternProperties: - const: simple-bus - const: simple-bus + "#interrupt-cells": + const: 1 + + interrupt-map: true + interrupt-map-mask: true + patternProperties: '^motherboard-bus@': type: object diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 9298c1a75dd1..f9925a14680e 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -34,6 +34,7 @@ properties: - amd,ethanolx-bmc - ampere,mtjade-bmc - aspeed,ast2500-evb + - asrock,altrad8-bmc - asrock,e3c246d4i-bmc - asrock,e3c256d4i-bmc - asrock,romed8hm3-bmc @@ -80,6 +81,7 @@ properties: - aspeed,ast2600-evb - aspeed,ast2600-evb-a1 - asus,x4tf-bmc + - facebook,anacapa-bmc - facebook,bletchley-bmc - facebook,catalina-bmc - facebook,clemente-bmc @@ -107,6 +109,7 @@ properties: - inventec,transformer-bmc - jabil,rbp-bmc - nvidia,gb200nvl-bmc + - nvidia,msx4-bmc - qcom,dc-scm-v1-bmc - quanta,s6q-bmc - ufispace,ncplite-bmc diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 3a34b7a2e8d4..68d306d17c2a 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -235,9 +235,11 @@ properties: - const: microchip,lan9662 - const: microchip,lan966 - - description: Microchip LAN9668 PCB8290 Evaluation Board. + - description: Microchip LAN9668 Evaluation Board. items: - - const: microchip,lan9668-pcb8290 + - enum: + - microchip,lan9668-pcb8290 + - microchip,lan9668-pcb8385 - const: microchip,lan9668 - const: microchip,lan966 diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml deleted file mode 100644 index 3f441352fbf0..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml +++ /dev/null @@ -1,24 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Broadcom Vulcan - -maintainers: - - Robert Richter <rrichter@marvell.com> - -properties: - $nodename: - const: '/' - compatible: - items: - - enum: - - brcm,vulcan-eval - - cavium,thunderx2-cn9900 - - const: brcm,vulcan-soc - -additionalProperties: true - -... diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 8349c0a854d9..983ea80eaec9 100644 --- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -65,6 +65,11 @@ properties: gpio-line-names: minItems: 8 + patternProperties: + '-hog$': + required: + - gpio-hog + required: - compatible - gpio-controller @@ -87,6 +92,9 @@ properties: - compatible - "#reset-cells" + power: + $ref: /schemas/power/raspberrypi,bcm2835-power.yaml# + pwm: type: object additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/cix.yaml b/Documentation/devicetree/bindings/arm/cix.yaml index 114dab4bc4d2..21e66df7f696 100644 --- a/Documentation/devicetree/bindings/arm/cix.yaml +++ b/Documentation/devicetree/bindings/arm/cix.yaml @@ -16,9 +16,11 @@ properties: compatible: oneOf: - - description: Radxa Orion O6 + - description: Sky1 based boards items: - - const: radxa,orion-o6 + - enum: + - radxa,orion-o6 # Radxa Orion O6 board + - xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board - const: cix,sky1 additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 68a2d5fecc43..5716d701292c 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1071,6 +1071,15 @@ properties: - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board - const: fsl,imx8mn + - description: ifm i.MX8MN VHIP4 based boards + items: + - enum: + - ifm,imx8mn-vhip4-evalboard-v1 + - ifm,imx8mn-vhip4-evalboard-v2 + - const: ifm,imx8mn-vhip4-evalboard + - const: ifm,imx8mn-vhip4 + - const: fsl,imx8mn + - description: Variscite VAR-SOM-MX8MN based boards items: - enum: @@ -1099,13 +1108,13 @@ properties: - emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit - fsl,imx8mp-evk # i.MX8MP EVK Board - fsl,imx8mp-evk-revb4 # i.MX8MP EVK Rev B4 Board + - fsl,imx8mp-frdm # i.MX8MP Freedom Board - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board - gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board - - gocontroll,moduline-display # GOcontroll Moduline Display controller - prt,prt8ml # Protonic PRT8ML - skov,imx8mp-skov-basic # SKOV i.MX8MP baseboard without frontplate - skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel @@ -1164,6 +1173,14 @@ properties: - const: engicam,icore-mx8mp # i.MX8MP Engicam i.Core MX8M Plus SoM - const: fsl,imx8mp + - description: Ka-Ro TX8P-ML81 SoM based boards + items: + - enum: + - gocontroll,moduline-display + - gocontroll,moduline-display-106 + - const: karo,tx8p-ml81 + - const: fsl,imx8mp + - description: Kontron i.MX8MP OSM-S SoM based Boards items: - const: kontron,imx8mp-bl-osm-s # Kontron BL i.MX8MP OSM-S Board @@ -1333,7 +1350,7 @@ properties: - const: toradex,apalis-imx8 - const: fsl,imx8qm - - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules + - description: i.MX8QM/i.MX8QP Boards with Toradex Apalis iMX8 V1.1 Modules items: - enum: - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. V1.0/V1.1 Board @@ -1341,7 +1358,9 @@ properties: - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board - const: toradex,apalis-imx8-v1.1 - - const: fsl,imx8qm + - enum: + - fsl,imx8qm + - fsl,imx8qp - description: i.MX8QXP based Boards items: @@ -1412,6 +1431,7 @@ properties: items: - enum: - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board + - fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board - const: fsl,imx91 - description: i.MX93 based Boards @@ -1419,6 +1439,7 @@ properties: - enum: - fsl,imx93-9x9-qsb # i.MX93 9x9 QSB Board - fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board + - fsl,imx93-11x11-frdm # i.MX93 11x11 FRDM Board - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board - const: fsl,imx93 @@ -1432,10 +1453,17 @@ properties: items: - enum: - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board + - fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK) - const: fsl,imx95 + - description: i.MX952 based Boards + items: + - enum: + - fsl,imx952-evk # i.MX952 EVK Board + - const: fsl,imx952 + - description: PHYTEC i.MX 95 FPSC based Boards items: - enum: @@ -1672,6 +1700,15 @@ properties: - const: kontron,sl28 - const: fsl,ls1028a + - description: + TQ-Systems TQMLS1028A SoM on MBLS1028A/MBLS1028A-IND board + items: + - enum: + - tq,ls1028a-tqmls1028a-mbls1028a + - tq,ls1028a-tqmls1028a-mbls1028a-ind + - const: tq,ls1028a-tqmls1028a + - const: fsl,ls1028a + - description: LS1043A based Boards items: - enum: diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml deleted file mode 100644 index c918837bd41c..000000000000 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Intel SoCFPGA platform - -maintainers: - - Dinh Nguyen <dinguyen@kernel.org> - -properties: - $nodename: - const: "/" - compatible: - oneOf: - - description: AgileX boards - items: - - enum: - - intel,n5x-socdk - - intel,socfpga-agilex-n6000 - - intel,socfpga-agilex-socdk - - const: intel,socfpga-agilex - - description: Agilex3 boards - items: - - enum: - - intel,socfpga-agilex3-socdk - - const: intel,socfpga-agilex3 - - const: intel,socfpga-agilex5 - - description: Agilex5 boards - items: - - enum: - - intel,socfpga-agilex5-socdk - - intel,socfpga-agilex5-socdk-013b - - intel,socfpga-agilex5-socdk-nand - - const: intel,socfpga-agilex5 - -additionalProperties: true - -... diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 718d732174b9..382d0eb4d0af 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -438,12 +438,14 @@ properties: - const: mediatek,mt8365 - items: - enum: + - ezurio,mt8370-tungsten-smarc - grinn,genio-510-sbc - mediatek,mt8370-evk - const: mediatek,mt8370 - const: mediatek,mt8188 - items: - enum: + - ezurio,mt8390-tungsten-smarc - grinn,genio-700-sbc - mediatek,mt8390-evk - const: mediatek,mt8390 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml index f3a761cbd0fd..09a6c16e7e82 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml @@ -48,19 +48,39 @@ required: - compatible - '#clock-cells' -if: - properties: - compatible: - contains: - const: mediatek,mt8183-audiosys -then: - properties: - audio-controller: - $ref: /schemas/sound/mediatek,mt8183-audio.yaml# -else: - properties: - audio-controller: - $ref: /schemas/sound/mediatek,mt2701-audio.yaml# +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt2701-audsys + - mediatek,mt7622-audsys + then: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-audiosys + then: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt8183-audio.yaml# + + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-audsys + then: + properties: + audio-controller: + $ref: /schemas/sound/mt8192-afe-pcm.yaml# + additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt deleted file mode 100644 index 42db138e091a..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt +++ /dev/null @@ -1,31 +0,0 @@ -OMAP PRM instance bindings - -Power and Reset Manager is an IP block on OMAP family of devices which -handle the power domains and their current state, and provide reset -handling for the domains and/or separate IP blocks under the power domain -hierarchy. - -Required properties: -- compatible: Must contain one of the following: - "ti,am3-prm-inst" - "ti,am4-prm-inst" - "ti,omap4-prm-inst" - "ti,omap5-prm-inst" - "ti,dra7-prm-inst" - and additionally must contain: - "ti,omap-prm-inst" -- reg: Contains PRM instance register address range - (base address and length) - -Optional properties: -- #power-domain-cells: Should be 0 if the instance is a power domain provider. -- #reset-cells: Should be 1 if the PRM instance in question supports resets. - -Example: - -prm_dsp2: prm@1b00 { - compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; - reg = <0x1b00 0x40>; - #power-domain-cells = <0>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml index c969c16c21ef..e002f87361ad 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml @@ -7,9 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: CoreSight TMC Control Unit maintainers: - - Yuanfang Zhang <quic_yuanfang@quicinc.com> - - Mao Jinlong <quic_jinlmao@quicinc.com> - - Jie Gan <quic_jiegan@quicinc.com> + - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com> + - Jie Gan <jie.gan@oss.qualcomm.com> description: | The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB), @@ -26,8 +26,13 @@ description: | properties: compatible: - enum: - - qcom,sa8775p-ctcu + oneOf: + - items: + - enum: + - qcom,qcs8300-ctcu + - const: qcom,sa8775p-ctcu + - enum: + - qcom,sa8775p-ctcu reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml new file mode 100644 index 000000000000..8936bb7c3e8e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Interconnect Trace Network On Chip - ITNOC + +maintainers: + - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com> + +description: + The Interconnect TNOC is a CoreSight graph link that forwards trace data + from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it + does not have aggregation and ATID functionality. + +properties: + $nodename: + pattern: "^itnoc(@[0-9a-f]+)?$" + + compatible: + const: qcom,coresight-itnoc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb + + in-ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port(@[0-9a-f]{1,2})?$': + description: Input connections from CoreSight Trace Bus + $ref: /schemas/graph.yaml#/properties/port + + out-ports: + $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false + + properties: + port: + description: out connections to aggregator TNOC + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + - in-ports + - out-ports + +additionalProperties: false + +examples: + - | + itnoc@109ac000 { + compatible = "qcom,coresight-itnoc"; + reg = <0x109ac000 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + tn_ic_in_tpdm_dcc: endpoint { + remote-endpoint = <&tpdm_dcc_out_tn_ic>; + }; + }; + }; + + out-ports { + port { + tn_ic_out_tnoc_aggr: endpoint { + /* to Aggregator TNOC input */ + remote-endpoint = <&tn_ag_in_tn_ic>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml index ffe613efeabe..e3a32f30551c 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell) maintainers: - - Jinlong Mao <quic_jinlmao@quicinc.com> - - Tao Zhang <quic_taozha@quicinc.com> + - Jinlong Mao <jinlong.mao@oss.qualcomm.com> + - Tao Zhang <tao.zhang@oss.qualcomm.com> description: Support for ETM trace collection on remote processor using coresight diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml index 9d1c93a9ade3..ef648a15b806 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Trace Network On Chip - TNOC maintainers: - - Yuanfang Zhang <quic_yuanfang@quicinc.com> + - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com> description: > The Trace Network On Chip (TNOC) is an integration hierarchy hardware diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml index a48c9ac3eaa9..70d297b054c3 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml @@ -33,8 +33,8 @@ description: | to sink. maintainers: - - Mao Jinlong <quic_jinlmao@quicinc.com> - - Tao Zhang <quic_taozha@quicinc.com> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com> + - Tao Zhang <tao.zhang@oss.qualcomm.com> # Need a custom select here or 'arm,primecell' will match on lots of nodes select: diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index c349306f0d52..152403f548c3 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -19,8 +19,8 @@ description: | sources and send it to a TPDA for packetization, timestamping, and funneling. maintainers: - - Mao Jinlong <quic_jinlmao@quicinc.com> - - Tao Zhang <quic_taozha@quicinc.com> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com> + - Tao Zhang <tao.zhang@oss.qualcomm.com> # Need a custom select here or 'arm,primecell' will match on lots of nodes select: diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index d84bd3bca201..d48c625d3fc4 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -63,6 +63,11 @@ properties: - items: - enum: + - fairphone,fp6 + - const: qcom,milos + + - items: + - enum: - microsoft,dempsey - microsoft,makepeace - microsoft,moneypenny @@ -327,6 +332,12 @@ properties: - qcom,ipq9574-ap-al02-c9 - const: qcom,ipq9574 + - items: + - enum: + - qcom,kaanapali-mtp + - qcom,kaanapali-qrd + - const: qcom,kaanapali + - description: Sierra Wireless MangOH Green with WP8548 Module items: - const: swir,mangoh-green-wp8548 @@ -336,6 +347,7 @@ properties: - description: Qualcomm Technologies, Inc. Robotics RB1 items: - enum: + - arduino,imola - qcom,qrb2210-rb1 - const: qcom,qrb2210 - const: qcom,qcm2290 @@ -348,6 +360,7 @@ properties: - qcom,qcs6490-rb3gen2 - radxa,dragon-q6a - shift,otter + - thundercomm,rubikpi3 - const: qcom,qcm6490 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform @@ -900,6 +913,8 @@ properties: - items: - enum: + - google,blueline + - google,crosshatch - huawei,planck - lenovo,yoga-c630 - lg,judyln @@ -1069,6 +1084,19 @@ properties: - items: - enum: + - medion,sprchrgd14s1 + - tuxedo,elite14gen1 + - const: qcom,x1e78100 + - const: qcom,x1e80100 + + - items: + - const: microsoft,denali-lcd + - const: microsoft,denali + - const: qcom,x1p64100 + - const: qcom,x1e80100 + + - items: + - enum: - asus,vivobook-s15 - asus,zenbook-a14-ux3407ra - dell,inspiron-14-plus-7441 @@ -1090,6 +1118,11 @@ properties: - const: qcom,x1e80100 - items: + - const: microsoft,denali-oled + - const: microsoft,denali + - const: qcom,x1e80100 + + - items: - enum: - asus,zenbook-a14-ux3407qa-lcd - asus,zenbook-a14-ux3407qa-oled diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index ddd9a85099e9..be529490640c 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -14,21 +14,21 @@ properties: const: '/' compatible: oneOf: - # RTD1195 SoC based boards - - items: + - description: RTD1195 SoC based boards + items: - enum: - mele,x1000 # MeLE X1000 - realtek,horseradish # Realtek Horseradish EVB - const: realtek,rtd1195 - # RTD1293 SoC based boards - - items: + - description: RTD1293 SoC based boards + items: - enum: - synology,ds418j # Synology DiskStation DS418j - const: realtek,rtd1293 - # RTD1295 SoC based boards - - items: + - description: RTD1295 SoC based boards + items: - enum: - mele,v9 # MeLE V9 - probox2,ava # ProBox2 AVA @@ -36,25 +36,43 @@ properties: - zidoo,x9s # Zidoo X9S - const: realtek,rtd1295 - # RTD1296 SoC based boards - - items: + - description: RTD1296 SoC based boards + items: - enum: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 - # RTD1395 SoC based boards - - items: + - description: RTD1395 SoC based boards + items: - enum: - bananapi,bpi-m4 # Banana Pi BPI-M4 - realtek,lion-skin # Realtek Lion Skin EVB - const: realtek,rtd1395 - # RTD1619 SoC based boards - - items: + - description: RTD1501s SoC based boards + items: + - enum: + - realtek,phantom # Realtek Phantom EVB (8GB) + - const: realtek,rtd1501s + + - description: RTD1619 SoC based boards + items: - enum: - realtek,mjolnir # Realtek Mjolnir EVB - const: realtek,rtd1619 + - description: RTD1861b SoC based boards + items: + - enum: + - realtek,krypton # Realtek Krypton EVB (8GB) + - const: realtek,rtd1861b + + - description: RTD1920s SoC based boards + items: + - enum: + - realtek,smallville # Realtek Smallville EVB (4GB) + - const: realtek,rtd1920s + additionalProperties: true ... diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d496421dbd87..ae77ded9fe47 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -60,6 +60,12 @@ properties: - anbernic,rg-arc-s - const: rockchip,rk3566 + - description: Anbernic RK3568 Handheld Gaming Console + items: + - enum: + - anbernic,rg-ds + - const: rockchip,rk3568 + - description: Ariaboard Photonicat items: - const: ariaboard,photonicat @@ -894,11 +900,15 @@ properties: - const: rockchip,rk3568 - description: QNAP TS-x33 NAS devices - items: - - enum: - - qnap,ts233 - - qnap,ts433 - - const: rockchip,rk3568 + oneOf: + - items: + - const: qnap,ts133 + - const: rockchip,rk3566 + - items: + - enum: + - qnap,ts233 + - qnap,ts433 + - const: rockchip,rk3568 - description: Radxa Compute Module 3 (CM3) items: @@ -907,13 +917,27 @@ properties: - const: radxa,cm3 - const: rockchip,rk3566 - - description: Radxa CM3 Industrial + - description: Radxa CM3I items: - enum: - radxa,e25 - const: radxa,cm3i - const: rockchip,rk3568 + - description: Radxa CM3J + items: + - enum: + - radxa,cm3j-rpi-cm4 + - const: radxa,cm3j + - const: rockchip,rk3568 + + - description: Radxa CM5 + items: + - enum: + - radxa,cm5-io + - const: radxa,cm5 + - const: rockchip,rk3588s + - description: Radxa E20C items: - const: radxa,e20c @@ -1299,6 +1323,12 @@ properties: - xunlong,orangepi-5b - const: rockchip,rk3588s + - description: Xunlong Orange Pi CM5 + items: + - const: xunlong,orangepi-cm5-base + - const: xunlong,orangepi-cm5 + - const: rockchip,rk3588s + - description: Zkmagic A95X Z2 items: - const: zkmagic,a95x-z2 diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml index be70819020c5..dcd1c5376507 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml @@ -19,15 +19,15 @@ properties: - nvidia,tegra264-pmc reg: - minItems: 4 + minItems: 3 maxItems: 5 reg-names: - minItems: 4 + minItems: 3 items: - const: pmc - const: wake - - const: aotag + - enum: [ aotag, scratch, misc ] - enum: [ scratch, misc ] - const: misc @@ -51,6 +51,7 @@ allOf: then: properties: reg: + minItems: 4 maxItems: 4 reg-names: maxItems: 4 @@ -73,7 +74,9 @@ allOf: properties: compatible: contains: - const: nvidia,tegra234-pmc + enum: + - nvidia,tegra234-pmc + - nvidia,tegra264-pmc then: properties: reg-names: diff --git a/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml b/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml new file mode 100644 index 000000000000..2cce083dcfb0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/ti,omap-prm-inst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP PRM instances + +maintainers: + - Aaro Koskinen <aaro.koskinen@iki.fi> + - Andreas Kemnade <andreas@kemnade.info> + - Kevin Hilman <khilman@baylibre.com> + - Roger Quadros <rogerq@kernel.org> + - Tony Lindgren <tony@atomide.com> + +description: + Power and Reset Manager is an IP block on OMAP family of devices which + handle the power domains and their current state, and provide reset + handling for the domains and/or separate IP blocks under the power domain + hierarchy. + +properties: + compatible: + items: + - enum: + - ti,am3-prm-inst + - ti,am4-prm-inst + - ti,omap4-prm-inst + - ti,omap5-prm-inst + - ti,dra7-prm-inst + - const: ti,omap-prm-inst + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 0 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + reset-controller@1b00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b00 0x40>; + #power-domain-cells = <0>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/vexpress-config.yaml b/Documentation/devicetree/bindings/arm/vexpress-config.yaml index b74380da3198..41c53e3acc12 100644 --- a/Documentation/devicetree/bindings/arm/vexpress-config.yaml +++ b/Documentation/devicetree/bindings/arm/vexpress-config.yaml @@ -103,7 +103,7 @@ required: - arm,vexpress,config-bridge patternProperties: - 'clk[0-9]*$': + '^clock-controller.*$': type: object description: clocks @@ -137,7 +137,7 @@ patternProperties: - arm,vexpress-sysreg,func - "#clock-cells" - "^volt-.+$": + "^regulator-.+$": $ref: /schemas/regulator/regulator.yaml# properties: compatible: @@ -272,7 +272,7 @@ examples: compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - clk0 { + clock-controller { compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; #clock-cells = <0>; diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index cc35cdc02840..cd67926aae41 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -18,26 +18,6 @@ maintainers: - Hans de Goede <hdegoede@redhat.com> - Jens Axboe <axboe@kernel.dk> -select: - properties: - compatible: - contains: - enum: - - brcm,iproc-ahci - - cavium,octeon-7130-ahci - - hisilicon,hisi-ahci - - ibm,476gtr-ahci - - marvell,armada-3700-ahci - - marvell,armada-8k-ahci - - marvell,berlin2q-ahci - - qcom,apq8064-ahci - - qcom,ipq806x-ahci - - socionext,uniphier-pro4-ahci - - socionext,uniphier-pxs2-ahci - - socionext,uniphier-pxs3-ahci - required: - - compatible - properties: compatible: oneOf: diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index 667f48c33195..bfafacfb317f 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -54,4 +54,7 @@ $defs: each port can have a Port Multiplier attached thus allowing to access more than one drive by means of a single SATA port. + port: + $ref: /schemas/graph.yaml#/properties/port + ... diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml index 2894256c976d..77e60b32d52e 100644 --- a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml +++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml @@ -17,8 +17,10 @@ description: | properties: compatible: - enum: - - aspeed,ast2600-ahbc + items: + - enum: + - aspeed,ast2600-ahbc + - const: syscon reg: maxItems: 1 @@ -32,6 +34,6 @@ additionalProperties: false examples: - | ahbc@1e600000 { - compatible = "aspeed,ast2600-ahbc"; + compatible = "aspeed,ast2600-ahbc", "syscon"; reg = <0x1e600000 0x100>; }; diff --git a/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml b/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml index d42dbb0bbc2e..00bbde203f59 100644 --- a/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml +++ b/Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml @@ -19,21 +19,29 @@ description: | the SDMA can access. There are no special clocks for the bus, because the SDMA controller itself has its interrupt and clock assignments. + EMI (External Memory Interface) for legacy i.MX35. + select: properties: compatible: contains: - const: fsl,spba-bus + enum: + - fsl,aips + - fsl,emi + - fsl,spba-bus required: - compatible properties: $nodename: - pattern: "^spba-bus(@[0-9a-f]+)?$" + pattern: "^((spba|emi)-bus|bus)(@[0-9a-f]+)?$" compatible: items: - - const: fsl,spba-bus + - enum: + - fsl,aips + - fsl,emi + - fsl,spba-bus - const: simple-bus '#address-cells': diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml index 4d19917ad2c3..c6280c8c54a3 100644 --- a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml +++ b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml @@ -54,7 +54,7 @@ properties: const: 1 "#size-cells": - const: 1 + enum: [ 1, 2 ] ranges: true diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index a620a2ff5c56..6671e461e34a 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,glymur-llcc - qcom,ipq5424-llcc - qcom,kaanapali-llcc - qcom,qcs615-llcc @@ -46,11 +47,11 @@ properties: reg: minItems: 1 - maxItems: 10 + maxItems: 14 reg-names: minItems: 1 - maxItems: 10 + maxItems: 14 interrupts: maxItems: 1 @@ -89,6 +90,47 @@ allOf: compatible: contains: enum: + - qcom,glymur-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC8 base register region + - description: LLCC9 base register region + - description: LLCC10 base register region + - description: LLCC11 base register region + - description: LLCC broadcast base register region + - description: LLCC broadcast AND register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc8_base + - const: llcc9_base + - const: llcc10_base + - const: llcc11_base + - const: llcc_broadcast_base + - const: llcc_broadcast_and_base + + - if: + properties: + compatible: + contains: + enum: - qcom,sar1130p-llcc - qcom,sar2130p-llcc then: diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml new file mode 100644 index 000000000000..55bb73707d58 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2024-2025 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic T7 Peripherals Clock Controller + +maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + - Jerome Brunet <jbrunet@baylibre.com> + - Xianwei Zhao <xianwei.zhao@amlogic.com> + - Jian Hu <jian.hu@amlogic.com> + +properties: + compatible: + const: amlogic,t7-peripherals-clkc + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + minItems: 14 + items: + - description: input oscillator + - description: input sys clk + - description: input fixed pll + - description: input fclk div 2 + - description: input fclk div 2p5 + - description: input fclk div 3 + - description: input fclk div 4 + - description: input fclk div 5 + - description: input fclk div 7 + - description: input hifi pll + - description: input gp0 pll + - description: input gp1 pll + - description: input mpll1 + - description: input mpll2 + - description: external input rmii oscillator (optional) + - description: input video pll0 (optional) + - description: external pad input for rtc (optional) + + clock-names: + minItems: 14 + items: + - const: xtal + - const: sys + - const: fix + - const: fdiv2 + - const: fdiv2p5 + - const: fdiv3 + - const: fdiv4 + - const: fdiv5 + - const: fdiv7 + - const: hifi + - const: gp0 + - const: gp1 + - const: mpll1 + - const: mpll2 + - const: ext_rmii + - const: vid_pll0 + - const: ext_rtc + +required: + - compatible + - '#clock-cells' + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + apb { + #address-cells = <2>; + #size-cells = <2>; + + clkc_periphs:clock-controller@0 { + compatible = "amlogic,t7-peripherals-clkc"; + reg = <0 0x0 0 0x1c8>; + #clock-cells = <1>; + clocks = <&xtal>, + <&scmi_clk 13>, + <&scmi_clk 16>, + <&scmi_clk 18>, + <&scmi_clk 20>, + <&scmi_clk 22>, + <&scmi_clk 24>, + <&scmi_clk 26>, + <&scmi_clk 28>, + <&hifi 1>, + <&gp0 1>, + <&gp1 1>, + <&mpll 4>, + <&mpll 6>; + clock-names = "xtal", + "sys", + "fix", + "fdiv2", + "fdiv2p5", + "fdiv3", + "fdiv4", + "fdiv5", + "fdiv7", + "hifi", + "gp0", + "gp1", + "mpll1", + "mpll2"; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml new file mode 100644 index 000000000000..49c61f65deff --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2024-2025 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,t7-pll-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic T7 PLL Clock Control Controller + +maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + - Jerome Brunet <jbrunet@baylibre.com> + - Jian Hu <jian.hu@amlogic.com> + - Xianwei Zhao <xianwei.zhao@amlogic.com> + +properties: + compatible: + enum: + - amlogic,t7-gp0-pll + - amlogic,t7-gp1-pll + - amlogic,t7-hifi-pll + - amlogic,t7-pcie-pll + - amlogic,t7-mpll + - amlogic,t7-hdmi-pll + - amlogic,t7-mclk-pll + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: mclk pll input oscillator gate + - description: oscillator input clock source for mclk_sel_0 + - description: fixed input clock source for mclk_sel_0 + minItems: 1 + + clock-names: + items: + - const: in0 + - const: in1 + - const: in2 + minItems: 1 + +required: + - compatible + - '#clock-cells' + - reg + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + contains: + const: amlogic,t7-mclk-pll + + then: + properties: + clocks: + minItems: 3 + + clock-names: + minItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - amlogic,t7-gp0-pll + - amlogic,t7-gp1--pll + - amlogic,t7-hifi-pll + - amlogic,t7-pcie-pll + - amlogic,t7-mpll + - amlogic,t7-hdmi-pll + + then: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + +additionalProperties: false + +examples: + - | + apb { + #address-cells = <2>; + #size-cells = <2>; + + clock-controller@8080 { + compatible = "amlogic,t7-gp0-pll"; + reg = <0 0x8080 0 0x20>; + clocks = <&scmi_clk 2>; + clock-names = "in0"; + #clock-cells = <1>; + }; + + clock-controller@8300 { + compatible = "amlogic,t7-mclk-pll"; + reg = <0 0x8300 0 0x18>; + clocks = <&scmi_clk 2>, + <&xtal>, + <&scmi_clk 31>; + clock-names = "in0", "in1", "in2"; + #clock-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index 31e106ef913d..5122c5827718 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -29,9 +29,10 @@ properties: enum: - google,gs101-cmu-top - google,gs101-cmu-apm - - google,gs101-cmu-misc + - google,gs101-cmu-dpu - google,gs101-cmu-hsi0 - google,gs101-cmu-hsi2 + - google,gs101-cmu-misc - google,gs101-cmu-peric0 - google,gs101-cmu-peric1 @@ -52,6 +53,11 @@ properties: reg: maxItems: 1 + samsung,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to system registers interface. + required: - compatible - "#clock-cells" @@ -81,6 +87,24 @@ allOf: properties: compatible: contains: + const: google,gs101-cmu-dpu + + then: + properties: + clocks: + items: + - description: External reference clock (24.576 MHz) + - description: DPU bus clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + + - if: + properties: + compatible: + contains: const: google,gs101-cmu-hsi0 then: @@ -166,6 +190,18 @@ allOf: - const: bus - const: ip + - if: + properties: + compatible: + contains: + const: google,gs101-cmu-top + then: + properties: + samsung,sysreg: false + else: + required: + - samsung,sysreg + additionalProperties: false examples: @@ -175,7 +211,7 @@ examples: cmu_top: clock-controller@1e080000 { compatible = "google,gs101-cmu-top"; - reg = <0x1e080000 0x8000>; + reg = <0x1e080000 0x10000>; #clock-cells = <1>; clocks = <&ext_24_5m>; clock-names = "oscclk"; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml index 9c3913f9092c..c77111d10f90 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml @@ -14,11 +14,9 @@ maintainers: properties: compatible: - oneOf: - - items: - - const: mediatek,mt7622-pciesys - - const: syscon - - const: mediatek,mt7629-pciesys + enum: + - mediatek,mt7622-pciesys + - mediatek,mt7629-pciesys reg: maxItems: 1 @@ -40,7 +38,7 @@ additionalProperties: false examples: - | clock-controller@1a100800 { - compatible = "mediatek,mt7622-pciesys", "syscon"; + compatible = "mediatek,mt7622-pciesys"; reg = <0x1a100800 0x1000>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml index f1770360798f..9a6b50527c42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -17,7 +17,11 @@ description: | properties: compatible: - const: microchip,mpfs-ccc + oneOf: + - items: + - const: microchip,pic64gx-ccc + - const: microchip,mpfs-ccc + - const: microchip,mpfs-ccc reg: items: diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml index ee4f31596d97..a23703c281d1 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml @@ -19,7 +19,11 @@ description: | properties: compatible: - const: microchip,mpfs-clkcfg + oneOf: + - items: + - const: microchip,pic64gx-clkcfg + - const: microchip,mpfs-clkcfg + - const: microchip,mpfs-clkcfg reg: oneOf: @@ -69,6 +73,16 @@ required: - clocks - '#clock-cells' +if: + properties: + compatible: + contains: + const: microchip,pic64gx-clkcfg +then: + properties: + reg: + maxItems: 1 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml index f2e37f439d28..ced3118c8580 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Global Clock & Reset Controller on MSM8953 +title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439 maintainers: - Adam Skladowski <a_skl39@protonmail.com> @@ -13,7 +13,7 @@ maintainers: description: | Qualcomm global clock control module provides the clocks, resets and power - domains on MSM8937 or MSM8953. + domains on MSM8937, MSM8940, MSM8953 or SDM439. See also:: include/dt-bindings/clock/qcom,gcc-msm8917.h @@ -23,7 +23,9 @@ properties: compatible: enum: - qcom,gcc-msm8937 + - qcom,gcc-msm8940 - qcom,gcc-msm8953 + - qcom,gcc-sdm439 clocks: items: diff --git a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml new file mode 100644 index 000000000000..5490a975f3db --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,kaanapali-gxclkctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Graphics power domain Controller on Kaanapali + +maintainers: + - Taniya Das <taniya.das@oss.qualcomm.com> + +description: | + Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and + Power domains (GDSC). This module provides the power domains control + of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem. + + See also: + include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h + +properties: + compatible: + enum: + - qcom,kaanapali-gxclkctl + + power-domains: + description: + Power domains required for the clock controller to operate + items: + - description: GFX power domain + - description: GMXC power domain + - description: GPUCC(CX) power domain + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - power-domains + - '#power-domain-cells' + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/power/qcom,rpmhpd.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + clock-controller@3d64000 { + compatible = "qcom,kaanapali-gxclkctl"; + reg = <0x0 0x03d64000 0x0 0x6000>; + power-domains = <&rpmhpd RPMHPD_GFX>, + <&rpmhpd RPMHPD_GMXC>, + <&gpucc 0>; + #power-domain-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index c1e06f39431e..8492a7ef7324 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -9,23 +9,32 @@ title: Qualcomm Camera Clock & Reset Controller on SM8450 maintainers: - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> - Jagadeesh Kona <quic_jkona@quicinc.com> + - Taniya Das <taniya.das@oss.qualcomm.com> description: | Qualcomm camera clock control module provides the clocks, resets and power domains on SM8450. See also: + include/dt-bindings/clock/qcom,kaanapali-camcc.h + include/dt-bindings/clock/qcom,kaanapali-cambistmclkcc.h include/dt-bindings/clock/qcom,sm8450-camcc.h include/dt-bindings/clock/qcom,sm8550-camcc.h include/dt-bindings/clock/qcom,sm8650-camcc.h + include/dt-bindings/clock/qcom,sm8750-cambistmclkcc.h + include/dt-bindings/clock/qcom,sm8750-camcc.h properties: compatible: enum: + - qcom,kaanapali-cambistmclkcc + - qcom,kaanapali-camcc - qcom,sm8450-camcc - qcom,sm8475-camcc - qcom,sm8550-camcc - qcom,sm8650-camcc + - qcom,sm8750-cambistmclkcc + - qcom,sm8750-camcc clocks: items: @@ -63,6 +72,8 @@ allOf: compatible: contains: enum: + - qcom,kaanapali-cambistmclkcc + - qcom,kaanapali-camcc - qcom,sc8280xp-camcc - qcom,sm8450-camcc - qcom,sm8550-camcc diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml index 44380f6f8136..6feaa32569f9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml @@ -14,6 +14,7 @@ description: | domains on Qualcomm SoCs. See also:: + include/dt-bindings/clock/qcom,kaanapali-gpucc.h include/dt-bindings/clock/qcom,milos-gpucc.h include/dt-bindings/clock/qcom,sar2130p-gpucc.h include/dt-bindings/clock/qcom,sm4450-gpucc.h @@ -26,6 +27,7 @@ description: | properties: compatible: enum: + - qcom,kaanapali-gpucc - qcom,milos-gpucc - qcom,sar2130p-gpucc - qcom,sm4450-gpucc diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml index b31bd8335529..e6beebd6a36e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml @@ -15,6 +15,7 @@ description: | domains on SM8450. See also: + include/dt-bindings/clock/qcom,kaanapali-videocc.h include/dt-bindings/clock/qcom,sm8450-videocc.h include/dt-bindings/clock/qcom,sm8650-videocc.h include/dt-bindings/clock/qcom,sm8750-videocc.h @@ -22,6 +23,7 @@ description: | properties: compatible: enum: + - qcom,kaanapali-videocc - qcom,sm8450-videocc - qcom,sm8475-videocc - qcom,sm8550-videocc @@ -61,6 +63,7 @@ allOf: compatible: contains: enum: + - qcom,kaanapali-videocc - qcom,sm8450-videocc - qcom,sm8550-videocc - qcom,sm8750-videocc diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml index 30e4b4631575..591ce91b8d54 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml @@ -15,6 +15,7 @@ description: | domains on SM8550, SM8650, SM8750 and few other platforms. See also: + - include/dt-bindings/clock/qcom,kaanapali-dispcc.h - include/dt-bindings/clock/qcom,sm8550-dispcc.h - include/dt-bindings/clock/qcom,sm8650-dispcc.h - include/dt-bindings/clock/qcom,sm8750-dispcc.h @@ -23,6 +24,7 @@ description: | properties: compatible: enum: + - qcom,kaanapali-dispcc - qcom,sar2130p-dispcc - qcom,sm8550-dispcc - qcom,sm8650-dispcc diff --git a/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml index 1b15b5070954..881a5dd8d06f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml @@ -62,6 +62,9 @@ properties: - description: USB4_1 PHY max PIPE clock source - description: USB4_2 PHY PCIE PIPE clock source - description: USB4_2 PHY max PIPE clock source + - description: UFS PHY RX Symbol 0 clock source + - description: UFS PHY RX Symbol 1 clock source + - description: UFS PHY TX Symbol 0 clock source power-domains: description: @@ -121,7 +124,10 @@ examples: <&usb4_1_phy_pcie_pipe_clk>, <&usb4_1_phy_max_pipe_clk>, <&usb4_2_phy_pcie_pipe_clk>, - <&usb4_2_phy_max_pipe_clk>; + <&usb4_2_phy_max_pipe_clk>, + <&ufs_phy_rx_symbol_0>, + <&ufs_phy_rx_symbol_1>, + <&ufs_phy_tx_symbol_0>; power-domains = <&rpmhpd RPMHPD_CX>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml index af6319697b1c..a85f78ce2970 100644 --- a/Documentation/devicetree/bindings/clock/renesas,9series.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml @@ -62,7 +62,7 @@ properties: description: Output clock down spread in pcm (1/1000 of percent) patternProperties: - "^DIF[0-19]$": + "^DIF1?[0-9]$": type: object description: Description of one of the outputs (DIF0..DIF19). @@ -107,6 +107,15 @@ examples: DIF0 { renesas,slew-rate = <3000000>; }; + + /* Not present on 9FGV0241, used for DT validation only */ + DIF2 { + renesas,slew-rate = <2000000>; + }; + + DIF19 { + renesas,slew-rate = <3000000>; + }; }; }; diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index 5bf905f88a1a..1318720193b3 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -40,6 +40,7 @@ properties: - samsung,exynosautov920-cmu-hsi2 - samsung,exynosautov920-cmu-m2m - samsung,exynosautov920-cmu-mfc + - samsung,exynosautov920-cmu-mfd - samsung,exynosautov920-cmu-misc - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-peric1 @@ -268,6 +269,24 @@ allOf: - const: mfc - const: wfd + - if: + properties: + compatible: + contains: + const: samsung,exynosautov920-cmu-mfd + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_MFD NOC clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: noc + required: - compatible - "#clock-cells" diff --git a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml index 06bafd68c00a..cddf6a56dac0 100644 --- a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml +++ b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml @@ -4,14 +4,16 @@ $id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: SpacemiT K1 PLL +title: SpacemiT K1/K3 PLL maintainers: - Haylen Chu <heylenay@4d2.org> properties: compatible: - const: spacemit,k1-pll + enum: + - spacemit,k1-pll + - spacemit,k3-pll reg: maxItems: 1 @@ -28,7 +30,8 @@ properties: "#clock-cells": const: 1 description: - See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices. + For K1 SoC, check <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices. + For K3 SoC, check <dt-bindings/clock/spacemit,k3-clocks.h> for valid indices. required: - compatible diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml new file mode 100644 index 000000000000..36a99a3b39d7 --- /dev/null +++ b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml @@ -0,0 +1,145 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/connector/pcie-m2-m-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PCIe M.2 Mechanical Key M Connector + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> + +description: + A PCIe M.2 M connector node represents a physical PCIe M.2 Mechanical Key M + connector. The Mechanical Key M connectors are used to connect SSDs to the + host system over PCIe/SATA interfaces. These connectors also offer optional + interfaces like USB, SMBus. + +properties: + compatible: + const: pcie-m2-m-connector + + vpcie3v3-supply: + description: A phandle to the regulator for 3.3v supply. + + vpcie1v8-supply: + description: A phandle to the regulator for VIO 1.8v supply. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: OF graph bindings modeling the interfaces exposed on the + connector. Since a single connector can have multiple interfaces, every + interface has an assigned OF graph port number as described below. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: PCIe interface + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: SATA interface + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: USB 2.0 interface + + anyOf: + - required: + - port@0 + - required: + - port@1 + + i2c-parent: + $ref: /schemas/types.yaml#/definitions/phandle + description: I2C interface + + clocks: + description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to + the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for + more details. + maxItems: 1 + + pedet-gpios: + description: GPIO input to PEDET signal. This signal is used by the host + systems to determine the communication protocol that the M.2 card uses; + SATA signaling (low) or PCIe signaling (high). Refer, PCI Express M.2 + Specification r4.0, sec 3.3.4.2 for more details. + maxItems: 1 + + viocfg-gpios: + description: GPIO input to IO voltage configuration (VIO_CFG) signal. This + signal is used by the host systems to determine whether the card supports + an independent IO voltage domain for the sideband signals or not. Refer, + PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details. + maxItems: 1 + + pwrdis-gpios: + description: GPIO output to Power Disable (PWRDIS) signal. This signal is + used by the host system to disable power on the M.2 card. Refer, PCI + Express M.2 Specification r4.0, sec 3.3.5.2 for more details. + maxItems: 1 + + pln-gpios: + description: GPIO output to Power Loss Notification (PLN#) signal. This + signal is used by the host system to notify the M.2 card that the power + loss event is about to occur. Refer, PCI Express M.2 Specification r4.0, + sec 3.2.17.1 for more details. + maxItems: 1 + + plas3-gpios: + description: GPIO input to Power Loss Acknowledge (PLA_S3#) signal. This + signal is used by the host system to receive the acknowledgment of the M.2 + card's preparation for power loss. + maxItems: 1 + +required: + - compatible + - vpcie3v3-supply + +additionalProperties: false + +examples: + # PCI M.2 Key M connector for SSDs with PCIe interface + - | + #include <dt-bindings/gpio/gpio.h> + + connector { + compatible = "pcie-m2-m-connector"; + vpcie3v3-supply = <&vreg_nvme>; + i2c-parent = <&i2c0>; + pedet-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>; + viocfg-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + pwrdis-gpios = <&tlmm 97 GPIO_ACTIVE_HIGH>; + pln-gpios = <&tlmm 98 GPIO_ACTIVE_LOW>; + plas3-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <0>; + + endpoint@0 { + reg = <0>; + remote-endpoint = <&pcie6_port0_ep>; + }; + }; + + port@2 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <2>; + + endpoint@0 { + reg = <0>; + remote-endpoint = <&usb_hs_ep>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index 2d42fc3d8ef8..22eeaef14f55 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -35,6 +35,7 @@ properties: - description: v2 of CPUFREQ HW (EPSS) items: - enum: + - qcom,milos-cpufreq-epss - qcom,qcs8300-cpufreq-epss - qcom,qdu1000-cpufreq-epss - qcom,sa8255p-cpufreq-epss @@ -169,6 +170,7 @@ allOf: compatible: contains: enum: + - qcom,milos-cpufreq-epss - qcom,qcs8300-cpufreq-epss - qcom,sc7280-cpufreq-epss - qcom,sm8250-cpufreq-epss diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml index b18f178aac06..0dac6ee5043e 100644 --- a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml +++ b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml @@ -30,11 +30,17 @@ properties: interrupts: maxItems: 1 + aspeed,ahbc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle to the AHB controller node, which must be a syscon + required: - compatible - reg - clocks - interrupts + - aspeed,ahbc additionalProperties: false @@ -46,4 +52,5 @@ examples: reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; interrupts = <160>; clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; + aspeed,ahbc = <&ahbc>; }; diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml index 19010f90198a..f3b6af6baf15 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml @@ -16,6 +16,7 @@ properties: - const: atmel,at91sam9g46-aes - items: - enum: + - microchip,lan9691-aes - microchip,sam9x7-aes - microchip,sama7d65-aes - const: atmel,at91sam9g46-aes diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml index 39e076b275b3..16704ff0dd7f 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml @@ -16,6 +16,7 @@ properties: - const: atmel,at91sam9g46-sha - items: - enum: + - microchip,lan9691-sha - microchip,sam9x7-sha - microchip,sama7d65-sha - const: atmel,at91sam9g46-sha diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml index 343e2d04c797..3dc6c5f89d32 100644 --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml @@ -12,6 +12,14 @@ maintainers: properties: compatible: oneOf: + - items: + - const: marvell,armada-cp110-crypto + - const: inside-secure,safexcel-eip197b + - items: + - enum: + - marvell,armada-3700-crypto + - mediatek,mt7986-crypto + - const: inside-secure,safexcel-eip97ies - const: inside-secure,safexcel-eip197b - const: inside-secure,safexcel-eip197d - const: inside-secure,safexcel-eip97ies @@ -26,9 +34,11 @@ properties: maxItems: 1 interrupts: + minItems: 4 maxItems: 6 interrupt-names: + minItems: 4 items: - const: ring0 - const: ring1 @@ -65,6 +75,18 @@ allOf: minItems: 2 required: - clock-names + - if: + properties: + compatible: + not: + contains: + const: mediatek,mt7986-crypto + then: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 additionalProperties: false diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml index c3408dcf5d20..061ff718b23d 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - qcom,kaanapali-inline-crypto-engine + - qcom,milos-inline-crypto-engine - qcom,qcs8300-inline-crypto-engine - qcom,sa8775p-inline-crypto-engine - qcom,sc7180-inline-crypto-engine diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml index 597441d94cf1..41402599e9ab 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml @@ -21,6 +21,7 @@ properties: - qcom,ipq5424-trng - qcom,ipq9574-trng - qcom,kaanapali-trng + - qcom,milos-trng - qcom,qcs615-trng - qcom,qcs8300-trng - qcom,sa8255p-trng @@ -30,6 +31,7 @@ properties: - qcom,sm8550-trng - qcom,sm8650-trng - qcom,sm8750-trng + - qcom,x1e80100-trng - const: qcom,trng reg: diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml index 8aead97a585b..20134d1d0f49 100644 --- a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml @@ -14,6 +14,8 @@ description: | The ZynqMP AES-GCM hardened cryptographic accelerator is used to encrypt or decrypt the data with provided key and initialization vector. +deprecated: true + properties: compatible: const: xlnx,zynqmp-aes diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml index a1ed1004651b..6ad466952c02 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml @@ -85,6 +85,11 @@ properties: aux-bus: $ref: /schemas/display/dp-aux-bus.yaml# + connector: + type: object + $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -117,7 +122,6 @@ properties: required: - port@0 - - port@1 required: - compatible @@ -127,6 +131,28 @@ required: - vdd33-supply - ports +allOf: + - if: + required: + - aux-bus + - connector + then: + false + + - if: + required: + - connector + then: + properties: + ports: + properties: + port@1: false + else: + properties: + ports: + required: + - port@1 + additionalProperties: false examples: @@ -185,3 +211,73 @@ examples: }; }; }; + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + encoder@58 { + compatible = "analogix,anx7625"; + reg = <0x58>; + enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + vdd10-supply = <&pp1000_mipibrdg>; + vdd18-supply = <&pp1800_mipibrdg>; + vdd33-supply = <&pp3300_mipibrdg>; + analogix,audio-enable; + analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>; + analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>; + + connector { + compatible = "usb-c-connector"; + power-role = "dual"; + data-role = "dual"; + vbus-supply = <&vbus_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&usb_hs>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&usb_ss>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&usb_sbu>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&mipi_dsi>; + bus-type = <7>; + data-lanes = <0 1 2 3>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml index 07388bf2b90d..7f380879fffd 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -35,6 +35,15 @@ properties: - const: ldb - const: lvds + nxp,enable-termination-resistor: + type: boolean + description: + Indicates that the built-in 100 Ohm termination resistor on the LVDS + output is enabled. This property is optional and controlled via the + HS_EN bit in the LVDS_CTRL register. Enabling it can improve signal + quality and prevent visual artifacts on some boards, but increases + power consumption. + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -59,6 +68,7 @@ required: - compatible - clocks - ports + - reg allOf: - if: @@ -73,6 +83,24 @@ allOf: ports: properties: port@2: false + - if: + not: + properties: + compatible: + contains: + const: fsl,imx6sx-ldb + then: + required: + - reg-names + + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-ldb + then: + properties: + nxp,enable-termination-resistor: false additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml index 2cef25215798..63f000ebc9c5 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml @@ -79,7 +79,6 @@ properties: required: - compatible - reg - - reset-gpios - ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml index 655db8cfdc25..429a06057ae8 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml @@ -44,21 +44,28 @@ properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: - Primary MIPI port-1 for MIPI input + DSI Port A input. directly drives the display, or works in + combination with Port B for higher resolution displays. port@1: $ref: /schemas/graph.yaml#/properties/port description: - Additional MIPI port-2 for MIPI input, used in combination - with primary MIPI port-1 to drive higher resolution displays + DSI Port B input. Can be used alone if DSI is physically + connected to Port B, or in combination with Port A for higher + resolution displays. port@2: $ref: /schemas/graph.yaml#/properties/port description: HDMI port for HDMI output + anyOf: + - required: + - port@0 + - required: + - port@1 + required: - - port@0 - port@2 required: diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 4f7d3e9cf0c2..4f52e35d0253 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -33,6 +33,7 @@ properties: oneOf: - items: - enum: + - onnn,fin3385 # OnSemi FIN3385 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml index 3fce9e698ea1..1205c8e9de32 100644 --- a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml @@ -19,6 +19,9 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + video-ports: $ref: /schemas/types.yaml#/definitions/uint32 default: 0x230145 diff --git a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml index 20c7e0a77802..e6808419f625 100644 --- a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml +++ b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml @@ -27,6 +27,7 @@ properties: - const: adi,adv7123 - enum: - adi,adv7123 + - algoltek,ag6311 - asl-tek,cs5263 - dumb-vga-dac - parade,ps185hdm diff --git a/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-hdmi.yaml new file mode 100644 index 000000000000..68fff885ce15 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-hdmi.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/thead,th1520-dw-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-Head TH1520 DesignWare HDMI TX Encoder + +maintainers: + - Icenowy Zheng <uwu@icenowy.me> + +description: + The HDMI transmitter is a Synopsys DesignWare HDMI TX controller + paired with a DesignWare HDMI Gen2 TX PHY. + +allOf: + - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml# + +properties: + compatible: + enum: + - thead,th1520-dw-hdmi + + reg-io-width: + const: 4 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: iahb + - const: isfr + - const: cec + - const: pix + + resets: + items: + - description: Main reset + - description: Configuration APB reset + + reset-names: + items: + - const: main + - const: apb + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input port connected to DC8200 DPU "DP" output + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: HDMI output port + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - reg-io-width + - clocks + - clock-names + - resets + - reset-names + - interrupts + - ports + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/thead,th1520-clk-ap.h> + #include <dt-bindings/reset/thead,th1520-reset.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + hdmi@ffef540000 { + compatible = "thead,th1520-dw-hdmi"; + reg = <0xff 0xef540000 0x0 0x40000>; + reg-io-width = <4>; + interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_vo CLK_HDMI_PCLK>, + <&clk_vo CLK_HDMI_SFR>, + <&clk_vo CLK_HDMI_CEC>, + <&clk_vo CLK_HDMI_PIXCLK>; + clock-names = "iahb", "isfr", "cec", "pix"; + resets = <&rst_vo TH1520_RESET_ID_HDMI>, + <&rst_vo TH1520_RESET_ID_HDMI_APB>; + reset-names = "main", "apb"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + hdmi_in: endpoint { + remote-endpoint = <&dpu_out_dp1>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_out_conn: endpoint { + remote-endpoint = <&hdmi_conn_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml index 70f229dc4e0c..75804114f71f 100644 --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml @@ -117,7 +117,7 @@ properties: - 1 # 3.5dB pre-emphasis - 2 # 6dB pre-emphasis - oneOf: + anyOf: - required: - port@0 - required: diff --git a/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml index 5e8498c8303d..3820dd7e11af 100644 --- a/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml @@ -40,9 +40,12 @@ properties: properties: data-lanes: description: array of physical DSI data lane indexes. + minItems: 1 items: - const: 1 - const: 2 + - const: 3 + - const: 4 required: - data-lanes diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt deleted file mode 100644 index 751fa9f51e5d..000000000000 --- a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish framebuffer - -Android Goldfish framebuffer device used by Android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-fb" -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - display-controller@1f008000 { - compatible = "google,goldfish-fb"; - interrupts = <0x10>; - reg = <0x1f008000 0x100>; - }; diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml b/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml new file mode 100644 index 000000000000..36ed77cbbcd7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/google,goldfish-fb.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/google,goldfish-fb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish Framebuffer + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +description: + Android Goldfish framebuffer device used by Android emulator. + +properties: + compatible: + const: google,goldfish-fb + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + display@1f008000 { + compatible = "google,goldfish-fb"; + reg = <0x1f008000 0x100>; + interrupts = <16>; + }; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml index 274f590807ca..8f4bd9fb560b 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -11,7 +11,7 @@ maintainers: - Jitao shi <jitao.shi@mediatek.com> description: | - MediaTek DP and eDP are different hardwares and there are some features + MediaTek DP and eDP are different hardware and there are some features which are not supported for eDP. For example, audio is not supported for eDP. Therefore, we need to use two different compatibles to describe them. In addition, We just need to enable the power domain of DP, so the clock diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 4400d4cce072..eb6d38dabb08 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -15,6 +15,7 @@ properties: - items: - enum: - qcom,apq8064-dsi-ctrl + - qcom,kaanapali-dsi-ctrl - qcom,msm8226-dsi-ctrl - qcom,msm8916-dsi-ctrl - qcom,msm8953-dsi-ctrl @@ -45,6 +46,11 @@ properties: - qcom,sm8650-dsi-ctrl - qcom,sm8750-dsi-ctrl - const: qcom,mdss-dsi-ctrl + - items: + - enum: + - qcom,qcs8300-dsi-ctrl + - const: qcom,sa8775p-dsi-ctrl + - const: qcom,mdss-dsi-ctrl - enum: - qcom,dsi-ctrl-6g-qcm2290 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible @@ -369,6 +375,7 @@ allOf: compatible: contains: enum: + - qcom,kaanapali-dsi-ctrl - qcom,sm8750-dsi-ctrl then: properties: diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml index 1ca820a500b7..9a9a6c4abf43 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml @@ -14,18 +14,25 @@ allOf: properties: compatible: - enum: - - qcom,dsi-phy-7nm - - qcom,dsi-phy-7nm-8150 - - qcom,sa8775p-dsi-phy-5nm - - qcom,sar2130p-dsi-phy-5nm - - qcom,sc7280-dsi-phy-7nm - - qcom,sm6375-dsi-phy-7nm - - qcom,sm8350-dsi-phy-5nm - - qcom,sm8450-dsi-phy-5nm - - qcom,sm8550-dsi-phy-4nm - - qcom,sm8650-dsi-phy-4nm - - qcom,sm8750-dsi-phy-3nm + oneOf: + - items: + - enum: + - qcom,dsi-phy-7nm + - qcom,dsi-phy-7nm-8150 + - qcom,kaanapali-dsi-phy-3nm + - qcom,sa8775p-dsi-phy-5nm + - qcom,sar2130p-dsi-phy-5nm + - qcom,sc7280-dsi-phy-7nm + - qcom,sm6375-dsi-phy-7nm + - qcom,sm8350-dsi-phy-5nm + - qcom,sm8450-dsi-phy-5nm + - qcom,sm8550-dsi-phy-4nm + - qcom,sm8650-dsi-phy-4nm + - qcom,sm8750-dsi-phy-3nm + - items: + - enum: + - qcom,qcs8300-dsi-phy-5nm + - const: qcom,sa8775p-dsi-phy-5nm reg: items: diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 826aafdcc20b..ec84b64d4c00 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -45,11 +45,11 @@ properties: - const: amd,imageon clocks: - minItems: 2 + minItems: 1 maxItems: 7 clock-names: - minItems: 2 + minItems: 1 maxItems: 7 reg: @@ -378,35 +378,74 @@ allOf: - const: xo description: GPUCC clocksource clock + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + const: qcom,adreno-612.0 + then: + properties: + clocks: + items: + - description: GPU Core clock + + clock-names: + items: + - const: core + + reg: + minItems: 3 + maxItems: 3 + reg-names: - minItems: 1 items: - const: kgsl_3d0_reg_memory + - const: cx_mem - const: cx_dbgc required: - clocks - clock-names - else: - if: - properties: - compatible: - contains: - oneOf: - - pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$' - - pattern: '^qcom,adreno-[0-9a-f]{8}$' - - then: # Starting with A6xx, the clocks are usually defined in the GMU node - properties: - clocks: false - clock-names: false - - reg-names: - minItems: 1 - items: - - const: kgsl_3d0_reg_memory - - const: cx_mem - - const: cx_dbgc + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-615.0 + - qcom,adreno-618.0 + - qcom,adreno-619.0 + - qcom,adreno-621.0 + - qcom,adreno-623.0 + - qcom,adreno-630.2 + - qcom,adreno-635.0 + - qcom,adreno-640.1 + - qcom,adreno-650.2 + - qcom,adreno-660.1 + - qcom,adreno-663.0 + - qcom,adreno-680.1 + - qcom,adreno-690.0 + - qcom,adreno-730.1 + - qcom,adreno-43030c00 + - qcom,adreno-43050a01 + - qcom,adreno-43050c01 + - qcom,adreno-43051401 + + then: # Starting with A6xx, the clocks are usually defined in the GMU node + properties: + clocks: false + clock-names: false + + reg-names: + minItems: 1 + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + - const: cx_dbgc examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/qcom,adreno-rgmu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,adreno-rgmu.yaml new file mode 100644 index 000000000000..bacc5b32e6d7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,adreno-rgmu.yaml @@ -0,0 +1,126 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/display/msm/qcom,adreno-rgmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RGMU attached to certain Adreno GPUs + +maintainers: + - Rob Clark <robin.clark@oss.qualcomm.com> + +description: + RGMU (Reduced Graphics Management Unit) IP is present in some GPUs that + belong to Adreno A6xx family. It is a small state machine that helps to + toggle the GX GDSC (connected to CX rail) to implement IFPC feature and save + power. + +properties: + compatible: + items: + - const: qcom,adreno-rgmu-612.0 + - const: qcom,adreno-rgmu + + reg: + items: + - description: Core RGMU registers + + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + - description: GPU SMMU vote clock + + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + - const: smmu_vote + + power-domains: + items: + - description: CX GDSC power domain + - description: GX GDSC power domain + + power-domain-names: + items: + - const: cx + - const: gx + + interrupts: + items: + - description: GMU OOB interrupt + - description: GMU interrupt + + interrupt-names: + items: + - const: oob + - const: gmu + + operating-points-v2: true + opp-table: + type: object + +required: + - compatible + - reg + - clocks + - clock-names + - power-domains + - power-domain-names + - interrupts + - interrupt-names + - operating-points-v2 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,qcs615-gpucc.h> + #include <dt-bindings/clock/qcom,qcs615-gcc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom,rpmhpd.h> + + gmu@506a000 { + compatible = "qcom,adreno-rgmu-612.0", "qcom,adreno-rgmu"; + + reg = <0x05000000 0x90000>; + + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; + clock-names = "gmu", + "cxo", + "axi", + "memnoc", + "smmu_vote"; + + power-domains = <&gpucc CX_GDSC>, + <&gpucc GX_GDSC>; + power-domain-names = "cx", + "gx"; + + interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "oob", + "gmu"; + + operating-points-v2 = <&gmu_opp_table>; + + gmu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml new file mode 100644 index 000000000000..9f935defd6b1 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml @@ -0,0 +1,297 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,kaanapali-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali Display MDSS + +maintainers: + - Yongxing Mou <yongxing.mou@oss.qualcomm.com> + - Yuanjie Yang <yuanjie.yang@oss.qualcomm.com> + +description: + Kaanapali MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks + like DPU display controller, DSI and DP interfaces etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,kaanapali-mdss + + clocks: + items: + - description: Display AHB + - description: Display hf AXI + - description: Display core + - description: Display AHB SWI + + iommus: + maxItems: 1 + + interconnects: + items: + - description: Interconnect path from mdp0 port to the data bus + - description: Interconnect path from CPU to the reg bus + + interconnect-names: + items: + - const: mdp0-mem + - const: cpu-cfg + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,kaanapali-dpu + + "^dsi@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,kaanapali-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,kaanapali-dsi-phy-3nm + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/phy/phy-qcom-qmp.h> + #include <dt-bindings/power/qcom,rpmhpd.h> + + display-subsystem@9800000 { + compatible = "qcom,kaanapali-mdss"; + reg = <0x09800000 0x1000>; + reg-names = "mdss"; + + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&disp_cc_mdss_ahb_clk>, + <&gcc_disp_hf_axi_clk>, + <&disp_cc_mdss_mdp_clk>, + <&disp_cc_mdss_ahb_swi_clk>; + resets = <&disp_cc_mdss_core_bcr>; + + power-domains = <&mdss_gdsc>; + + iommus = <&apps_smmu 0x800 0x2>; + + interrupt-controller; + #interrupt-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@9801000 { + compatible = "qcom,kaanapali-dpu"; + reg = <0x09801000 0x1c8000>, + <0x09b16000 0x3000>; + reg-names = "mdp", + "vbif"; + + interrupts-extended = <&mdss 0>; + + clocks = <&gcc_disp_hf_axi_clk>, + <&disp_cc_mdss_ahb_clk>, + <&disp_cc_mdss_mdp_lut_clk>, + <&disp_cc_mdss_mdp_clk>, + <&disp_cc_mdss_vsync_clk>; + clock-names = "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&disp_cc_mdss_vsync_clk>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + + power-domains = <&rpmhpd RPMHPD_MMCX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + + dpu_intf2_out: endpoint { + remote-endpoint = <&mdss_dsi1_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-156000000 { + opp-hz = /bits/ 64 <156000000>; + required-opps = <&rpmhpd_opp_low_svs_d1>; + }; + + opp-207000000 { + opp-hz = /bits/ 64 <207000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-337000000 { + opp-hz = /bits/ 64 <337000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-417000000 { + opp-hz = /bits/ 64 <417000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-532000000 { + opp-hz = /bits/ 64 <532000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + required-opps = <&rpmhpd_opp_nom_l1>; + }; + + opp-650000000 { + opp-hz = /bits/ 64 <650000000>; + required-opps = <&rpmhpd_opp_turbo>; + }; + }; + }; + + dsi@9ac0000 { + compatible = "qcom,kaanapali-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x09ac0000 0x1000>; + reg-names = "dsi_ctrl"; + + interrupts-extended = <&mdss 4>; + + clocks = <&disp_cc_mdss_byte0_clk>, + <&disp_cc_mdss_byte0_intf_clk>, + <&disp_cc_mdss_pclk0_clk>, + <&disp_cc_mdss_esc0_clk>, + <&disp_cc_mdss_ahb_clk>, + <&gcc_disp_hf_axi_clk>, + <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy 0>, + <&disp_cc_esync0_clk>, + <&disp_cc_osc_clk>, + <&disp_cc_mdss_byte0_clk_src>, + <&disp_cc_mdss_pclk0_clk_src>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus", + "dsi_pll_pixel", + "dsi_pll_byte", + "esync", + "osc", + "byte_src", + "pixel_src"; + + operating-points-v2 = <&mdss_dsi_opp_table>; + + power-domains = <&rpmhpd RPMHPD_MMCX>; + + phys = <&mdss_dsi0_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi0_out: endpoint { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; + + mdss_dsi_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmhpd_opp_low_svs_d1>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-312500000 { + opp-hz = /bits/ 64 <312500000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + mdss_dsi0_phy: phy@9ac1000 { + compatible = "qcom,kaanapali-dsi-phy-3nm"; + reg = <0x09ac1000 0x1cc>, + <0x09ac1200 0x80>, + <0x09ac1500 0x400>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + clocks = <&disp_cc_mdss_ahb_clk>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", + "ref"; + + #clock-cells = <1>; + #phy-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml index e96baaae9ba9..c41a86203e78 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml @@ -53,13 +53,23 @@ patternProperties: contains: const: qcom,qcs8300-dp + "^dsi@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,qcs8300-dsi-ctrl + "^phy@[0-9a-f]+$": type: object additionalProperties: true properties: compatible: contains: - const: qcom,qcs8300-edp-phy + enum: + - qcom,qcs8300-dsi-phy-5nm + - qcom,qcs8300-edp-phy required: - compatible @@ -71,6 +81,7 @@ examples: #include <dt-bindings/interconnect/qcom,icc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,qcs8300-gcc.h> + #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h> #include <dt-bindings/power/qcom,rpmhpd.h> @@ -142,6 +153,13 @@ examples: remote-endpoint = <&mdss_dp0_in>; }; }; + + port@1 { + reg = <1>; + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; }; mdp_opp_table: opp-table { @@ -169,6 +187,88 @@ examples: }; }; + dsi@ae94000 { + compatible = "qcom,qcs8300-dsi-ctrl", + "qcom,sa8775p-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0x0ae94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc MDSS_DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc MDSS_DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc MDSS_DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc MDSS_DISP_CC_MDSS_ESC0_CLK>, + <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + assigned-clocks = <&dispcc MDSS_DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc MDSS_DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + phys = <&mdss_dsi0_phy>; + + operating-points-v2 = <&dsi0_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + vdda-supply = <&vreg_l5a>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + mdss0_dsi0_out: endpoint { }; + }; + }; + + dsi0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + mdss_dsi0_phy: phy@ae94400 { + compatible = "qcom,qcs8300-dsi-phy-5nm", + "qcom,sa8775p-dsi-phy-5nm"; + reg = <0x0ae94400 0x200>, + <0x0ae94600 0x280>, + <0x0ae94900 0x27c>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + + vdds-supply = <&vreg_l4a>; + }; + mdss_dp0_phy: phy@aec2a00 { compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index fe296e3186d0..e29c4687c3a2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -16,6 +16,7 @@ properties: oneOf: - enum: - qcom,glymur-dpu + - qcom,kaanapali-dpu - qcom,sa8775p-dpu - qcom,sm8650-dpu - qcom,sm8750-dpu diff --git a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml index b8783eba3ddc..5802fb3c9ffe 100644 --- a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml +++ b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml @@ -16,6 +16,8 @@ properties: compatible: items: - enum: + - anbernic,rg-ds-display-bottom + - anbernic,rg-ds-display-top - chongzhou,cz101b4001 - kingdisplay,kd101ne3-40ti - melfas,lmfbx101117480 diff --git a/Documentation/devicetree/bindings/display/panel/panel-edp-legacy.yaml b/Documentation/devicetree/bindings/display/panel/panel-edp-legacy.yaml index b308047c1edf..afe7dc54ebf4 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-edp-legacy.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-edp-legacy.yaml @@ -44,6 +44,8 @@ properties: - boe,nv133fhm-n62 # BOE NV140FHM-N49 14.0" FHD a-Si FT panel - boe,nv140fhmn49 + # FriendlyELEC HD702E 800x1280 LCD panel + - friendlyarm,hd702e # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel - innolux,n116bca-ea1 # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index fc244fbb5a54..106ae91ff474 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -144,8 +144,6 @@ properties: - foxlink,fl500wvr00-a0t # Frida FRD350H54004 3.5" QVGA TFT LCD panel - frida,frd350h54004 - # FriendlyELEC HD702E 800x1280 LCD panel - - friendlyarm,hd702e # GiantPlus GPG48273QS5 4.3" (480x272) WQVGA TFT LCD panel - giantplus,gpg48273qs5 # GiantPlus GPM940B0 3.0" QVGA TFT LCD panel @@ -178,6 +176,8 @@ properties: - innolux,g121x1-l03 # Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel - innolux,g121xce-l01 + # InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel + - innolux,g150xge-l05 # InnoLux 15.6" FHD (1920x1080) TFT LCD panel - innolux,g156hce-l01 # InnoLux 13.3" FHD (1920x1080) TFT LCD panel @@ -349,7 +349,9 @@ if: properties: compatible: contains: - const: innolux,g101ice-l01 + enum: + - innolux,g101ice-l01 + - yes-optoelectronics,ytc700tlag-05-201c then: properties: data-mapping: false diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml index 0ce2ea13583d..c35d4f2ab9a4 100644 --- a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml +++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml @@ -34,8 +34,9 @@ properties: spi-cpol: true spi-rx-bus-width: - minimum: 0 - maximum: 1 + items: + minimum: 0 + maximum: 1 dc-gpios: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml index 6345f0132d43..2b0d9e23e943 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml @@ -27,12 +27,10 @@ description: | * Pixel clock up to 594MHz * I2S, SPDIF audio interface -allOf: - - $ref: /schemas/sound/dai-common.yaml# - properties: compatible: enum: + - rockchip,rk3576-dp - rockchip,rk3588-dp reg: @@ -42,6 +40,7 @@ properties: maxItems: 1 clocks: + minItems: 3 items: - description: Peripheral/APB bus clock - description: DisplayPort AUX clock @@ -50,6 +49,7 @@ properties: - description: SPDIF interfce clock clock-names: + minItems: 3 items: - const: apb - const: aux @@ -95,6 +95,27 @@ required: - ports - resets +allOf: + - $ref: /schemas/sound/dai-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3588-dp + then: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + else: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml index 632b48bfabb9..b968f2de93f7 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml @@ -19,6 +19,7 @@ properties: - rockchip,rk3288-mipi-dsi - rockchip,rk3368-mipi-dsi - rockchip,rk3399-mipi-dsi + - rockchip,rk3506-mipi-dsi - rockchip,rk3568-mipi-dsi - rockchip,rv1126-mipi-dsi - const: snps,dw-mipi-dsi @@ -75,6 +76,7 @@ allOf: - rockchip,px30-mipi-dsi - rockchip,rk3128-mipi-dsi - rockchip,rk3368-mipi-dsi + - rockchip,rk3506-mipi-dsi - rockchip,rk3568-mipi-dsi - rockchip,rv1126-mipi-dsi diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml index d649808c59da..70ac6751bdba 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml @@ -69,6 +69,12 @@ properties: - const: main - const: hpd + no-hpd: + type: boolean + description: + The HPD pin is not present or used for another purpose, and the EDID + must be polled instead to determine if a device is attached. + phys: maxItems: 1 description: The HDMI/eDP PHY diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml index 8b5f58103dda..fdf4b1109da2 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml @@ -31,6 +31,7 @@ properties: - rockchip,rk3368-vop - rockchip,rk3399-vop-big - rockchip,rk3399-vop-lit + - rockchip,rk3506-vop - rockchip,rv1126-vop reg: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml index 193ddb105283..9a500f52f01d 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml @@ -18,6 +18,7 @@ properties: enum: - nvidia,tegra114-mipi - nvidia,tegra124-mipi + - nvidia,tegra132-mipi - nvidia,tegra210-mipi - nvidia,tegra186-mipi diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml index 644f42b942ad..bb138277d5e8 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml @@ -16,16 +16,21 @@ properties: compatible: oneOf: - - const: nvidia,tegra20-vi - - const: nvidia,tegra30-vi - - const: nvidia,tegra114-vi - - const: nvidia,tegra124-vi + - enum: + - nvidia,tegra20-vi + - nvidia,tegra114-vi + - nvidia,tegra124-vi + - nvidia,tegra210-vi + - nvidia,tegra186-vi + - nvidia,tegra194-vi + + - items: + - const: nvidia,tegra30-vi + - const: nvidia,tegra20-vi + - items: - const: nvidia,tegra132-vi - const: nvidia,tegra124-vi - - const: nvidia,tegra210-vi - - const: nvidia,tegra186-vi - - const: nvidia,tegra194-vi reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml index 14294edb8d8c..9104a36e16d9 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml @@ -11,8 +11,13 @@ maintainers: properties: compatible: - enum: - - nvidia,tegra20-vip + oneOf: + - enum: + - nvidia,tegra20-vip + + - items: + - const: nvidia,tegra30-vip + - const: nvidia,tegra20-vip ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/display/tilcdc/panel.txt b/Documentation/devicetree/bindings/display/tilcdc/panel.txt index 808216310ea2..b973174d704e 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/panel.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/panel.txt @@ -1,4 +1,5 @@ Device-Tree bindings for tilcdc DRM generic panel output driver +This binding is deprecated and should not be used. Required properties: - compatible: value should be "ti,tilcdc,panel". diff --git a/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-tilcdc.yaml b/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-tilcdc.yaml new file mode 100644 index 000000000000..eb0ebb678fa8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/tilcdc/ti,am33xx-tilcdc.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Bootlin +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/tilcdc/ti,am33xx-tilcdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LCD Controller, found on AM335x, DA850, AM18x and OMAP-L138 + +maintainers: + - Kory Maincent <kory.maincent@bootlin.com> + +properties: + compatible: + enum: + - ti,am33xx-tilcdc + - ti,da850-tilcdc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: + Name of the hwmod associated to the LCDC + + max-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixels per second that the memory interface / lcd + controller combination can sustain + # maximum: 2048*2048*60 + maximum: 251658240 + + max-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum horizontal pixel width supported by the lcd controller. + maximum: 2048 + + max-pixelclock: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixel clock that can be supported by the lcd controller + in KHz. + + blue-and-red-wiring: + enum: [straight, crossed] + description: + This property deals with the LCDC revision 2 (found on AM335x) + color errata [1]. + - "straight" indicates normal wiring that supports RGB565, + BGR888, and XBGR8888 color formats. + - "crossed" indicates wiring that has blue and red wires + crossed. This setup supports BGR565, RGB888 and XRGB8888 + formats. + - If the property is not present or its value is not recognized + the legacy mode is assumed. This configuration supports RGB565, + RGB888 and XRGB8888 formats. However, depending on wiring, the red + and blue colors are swapped in either 16 or 24-bit color modes. + + [1] There is an errata about AM335x color wiring. For 16-bit color + mode the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), + but for 24 bit color modes the wiring of blue and red components is + crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is + for Blue[3-7]. For more details see section 3.1.1 in AM335x + Silicon Errata + https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360 + +required: + - compatible + - interrupts + - reg + - port + +additionalProperties: false + +examples: + - | + display-controller@4830e000 { + compatible = "ti,am33xx-tilcdc"; + reg = <0x4830e000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <36>; + ti,hwmods = "lcdc"; + + blue-and-red-wiring = "crossed"; + + port { + endpoint { + remote-endpoint = <&hdmi_0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt deleted file mode 100644 index 3b3d0bbfcfff..000000000000 --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +++ /dev/null @@ -1,82 +0,0 @@ -Device-Tree bindings for tilcdc DRM driver - -Required properties: - - compatible: value should be one of the following: - - "ti,am33xx-tilcdc" for AM335x based boards - - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards - - interrupts: the interrupt number - - reg: base address and size of the LCDC device - -Recommended properties: - - ti,hwmods: Name of the hwmod associated to the LCDC - -Optional properties: - - max-bandwidth: The maximum pixels per second that the memory - interface / lcd controller combination can sustain - - max-width: The maximum horizontal pixel width supported by - the lcd controller. - - max-pixelclock: The maximum pixel clock that can be supported - by the lcd controller in KHz. - - blue-and-red-wiring: Recognized values "straight" or "crossed". - This property deals with the LCDC revision 2 (found on AM335x) - color errata [1]. - - "straight" indicates normal wiring that supports RGB565, - BGR888, and XBGR8888 color formats. - - "crossed" indicates wiring that has blue and red wires - crossed. This setup supports BGR565, RGB888 and XRGB8888 - formats. - - If the property is not present or its value is not recognized - the legacy mode is assumed. This configuration supports RGB565, - RGB888 and XRGB8888 formats. However, depending on wiring, the red - and blue colors are swapped in either 16 or 24-bit color modes. - -Optional nodes: - - - port/ports: to describe a connection to an external encoder. The - binding follows Documentation/devicetree/bindings/graph.txt and - supports a single port with a single endpoint. - - - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and - Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for connecting - tfp410 DVI encoder or lcd panel to lcdc - -[1] There is an errata about AM335x color wiring. For 16-bit color mode - the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), - but for 24 bit color modes the wiring of blue and red components is - crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is - for Blue[3-7]. For more details see section 3.1.1 in AM335x - Silicon Errata: - https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360 - -Example: - - fb: fb@4830e000 { - compatible = "ti,am33xx-tilcdc", "ti,da850-tilcdc"; - reg = <0x4830e000 0x1000>; - interrupt-parent = <&intc>; - interrupts = <36>; - ti,hwmods = "lcdc"; - - blue-and-red-wiring = "crossed"; - - port { - lcdc_0: endpoint { - remote-endpoint = <&hdmi_0>; - }; - }; - }; - - tda19988: tda19988 { - compatible = "nxp,tda998x"; - reg = <0x70>; - - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; - - port { - hdmi_0: endpoint { - remote-endpoint = <&lcdc_0>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml new file mode 100644 index 000000000000..9dc35ab973f2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml @@ -0,0 +1,122 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/verisilicon,dc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Verisilicon DC-series display controllers + +maintainers: + - Icenowy Zheng <uwu@icenowy.me> + +properties: + $nodename: + pattern: "^display@[0-9a-f]+$" + + compatible: + items: + - enum: + - thead,th1520-dc8200 + - const: verisilicon,dc # DC IPs have discoverable ID/revision registers + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: DC Core clock + - description: DMA AXI bus clock + - description: Configuration AHB bus clock + - description: Pixel clock of output 0 + - description: Pixel clock of output 1 + + clock-names: + items: + - const: core + - const: axi + - const: ahb + - const: pix0 + - const: pix1 + + resets: + items: + - description: DC Core reset + - description: DMA AXI bus reset + - description: Configuration AHB bus reset + + reset-names: + items: + - const: core + - const: axi + - const: ahb + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: The first output channel , endpoint 0 should be + used for DPI format output and endpoint 1 should be used + for DP format output. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: The second output channel if the DC variant + supports. Follow the same endpoint addressing rule with + the first port. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/thead,th1520-clk-ap.h> + #include <dt-bindings/reset/thead,th1520-reset.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + display@ffef600000 { + compatible = "thead,th1520-dc8200", "verisilicon,dc"; + reg = <0xff 0xef600000 0x0 0x100000>; + interrupts = <93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_vo CLK_DPU_CCLK>, + <&clk_vo CLK_DPU_ACLK>, + <&clk_vo CLK_DPU_HCLK>, + <&clk_vo CLK_DPU_PIXELCLK0>, + <&clk_vo CLK_DPU_PIXELCLK1>; + clock-names = "core", "axi", "ahb", "pix0", "pix1"; + resets = <&rst TH1520_RESET_ID_DPU_CORE>, + <&rst TH1520_RESET_ID_DPU_AXI>, + <&rst TH1520_RESET_ID_DPU_AHB>; + reset-names = "core", "axi", "ahb"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + dpu_out_dp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&hdmi_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml index ab25ae63d2c3..beab36ac583f 100644 --- a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml +++ b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller +title: ARM PrimeCell PL080 and PL081 and derivatives DMA controller maintainers: - Vinod Koul <vkoul@kernel.org> diff --git a/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml b/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml index 73fc13b902b3..197efb19b07a 100644 --- a/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml +++ b/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml @@ -33,7 +33,9 @@ properties: - microchip,sam9x7-dma - const: atmel,sama5d4-dma - items: - - const: microchip,sama7d65-dma + - enum: + - microchip,lan9691-dma + - microchip,sama7d65-dma - const: microchip,sama7g5-dma "#dma-cells": diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml index dab468a88942..3708518fe7fc 100644 --- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml @@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek UART APDMA controller maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> - Long Cheng <long.cheng@mediatek.com> description: | @@ -23,11 +24,29 @@ properties: - enum: - mediatek,mt2712-uart-dma - mediatek,mt6795-uart-dma + - mediatek,mt8173-uart-dma + - mediatek,mt8183-uart-dma - mediatek,mt8365-uart-dma - mediatek,mt8516-uart-dma - const: mediatek,mt6577-uart-dma + - items: + - enum: + - mediatek,mt7988-uart-dma + - mediatek,mt8186-uart-dma + - mediatek,mt8188-uart-dma + - mediatek,mt8192-uart-dma + - mediatek,mt8195-uart-dma + - const: mediatek,mt6835-uart-dma + - items: + - enum: + - mediatek,mt6991-uart-dma + - mediatek,mt8196-uart-dma + - const: mediatek,mt6985-uart-dma - enum: - mediatek,mt6577-uart-dma + - mediatek,mt6795-uart-dma + - mediatek,mt6835-uart-dma + - mediatek,mt6985-uart-dma reg: minItems: 1 @@ -58,6 +77,7 @@ properties: mediatek,dma-33bits: type: boolean + deprecated: true description: Enable 33-bits UART APDMA support required: diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml index da0235e451d6..269a1f7ebdbb 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -46,7 +46,7 @@ properties: Should contain all of the per-channel DMA interrupts in ascending order with respect to the DMA channel index. minItems: 1 - maxItems: 32 + maxItems: 64 clocks: description: Must contain one entry for the ADMA module clock @@ -86,6 +86,19 @@ allOf: reg: items: - description: Full address space range of DMA registers. + interrupts: + maxItems: 22 + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra186-adma + then: + properties: + interrupts: + maxItems: 32 - if: properties: diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index bbe4da2a1105..fde1df035ad1 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -24,6 +24,8 @@ properties: - qcom,sm6350-gpi-dma - items: - enum: + - qcom,glymur-gpi-dma + - qcom,kaanapali-gpi-dma - qcom,milos-gpi-dma - qcom,qcm2290-gpi-dma - qcom,qcs8300-gpi-dma @@ -58,7 +60,7 @@ properties: description: Interrupt lines for each GPI instance minItems: 1 - maxItems: 13 + maxItems: 16 "#dma-cells": const: 3 diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index f891cfcc48c7..d137b9cbaee9 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -24,6 +24,7 @@ properties: - items: - enum: - renesas,r9a09g047-dmac # RZ/G3E + - renesas,r9a09g056-dmac # RZ/V2N - const: renesas,r9a09g057-dmac - const: renesas,r9a09g057-dmac # RZ/V2H(P) diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml index a393a33c8908..216cda21c538 100644 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -17,11 +17,15 @@ allOf: properties: compatible: - enum: - - snps,axi-dma-1.01a - - intel,kmb-axi-dma - - starfive,jh7110-axi-dma - - starfive,jh8100-axi-dma + oneOf: + - enum: + - snps,axi-dma-1.01a + - intel,kmb-axi-dma + - starfive,jh7110-axi-dma + - starfive,jh8100-axi-dma + - items: + - const: altr,agilex5-axi-dma + - const: snps,axi-dma-1.01a reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml index 88575da1e6d5..508b8c2f13a2 100644 --- a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek mt8186 DSP core maintainers: - - Tinghan Shen <tinghan.shen@mediatek.com> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> description: | MediaTek mt8186 SoC contains a DSP core used for diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index c21282634780..ef88f46928a4 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -116,6 +116,7 @@ properties: - const: atmel,24c02 - items: - enum: + - belling,bl24c04a - giantec,gt24c04a - onnn,cat24c04 - onnn,cat24c05 @@ -124,6 +125,7 @@ properties: - items: - enum: - belling,bl24c16a + - belling,bl24c16f - renesas,r1ex24016 - const: atmel,24c16 - items: @@ -132,6 +134,7 @@ properties: - items: - enum: - belling,bl24s64 + - giantec,gt24p64a - onnn,n24s64b - puya,p24c64f - const: atmel,24c64 @@ -139,6 +142,7 @@ properties: - enum: - giantec,gt24p128e - giantec,gt24p128f + - puya,p24c128f - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml index e1599ce10916..bb78e12b8823 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.yaml +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -31,6 +31,7 @@ properties: - fujitsu,mb85rs1mt - fujitsu,mb85rs256 - fujitsu,mb85rs64 + - microchip,25aa010a - microchip,at25160bn - microchip,25lc040 - st,m95m02 diff --git a/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml index a029b38e8dc0..c88fbd6ad940 100644 --- a/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml +++ b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml @@ -50,7 +50,7 @@ additionalProperties: false examples: - |+ #include <dt-bindings/interrupt-controller/irq.h> - i2c1 { + i2c { clock-frequency = <400000>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt deleted file mode 100644 index 338169dea7bb..000000000000 --- a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt +++ /dev/null @@ -1,19 +0,0 @@ -Turris Mox rWTM firmware driver - -Required properties: - - compatible : Should be "cznic,turris-mox-rwtm" - - mboxes : Must contain a reference to associated mailbox - -This device tree node should be used on Turris Mox, or potentially another A3700 -compatible device running the Mox's rWTM firmware in the secure processor (for -example it is possible to flash this firmware into EspressoBin). - -Example: - - firmware { - turris-mox-rwtm { - compatible = "cznic,turris-mox-rwtm"; - mboxes = <&rwtm 0>; - status = "okay"; - }; - }; diff --git a/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml new file mode 100644 index 000000000000..28caec137cc1 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/cznic,turris-mox-rwtm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CZ.NIC Turris Mox rWTM firmware + +maintainers: + - Marek Behún <kabel@kernel.org> + +description: + This device tree node should be used on Turris Mox, or potentially another + A3700 compatible device running the Mox's rWTM firmware in the secure + processor (for example it is possible to flash this firmware into + EspressoBin). + +properties: + compatible: + oneOf: + - items: + - const: marvell,armada-3700-rwtm-firmware + - const: cznic,turris-mox-rwtm + - const: marvell,armada-3700-rwtm-firmware + + mboxes: + maxItems: 1 + +required: + - compatible + - mboxes + +additionalProperties: false + +examples: + - | + turris-mox-rwtm { + compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm"; + mboxes = <&rwtm 0>; + }; diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml index f9ba18f06369..307f1c627853 100644 --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml @@ -76,7 +76,8 @@ properties: - description: TX0 MU channel - description: RX0 MU channel - description: optional MU channel for general interrupt - - items: + - deprecated: true + items: - description: TX0 MU channel - description: TX1 MU channel - description: TX2 MU channel @@ -85,7 +86,8 @@ properties: - description: RX1 MU channel - description: RX2 MU channel - description: RX3 MU channel - - items: + - deprecated: true + items: - description: TX0 MU channel - description: TX1 MU channel - description: TX2 MU channel @@ -105,7 +107,8 @@ properties: - const: tx0 - const: rx0 - const: gip3 - - items: + - deprecated: true + items: - const: tx0 - const: tx1 - const: tx2 @@ -114,7 +117,8 @@ properties: - const: rx1 - const: rx2 - const: rx3 - - items: + - deprecated: true + items: - const: tx0 - const: tx1 - const: tx2 @@ -167,11 +171,9 @@ examples: firmware { system-controller { compatible = "fsl,imx-scu"; - mbox-names = "tx0", "tx1", "tx2", "tx3", - "rx0", "rx1", "rx2", "rx3", - "gip3"; - mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3 - &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3 + mbox-names = "tx0", "rx0", "gip3"; + mboxes = <&lsio_mu1 0 0 + &lsio_mu1 1 0 &lsio_mu1 3 3>; clock-controller { diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml index d3bca6088d12..4a1e3e3c0505 100644 --- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml @@ -75,7 +75,7 @@ examples: interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>; regulators { - LDO1 { + ldo1m { regulator-name = "vdd_ldo1"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1300000>; @@ -84,7 +84,7 @@ examples: // ... - BUCK1 { + buck8m { regulator-name = "vdd_mif"; regulator-min-microvolt = <450000>; regulator-max-microvolt = <1300000>; diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index ab8f32c440df..d50438b0fca8 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -76,7 +76,6 @@ properties: type: object pinctrl: - $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# description: The pinctrl node provides access to pinconfig and pincontrol functionality available in firmware. type: object @@ -104,6 +103,22 @@ properties: used to encrypt or decrypt the data with provided key and initialization vector. type: object + deprecated: true + +allOf: + - if: + properties: + compatible: + contains: + const: xlnx,zynqmp-firmware + then: + properties: + pinctrl: + $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# + else: + properties: + pinctrl: + $ref: /schemas/pinctrl/xlnx,versal-pinctrl.yaml# required: - compatible @@ -115,6 +130,7 @@ examples: #include <dt-bindings/power/xlnx-zynqmp-power.h> firmware { zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; #power-domain-cells = <1>; soc-nvmem { compatible = "xlnx,zynqmp-nvmem-fw"; @@ -162,6 +178,10 @@ examples: compatible = "xlnx,versal-fpga"; }; + pinctrl { + compatible = "xlnx,versal-pinctrl"; + }; + xlnx_aes: zynqmp-aes { compatible = "xlnx,zynqmp-aes"; }; diff --git a/Documentation/devicetree/bindings/goldfish/audio.txt b/Documentation/devicetree/bindings/goldfish/audio.txt deleted file mode 100644 index d043fda433ba..000000000000 --- a/Documentation/devicetree/bindings/goldfish/audio.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish Audio - -Android goldfish audio device generated by android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-audio" to match emulator -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - goldfish_audio@9030000 { - compatible = "google,goldfish-audio"; - reg = <0x9030000 0x100>; - interrupts = <0x4>; - }; diff --git a/Documentation/devicetree/bindings/goldfish/battery.txt b/Documentation/devicetree/bindings/goldfish/battery.txt deleted file mode 100644 index 4fb613933214..000000000000 --- a/Documentation/devicetree/bindings/goldfish/battery.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish Battery - -Android goldfish battery device generated by android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-battery" to match emulator -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - goldfish_battery@9020000 { - compatible = "google,goldfish-battery"; - reg = <0x9020000 0x1000>; - interrupts = <0x3>; - }; diff --git a/Documentation/devicetree/bindings/goldfish/events.txt b/Documentation/devicetree/bindings/goldfish/events.txt deleted file mode 100644 index 5babf46317a4..000000000000 --- a/Documentation/devicetree/bindings/goldfish/events.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish Events Keypad - -Android goldfish events keypad device generated by android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-events-keypad" to match emulator -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - goldfish-events@9040000 { - compatible = "google,goldfish-events-keypad"; - reg = <0x9040000 0x1000>; - interrupts = <0x5>; - }; diff --git a/Documentation/devicetree/bindings/goldfish/pipe.txt b/Documentation/devicetree/bindings/goldfish/pipe.txt deleted file mode 100644 index 5637ce701788..000000000000 --- a/Documentation/devicetree/bindings/goldfish/pipe.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish QEMU Pipe - -Android pipe virtual device generated by android emulator. - -Required properties: - -- compatible : should contain "google,android-pipe" to match emulator -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - android_pipe@a010000 { - compatible = "google,android-pipe"; - reg = <ff018000 0x2000>; - interrupts = <0x12>; - }; diff --git a/Documentation/devicetree/bindings/goldfish/tty.txt b/Documentation/devicetree/bindings/goldfish/tty.txt deleted file mode 100644 index 82648278da77..000000000000 --- a/Documentation/devicetree/bindings/goldfish/tty.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish TTY - -Android goldfish tty device generated by android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-tty" to match emulator -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - goldfish_tty@1f004000 { - compatible = "google,goldfish-tty"; - reg = <0x1f004000 0x1000>; - interrupts = <0xc>; - }; diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml index 1046f0331c09..974185e3478f 100644 --- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml +++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml @@ -10,7 +10,8 @@ maintainers: - Andrew Jeffery <andrew@aj.id.au> description: - This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC, + This SGPIO controller is for ASPEED AST2400, AST2500, AST2600 and AST2700 SoC, + AST2700 have two sgpio master both with 256 pins, AST2600 have two sgpio master one with 128 pins another one with 80 pins, AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial GPIO pins can be programmed to support the following options @@ -27,6 +28,7 @@ properties: - aspeed,ast2400-sgpio - aspeed,ast2500-sgpio - aspeed,ast2600-sgpiom + - aspeed,ast2700-sgpiom reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml b/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml new file mode 100644 index 000000000000..f49c05249ca7 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-line-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO line mux + +maintainers: + - Jonas Jelonek <jelonek.jonas@gmail.com> + +description: | + A GPIO controller to provide virtual GPIOs for a 1-to-many input-only mapping + backed by a single shared GPIO and a multiplexer. A simple illustrated + example is: + + +----- A + IN / + <-----o------- B + / |\ + | | +----- C + | | \ + | | +--- D + | | + M1 M0 + + MUX CONTROL + + M1 M0 IN + 0 0 A + 0 1 B + 1 0 C + 1 1 D + + This can be used in case a real GPIO is connected to multiple inputs and + controlled by a multiplexer, and another subsystem/driver does not work + directly with the multiplexer subsystem. + +properties: + compatible: + const: gpio-line-mux + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-mux-states: + description: Mux states corresponding to the virtual GPIOs. + $ref: /schemas/types.yaml#/definitions/uint32-array + + gpio-line-names: true + + mux-controls: + maxItems: 1 + description: + Phandle to the multiplexer to control access to the GPIOs. + + ngpios: false + + muxed-gpios: + maxItems: 1 + description: + GPIO which is the '1' in 1-to-many and is shared by the virtual GPIOs + and controlled via the mux. + +required: + - compatible + - gpio-controller + - gpio-line-mux-states + - mux-controls + - muxed-gpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/mux/mux.h> + + sfp_gpio_mux: mux-controller-1 { + compatible = "gpio-mux"; + mux-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, + <&gpio0 1 GPIO_ACTIVE_HIGH>; + #mux-control-cells = <0>; + idle-state = <MUX_IDLE_AS_IS>; + }; + + sfp1_gpio: sfp-gpio-1 { + compatible = "gpio-line-mux"; + gpio-controller; + #gpio-cells = <2>; + + mux-controls = <&sfp_gpio_mux>; + muxed-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; + + gpio-line-mux-states = <0>, <1>, <3>; + }; + + sfp1: sfp-p1 { + compatible = "sff,sfp"; + + i2c-bus = <&sfp1_i2c>; + los-gpios = <&sfp1_gpio 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sfp1_gpio 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios = <&sfp1_gpio 2 GPIO_ACTIVE_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml index ee5d5d25ae82..1b2d253b19c1 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml @@ -20,9 +20,10 @@ properties: compatible: enum: - brcm,bcm6345-gpio + - intel,ixp4xx-expansion-bus-mmio-gpio - ni,169445-nand-gpio + - opencores,gpio - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller - - intel,ixp4xx-expansion-bus-mmio-gpio big-endian: true diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml index 12134c737ad8..4f955f855e1a 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -74,6 +74,8 @@ properties: - ti,tca9538 - ti,tca9539 - ti,tca9554 + - ti,tcal6408 + - ti,tcal6416 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml index 2bd620a1099b..17748dd1015d 100644 --- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml @@ -86,6 +86,9 @@ properties: - nvidia,tegra234-gpio - nvidia,tegra234-gpio-aon - nvidia,tegra256-gpio + - nvidia,tegra264-gpio + - nvidia,tegra264-gpio-uphy + - nvidia,tegra264-gpio-aon reg-names: items: @@ -110,6 +113,10 @@ properties: ports, in the order the HW manual describes them. The number of entries required varies depending on compatible value. + wakeup-parent: + description: Phandle to the parent interrupt controller used for wake-up. On + Tegra, this typically references the PMC interrupt controller. + gpio-controller: true gpio-ranges: @@ -157,6 +164,8 @@ allOf: - nvidia,tegra194-gpio - nvidia,tegra234-gpio - nvidia,tegra256-gpio + - nvidia,tegra264-gpio + - nvidia,tegra264-gpio-uphy then: properties: interrupts: @@ -171,12 +180,25 @@ allOf: - nvidia,tegra186-gpio-aon - nvidia,tegra194-gpio-aon - nvidia,tegra234-gpio-aon + - nvidia,tegra264-gpio-aon then: properties: interrupts: minItems: 1 maxItems: 4 + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra264-gpio + - nvidia,tegra264-gpio-uphy + - nvidia,tegra264-gpio-aon + then: + required: + - wakeup-parent + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml index 83e0b2d14c9f..24d22d95665f 100644 --- a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml @@ -19,7 +19,9 @@ properties: pattern: "^gpio@[0-9a-f]+$" compatible: - const: spacemit,k1-gpio + enum: + - spacemit,k1-gpio + - spacemit,k3-gpio reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml index bee9faf1d3f8..8eccd4338a2b 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml @@ -51,6 +51,14 @@ properties: - stacks - const: stacks + nvmem-cells: + items: + - description: bitmask of functional shader cores + + nvmem-cell-names: + items: + - const: shader-present + mali-supply: true operating-points-v2: true @@ -108,6 +116,8 @@ allOf: properties: clocks: minItems: 3 + nvmem-cells: false + nvmem-cell-names: false power-domains: maxItems: 1 power-domain-names: false @@ -133,6 +143,8 @@ allOf: - const: core - const: stacks required: + - nvmem-cells + - nvmem-cell-names - power-domains examples: @@ -179,6 +191,8 @@ examples: <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>, <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "job", "mmu", "gpu"; + nvmem-cells = <&shader_present>; + nvmem-cell-names = "shader-present"; power-domains = <&gpufreq>; }; diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 86ef68985317..a1f54dbae3f3 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -40,6 +40,7 @@ properties: - const: img,img-rogue - items: - enum: + - ti,am62p-gpu - ti,j721s2-gpu - const: img,img-bxs-4-64 - const: img,img-rogue @@ -100,6 +101,7 @@ allOf: contains: enum: - ti,am62-gpu + - ti,am62p-gpu - ti,j721s2-gpu then: properties: diff --git a/Documentation/devicetree/bindings/hwmon/aspeed,ast2400-pwm-tacho.yaml b/Documentation/devicetree/bindings/hwmon/aspeed,ast2400-pwm-tacho.yaml new file mode 100644 index 000000000000..ca6e2d67ddbf --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/aspeed,ast2400-pwm-tacho.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/aspeed,ast2400-pwm-tacho.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED AST2400/AST2500 PWM and Fan Tacho controller + +maintainers: + - Joel Stanley <joel@jms.id.au> + - Andrew Jeffery <andrew@codeconstruct.com.au> + +description: > + The ASPEED PWM controller can support up to 8 PWM outputs. The ASPEED Fan + Tacho controller can support up to 16 Fan tachometer inputs. + + There can be up to 8 fans supported. Each fan can have 1 PWM output and + 1-2 Fan tach inputs. + +properties: + compatible: + enum: + - aspeed,ast2400-pwm-tacho + - aspeed,ast2500-pwm-tacho + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#cooling-cells': + const: 2 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + '^fan@[0-7]$': + description: Fan subnode + type: object + additionalProperties: false + + properties: + reg: + description: PWM source port index (0 = PWM A, ..., 7 = PWM H) + maximum: 7 + + cooling-levels: + description: PWM duty cycle values for cooling states + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 1 + maxItems: 16 # Should be enough + + aspeed,fan-tach-ch: + description: Fan tachometer input channel + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 1 + maxItems: 2 + items: + maximum: 15 + + required: + - reg + - aspeed,fan-tach-ch + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - clocks + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + + fan-controller@1e786000 { + compatible = "aspeed,ast2500-pwm-tacho"; + reg = <0x1e786000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + #cooling-cells = <2>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_PWM>; + + fan@0 { + reg = <0x00>; + cooling-levels = /bits/ 8 <125 151 177 203 229 255>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>; + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt deleted file mode 100644 index 8645cd3b867a..000000000000 --- a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt +++ /dev/null @@ -1,73 +0,0 @@ -ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver - -The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho -controller can support upto 16 Fan tachometer inputs. - -There can be upto 8 fans supported. Each fan can have one PWM output and -one/two Fan tach inputs. - -Required properties for pwm-tacho node: -- #address-cells : should be 1. - -- #size-cells : should be 1. - -- #cooling-cells: should be 2. - -- reg : address and length of the register set for the device. - -- pinctrl-names : a pinctrl state named "default" must be defined. - -- pinctrl-0 : phandle referencing pin configuration of the PWM ports. - -- compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and - "aspeed,ast2500-pwm-tacho" for AST2500. - -- clocks : phandle to clock provider with the clock number in the second cell - -- resets : phandle to reset controller with the reset number in the second cell - -fan subnode format: -=================== -Under fan subnode there can upto 8 child nodes, with each child node -representing a fan. If there are 8 fans each fan can have one PWM port and -one/two Fan tach inputs. -For PWM port can be configured cooling-levels to create cooling device. -Cooling device could be bound to a thermal zone for the thermal control. - -Required properties for each child node: -- reg : should specify PWM source port. - integer value in the range 0 to 7 with 0 indicating PWM port A and - 7 indicating PWM port H. - -- cooling-levels: PWM duty cycle values in a range from 0 to 255 - which correspond to thermal cooling states. - -- aspeed,fan-tach-ch : should specify the Fan tach input channel. - integer value in the range 0 through 15, with 0 indicating - Fan tach channel 0 and 15 indicating Fan tach channel 15. - At least one Fan tach input channel is required. - -Examples: - -pwm_tacho: pwmtachocontroller@1e786000 { - #address-cells = <1>; - #size-cells = <1>; - #cooling-cells = <2>; - reg = <0x1E786000 0x1000>; - compatible = "aspeed,ast2500-pwm-tacho"; - clocks = <&syscon ASPEED_CLK_APB>; - resets = <&syscon ASPEED_RESET_PWM>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; - - fan@0 { - reg = <0x00>; - cooling-levels = /bits/ 8 <125 151 177 203 229 255>; - aspeed,fan-tach-ch = /bits/ 8 <0x00>; - }; - - fan@1 { - reg = <0x01>; - aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>; - }; -}; diff --git a/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml new file mode 100644 index 000000000000..9406978f69ea --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp. + +maintainers: + - Luka Kovacic <luka.kovacic@sartura.hr> + +description: | + This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details + see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. + + The HWMON module is a sub-node of the MCU node in the Device Tree. + +properties: + compatible: + const: iei,wt61p803-puzzle-hwmon + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + '^fan-group@[0-1]$': + type: object + additionalProperties: false + + properties: + reg: + minimum: 0 + maximum: 1 + description: + Fan group ID + + '#cooling-cells': + const: 2 + + cooling-levels: + minItems: 1 + maxItems: 255 + description: + Cooling levels for the fans (PWM value mapping) + + required: + - reg + - '#cooling-cells' + - cooling-levels + +required: + - compatible + - '#address-cells' + - '#size-cells' + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml index 966b221b6caa..5803a1770cad 100644 --- a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -16,7 +16,6 @@ description: | properties: compatible: enum: - - kontron,sa67mcu-hwmon - kontron,sl28cpld-fan reg: diff --git a/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml b/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml index 51e8619dbf3c..611fcadb1e77 100644 --- a/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml +++ b/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml @@ -14,8 +14,12 @@ description: | properties: compatible: - enum: - - microchip,sparx5-temp + oneOf: + - const: microchip,sparx5-temp + - items: + - enum: + - microchip,lan9691-temp + - const: microchip,sparx5-temp reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml index 3d14d5fc96c5..7b38f2182ffa 100644 --- a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml +++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Sensirion SHTC1 Humidity and Temperature Sensor IC maintainers: - - Christopher Ruehl chris.ruehl@gtsys.com.hk + - Christopher Ruehl <chris.ruehl@gtsys.com.hk> description: | The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml index a6f9319e068d..9f6c9f6fa561 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml @@ -4,27 +4,32 @@ $id: http://devicetree.org/schemas/hwmon/ti,tmp108.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TMP108/P3T1085(NXP) temperature sensor +title: TMP108/P3T1035/P3T1085/P3T2030 temperature sensor maintainers: - Krzysztof Kozlowski <krzk@kernel.org> description: | - The TMP108/P3T1085(NXP) is a digital-output temperature sensor with a - dynamically-programmable limit window, and under- and overtemperature - alert functions. + The TMP108 or NXP P3T Family (P3T1035, P3T1085 and P3T2030) is a digital- + output temperature sensor with a dynamically-programmable limit window, + and under- and over-temperature alert functions. - P3T1085(NXP) support I3C. + NXP P3T Family (P3T1035, P3T1085 and P3T2030) supports I3C. Datasheets: https://www.ti.com/product/TMP108 https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf + https://www.nxp.com/docs/en/data-sheet/P3T1035XUK_P3T2030XUK.pdf properties: compatible: - enum: - - nxp,p3t1085 - - ti,tmp108 + oneOf: + - items: + - const: nxp,p3t2030 + - const: nxp,p3t1035 + - const: nxp,p3t1035 + - const: nxp,p3t1085 + - const: ti,tmp108 interrupts: items: diff --git a/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml b/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml index e61cdb5b16ef..c83674c3183b 100644 --- a/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml @@ -26,6 +26,7 @@ properties: - microchip,sam9x60-i2c - items: - enum: + - microchip,lan9691-i2c - microchip,sama7d65-i2c - microchip,sama7g5-i2c - microchip,sam9x7-i2c diff --git a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml index 2aa75b7add7b..daa70a8500e9 100644 --- a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml @@ -16,7 +16,8 @@ properties: - brcm,iproc-nic-i2c reg: - maxItems: 1 + minItems: 1 + maxItems: 2 clock-frequency: enum: [ 100000, 400000 ] @@ -41,8 +42,15 @@ allOf: contains: const: brcm,iproc-nic-i2c then: + properties: + reg: + minItems: 2 required: - brcm,ape-hsls-addr-mask + else: + properties: + reg: + maxItems: 1 unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml index 3562ce0c0f7e..ecd5783f001b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml @@ -54,6 +54,7 @@ properties: - enum: - mediatek,mt6878-i2c - mediatek,mt6991-i2c + - mediatek,mt8189-i2c - mediatek,mt8196-i2c - const: mediatek,mt8188-i2c - items: diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index a3fe1eea6aec..399a09409e07 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -28,6 +28,7 @@ properties: - enum: - qcom,kaanapali-cci - qcom,qcm2290-cci + - qcom,qcs8300-cci - qcom,sa8775p-cci - qcom,sc7280-cci - qcom,sc8280xp-cci @@ -133,6 +134,7 @@ allOf: enum: - qcom,kaanapali-cci - qcom,qcm2290-cci + - qcom,qcs8300-cci - qcom,sm8750-cci then: properties: diff --git a/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml b/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml new file mode 100644 index 000000000000..a204adfe57b3 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/silabs,cp2112.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CP2112 HID USB to SMBus/I2C Bridge + +maintainers: + - Danny Kaehn <danny.kaehn@plexus.com> + +description: + The CP2112 is a USB HID device which includes an integrated I2C controller + and 8 GPIO pins. Its GPIO pins can each be configured as inputs, open-drain + outputs, or push-pull outputs. + +properties: + compatible: + const: usb10c4,ea90 + + reg: + maxItems: 1 + description: The USB port number + + interrupt-controller: true + "#interrupt-cells": + const: 2 + + gpio-controller: true + "#gpio-cells": + const: 2 + + gpio-line-names: + minItems: 1 + maxItems: 8 + + i2c: + description: The SMBus/I2C controller node for the CP2112 + $ref: /schemas/i2c/i2c-controller.yaml# + unevaluatedProperties: false + + properties: + clock-frequency: + minimum: 10000 + default: 100000 + maximum: 400000 + +patternProperties: + "-hog(-[0-9]+)?$": + type: object + + required: + - gpio-hog + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + + usb { + #address-cells = <1>; + #size-cells = <0>; + + cp2112: device@1 { + compatible = "usb10c4,ea90"; + reg = <1>; + + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + #gpio-cells = <2>; + gpio-line-names = "CP2112_SDA", "CP2112_SCL", "TEST2", + "TEST3","TEST4", "TEST5", "TEST6"; + + fan-rst-hog { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "FAN_RST"; + }; + + i2c { + #address-cells = <1>; + #size-cells = <0>; + sda-gpios = <&cp2112 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&cp2112 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + temp@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml index b7220fff2235..5896fb120501 100644 --- a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml @@ -41,6 +41,9 @@ properties: default: 400000 maximum: 3300000 + resets: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml index 457bb0702ed9..64aaa0dfa8fa 100644 --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml @@ -127,6 +127,9 @@ properties: wakeup-source: true + power-domains: + maxItems: 1 + access-controllers: minItems: 1 maxItems: 2 diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml index 54e7349317b7..e22d518135f2 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml @@ -37,7 +37,15 @@ properties: maximum: 102040816 spi-rx-bus-width: - enum: [1, 2, 4] + maxItems: 2 + # all lanes must have the same width + oneOf: + - contains: + const: 1 + - contains: + const: 2 + - contains: + const: 4 vdd-5v-supply: true vdd-1v8-supply: true @@ -88,6 +96,18 @@ oneOf: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + enum: + - adi,ad4030-24 + - adi,ad4032-24 + then: + properties: + spi-rx-bus-width: + maxItems: 1 + examples: - | #include <dt-bindings/gpio/gpio.h> @@ -108,3 +128,23 @@ examples: reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; }; }; + - | + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4630-24"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-rx-bus-width = <4>, <4>; + vdd-5v-supply = <&supply_5V>; + vdd-1v8-supply = <&supply_1_8V>; + vio-supply = <&supply_1_8V>; + ref-supply = <&supply_5V>; + cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4062.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4062.yaml new file mode 100644 index 000000000000..eeb148081663 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4062.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4062.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4062 ADC family device driver + +maintainers: + - Jorge Marques <jorge.marques@analog.com> + +description: | + Analog Devices AD4062 Single Channel Precision SAR ADC family + + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4060.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4062.pdf + +properties: + compatible: + enum: + - adi,ad4060 + - adi,ad4062 + + reg: + maxItems: 1 + + interrupts: + description: + Two pins are available that can be configured as either a general purpose + digital output, device enable signal (used to synchronise other parts of + the signal chain with ADC sampling), device ready (GP1 only) or various + interrupt signals. If intended for use as a GPIO or device enable, will not + present here. + minItems: 1 + items: + - description: + GP0 pin, cannot be configured as DEV_RDY. + - description: + GP1 pin, can be configured to any setting. + + interrupt-names: + minItems: 1 + items: + - const: gp0 + - const: gp1 + + gpio-controller: + description: + Marks the device node as a GPIO controller. GPs not listed as interrupts + are exposed as a GPO. + + '#gpio-cells': + const: 2 + description: + The first cell is the GPIO number and the second cell specifies + GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. + + vdd-supply: + description: Analog power supply. + + vio-supply: + description: Digital interface logic power supply. + + ref-supply: + description: + Reference voltage to set the ADC full-scale range. If not present, + vdd-supply is used as the reference voltage. + +required: + - compatible + - reg + - vdd-supply + - vio-supply + +allOf: + - $ref: /schemas/i3c/i3c.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i3c { + #address-cells = <3>; + #size-cells = <0>; + + adc@0,2ee007c0000 { + reg = <0x0 0x2ee 0x7c0000>; + vdd-supply = <&vdd>; + vio-supply = <&vio>; + ref-supply = <&ref>; + + interrupt-parent = <&gpio>; + interrupts = <0 0 IRQ_TYPE_EDGE_RISING>, + <0 1 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "gp0", "gp1"; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i3c { + #address-cells = <3>; + #size-cells = <0>; + + adc@0,2ee007c0000 { + reg = <0x0 0x2ee 0x7c0000>; + vdd-supply = <&vdd>; + vio-supply = <&vio>; + ref-supply = <&ref>; + + gpio-controller; + #gpio-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml new file mode 100644 index 000000000000..ea6d7e026419 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml @@ -0,0 +1,191 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4134.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4134 ADC + +maintainers: + - Marcelo Schmitt <marcelo.schmitt@analog.com> + +description: | + The AD4134 is a quad channel, low noise, simultaneous sampling, precision + analog-to-digital converter (ADC). + Specifications can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4134.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - adi,ad4134 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 50000000 + + avdd5-supply: + description: A 5V supply that powers the chip's analog circuitry. + + dvdd5-supply: + description: A 5V supply that powers the chip's digital circuitry. + + iovdd-supply: + description: + A 1.8V supply that sets the logic levels for the digital interface pins. + + refin-supply: + description: + A 4.096V or 5V supply that serves as reference for ADC conversions. + + avdd1v8-supply: + description: A 1.8V supply used by the analog circuitry. + + dvdd1v8-supply: + description: A 1.8V supply used by the digital circuitry. + + clkvdd-supply: + description: A 1.8V supply for the chip's clock management circuit. + + ldoin-supply: + description: + A 2.6V to 5.5V supply that generates 1.8V for AVDD1V8, DVDD1V8, and CLKVDD + pins. + + clocks: + maxItems: 1 + description: + Required external clock source. Can specify either a crystal or CMOS clock + source. If an external crystal is set, connect the CLKSEL pin to IOVDD. + Otherwise, connect the CLKSEL pin to IOGND and the external CMOS clock + signal to the XTAL2/CLKIN pin. + + clock-names: + enum: + - xtal + - clkin + default: clkin + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + + regulators: + type: object + description: + list of regulators provided by this controller. + + properties: + vcm-output: + $ref: /schemas/regulator/regulator.yaml# + type: object + unevaluatedProperties: false + + additionalProperties: false + + reset-gpios: + maxItems: 1 + + powerdown-gpios: + description: + Active low GPIO connected to the /PDN pin. Forces the device into full + power-down mode when brought low. Pull this input to IOVDD for normal + operation. + maxItems: 1 + + odr-gpios: + description: + GPIO connected to ODR pin. Used to sample ADC data in minimum I/O mode. + maxItems: 1 + + adi,asrc-mode: + $ref: /schemas/types.yaml#/definitions/string + description: + Asynchronous Sample Rate Converter (ASRC) operation mode control input. + Describes whether the MODE pin is set to a high level (for master mode + operation) or to a low level (for slave mode operation). + enum: [ high, low ] + default: low + + adi,dclkio: + description: + DCLK pin I/O direction control for when the device operates in Pin Control + Slave Mode or in SPI Control Mode. Describes if DEC0/DCLKIO pin is at a + high level (which configures DCLK as an output) or to set to a low level + (configuring DCLK for input). + enum: [ out, in ] + default: in + + adi,dclkmode: + description: + DCLK mode control for when the device operates in Pin Control Slave Mode + or in SPI Control Mode. Describes whether the DEC1/DCLKMODE pin is set to + a high level (configuring the DCLK to operate in free running mode) or + to a low level (to configure DCLK to operate in gated mode). + enum: [ free-running, gated ] + default: gated + +required: + - compatible + - reg + - avdd5-supply + - dvdd5-supply + - iovdd-supply + - refin-supply + - clocks + - clock-names + +oneOf: + - required: + - ldoin-supply + - required: + - avdd1v8-supply + - dvdd1v8-supply + - clkvdd-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4134"; + reg = <0>; + + spi-max-frequency = <1000000>; + + reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>; + odr-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>; + powerdown-gpios = <&gpio0 88 GPIO_ACTIVE_LOW>; + + clocks = <&sys_clk>; + clock-names = "clkin"; + + avdd5-supply = <&avdd5>; + dvdd5-supply = <&dvdd5>; + iovdd-supply = <&iovdd>; + refin-supply = <&refin>; + avdd1v8-supply = <&avdd1v8>; + dvdd1v8-supply = <&dvdd1v8>; + clkvdd-supply = <&clkvdd>; + + regulators { + vcm_reg: vcm-output { + regulator-name = "ad4134-vcm"; + }; + }; + + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml index cbde7a0505d2..ae8d0b5f328b 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml @@ -38,8 +38,9 @@ properties: spi-cpha: true spi-rx-bus-width: - minimum: 1 - maximum: 4 + items: + minimum: 1 + maximum: 4 avdd-supply: description: Analog power supply. diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml index c06d0fc791d3..dfa2d7fa9fb3 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml @@ -4,18 +4,26 @@ $id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AD7768-1 ADC device driver +title: Analog Devices AD7768-1 ADC family maintainers: - Michael Hennerich <michael.hennerich@analog.com> description: | - Datasheet at: - https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf + Analog Devices AD7768-1 24-Bit Single Channel Low Power sigma-delta ADC family + + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7767-1.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7768-1.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7769-1.pdf properties: compatible: - const: adi,ad7768-1 + enum: + - adi,ad7768-1 + - adi,adaq7767-1 + - adi,adaq7768-1 + - adi,adaq7769-1 reg: maxItems: 1 @@ -58,6 +66,25 @@ properties: description: ADC reference voltage supply + adi,aaf-gain-bp: + description: | + Specifies the gain applied by the Analog Anti-Aliasing Filter (AAF) + to the ADC input in basis points (one hundredth of a percent). + The hardware gain is determined by which input pin(s) the signal goes + through into the AAF. The possible connections are: + * For the ADAQ7767-1: Input connected to IN1±, IN2± or IN3±. + * For the ADAQ7769-1: OUT_PGA pin connected to IN1_AAF+, IN2_AAF+, + or IN3_AAF+. + enum: [1430, 3640, 10000] + default: 10000 + + pga-gpios: + description: + GAIN 0, GAIN1 and GAIN2 pins for gain selection. For devices that have + PGA configuration input pins, pga-gpios must be defined. + minItems: 3 + maxItems: 3 + adi,sync-in-gpios: maxItems: 1 description: @@ -147,6 +174,35 @@ patternProperties: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# + # AAF Gain property only applies to ADAQ7767-1 and ADAQ7769-1 devices + - if: + properties: + compatible: + contains: + enum: + - adi,adaq7767-1 + - adi,adaq7769-1 + then: + required: + - adi,aaf-gain-bp + else: + properties: + adi,aaf-gain-bp: false + + - if: + properties: + compatible: + contains: + enum: + - adi,adaq7768-1 + - adi,adaq7769-1 + then: + required: + - pga-gpios + else: + properties: + pga-gpios: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml index 2606c0c5dfc6..5acfb0eef4d5 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml @@ -18,6 +18,7 @@ description: | All the parts support the register map described by Application Note AN-877 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9211.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf @@ -25,6 +26,7 @@ description: | properties: compatible: enum: + - adi,ad9211 - adi,ad9265 - adi,ad9434 - adi,ad9467 diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml index 509bfb1007c4..249101b55cf4 100644 --- a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml @@ -44,6 +44,9 @@ properties: Input clock used to derive the sample clock. Expected to be the SoC's APB clock. + interrupts: + maxItems: 1 + resets: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml new file mode 100644 index 000000000000..ec258f224df8 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,s32g2-sar-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Successive Approximation ADC + +description: + The NXP SAR ADC provides fast and accurate analog-to-digital + conversion using the Successive Approximation Register (SAR) method. + It has 12-bit resolution with 8 input channels. Conversions can be + launched in software or using hardware triggers. It supports + continuous and one-shot modes with separate registers. + +maintainers: + - Daniel Lezcano <daniel.lezcano@kernel.org> + +properties: + compatible: + oneOf: + - const: nxp,s32g2-sar-adc + - items: + - const: nxp,s32g3-sar-adc + - const: nxp,s32g2-sar-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + dmas: + maxItems: 1 + + dma-names: + const: rx + +required: + - compatible + - reg + - interrupts + - clocks + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + adc@401f8000 { + compatible = "nxp,s32g2-sar-adc"; + reg = <0x401f8000 0x1000>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 0x41>; + dmas = <&edma0 0 32>; + dma-names = "rx"; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1018.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1018.yaml new file mode 100644 index 000000000000..81ee024be2e3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1018.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads1018.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI ADS1018/ADS1118 SPI analog to digital converter + +maintainers: + - Kurt Borja <kuurtb@gmail.com> + +description: | + The ADS1018/ADS1118 is a precision, low-power, 12-bit/16-bit, analog to + digital converter (ADC). It integrates a programmable gain amplifier (PGA), + internal voltage reference, oscillator and high-accuracy temperature sensor. + + Datasheets: + - ADS1018: https://www.ti.com/lit/ds/symlink/ads1018.pdf + - ADS1118: https://www.ti.com/lit/ds/symlink/ads1118.pdf + +properties: + compatible: + enum: + - ti,ads1018 + - ti,ads1118 + + reg: + maxItems: 1 + + vdd-supply: true + + spi-max-frequency: + maximum: 4000000 + + spi-cpha: true + + interrupts: + description: DOUT/DRDY (Data Out/Data Ready) line. + maxItems: 1 + + drdy-gpios: + description: + Extra GPIO line connected to DOUT/DRDY (Data Out/Data Ready). This allows + distinguishing between interrupts triggered by the data-ready signal and + interrupts triggered by an SPI transfer. + maxItems: 1 + + '#io-channel-cells': + const: 1 + +required: + - compatible + - reg + - vdd-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads1118"; + reg = <0>; + + spi-max-frequency = <4000000>; + spi-cpha; + + vdd-supply = <&vdd_3v3_reg>; + + interrupts-extended = <&gpio 14 IRQ_TYPE_EDGE_FALLING>; + drdy-gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads131m02.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads131m02.yaml new file mode 100644 index 000000000000..5d52bb7dd5d4 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads131m02.yaml @@ -0,0 +1,208 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads131m02.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS131M0x 2-, 3-, 4-, 6- and 8-Channel ADCs + +maintainers: + - Oleksij Rempel <o.rempel@pengutronix.de> + +description: | + The ADS131M0x are a family of multichannel, simultaneous sampling, + 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a + built-in programmable gain amplifier (PGA) and internal reference. + Communication with the ADC chip is via SPI. + + Datasheets: + - ADS131M02: https://www.ti.com/lit/ds/symlink/ads131m02.pdf + - ADS131M03: https://www.ti.com/lit/ds/symlink/ads131m03.pdf + - ADS131M04: https://www.ti.com/lit/ds/symlink/ads131m04.pdf + - ADS131M06: https://www.ti.com/lit/ds/symlink/ads131m06.pdf + - ADS131M08: https://www.ti.com/lit/ds/symlink/ads131m08.pdf + +properties: + compatible: + enum: + - ti,ads131m02 + - ti,ads131m03 + - ti,ads131m04 + - ti,ads131m06 + - ti,ads131m08 + + reg: + description: SPI chip select number. + + clocks: + description: + Phandle to the external clock source required by the ADC's CLKIN pin. + The datasheet recommends specific frequencies based on the desired power + mode (e.g., 8.192 MHz for High-Resolution mode). + maxItems: 1 + + avdd-supply: + description: Analog power supply (AVDD). + + dvdd-supply: + description: Digital power supply (DVDD). + + interrupts: + description: DRDY (Data Ready) output signal. + maxItems: 1 + + reset-gpios: + description: Optional RESET signal. + maxItems: 1 + + clock-names: + description: + Indicates if a crystal oscillator (XTAL) or CMOS signal is connected + (CLKIN). Note that XTAL mode is only supported on ADS131M06 and ADS131M08. + enum: [xtal, clkin] + + refin-supply: + description: Optional external reference supply (REFIN). + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - avdd-supply + - dvdd-supply + +patternProperties: + "^channel@[0-7]$": + type: object + $ref: /schemas/iio/adc/adc.yaml# + description: Properties for a single ADC channel. + + properties: + reg: + description: The channel index (0-7). + minimum: 0 + maximum: 7 # Max channels on ADS131M08 + + label: true + + required: + - reg + + unevaluatedProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + + - if: + # 20-pin devices: M02, M03, M04 + # These do not support XTAL or REFIN. + properties: + compatible: + enum: + - ti,ads131m02 + - ti,ads131m03 + - ti,ads131m04 + then: + properties: + clock-names: + const: clkin + refin-supply: false + + - if: + # ADS131M02: 2 channels max (0-1) + properties: + compatible: + contains: + const: ti,ads131m02 + then: + patternProperties: + "^channel@[0-1]$": + properties: + reg: + maximum: 1 + "^channel@[2-7]$": false + + - if: + # ADS131M03: 3 channels max (0-2) + properties: + compatible: + contains: + const: ti,ads131m03 + then: + patternProperties: + "^channel@[0-2]$": + properties: + reg: + maximum: 2 + "^channel@[3-7]$": false + + - if: + # ADS131M04: 4 channels max (0-3) + properties: + compatible: + contains: + const: ti,ads131m04 + then: + patternProperties: + "^channel@[0-3]$": + properties: + reg: + maximum: 3 + "^channel@[4-7]$": false + + - if: + # ADS131M06: 6 channels max (0-5) + properties: + compatible: + contains: + const: ti,ads131m06 + then: + patternProperties: + "^channel@[0-5]$": + properties: + reg: + maximum: 5 + "^channel@[6-7]$": false + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32mp1-clks.h> + + spi1 { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads131m02"; + reg = <0>; + spi-max-frequency = <8000000>; + + clocks = <&rcc CK_MCO2>; + clock-names = "clkin"; + + avdd-supply = <&vdd_ana>; + dvdd-supply = <&vdd_dig>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + label = "input_voltage"; + }; + + channel@1 { + reg = <1>; + label = "input_current"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,adl8113.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,adl8113.yaml new file mode 100644 index 000000000000..6b8491d18139 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,adl8113.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/amplifiers/adi,adl8113.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADL8113 Low Noise Amplifier with integrated bypass switches + +maintainers: + - Antoniu Miclaus <antoniu.miclaus@analog.com> + +description: | + The ADL8113 is a 10MHz to 12GHz Low Noise Amplifier with integrated bypass + switches controlled by two GPIO pins (VA and VB). The device supports four + operation modes: + - Internal Amplifier: VA=0, VB=0 - Signal passes through the internal LNA + - Internal Bypass: VA=1, VB=1 - Signal bypasses through internal path + - External Bypass A: VA=0, VB=1 - Signal routes from RFIN to OUT_A and from IN_A to RFOUT + - External Bypass B: VA=1, VB=0 - Signal routes from RFIN to OUT_B and from IN_B to RFOUT + + https://www.analog.com/en/products/adl8113.html + +properties: + compatible: + const: adi,adl8113 + + vdd1-supply: true + + vdd2-supply: true + + vss2-supply: true + + ctrl-gpios: + items: + - description: VA control pin + - description: VB control pin + + adi,external-bypass-a-gain-db: + description: + Gain in dB of external amplifier connected to bypass path A (OUT_A/IN_A). + When specified, this gain value becomes selectable via the hardwaregain + attribute and automatically routes through the external A path. + + adi,external-bypass-b-gain-db: + description: + Gain in dB of external amplifier connected to bypass path B (OUT_B/IN_B). + When specified, this gain value becomes selectable via the hardwaregain + attribute and automatically routes through the external B path. + +required: + - compatible + - ctrl-gpios + - vdd1-supply + - vdd2-supply + - vss2-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + /* Basic configuration with only internal paths */ + amplifier { + compatible = "adi,adl8113"; + ctrl-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>, + <&gpio 23 GPIO_ACTIVE_HIGH>; + vdd1-supply = <&vdd1_5v>; + vdd2-supply = <&vdd2_3v3>; + vss2-supply = <&vss2_neg>; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + + /* Configuration with external bypass amplifiers */ + amplifier { + compatible = "adi,adl8113"; + ctrl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>, + <&gpio 25 GPIO_ACTIVE_HIGH>; + vdd1-supply = <&vdd1_5v>; + vdd2-supply = <&vdd2_3v3>; + vss2-supply = <&vss2_neg>; + adi,external-bypass-a-gain-db = <20>; /* 20dB external amp on path A */ + adi,external-bypass-b-gain-db = <6>; /* 6dB external amp on path B */ + }; +... diff --git a/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml b/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml new file mode 100644 index 000000000000..93d95f6b4c08 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,max22007.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX22007 DAC + +maintainers: + - Janani Sunil <janani.sunil@analog.com> + +description: + The MAX22007 is a quad-channel, 12-bit digital-to-analog converter (DAC) + with integrated precision output amplifiers and current output capability. + Each channel can be independently configured for voltage or current output. + Datasheet available at https://www.analog.com/en/products/max22007.html + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: adi,max22007 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 500000 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + vdd-supply: + description: Low-Voltage Power Supply from +2.7V to +5.5V. + + hvdd-supply: + description: + Positive High-Voltage Power Supply from +8V to (HVSS +24V) for + the Output Channels. + + hvss-supply: + description: + Optional Negative High-Voltage Power Supply from -2V to 0V for the Output + Channels. For most applications HVSS can be connected to GND (0V), but for + applications requiring output down to true 0V or 0mA, connect to a -2V supply. + + reset-gpios: + maxItems: 1 + description: + Active low GPIO. + +patternProperties: + "^channel@[0-3]$": + $ref: /schemas/iio/dac/dac.yaml# + type: object + description: + Represents the external channels which are connected to the DAC. + + properties: + reg: + description: Channel number + items: + minimum: 0 + maximum: 3 + + adi,ch-func: + description: + Channel output type. Use CH_FUNC_VOLTAGE_OUTPUT for voltage + output or CH_FUNC_CURRENT_OUTPUT for current output. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2] + + required: + - reg + - adi,ch-func + + unevaluatedProperties: false + +required: + - compatible + - reg + - vdd-supply + - hvdd-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/iio/addac/adi,ad74413r.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "adi,max22007"; + reg = <0>; + spi-max-frequency = <500000>; + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + vdd-supply = <&vdd_reg>; + hvdd-supply = <&hvdd_reg>; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + adi,ch-func = <CH_FUNC_VOLTAGE_OUTPUT>; + }; + + channel@1 { + reg = <1>; + adi,ch-func = <CH_FUNC_CURRENT_OUTPUT>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml new file mode 100644 index 000000000000..d2466aa6bda2 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -0,0 +1,302 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Families + +maintainers: + - Ariana Lazar <ariana.lazar@microchip.com> + +description: | + Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, + MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + + +------------+--------------+-------------+-------------+------------+ + | Device | Resolution | Channels | Vref number | Memory | + |------------|--------------|-------------|-------------|------------| + | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | + | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | + | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | + |------------|--------------|-------------|-------------|------------| + | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | + | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | + | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | + |------------|--------------|-------------|-------------|------------| + | MCP47FVB01 | 8-bit | 1 | 1 | RAM | + | MCP47FVB11 | 10-bit | 1 | 1 | RAM | + | MCP47FVB21 | 12-bit | 1 | 1 | RAM | + |------------|--------------|-------------|-------------|------------| + | MCP47FVB02 | 8-bit | 2 | 1 | RAM | + | MCP47FVB12 | 10-bit | 2 | 1 | RAM | + | MCP47FVB22 | 12-bit | 2 | 1 | RAM | + |------------|--------------|-------------|-------------|------------| + | MCP47FVB04 | 8-bit | 4 | 2 | RAM | + | MCP47FVB14 | 10-bit | 4 | 2 | RAM | + | MCP47FVB24 | 12-bit | 4 | 2 | RAM | + |------------|--------------|-------------|-------------|------------| + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | + |------------|--------------|-------------|-------------|------------| + | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | + | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | + | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | + |------------|--------------|-------------|-------------|------------| + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | + +------------+--------------+-------------+-------------+------------+ + +properties: + compatible: + enum: + - microchip,mcp47feb01 + - microchip,mcp47feb11 + - microchip,mcp47feb21 + - microchip,mcp47feb02 + - microchip,mcp47feb12 + - microchip,mcp47feb22 + - microchip,mcp47fvb01 + - microchip,mcp47fvb11 + - microchip,mcp47fvb21 + - microchip,mcp47fvb02 + - microchip,mcp47fvb12 + - microchip,mcp47fvb22 + - microchip,mcp47fvb04 + - microchip,mcp47fvb14 + - microchip,mcp47fvb24 + - microchip,mcp47fvb08 + - microchip,mcp47fvb18 + - microchip,mcp47fvb28 + - microchip,mcp47feb04 + - microchip,mcp47feb14 + - microchip,mcp47feb24 + - microchip,mcp47feb08 + - microchip,mcp47feb18 + - microchip,mcp47feb28 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + vdd-supply: + description: + Provides power to the chip and it could be used as reference voltage. The + voltage is used to calculate scale. For parts without EEPROM at powerup + this will be the selected as voltage reference. + + vref-supply: + description: | + Vref pin (it could be found as Vref0 into the datasheet) may be used as a + voltage reference when this supply is specified. The internal reference + will be taken into account for voltage reference besides VDD if this supply + does not exist. + + This supply will be voltage reference for the following outputs: + - for single-channel device: Vout0; + - for dual-channel device: Vout0, Vout1; + - for quad-channel device: Vout0, Vout2; + - for octal-channel device: Vout0, Vout2, Vout6, Vout8; + + vref1-supply: + description: | + Vref1 pin may be used as a voltage reference when this supply is specified. + The internal reference will be taken into account for voltage reference + beside VDD if this supply does not exist. + + This supply will be voltage reference for the following outputs: + - for quad-channel device: Vout1, Vout3; + - for octal-channel device: Vout1, Vout3, Vout5, Vout7; + + lat-gpios: + description: + LAT pin to be used as a hardware trigger to synchronously update the DAC + channels. The pin is active Low. It could be also found as LAT0 in + datasheet. + maxItems: 1 + + lat1-gpios: + description: + LAT1 pin to be used as a hardware trigger to synchronously update the odd + DAC channels on devices with 4 and 8 channels. The pin is active Low. + maxItems: 1 + + microchip,vref-buffered: + type: boolean + description: + Enable buffering of the external Vref/Vref0 pin in cases where the + external reference voltage does not have sufficient current capability in + order not to drop it’s voltage when connected to the internal resistor + ladder circuit. + + microchip,vref1-buffered: + type: boolean + description: + Enable buffering of the external Vref1 pin in cases where the external + reference voltage does not have sufficient current capability in order not + to drop it’s voltage when connected to the internal resistor ladder + circuit. + +patternProperties: + "^channel@[0-7]$": + $ref: dac.yaml + type: object + description: Voltage output channel. + + properties: + reg: + description: The channel number. + minItems: 1 + maxItems: 8 + + label: + description: Unique name to identify which channel this is. + + required: + - reg + + unevaluatedProperties: false + +required: + - compatible + - reg + - vdd-supply + +allOf: + - if: + properties: + compatible: + contains: + enum: + - microchip,mcp47feb01 + - microchip,mcp47feb11 + - microchip,mcp47feb21 + - microchip,mcp47fvb01 + - microchip,mcp47fvb11 + - microchip,mcp47fvb21 + then: + properties: + lat1-gpios: false + vref1-supply: false + microchip,vref1-buffered: false + channel@0: + properties: + reg: + const: 0 + patternProperties: + "^channel@[1-7]$": false + - if: + properties: + compatible: + contains: + enum: + - microchip,mcp47feb02 + - microchip,mcp47feb12 + - microchip,mcp47feb22 + - microchip,mcp47fvb02 + - microchip,mcp47fvb12 + - microchip,mcp47fvb22 + then: + properties: + lat1-gpios: false + vref1-supply: false + microchip,vref1-buffered: false + patternProperties: + "^channel@[0-1]$": + properties: + reg: + enum: [0, 1] + "^channel@[2-7]$": false + - if: + properties: + compatible: + contains: + enum: + - microchip,mcp47fvb04 + - microchip,mcp47fvb14 + - microchip,mcp47fvb24 + - microchip,mcp47feb04 + - microchip,mcp47feb14 + - microchip,mcp47feb24 + then: + patternProperties: + "^channel@[0-3]$": + properties: + reg: + enum: [0, 1, 2, 3] + "^channel@[4-7]$": false + - if: + properties: + compatible: + contains: + enum: + - microchip,mcp47fvb08 + - microchip,mcp47fvb18 + - microchip,mcp47fvb28 + - microchip,mcp47feb08 + - microchip,mcp47feb18 + - microchip,mcp47feb28 + then: + patternProperties: + "^channel@[0-7]$": + properties: + reg: + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - if: + not: + required: + - vref-supply + then: + properties: + microchip,vref-buffered: false + - if: + not: + required: + - vref1-supply + then: + properties: + microchip,vref1-buffered: false + +additionalProperties: false + +examples: + - | + i2c { + + #address-cells = <1>; + #size-cells = <0>; + dac@0 { + compatible = "microchip,mcp47feb02"; + reg = <0>; + vdd-supply = <&vdac_vdd>; + vref-supply = <&vref_reg>; + + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + label = "Adjustable_voltage_ch0"; + }; + + channel@1 { + reg = <0x1>; + label = "Adjustable_voltage_ch1"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml index 5f950ee9aec7..be69b9c68e74 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml @@ -40,6 +40,12 @@ properties: items: - const: ref_in + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + chip-enable-gpios: description: GPIO that controls the Chip Enable Pin. @@ -97,6 +103,8 @@ examples: spi-max-frequency = <10000000>; clocks = <&adf4377_ref_in>; clock-names = "ref_in"; + #clock-cells = <0>; + clock-output-names = "adf4377"; }; }; ... diff --git a/Documentation/devicetree/bindings/iio/pressure/honeywell,abp2030pa.yaml b/Documentation/devicetree/bindings/iio/pressure/honeywell,abp2030pa.yaml new file mode 100644 index 000000000000..e82897ffac3b --- /dev/null +++ b/Documentation/devicetree/bindings/iio/pressure/honeywell,abp2030pa.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/honeywell,abp2030pa.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Honeywell abp2030pa pressure sensor + +maintainers: + - Petre Rodan <petre.rodan@subdimension.ro> + +description: | + Honeywell pressure sensor of model abp2030pa. + + This sensor has an I2C and SPI interface. + + There are many models with different pressure ranges available. The vendor + calls them "ABP2 series". All of them have an identical programming model and + differ in the pressure range and measurement unit. + + To support different models one needs to specify its pressure triplet. + + For custom silicon chips not covered by the Honeywell ABP2 series datasheet, + the pressure values can be specified manually via honeywell,pmin-pascal and + honeywell,pmax-pascal. + + Specifications about the devices can be found at: + https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/basic-abp2-series/documents/sps-siot-abp2-series-datasheet-32350268-en.pdf + +properties: + compatible: + const: honeywell,abp2030pa + + reg: + maxItems: 1 + + interrupts: + description: + Optional interrupt for indicating end of conversion. + SPI variants of ABP2 chips do not provide this feature. + maxItems: 1 + + honeywell,pressure-triplet: + description: | + Case-sensitive five character string that defines pressure range, unit + and type as part of the device nomenclature. In the unlikely case of a + custom chip, unset and provide pmin-pascal and pmax-pascal instead. + enum: [001BA, 1.6BA, 2.5BA, 004BA, 006BA, 008BA, 010BA, 012BA, 001BD, + 1.6BD, 2.5BD, 004BD, 001BG, 1.6BG, 2.5BG, 004BG, 006BG, 008BG, + 010BG, 012BG, 001GG, 1.2GG, 100KA, 160KA, 250KA, 001KD, 1.6KD, + 2.5KD, 004KD, 006KD, 010KD, 016KD, 025KD, 040KD, 060KD, 100KD, + 160KD, 250KD, 400KD, 001KG, 1.6KG, 2.5KG, 004KG, 006KG, 010KG, + 016KG, 025KG, 040KG, 060KG, 100KG, 160KG, 250KG, 400KG, 600KG, + 800KG, 250LD, 600LD, 600LG, 2.5MD, 006MD, 010MD, 016MD, 025MD, + 040MD, 060MD, 100MD, 160MD, 250MD, 400MD, 600MD, 006MG, 010MG, + 016MG, 025MG, 040MG, 060MG, 100MG, 160MG, 250MG, 400MG, 600MG, + 001ND, 002ND, 004ND, 005ND, 010ND, 020ND, 030ND, 002NG, 004NG, + 005NG, 010NG, 020NG, 030NG, 015PA, 030PA, 060PA, 100PA, 150PA, + 175PA, 001PD, 005PD, 015PD, 030PD, 060PD, 001PG, 005PG, 015PG, + 030PG, 060PG, 100PG, 150PG, 175PG] + $ref: /schemas/types.yaml#/definitions/string + + honeywell,pmin-pascal: + description: + Minimum pressure value the sensor can measure in pascal. + + honeywell,pmax-pascal: + description: + Maximum pressure value the sensor can measure in pascal. + + spi-max-frequency: + maximum: 800000 + + vdd-supply: true + +required: + - compatible + - reg + - vdd-supply + +oneOf: + - required: + - honeywell,pressure-triplet + - required: + - honeywell,pmin-pascal + - honeywell,pmax-pascal + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml + - if: + required: + - honeywell,pressure-triplet + then: + properties: + honeywell,pmin-pascal: false + honeywell,pmax-pascal: false + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pressure@18 { + compatible = "honeywell,abp2030pa"; + reg = <0x18>; + interrupt-parent = <&gpio3>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>; + + honeywell,pressure-triplet = "001BA"; + vdd-supply = <&vcc_3v3>; + }; + }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + pressure@0 { + compatible = "honeywell,abp2030pa"; + reg = <0>; + spi-max-frequency = <800000>; + + honeywell,pressure-triplet = "001PD"; + vdd-supply = <&vcc_3v3>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/proximity/rfdigital,rfd77402.yaml b/Documentation/devicetree/bindings/iio/proximity/rfdigital,rfd77402.yaml new file mode 100644 index 000000000000..1ef6326b209e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/rfdigital,rfd77402.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/rfdigital,rfd77402.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RF Digital RFD77402 ToF sensor + +maintainers: + - Shrikant Raskar <raskar.shree97@gmail.com> + +description: + The RF Digital RFD77402 is a Time-of-Flight (ToF) proximity and distance + sensor providing up to 200 mm range measurement over an I2C interface. + +properties: + compatible: + const: rfdigital,rfd77402 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: + Interrupt asserted when a new distance measurement is available. + + vdd-supply: + description: Regulator that provides power to the sensor. + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + proximity@4c { + compatible = "rfdigital,rfd77402"; + reg = <0x4c>; + vdd-supply = <&vdd_3v3>; + interrupt-parent = <&gpio>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/input/focaltech,ft8112.yaml b/Documentation/devicetree/bindings/input/focaltech,ft8112.yaml new file mode 100644 index 000000000000..197f30b14d45 --- /dev/null +++ b/Documentation/devicetree/bindings/input/focaltech,ft8112.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/focaltech,ft8112.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FocalTech FT8112 touchscreen controller + +maintainers: + - Daniel Peng <Daniel_Peng@pegatron.corp-partner.google.com> + +description: + Supports the FocalTech FT8112 touchscreen controller. + This touchscreen controller uses the i2c-hid protocol with a reset GPIO. + +allOf: + - $ref: /schemas/input/touchscreen/touchscreen.yaml# + +properties: + compatible: + enum: + - focaltech,ft8112 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + panel: true + + reset-gpios: + maxItems: 1 + + vcc33-supply: true + + vccio-supply: true + +required: + - compatible + - reg + - interrupts + - vcc33-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@38 { + compatible = "focaltech,ft8112"; + reg = <0x38>; + + interrupt-parent = <&pio>; + interrupts = <15 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&pio 126 GPIO_ACTIVE_LOW>; + vcc33-supply = <&pp3300_tchscr_x>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/google,goldfish-events-keypad.yaml b/Documentation/devicetree/bindings/input/google,goldfish-events-keypad.yaml new file mode 100644 index 000000000000..4e3a010a70c5 --- /dev/null +++ b/Documentation/devicetree/bindings/input/google,goldfish-events-keypad.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/google,goldfish-events-keypad.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish Events Keypad + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +allOf: + - $ref: input.yaml# + +description: + Android goldfish events keypad device generated by android emulator. + +properties: + compatible: + const: google,goldfish-events-keypad + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + keypad@9040000 { + compatible = "google,goldfish-events-keypad"; + reg = <0x9040000 0x1000>; + interrupts = <5>; + }; diff --git a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml index f978cf965a4d..f2543d6faefd 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml @@ -12,11 +12,18 @@ maintainers: properties: compatible: - enum: - - qcom,pm8941-pwrkey - - qcom,pm8941-resin - - qcom,pmk8350-pwrkey - - qcom,pmk8350-resin + oneOf: + - enum: + - qcom,pm8941-pwrkey + - qcom,pm8941-resin + - qcom,pmk8350-pwrkey + - qcom,pmk8350-resin + - items: + - const: qcom,pmm8654au-pwrkey + - const: qcom,pmk8350-pwrkey + - items: + - const: qcom,pmm8654au-resin + - const: qcom,pmk8350-resin interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/input/syna,rmi4.yaml b/Documentation/devicetree/bindings/input/syna,rmi4.yaml index f369385ffaf0..8685ef4481f4 100644 --- a/Documentation/devicetree/bindings/input/syna,rmi4.yaml +++ b/Documentation/devicetree/bindings/input/syna,rmi4.yaml @@ -8,7 +8,7 @@ title: Synaptics RMI4 compliant devices maintainers: - Jason A. Donenfeld <Jason@zx2c4.com> - - Matthias Schiffer <matthias.schiffer@ew.tq-group.com + - Matthias Schiffer <matthias.schiffer@ew.tq-group.com> - Vincent Huang <vincent.huang@tw.synaptics.com> description: | diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml index 7d3edb58f72d..6f90522de8c0 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml @@ -39,6 +39,7 @@ properties: - edt,edt-ft5406 - edt,edt-ft5506 - evervision,ev-ft5726 + - focaltech,ft3518 - focaltech,ft5426 - focaltech,ft5452 - focaltech,ft6236 diff --git a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml index a96137c6f063..a26a54d63a1c 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml @@ -42,6 +42,8 @@ properties: address, thus it can be driven by the host during the reset sequence. maxItems: 1 + panel: true + reset-gpios: maxItems: 1 diff --git a/Documentation/devicetree/bindings/input/touchscreen/ilitek,ili210x.yaml b/Documentation/devicetree/bindings/input/touchscreen/ilitek,ili210x.yaml new file mode 100644 index 000000000000..c47d7752a194 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/ilitek,ili210x.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/ilitek,ili210x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ilitek ILI21xx/ILI251x V3/V6 touch screen controller with i2c interface + +maintainers: + - Frank Li <Frank.Li@nxp.com> + - Marek Vasut <marek.vasut+renesas@mailbox.org> + +properties: + compatible: + enum: + - ilitek,ili210x + - ilitek,ili2117 + - ilitek,ili2120 + - ilitek,ili251x + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + wakeup-source: true + +required: + - compatible + - reg + +allOf: + - $ref: touchscreen.yaml + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@41 { + compatible = "ilitek,ili2120"; + reg = <0x41>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml b/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml index 0ef79343bf9a..dfaffbc398d3 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml @@ -55,7 +55,9 @@ allOf: properties: compatible: contains: - const: imagis,ist3032c + enum: + - imagis,ist3032c + - imagis,ist3038 then: properties: linux,keycodes: false diff --git a/Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml b/Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml index e7ee7a0d74c4..978afaa4fcef 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml @@ -14,9 +14,13 @@ allOf: properties: compatible: - enum: - - sitronix,st1232 - - sitronix,st1633 + oneOf: + - enum: + - sitronix,st1232 + - sitronix,st1633 + - items: + - const: sitronix,st1624 + - const: sitronix,st1633 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml index a595df3ea802..d9cb53e86512 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml @@ -53,6 +53,9 @@ properties: how much time to wait (in milliseconds) before reading again the values from the tsc2007. + "#io-channel-cells": + const: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml b/Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml index fa27c6754ca4..6441d21223ca 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml @@ -23,9 +23,6 @@ properties: # Hynitron cstxxx series touchscreen controller - hynitron,cst340 # Ilitek I2C Touchscreen Controller - - ilitek,ili210x - - ilitek,ili2117 - - ilitek,ili2120 - ilitek,ili2130 - ilitek,ili2131 - ilitek,ili2132 @@ -33,7 +30,6 @@ properties: - ilitek,ili2322 - ilitek,ili2323 - ilitek,ili2326 - - ilitek,ili251x - ilitek,ili2520 - ilitek,ili2521 # MAXI MAX11801 Resistive touch screen controller with i2c interface diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml index 017c8478b2a7..1fb8ccb558fb 100644 --- a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml @@ -40,6 +40,7 @@ properties: enum: - mediatek,mt8183-emi - mediatek,mt8195-emi + - mediatek,mt8196-emi '#interconnect-cells': const: 1 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 17b09292000e..ce79521bb1ef 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -25,6 +25,7 @@ properties: - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: + - qcom,glymur-cpu-bwmon - qcom,kaanapali-cpu-bwmon - qcom,qcm2290-cpu-bwmon - qcom,qcs615-cpu-bwmon diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml index 9d762b2a1fcf..e06404828824 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml @@ -27,7 +27,6 @@ properties: - qcom,qcs615-config-noc - qcom,qcs615-dc-noc - qcom,qcs615-gem-noc - - qcom,qcs615-ipa-virt - qcom,qcs615-mc-virt - qcom,qcs615-mmss-noc - qcom,qcs615-system-noc @@ -46,7 +45,6 @@ allOf: contains: enum: - qcom,qcs615-camnoc-virt - - qcom,qcs615-ipa-virt - qcom,qcs615-mc-virt then: properties: diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml index 71428d2cce18..3dbe83e2de3d 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml @@ -74,6 +74,37 @@ allOf: - description: aggre UFS CARD AXI clock - description: RPMH CC IPA clock + - if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-config-noc + - qcom,sa8775p-dc-noc + - qcom,sa8775p-gem-noc + - qcom,sa8775p-gpdsp-anoc + - qcom,sa8775p-lpass-ag-noc + - qcom,sa8775p-mmss-noc + - qcom,sa8775p-nspa-noc + - qcom,sa8775p-nspb-noc + - qcom,sa8775p-pcie-anoc + - qcom,sa8775p-system-noc + then: + properties: + clocks: false + + - if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-clk-virt + - qcom,sa8775p-mc-virt + then: + properties: + reg: false + clocks: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml new file mode 100644 index 000000000000..2b8e7b9c6d7a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,qe-ports-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale QUICC Engine I/O Ports Interrupt Controller + +maintainers: + - Christophe Leroy (CS GROUP) <chleroy@kernel.org> + +properties: + compatible: + enum: + - fsl,mpc8323-qe-ports-ic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#address-cells' + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@c00 { + compatible = "fsl,mpc8323-qe-ports-ic"; + reg = <0xc00 0x18>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml index 5f2c8761a31d..e4674a9cc2c1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml @@ -14,6 +14,14 @@ properties: oneOf: - items: - enum: + - fsl,imx1-aitc + - fsl,imx25-asic + - fsl,imx27-aitc + - fsl,imx31-avic + - fsl,imx35-avic + - const: fsl,avic + - items: + - enum: - fsl,imx51-tzic - fsl,imx53-tzic - const: fsl,tzic diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml index 393c128a41d8..3c03d90058ed 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml @@ -29,6 +29,9 @@ properties: interrupts: maxItems: 1 + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index f63b23f48d8e..9f532cb11d0c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -40,6 +40,9 @@ properties: - const: isr1 minItems: 2 + '#address-cells': + const: 0 + interrupt-controller: true interrupts: diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml index b7bc5cb1dff2..eee10abe9e48 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml @@ -29,6 +29,9 @@ properties: minimum: 0 maximum: 192 + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index 38d0c2d57dd6..f9321366cae4 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -27,6 +27,8 @@ properties: items: - enum: - qcom,glymur-pdc + - qcom,kaanapali-pdc + - qcom,milos-pdc - qcom,qcs615-pdc - qcom,qcs8300-pdc - qcom,qdu1000-pdc diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml new file mode 100644 index 000000000000..78c01d14e765 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml @@ -0,0 +1,236 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,r9a09g077-icu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/{T2H,N2H} Interrupt Controller + +maintainers: + - Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +description: + The Interrupt Controller (ICU) handles software-triggered interrupts + (INTCPU), external interrupts (IRQ and SEI), error interrupts and DMAC + requests. + +properties: + compatible: + oneOf: + - const: renesas,r9a09g077-icu # RZ/T2H + + - items: + - enum: + - renesas,r9a09g087-icu # RZ/N2H + - const: renesas,r9a09g077-icu + + reg: + items: + - description: Non-safety registers (INTCPU0-13, IRQ0-13) + - description: Safety registers (INTCPU14-15, IRQ14-15, SEI) + + '#interrupt-cells': + description: The first cell is the SPI number of the interrupt, as per user + manual. The second cell is used to specify the flag. + const: 2 + + '#address-cells': + const: 0 + + interrupt-controller: true + + interrupts: + items: + - description: Software interrupt 0 + - description: Software interrupt 1 + - description: Software interrupt 2 + - description: Software interrupt 3 + - description: Software interrupt 4 + - description: Software interrupt 5 + - description: Software interrupt 6 + - description: Software interrupt 7 + - description: Software interrupt 8 + - description: Software interrupt 9 + - description: Software interrupt 10 + - description: Software interrupt 11 + - description: Software interrupt 12 + - description: Software interrupt 13 + - description: Software interrupt 14 + - description: Software interrupt 15 + - description: External pin interrupt 0 + - description: External pin interrupt 1 + - description: External pin interrupt 2 + - description: External pin interrupt 3 + - description: External pin interrupt 4 + - description: External pin interrupt 5 + - description: External pin interrupt 6 + - description: External pin interrupt 7 + - description: External pin interrupt 8 + - description: External pin interrupt 9 + - description: External pin interrupt 10 + - description: External pin interrupt 11 + - description: External pin interrupt 12 + - description: External pin interrupt 13 + - description: External pin interrupt 14 + - description: External pin interrupt 15 + - description: System error interrupt + - description: Cortex-A55 error event 0 + - description: Cortex-A55 error event 1 + - description: Cortex-R52 CPU 0 error event 0 + - description: Cortex-R52 CPU 0 error event 1 + - description: Cortex-R52 CPU 1 error event 0 + - description: Cortex-R52 CPU 1 error event 1 + - description: Peripherals error event 0 + - description: Peripherals error event 1 + - description: DSMIF error event 0 + - description: DSMIF error event 1 + - description: ENCIF error event 0 + - description: ENCIF error event 1 + + interrupt-names: + items: + - const: intcpu0 + - const: intcpu1 + - const: intcpu2 + - const: intcpu3 + - const: intcpu4 + - const: intcpu5 + - const: intcpu6 + - const: intcpu7 + - const: intcpu8 + - const: intcpu9 + - const: intcpu10 + - const: intcpu11 + - const: intcpu12 + - const: intcpu13 + - const: intcpu14 + - const: intcpu15 + - const: irq0 + - const: irq1 + - const: irq2 + - const: irq3 + - const: irq4 + - const: irq5 + - const: irq6 + - const: irq7 + - const: irq8 + - const: irq9 + - const: irq10 + - const: irq11 + - const: irq12 + - const: irq13 + - const: irq14 + - const: irq15 + - const: sei + - const: ca55-err0 + - const: ca55-err1 + - const: cr520-err0 + - const: cr520-err1 + - const: cr521-err0 + - const: cr521-err1 + - const: peri-err0 + - const: peri-err1 + - const: dsmif-err0 + - const: dsmif-err1 + - const: encif-err0 + - const: encif-err1 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - '#interrupt-cells' + - '#address-cells' + - interrupt-controller + - interrupts + - interrupt-names + - clocks + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h> + + icu: interrupt-controller@802a0000 { + compatible = "renesas,r9a09g077-icu"; + reg = <0x802a0000 0x10000>, + <0x812a0000 0x50>; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 5 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 7 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 12 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 13 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 14 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 16 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 408 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 409 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 412 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 413 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 415 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 416 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 418 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "intcpu0", "intcpu1", "intcpu2", + "intcpu3", "intcpu4", "intcpu5", + "intcpu6", "intcpu7", "intcpu8", + "intcpu9", "intcpu10", "intcpu11", + "intcpu12", "intcpu13", "intcpu14", + "intcpu15", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "irq8", "irq9", "irq10", "irq11", + "irq12", "irq13", "irq14", "irq15", + "sei", + "ca55-err0", "ca55-err1", + "cr520-err0", "cr520-err1", + "cr521-err0", "cr521-err1", + "peri-err0", "peri-err1", + "dsmif-err0", "dsmif-err1", + "encif-err0", "encif-err1"; + clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>; + power-domains = <&cpg>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml index 3f99c8645767..cb244b8f5e1c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml @@ -22,6 +22,7 @@ properties: compatible: enum: - renesas,r9a09g047-icu # RZ/G3E + - renesas,r9a09g056-icu # RZ/V2N - renesas,r9a09g057-icu # RZ/V2H(P) '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml index bef00521d5da..0718071444d2 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml @@ -28,6 +28,7 @@ properties: items: - enum: - qemu,aplic + - spacemit,k3-aplic - const: riscv,aplic reg: diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml index c23b5c09fdb9..feec122bddde 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml @@ -48,6 +48,7 @@ properties: items: - enum: - qemu,imsics + - spacemit,k3-imsics - const: riscv,imsics reg: diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 388fc2c620c0..e0267223887e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -108,7 +108,9 @@ properties: riscv,ndev: $ref: /schemas/types.yaml#/definitions/uint32 description: - Specifies how many external interrupts are supported by this controller. + Specifies how many external (device) interrupts are supported by this + controller. Note that source 0 is reserved in PLIC, so the valid + interrupt sources are 1 to riscv,ndev inclusive. clocks: true diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml index c99cc7323c71..de45f0c4b1d1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml @@ -15,8 +15,7 @@ allOf: description: | The Interrupt Router (INTR) module provides a mechanism to mux M interrupt inputs to N interrupt outputs, where all M inputs are selectable - to be driven per N output. An Interrupt Router can either handle edge - triggered or level triggered interrupts and that is fixed in hardware. + to be driven per N output. Interrupt Router +----------------------+ @@ -64,9 +63,14 @@ properties: interrupt-controller: true '#interrupt-cells': - const: 1 + enum: [1, 2] description: | - The 1st cell should contain interrupt router input hw number. + Number of cells in interrupt specifier. Depends on ti,intr-trigger-type: + - If ti,intr-trigger-type is present: must be 1 + The 1st cell should contain interrupt router input hw number. + - If ti,intr-trigger-type is absent: must be 2 + The 1st cell should contain interrupt router input hw number. + The 2nd cell should contain interrupt trigger type (preserved by router). ti,interrupt-ranges: $ref: /schemas/types.yaml#/definitions/uint32-matrix @@ -82,9 +86,22 @@ properties: - description: | "limit" specifies the limit for translation +if: + required: + - ti,intr-trigger-type +then: + properties: + '#interrupt-cells': + const: 1 + description: Interrupt ID only. Interrupt type is specified globally +else: + properties: + '#interrupt-cells': + const: 2 + description: Interrupt ID and corresponding interrupt type + required: - compatible - - ti,intr-trigger-type - interrupt-controller - '#interrupt-cells' - ti,sci @@ -105,3 +122,14 @@ examples: ti,sci-dev-id = <131>; ti,interrupt-ranges = <0 360 32>; }; + + - | + interrupt-controller { + compatible = "ti,sci-intr"; + interrupt-controller; + interrupt-parent = <&gic500>; + #interrupt-cells = <2>; + ti,sci = <&dmsc>; + ti,sci-dev-id = <131>; + ti,interrupt-ranges = <0 360 32>; + }; diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml index 75fcf4cb52d9..82957334bea2 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml @@ -20,7 +20,12 @@ properties: $nodename: pattern: "^iommu@[0-9a-f]*" compatible: - const: arm,smmu-v3 + oneOf: + - const: arm,smmu-v3 + - items: + - enum: + - nvidia,tegra264-smmu + - const: arm,smmu-v3 reg: maxItems: 1 @@ -58,6 +63,15 @@ properties: msi-parent: true + nvidia,cmdqv: + description: | + A phandle to its pairing CMDQV extension for an implementation on NVIDIA + Tegra SoC. + + If this property is absent, CMDQ-Virtualization won't be used and SMMU + will only use its own CMDQ. + $ref: /schemas/types.yaml#/definitions/phandle + hisilicon,broken-prefetch-cmd: type: boolean description: Avoid sending CMD_PREFETCH_* commands to the SMMU. @@ -69,6 +83,17 @@ properties: register access with page 0 offsets. Set for Cavium ThunderX2 silicon that doesn't support SMMU page1 register space. +allOf: + - if: + not: + properties: + compatible: + contains: + const: nvidia,tegra264-smmu + then: + properties: + nvidia,cmdqv: false + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml new file mode 100644 index 000000000000..3f5006a59805 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/nvidia,tegra264-cmdqv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra264 CMDQV + +description: + The CMDQ-Virtualization hardware block is part of the SMMUv3 implementation + on Tegra264 SoCs. It assists in virtualizing the command queue for the SMMU. + +maintainers: + - Nicolin Chen <nicolinc@nvidia.com> + +properties: + compatible: + const: nvidia,tegra264-cmdqv + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + cmdqv@5200000 { + compatible = "nvidia,tegra264-cmdqv"; + reg = <0x5200000 0x830000>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/leds/ams,as3668.yaml b/Documentation/devicetree/bindings/leds/ams,as3668.yaml new file mode 100644 index 000000000000..d1d73782da55 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ams,as3668.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ams,as3668.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Osram 4-channel i2c LED driver + +maintainers: + - Lukas Timmermann <linux@timmermann.space> + +description: + This IC can drive up to four separate LEDs. + Having four channels suggests it could be used with a single RGBW LED. + +properties: + compatible: + const: ams,as3668 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^led@[0-3]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + maxItems: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/leds/common.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@42 { + compatible = "ams,as3668"; + reg = <0x42>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0x0>; + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + }; + + led@1 { + reg = <0x1>; + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml b/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml index a8490781011d..a54448cfdb38 100644 --- a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml +++ b/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml @@ -98,8 +98,8 @@ properties: description: | Over-voltage protection limit. This property is for WLED4 only. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 18100, 19600, 29600, 31100 ] - default: 29600 + minimum: 17800 + maximum: 31100 qcom,num-strings: description: | @@ -239,6 +239,26 @@ allOf: minimum: 0 maximum: 4095 + - if: + properties: + compatible: + contains: + enum: + - qcom,pmi8950-wled + - qcom,pmi8994-wled + + then: + properties: + qcom,ovp-millivolt: + enum: [ 17800, 19400, 29500, 31000 ] + default: 29500 + + else: + properties: + qcom,ovp-millivolt: + enum: [ 18100, 19600, 29600, 31100 ] + default: 29600 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml new file mode 100644 index 000000000000..fcaf8258bbc1 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp. + +maintainers: + - Luka Kovacic <luka.kovacic@sartura.hr> + +description: | + This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details + see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. + + The LED module is a sub-node of the MCU node in the Device Tree. + +properties: + compatible: + const: iei,wt61p803-puzzle-leds + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + led@0: + $ref: common.yaml + unevaluatedProperties: false + + properties: + reg: + const: 0 + +required: + - compatible + - '#address-cells' + - '#size-cells' + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml index bb40bb9e036e..7bfc3d807aca 100644 --- a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +++ b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml @@ -21,7 +21,7 @@ description: | properties: $nodename: - pattern: "^multi-led(@[0-9a-f])?$" + pattern: "^multi-led(@[0-9a-f]|-[0-9]+)?$" color: description: | diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt b/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt index 926c2117942c..7082ed186dd9 100644 --- a/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt @@ -10,6 +10,7 @@ Required properties: issi,is31fl3235 issi,is31fl3218 issi,is31fl3216 + issi,is31fl3293 si-en,sn3218 si-en,sn3216 - reg: I2C slave address diff --git a/Documentation/devicetree/bindings/leds/leds-lm3697.txt b/Documentation/devicetree/bindings/leds/leds-lm3697.txt deleted file mode 100644 index 221b37b6049b..000000000000 --- a/Documentation/devicetree/bindings/leds/leds-lm3697.txt +++ /dev/null @@ -1,73 +0,0 @@ -* Texas Instruments - LM3697 Highly Efficient White LED Driver - -The LM3697 11-bit LED driver provides high- -performance backlight dimming for 1, 2, or 3 series -LED strings while delivering up to 90% efficiency. - -This device is suitable for display and keypad lighting - -Required properties: - - compatible: - "ti,lm3697" - - reg : I2C slave address - - #address-cells : 1 - - #size-cells : 0 - -Optional properties: - - enable-gpios : GPIO pin to enable/disable the device - - vled-supply : LED supply - -Required child properties: - - reg : 0 - LED is Controlled by bank A - 1 - LED is Controlled by bank B - - led-sources : Indicates which HVLED string is associated to which - control bank. This is a zero based property so - HVLED1 = 0, HVLED2 = 1, HVLED3 = 2. - Additional information is contained - in Documentation/devicetree/bindings/leds/common.txt - -Optional child properties: - - ti,brightness-resolution - see Documentation/devicetree/bindings/mfd/ti-lmu.txt - - ramp-up-us: see Documentation/devicetree/bindings/mfd/ti-lmu.txt - - ramp-down-us: see Documentation/devicetree/bindings/mfd/ti-lmu.txt - - label : see Documentation/devicetree/bindings/leds/common.txt - - linux,default-trigger : - see Documentation/devicetree/bindings/leds/common.txt - -Example: - -HVLED string 1 and 3 are controlled by control bank A and HVLED 2 string is -controlled by control bank B. - -led-controller@36 { - compatible = "ti,lm3697"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x36>; - - enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; - vled-supply = <&vbatt>; - - led@0 { - reg = <0>; - led-sources = <0 2>; - ti,brightness-resolution = <2047>; - ramp-up-us = <5000>; - ramp-down-us = <1000>; - label = "white:first_backlight_cluster"; - linux,default-trigger = "backlight"; - }; - - led@1 { - reg = <1>; - led-sources = <1>; - ti,brightness-resolution = <255>; - ramp-up-us = <500>; - ramp-down-us = <1000>; - label = "white:second_backlight_cluster"; - linux,default-trigger = "backlight"; - }; -} - -For more product information please see the link below: -https://www.ti.com/lit/ds/symlink/lm3697.pdf diff --git a/Documentation/devicetree/bindings/leds/leds-lp5860.yaml b/Documentation/devicetree/bindings/leds/leds-lp5860.yaml new file mode 100644 index 000000000000..1ccba4854159 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-lp5860.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/leds-lp5860.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LED driver for LP5860 RGB LED from Texas Instruments. + +maintainers: + - Steffen Trumtrar <kernel@pengutronix.de> + +description: | + The LP5860 is multi-channel, I2C and SPI RGB LED Driver that can group RGB LEDs + into a LED group or control them individually. + + For more product information please see the link below: + https://www.ti.com/lit/ds/symlink/lp5860.pdf + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - ti,lp5860 + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + '^multi-led@[0-9a-f]+$': + type: object + $ref: leds-class-multicolor.yaml# + unevaluatedProperties: false + + properties: + reg: + minimum: 0 + maximum: 198 + description: + This property denotes the LED module number that is used + for the child node. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "^led@[0-9a-f]+$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + maxItems: 1 + + required: + - reg + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/leds/common.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@0 { + compatible = "ti,lp5860"; + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + multi-led@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + color = <LED_COLOR_ID_RGB>; + + led@0 { + reg = <0x0>; + color = <LED_COLOR_ID_RED>; + }; + + led@1 { + reg = <0x1>; + color = <LED_COLOR_ID_GREEN>; + }; + + led@2 { + reg = <0x2>; + color = <LED_COLOR_ID_BLUE>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml index c4b7e57b2518..3da0fe532e74 100644 --- a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml +++ b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml @@ -43,6 +43,7 @@ properties: - items: - enum: - qcom,pm8550-pwm + - qcom,pmh0101-pwm - const: qcom,pm8350c-pwm - items: - enum: diff --git a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml index 05250aefd385..3bfa24ff58cd 100644 --- a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml @@ -29,6 +29,7 @@ properties: - qcom,pm8150l-flash-led - qcom,pm8350c-flash-led - qcom,pm8550-flash-led + - qcom,pmh0101-flash-led - qcom,pmi8998-flash-led - const: qcom,spmi-flash-led diff --git a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml index b7a3ef76cbf4..64cc40523e3d 100644 --- a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml +++ b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml @@ -10,11 +10,12 @@ maintainers: - Matti Vaittinen <mazziesaccount@gmail.com> description: | - This module is part of the ROHM BD71828 MFD device. For more details - see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml. + This module is part of the ROHM BD71828 and BD72720 MFD device. For more + details see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml + and Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml The LED controller is represented as a sub-node of the PMIC node on the device - tree. + tree. This should be located under "leds" - node in PMIC node. The device has two LED outputs referred as GRNLED and AMBLED in data-sheet. diff --git a/Documentation/devicetree/bindings/leds/ti,lm3697.yaml b/Documentation/devicetree/bindings/leds/ti,lm3697.yaml new file mode 100644 index 000000000000..a9f839470a84 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ti,lm3697.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ti,lm3697.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LM3697 Highly Efficient White LED Driver + +maintainers: + - Dan Murphy <dmurphy@ti.com> + +description: > + The LM3697 11-bit LED driver provides high-performance backlight dimming for + 1, 2, or 3 series LED strings while delivering up to 90% efficiency. + + This device is suitable for display and keypad lighting. + +properties: + compatible: + const: ti,lm3697 + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + enable-gpios: + description: GPIO pin to enable or disable the device. + maxItems: 1 + + vled-supply: + description: LED supply for the device. + +patternProperties: + '^led@[01]$': + description: LED control bank nodes. + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + description: Control bank selection (0 = bank A, 1 = bank B). + maximum: 1 + + led-sources: + description: > + HVLED strings associated with this control bank: + + 0 - HVLED1 + 1 - HVLED2 + 2 - HVLED3 + minItems: 1 + maxItems: 3 + items: + maximum: 2 + + ti,brightness-resolution: + description: Brightness resolution for the LED string. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 2047 + + ramp-up-us: + description: Ramp-up time in microseconds. + minimum: 117 + maximum: 2048 + + ramp-down-us: + description: Ramp-down time in microseconds. + minimum: 117 + maximum: 2048 + + required: + - reg + - led-sources + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@36 { + compatible = "ti,lm3697"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x36>; + + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + vled-supply = <&vbatt>; + + led@0 { + reg = <0>; + led-sources = <0 2>; + ti,brightness-resolution = <2047>; + ramp-up-us = <500>; + ramp-down-us = <1000>; + label = "white:first_backlight_cluster"; + linux,default-trigger = "backlight"; + }; + + led@1 { + reg = <1>; + led-sources = <1>; + ti,brightness-resolution = <255>; + ramp-up-us = <500>; + ramp-down-us = <1000>; + label = "white:second_backlight_cluster"; + linux,default-trigger = "backlight"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/leds/ti,lp5812.yaml b/Documentation/devicetree/bindings/leds/ti,lp5812.yaml new file mode 100644 index 000000000000..de34bff441c7 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ti,lp5812.yaml @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ti,lp5812.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP5812 4x3 Matrix RGB LED Driver with Autonomous Control + +maintainers: + - Nam Tran <trannamatk@gmail.com> + +description: | + The LP5812 is a 4x3 matrix RGB LED driver with I2C interface + and autonomous animation engine control. + For more product information please see the link below: + https://www.ti.com/product/LP5812#tech-docs + +properties: + compatible: + const: ti,lp5812 + + reg: + maxItems: 1 + + ti,scan-mode: + description: | + Selects the LED scan mode of the LP5812. The device supports + three modes: + - Direct-drive mode (by default if 'ti,scan-mode' is omitted) + drives up to 4 LEDs directly by internal current sinks (LED0-LED3). + - TCM-drive mode ("tcm:<n>:<order...>") drives up to 12 LEDs + (4 RGB) using 1-4 scan multiplexing. The <n> specifies the number + of scans (1-4), and <order...> defines the scan order of the outputs. + - Mix-drive mode ("mix:<n>:<direct>:<order...>") combines + direct-drive and TCM-drive outputs. The <n> specifies the number + of scans, <direct> selects the direct-drive outputs, and <order...> + defines the scan order. + $ref: /schemas/types.yaml#/definitions/string + pattern: '^(tcm|mix):[1-4](:[0-3]){1,4}$' + + vcc-supply: + description: Regulator providing power to the 'VCC' pin. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^led@[0-3]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + minimum: 0 + maximum: 3 + + required: + - reg + + "^multi-led@[4-7]$": + type: object + $ref: leds-class-multicolor.yaml# + unevaluatedProperties: false + + properties: + reg: + minimum: 4 + maximum: 7 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^led@[4-9a-f]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + minimum: 4 + maximum: 15 + + required: + - reg + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/leds/common.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@1b { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,lp5812"; + reg = <0x1b>; + ti,scan-mode = "tcm:4:0:1:2:3"; + vcc-supply = <&vdd_3v3_reg>; + + led@0 { + reg = <0x0>; + label = "LED0"; + led-max-microamp = <25500>; + }; + + led@1 { + reg = <0x1>; + label = "LED1"; + led-max-microamp = <25500>; + }; + + led@2 { + reg = <0x2>; + label = "LED2"; + led-max-microamp = <25500>; + }; + + led@3 { + reg = <0x3>; + label = "LED3"; + led-max-microamp = <25500>; + }; + + multi-led@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + color = <LED_COLOR_ID_RGB>; + label = "LED_A"; + + led@4 { + reg = <0x4>; + color = <LED_COLOR_ID_GREEN>; + led-max-microamp = <25500>; + }; + + led@5 { + reg = <0x5>; + color = <LED_COLOR_ID_RED>; + led-max-microamp = <25500>; + }; + + led@6 { + reg = <0x6>; + color = <LED_COLOR_ID_BLUE>; + led-max-microamp = <25500>; + }; + }; + + multi-led@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x5>; + color = <LED_COLOR_ID_RGB>; + label = "LED_B"; + + led@7 { + reg = <0x7>; + color = <LED_COLOR_ID_GREEN>; + led-max-microamp = <25500>; + }; + + led@8 { + reg = <0x8>; + color = <LED_COLOR_ID_RED>; + led-max-microamp = <25500>; + }; + + led@9 { + reg = <0x9>; + color = <LED_COLOR_ID_BLUE>; + led-max-microamp = <25500>; + }; + }; + + multi-led@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x6>; + color = <LED_COLOR_ID_RGB>; + label = "LED_C"; + + led@a { + reg = <0xa>; + color = <LED_COLOR_ID_GREEN>; + led-max-microamp = <25500>; + }; + + led@b { + reg = <0xb>; + color = <LED_COLOR_ID_RED>; + led-max-microamp = <25500>; + }; + + led@c { + reg = <0xc>; + color = <LED_COLOR_ID_BLUE>; + led-max-microamp = <25500>; + }; + }; + + multi-led@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7>; + color = <LED_COLOR_ID_RGB>; + label = "LED_D"; + + led@d { + reg = <0xd>; + color = <LED_COLOR_ID_GREEN>; + led-max-microamp = <25500>; + }; + + led@e { + reg = <0xe>; + color = <LED_COLOR_ID_RED>; + led-max-microamp = <25500>; + }; + + led@f { + reg = <0xf>; + color = <LED_COLOR_ID_BLUE>; + led-max-microamp = <25500>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml new file mode 100644 index 000000000000..7b1c5165e64e --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-vcp-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Video Companion Processor (VCP) mailbox + +maintainers: + - Jjian Zhou <Jjian.Zhou@mediatek.com> + +description: + The MTK VCP mailbox enables the SoC to communicate with the VCP by passing + messages through 64 32-bit wide registers. It has 32 interrupt vectors in + either direction for signalling purposes. + +properties: + compatible: + enum: + - mediatek,mt8196-vcp-mbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#mbox-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + mailbox@31b80000 { + compatible = "mediatek,mt8196-vcp-mbox"; + reg = <0x31b80000 0x1000>; + interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml index 1332aab9a888..5f2ec74c1b29 100644 --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -11,7 +11,11 @@ maintainers: properties: compatible: - const: microchip,mpfs-mailbox + oneOf: + - items: + - const: microchip,pic64gx-mailbox + - const: microchip,mpfs-mailbox + - const: microchip,mpfs-mailbox reg: oneOf: diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml index 9122c3d2dc30..90bfde66cc4a 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml @@ -19,6 +19,8 @@ properties: - items: - enum: - qcom,glymur-cpucp-mbox + - qcom,kaanapali-cpucp-mbox + - qcom,sm8750-cpucp-mbox - const: qcom,x1e80100-cpucp-mbox - enum: - qcom,x1e80100-cpucp-mbox diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml index e5c423130db6..7c4d6170491d 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml @@ -24,6 +24,8 @@ properties: compatible: items: - enum: + - qcom,glymur-ipcc + - qcom,kaanapali-ipcc - qcom,milos-ipcc - qcom,qcs8300-ipcc - qcom,qdu1000-ipcc diff --git a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml index b526f9c0c272..bf6ab4e7050c 100644 --- a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml @@ -16,6 +16,7 @@ properties: enum: - sprd,sc9860-mailbox - sprd,sc9863a-mailbox + - sprd,ums9230-mailbox reg: items: diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml index 04d6473d666f..a5205ee5ad0f 100644 --- a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml @@ -11,6 +11,17 @@ description: | messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI agent owns registers used for notification and buffers for message. + For Versal devices, there are two types of IPI channels: + - Buffered channels: Support message passing and require the "msg" + register region to be present on both the host and remote IPI agents. + - Buffer-less channels: Support notification only and do not require the + "msg" register region. For these channels, the "msg" region should be + omitted. + + For message passing, both the host and remote IPI agents must define the "msg" + register region. If either agent omits the "msg" region, only notification + based communication is possible. + +-------------------------------------+ | Xilinx ZynqMP IPI Controller | +-------------------------------------+ diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml index dee8ce7cb7ba..5f8f3b3dea76 100644 --- a/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml @@ -30,7 +30,27 @@ properties: - adi,adv7282-m reg: - maxItems: 1 + minItems: 1 + items: + - description: main register map + - description: VPP or CSI register map + - description: CSI register map + description: + The ADV7180 family may have up to three register maps. All chips have + the main register map. The availability of the CSI and VPP register maps + depends on the chip variant. + + The addresses of the CSI and VPP register maps are programmable by + software. They depend on the board layout and other devices on the I2C + bus and are determined by the hardware designer to avoid address + conflicts on the I2C bus. + + reg-names: + minItems: 1 + items: + - const: main + - enum: [ csi, vpp ] + - const: csi powerdown-gpios: maxItems: 1 @@ -138,6 +158,62 @@ allOf: required: - ports + - if: + properties: + compatible: + contains: + enum: + - adi,adv7180 + - adi,adv7180cp + - adi,adv7180st + - adi,adv7182 + then: + properties: + reg: + maxItems: 1 + + reg-names: + maxItems: 1 + + - if: + properties: + compatible: + contains: + enum: + - adi,adv7281 + - adi,adv7281-m + - adi,adv7281-ma + then: + properties: + reg: + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + items: + - const: main + - const: csi + + - if: + properties: + compatible: + contains: + enum: + - adi,adv7280 + - adi,adv7282 + then: + properties: + reg: + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + items: + - const: main + - const: vpp + examples: - | i2c { @@ -187,3 +263,22 @@ examples: }; }; }; + + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + composite-in@20 { + compatible = "adi,adv7280-m"; + reg = <0x20>, <0x42>, <0x44>; + reg-names = "main", "vpp", "csi"; + + port { + adv7280_out: endpoint { + bus-width = <8>; + remote-endpoint = <&vin1ep>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml index a89f740214f7..dffd23ca4839 100644 --- a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml +++ b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml @@ -95,7 +95,7 @@ examples: #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/media/video-interfaces.h> - i2c0 { + i2c { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,os05b10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,os05b10.yaml new file mode 100644 index 000000000000..b76771d81851 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,os05b10.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,os05b10.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OmniVision OS05B10 Image Sensor + +maintainers: + - Elgin Perumbilly <elgin.perumbilly@siliconsignals.io> + +description: + The OmniVision OS05B10 is a 5MP (2592x1944) color CMOS image sensor controlled + through an I2C-compatible SCCB bus. it outputs RAW10/RAW12 format and uses a + 1/2.78" optical format. + +properties: + compatible: + const: ovti,os05b10 + + reg: + maxItems: 1 + + clocks: + items: + - description: XCLK clock + + avdd-supply: + description: Analog Domain Power Supply (2.8v) + + dovdd-supply: + description: I/O Domain Power Supply (1.8v) + + dvdd-supply: + description: Digital Domain Power Supply (1.2v) + + reset-gpios: + maxItems: 1 + description: Reset Pin GPIO Control (active low) + + port: + description: MIPI CSI-2 transmitter port + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + oneOf: + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + - items: + - const: 1 + - const: 2 + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - avdd-supply + - dovdd-supply + - dvdd-supply + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera-sensor@36 { + compatible = "ovti,os05b10"; + reg = <0x36>; + clocks = <&os05b10_clk>; + reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + + avdd-supply = <&os05b10_avdd_2v8>; + dvdd-supply = <&os05b10_dvdd_1v2>; + dovdd-supply = <&os05b10_dovdd_1v8>; + + port { + cam_out: endpoint { + remote-endpoint = <&mipi_in_cam>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <600000000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml index a2abed06a099..2d7937a372a2 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml @@ -14,6 +14,9 @@ description: |- The OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces and CCI (I2C compatible) control bus. +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + properties: compatible: const: ovti,ov5647 @@ -30,6 +33,15 @@ properties: description: Reference to the GPIO connected to the pwdn pin. Active high. maxItems: 1 + avdd-supply: + description: Analog voltage supply, 2.8 volts + + dvdd-supply: + description: Digital core voltage supply, 1.5 volts + + dovdd-supply: + description: Digital I/O voltage supply, 1.7 - 3.0 volts + port: $ref: /schemas/graph.yaml#/$defs/port-base additionalProperties: false @@ -48,7 +60,7 @@ required: - clocks - port -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m5.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m5.yaml new file mode 100644 index 000000000000..434f15f64bcd --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m5.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/samsung,s5k3m5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S5K3M5 Image Sensor + +description: + Samsung S5K3M5 (ISOCELL 3M5) image sensor is a 13MP image sensor. + The sensor is controlled over a serial camera control bus protocol, + the widest supported output image frame size is 4208x3120 at 30 frames + per second, data output format is RAW10 transferred over 4-lane + MIPI D-PHY interface. + +maintainers: + - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: samsung,s5k3m5 + + reg: + maxItems: 1 + + clocks: + description: MCLK supply clock. + maxItems: 1 + + reset-gpios: + description: Active low GPIO connected to RESET pad of the sensor. + maxItems: 1 + + afvdd-supply: + description: Autofocus actuator voltage supply, 2.8-3.0 volts. + + vdda-supply: + description: Analogue voltage supply, 2.8 volts. + + vddd-supply: + description: Digital core voltage supply, 1.05 volts. + + vddio-supply: + description: Digital I/O voltage supply, 2.8 or 1.8 volts. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - link-frequencies + +required: + - compatible + - reg + - port + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@10 { + compatible = "samsung,s5k3m5"; + reg = <0x10>; + clocks = <&camera_mclk 0>; + assigned-clocks = <&camera_mclk 0>; + assigned-clock-rates = <24000000>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + vdda-supply = <&vreg_2p8>; + vddd-supply = <&vreg_1p05>; + vddio-supply = <&vreg_1p8>; + + port { + endpoint { + link-frequencies = /bits/ 64 <602500000>; + remote-endpoint = <&mipi_csi2_ep>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5kjn1.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5kjn1.yaml new file mode 100644 index 000000000000..8f368ae044b4 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5kjn1.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/samsung,s5kjn1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S5KJN1 Image Sensor + +description: + Samsung S5KJN1 (ISOCELL JN1) image sensor is a 50MP image sensor. + The sensor is controlled over a serial camera control bus protocol, + the widest supported output image frame size is 8160x6144 at 10 frames + per second, data output format is RAW10 transferred over 4-lane + MIPI D-PHY interface. + +maintainers: + - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: samsung,s5kjn1 + + reg: + maxItems: 1 + + clocks: + description: MCLK supply clock. + maxItems: 1 + + reset-gpios: + description: Active low GPIO connected to RESET pad of the sensor. + maxItems: 1 + + afvdd-supply: + description: Autofocus actuator voltage supply, 2.8-3.0 volts. + + vdda-supply: + description: Analogue voltage supply, 2.8 volts. + + vddd-supply: + description: Digital core voltage supply, 1.05 volts. + + vddio-supply: + description: Digital I/O voltage supply, 1.8 volts. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - link-frequencies + +required: + - compatible + - reg + - port + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@56 { + compatible = "samsung,s5kjn1"; + reg = <0x56>; + clocks = <&camera_mclk 0>; + assigned-clocks = <&camera_mclk 0>; + assigned-clock-rates = <24000000>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + vdda-supply = <&vreg_2p8>; + vddd-supply = <&vreg_1p05>; + vddio-supply = <&vreg_1p8>; + + port { + endpoint { + link-frequencies = /bits/ 64 <700000000>; + remote-endpoint = <&mipi_csi2_ep>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt deleted file mode 100644 index 8d8e40c56872..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt +++ /dev/null @@ -1,55 +0,0 @@ -Toshiba et8ek8 5MP sensor - -Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device - -More detailed documentation can be found in -Documentation/devicetree/bindings/media/video-interfaces.txt . - - -Mandatory properties --------------------- - -- compatible: "toshiba,et8ek8" -- reg: I2C address (0x3e, or an alternative address) -- vana-supply: Analogue voltage supply (VANA), 2.8 volts -- clocks: External clock to the sensor -- reset-gpios: XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor - is in hardware standby mode when the signal is in the low state. - - -Optional properties -------------------- - -- flash-leds: See ../video-interfaces.txt -- lens-focus: See ../video-interfaces.txt - - -Endpoint node mandatory properties ----------------------------------- - -- remote-endpoint: A phandle to the bus receiver's endpoint node. - - -Example -------- - -&i2c3 { - clock-frequency = <400000>; - - cam1: camera@3e { - compatible = "toshiba,et8ek8"; - reg = <0x3e>; - vana-supply = <&vaux4>; - - clocks = <&isp 0>; - assigned-clocks = <&isp 0>; - assigned-clock-rates = <9600000>; - - reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */ - port { - csi_cam1: endpoint { - remote-endpoint = <&csi_out1>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml new file mode 100644 index 000000000000..f0186ae87de2 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/toshiba,et8ek8.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba et8ek8 5MP sensor + +maintainers: + - Pavel Machek <pavel@ucw.cz> + - Sakari Ailus <sakari.ailus@iki.fi> + +description: + Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: toshiba,et8ek8 + + reg: + description: + I2C address (0x3e, or an alternative address) + maxItems: 1 + + vana-supply: + description: + Analogue voltage supply (VANA), 2.8 volts + + clocks: + maxItems: 1 + + reset-gpios: + description: + XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor + is in hardware standby mode when the signal is in the low state. + maxItems: 1 + + flash-leds: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - vana-supply + - clocks + - reset-gpios + - port + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@3e { + compatible = "toshiba,et8ek8"; + reg = <0x3e>; + vana-supply = <&vaux4>; + clocks = <&isp 0>; + assigned-clocks = <&isp 0>; + assigned-clock-rates = <9600000>; + reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; + flash-leds = <&led>; + + port { + csi_cam1: endpoint { + remote-endpoint = <&csi_out1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index b5aca3d2cc5c..18cc6315a821 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -55,6 +55,12 @@ properties: minItems: 1 # Wrapper and all slots maxItems: 5 # Wrapper and 4 slots + sram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Optional phandle to a reserved on-chip SRAM regions. The SRAM can + be used for descriptor storage, which may improve bus utilization. + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml index 80a4540a22dc..e5f170aa4d9e 100644 --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml @@ -120,6 +120,14 @@ properties: items: - const: top + vdda-phy-supply: + description: + Phandle to a 0.88V regulator supply to CSI PHYs. + + vdda-pll-supply: + description: + Phandle to 1.2V regulator supply to CSI PHYs pll block. + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -160,6 +168,8 @@ required: - power-domains - power-domain-names - ports + - vdda-phy-supply + - vdda-pll-supply additionalProperties: false @@ -328,6 +338,9 @@ examples: power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; power-domain-names = "top"; + vdda-phy-supply = <&vreg_l4a_0p88>; + vdda-pll-supply = <&vreg_l1c_1p2>; + ports { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml index 019caa2b09c3..48f280e99809 100644 --- a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml @@ -126,11 +126,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml index ee35e3bc97ff..b1c54c5b01b2 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml @@ -125,11 +125,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml index c99fe4106eee..354130aba9fc 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml @@ -264,11 +264,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. required: - clock-names diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml index 35c40fe22376..46cc7fff1599 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -91,11 +91,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml index 82bf4689d330..be09cf3a3b3b 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml @@ -207,11 +207,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. required: - clock-names diff --git a/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml new file mode 100644 index 000000000000..ba7b0acb9128 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml @@ -0,0 +1,439 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6150 Camera Subsystem (CAMSS) + +maintainers: + - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> + +description: + This binding describes the camera subsystem hardware found on SM6150 + Qualcomm SoCs. It includes submodules such as CSIPHY (CSI Physical layer) + and CSID (CSI Decoder), which comply with the MIPI CSI2 protocol. + + The subsystem also integrates a set of real-time image processing engines + and their associated configuration modules, as well as non-real-time engines. + +properties: + compatible: + const: qcom,sm6150-camss + + reg: + items: + - description: Registers for CSID 0 + - description: Registers for CSID 1 + - description: Registers for CSID Lite + - description: Registers for CSIPHY 0 + - description: Registers for CSIPHY 1 + - description: Registers for CSIPHY 2 + - description: Registers for VFE 0 + - description: Registers for VFE 1 + - description: Registers for VFE Lite + - description: Registers for BPS (Bayer Processing Segment) + - description: Registers for CAMNOC + - description: Registers for CPAS CDM + - description: Registers for CPAS TOP + - description: Registers for ICP (Imaging Control Processor) CSR (Control and Status Registers) + - description: Registers for ICP QGIC (Qualcomm Generic Interrupt Controller) + - description: Registers for ICP SIERRA ((A5 subsystem communication)) + - description: Registers for IPE (Image Postprocessing Engine) 0 + - description: Registers for JPEG DMA + - description: Registers for JPEG ENC + - description: Registers for LRME (Low Resolution Motion Estimation) + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + - const: bps + - const: camnoc + - const: cpas_cdm + - const: cpas_top + - const: icp_csr + - const: icp_qgic + - const: icp_sierra + - const: ipe0 + - const: jpeg_dma + - const: jpeg_enc + - const: lrme + + clocks: + maxItems: 33 + + clock-names: + items: + - const: gcc_ahb + - const: gcc_axi_hf + - const: camnoc_axi + - const: cpas_ahb + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: soc_ahb + - const: vfe0 + - const: vfe0_axi + - const: vfe0_cphy_rx + - const: vfe0_csid + - const: vfe1 + - const: vfe1_axi + - const: vfe1_cphy_rx + - const: vfe1_csid + - const: vfe_lite + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + - const: bps + - const: bps_ahb + - const: bps_axi + - const: bps_areg + - const: icp + - const: ipe0 + - const: ipe0_ahb + - const: ipe0_areg + - const: ipe0_axi + - const: jpeg + - const: lrme + + interrupts: + maxItems: 15 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + - const: camnoc + - const: cdm + - const: icp + - const: jpeg_dma + - const: jpeg_enc + - const: lrme + + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: ahb + - const: hf_0 + - const: hf_1 + - const: sf_mnoc + + iommus: + items: + - description: Camera IFE 0 non-protected stream + - description: Camera IFE 1 non-protected stream + - description: Camera IFE 3 non-protected stream + - description: Camera CDM non-protected stream + - description: Camera LRME read non-protected stream + - description: Camera IPE 0 read non-protected stream + - description: Camera BPS read non-protected stream + - description: Camera IPE 0 write non-protected stream + - description: Camera BPS write non-protected stream + - description: Camera LRME write non-protected stream + - description: Camera JPEG read non-protected stream + - description: Camera JPEG write non-protected stream + - description: Camera ICP stream + + power-domains: + items: + - description: + IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: + IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: + Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + - description: + Titan BPS - Bayer Processing Segment, Global Distributed Switch Controller. + - description: + IPE GDSC - Image Postprocessing Engine, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + - const: bps + - const: ipe + + vdd-csiphy-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSI PHYs. + + vdd-csiphy-1p8-supply: + description: + Phandle to 1.8V regulator supply to CSI PHYs pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-2]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data from a CSIPHY. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,qcs615-camcc.h> + #include <dt-bindings/clock/qcom,qcs615-gcc.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: isp@acb3000 { + compatible = "qcom,sm6150-camss"; + + reg = <0x0 0x0acb3000 0x0 0x1000>, + <0x0 0x0acba000 0x0 0x1000>, + <0x0 0x0acc8000 0x0 0x1000>, + <0x0 0x0ac65000 0x0 0x1000>, + <0x0 0x0ac66000 0x0 0x1000>, + <0x0 0x0ac67000 0x0 0x1000>, + <0x0 0x0acaf000 0x0 0x4000>, + <0x0 0x0acb6000 0x0 0x4000>, + <0x0 0x0acc4000 0x0 0x4000>, + <0x0 0x0ac6f000 0x0 0x3000>, + <0x0 0x0ac42000 0x0 0x5000>, + <0x0 0x0ac48000 0x0 0x1000>, + <0x0 0x0ac40000 0x0 0x1000>, + <0x0 0x0ac18000 0x0 0x3000>, + <0x0 0x0ac00000 0x0 0x6000>, + <0x0 0x0ac10000 0x0 0x8000>, + <0x0 0x0ac87000 0x0 0x3000>, + <0x0 0x0ac52000 0x0 0x4000>, + <0x0 0x0ac4e000 0x0 0x4000>, + <0x0 0x0ac6b000 0x0 0x0a00>; + reg-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite", + "bps", + "camnoc", + "cpas_cdm", + "cpas_top", + "icp_csr", + "icp_qgic", + "icp_sierra", + "ipe0", + "jpeg_dma", + "jpeg_enc", + "lrme"; + + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_BPS_CLK>, + <&camcc CAM_CC_BPS_AHB_CLK>, + <&camcc CAM_CC_BPS_AXI_CLK>, + <&camcc CAM_CC_BPS_AREG_CLK>, + <&camcc CAM_CC_ICP_CLK>, + <&camcc CAM_CC_IPE_0_CLK>, + <&camcc CAM_CC_IPE_0_AHB_CLK>, + <&camcc CAM_CC_IPE_0_AREG_CLK>, + <&camcc CAM_CC_IPE_0_AXI_CLK>, + <&camcc CAM_CC_JPEG_CLK>, + <&camcc CAM_CC_LRME_CLK>; + + clock-names = "gcc_ahb", + "gcc_axi_hf", + "camnoc_axi", + "cpas_ahb", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe0_csid", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe1_csid", + "vfe_lite", + "vfe_lite_cphy_rx", + "vfe_lite_csid", + "bps", + "bps_ahb", + "bps_axi", + "bps_areg", + "icp", + "ipe0", + "ipe0_ahb", + "ipe0_areg", + "ipe0_axi", + "jpeg", + "lrme"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_HF1 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_0", + "hf_1", + "sf_mnoc"; + + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite", + "camnoc", + "cdm", + "icp", + "jpeg_dma", + "jpeg_enc", + "lrme"; + + iommus = <&apps_smmu 0x0820 0x40>, + <&apps_smmu 0x0840 0x00>, + <&apps_smmu 0x0860 0x40>, + <&apps_smmu 0x0c00 0x00>, + <&apps_smmu 0x0cc0 0x00>, + <&apps_smmu 0x0c80 0x00>, + <&apps_smmu 0x0ca0 0x00>, + <&apps_smmu 0x0d00 0x00>, + <&apps_smmu 0x0d20 0x00>, + <&apps_smmu 0x0d40 0x00>, + <&apps_smmu 0x0d80 0x20>, + <&apps_smmu 0x0da0 0x20>, + <&apps_smmu 0x0de2 0x00>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>, + <&camcc BPS_GDSC>, + <&camcc IPE_0_GDSC>; + power-domain-names = "ife0", + "ife1", + "top", + "bps", + "ipe"; + + vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>; + vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + csiphy_ep0: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&sensor_ep>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml index ebf68ff4ab96..a509d4bbcb4a 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml @@ -296,11 +296,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. required: - clock-names diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml index cd34f14916b4..4b9ab1352e91 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml @@ -134,11 +134,11 @@ properties: vdda-phy-supply: description: - Phandle to a regulator supply to PHY core block. + 0.88V supply to CSIPHY IP blocks. vdda-pll-supply: description: - Phandle to 1.2V regulator supply to PHY refclk pll block. + 1.2V supply to CSIPHY IP blocks. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index b87a13479a4b..2d1662ef522b 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -120,11 +120,11 @@ properties: vdd-csiphy-0p8-supply: description: - Phandle to a 0.8V regulator supply to a PHY. + 0.8V supply to a PHY. vdd-csiphy-1p2-supply: description: - Phandle to 1.2V regulator supply to a PHY. + 1.2V supply to a PHY. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml index cf92dfe69637..b5eff6fec8a9 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml +++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml @@ -77,6 +77,7 @@ allOf: - renesas,r9a07g043u-fcpvd - renesas,r9a07g044-fcpvd - renesas,r9a07g054-fcpvd + - renesas,r9a09g056-fcpvd - renesas,r9a09g057-fcpvd then: properties: diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml new file mode 100644 index 000000000000..2c2bd87582eb --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip MIPI CSI-2 Receiver + +maintainers: + - Michael Riesch <michael.riesch@collabora.com> + +description: + The Rockchip MIPI CSI-2 Receiver is a CSI-2 bridge with one input port and + one output port. It receives the data with the help of an external MIPI PHY + (C-PHY or D-PHY) and passes it to the Rockchip Video Capture (VICAP) block. + +properties: + compatible: + enum: + - rockchip,rk3568-mipi-csi2 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Interrupt that signals changes in CSI2HOST_ERR1. + - description: Interrupt that signals changes in CSI2HOST_ERR2. + + interrupt-names: + items: + - const: err1 + - const: err2 + + clocks: + maxItems: 1 + + phys: + maxItems: 1 + description: MIPI C-PHY or D-PHY. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Input port node. Connect to e.g., a MIPI CSI-2 image sensor. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - bus-type + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output port connected to a Rockchip VICAP port. + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - phys + - ports + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3568-cru.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/media/video-interfaces.h> + #include <dt-bindings/power/rk3568-power.h> + + soc { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + csi: csi@fdfb0000 { + compatible = "rockchip,rk3568-mipi-csi2"; + reg = <0x0 0xfdfb0000 0x0 0x10000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "err1", "err2"; + clocks = <&cru PCLK_CSI2HOST1>; + phys = <&csi_dphy>; + power-domains = <&power RK3568_PD_VI>; + resets = <&cru SRST_P_CSI2HOST1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi_in: port@0 { + reg = <0>; + + csi_input: endpoint { + bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&imx415_output>; + }; + }; + + csi_out: port@1 { + reg = <1>; + + csi_output: endpoint { + remote-endpoint = <&vicap_mipi_input>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml index 878397830a4d..9196cf5dac0f 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml @@ -9,7 +9,7 @@ title: Samsung Exynos SoC G-Scaler maintainers: - Inki Dae <inki.dae@samsung.com> - Krzysztof Kozlowski <krzk@kernel.org> - - Seung-Woo Kim <sw0312.kim@samsung.com + - Seung-Woo Kim <sw0312.kim@samsung.com> description: G-Scaler is used for scaling and color space conversion on Samsung Exynos diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml index 7b03a77adbce..162a0c526d5d 100644 --- a/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml +++ b/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml @@ -37,6 +37,9 @@ properties: resets: maxItems: 1 + power-domains: + maxItems: 1 + access-controllers: minItems: 1 maxItems: 2 diff --git a/Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml b/Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml index e9fa3cfea5d2..2ac7c9670c62 100644 --- a/Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml +++ b/Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml @@ -46,6 +46,9 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/ti,omap3isp.txt b/Documentation/devicetree/bindings/media/ti,omap3isp.txt deleted file mode 100644 index ac23de855641..000000000000 --- a/Documentation/devicetree/bindings/media/ti,omap3isp.txt +++ /dev/null @@ -1,71 +0,0 @@ -OMAP 3 ISP Device Tree bindings -=============================== - -The DT definitions can be found in include/dt-bindings/media/omap3-isp.h. - -Required properties -=================== - -compatible : must contain "ti,omap3-isp" - -reg : the two registers sets (physical address and length) for the - ISP. The first set contains the core ISP registers up to - the end of the SBL block. The second set contains the - CSI PHYs and receivers registers. -interrupts : the ISP interrupt specifier -iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP -syscon : the phandle and register offset to the Complex I/O or CSI-PHY - register -ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430) - 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630) -#clock-cells : Must be 1 --- the ISP provides two external clocks, - cam_xclka and cam_xclkb, at indices 0 and 1, - respectively. Please find more information on common - clock bindings in ../clock/clock-bindings.txt. - -Port nodes (optional) ---------------------- - -More documentation on these bindings is available in -video-interfaces.txt in the same directory. - -reg : The interface: - 0 - parallel (CCDC) - 1 - CSIPHY1 -- CSI2C / CCP2B on 3630; - CSI1 -- CSIb on 3430 - 2 - CSIPHY2 -- CSI2A / CCP2B on 3630; - CSI2 -- CSIa on 3430 - -Optional properties -=================== - -vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1 -vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2 - -Endpoint nodes --------------- - -lane-polarities : lane polarity (required on CSI-2) - 0 -- not inverted; 1 -- inverted -data-lanes : an array of data lanes from 1 to 3. The length can - be either 1 or 2. (required on CSI-2) -clock-lanes : the clock lane (from 1 to 3). (required on CSI-2) - - -Example -======= - - isp@480bc000 { - compatible = "ti,omap3-isp"; - reg = <0x480bc000 0x12fc - 0x480bd800 0x0600>; - interrupts = <24>; - iommus = <&mmu_isp>; - syscon = <&scm_conf 0x2f0>; - ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>; - #clock-cells = <1>; - ports { - #address-cells = <1>; - #size-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/ti,omap3isp.yaml b/Documentation/devicetree/bindings/media/ti,omap3isp.yaml new file mode 100644 index 000000000000..7155fd3db505 --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,omap3isp.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments OMAP 3 Image Signal Processor (ISP) + +maintainers: + - Laurent Pinchart <laurent.pinchart@ideasonboard.com> + - Sakari Ailus <sakari.ailus@iki.fi> + +description: + The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs. + +properties: + compatible: + const: ti,omap3-isp + + reg: + items: + - description: Core ISP registers up to the end of the SBL block + - description: CSI PHYs and receivers registers + + interrupts: + maxItems: 1 + + iommus: + maxItems: 1 + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to System Control Module + - description: register offset to Complex I/O or CSI-PHY register + description: + Phandle and register offset to the Complex I/O or CSI-PHY register + + ti,phy-type: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + 0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430) + 1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630) + + '#clock-cells': + const: 1 + description: + The ISP provides two external clocks, cam_xclka and cam_xclkb, + at indices 0 and 1 respectively. + + vdd-csiphy1-supply: + description: Voltage supply of the CSI-2 PHY 1 + + vdd-csiphy2-supply: + description: Voltage supply of the CSI-2 PHY 2 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Parallel (CCDC) interface + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + CSIPHY1 interface: + OMAP 3630: CSI2C / CCP2B + OMAP 3430: CSI1 (CSIb) + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + lane-polarities: + minItems: 2 + maxItems: 3 + + data-lanes: + minItems: 1 + maxItems: 2 + items: + minimum: 1 + maximum: 3 + + clock-lanes: + minimum: 1 + maximum: 3 + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + CSIPHY2 interface: + OMAP 3630: CSI2A / CCP2B + OMAP 3430: CSI2 (CSIa) + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + lane-polarities: + minItems: 2 + maxItems: 3 + + data-lanes: + minItems: 1 + maxItems: 2 + items: + minimum: 1 + maximum: 3 + + clock-lanes: + minimum: 1 + maximum: 3 + +required: + - compatible + - reg + - interrupts + - iommus + - syscon + - ti,phy-type + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/media/omap3-isp.h> + + isp@480bc000 { + compatible = "ti,omap3-isp"; + reg = <0x480bc000 0x12fc>, + <0x480bd800 0x0600>; + interrupts = <24>; + iommus = <&mmu_isp>; + syscon = <&scm_conf 0x2f0>; + ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>; + #clock-cells = <1>; + vdd-csiphy1-supply = <&vaux2>; + vdd-csiphy2-supply = <&vaux2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + parallel_ep: endpoint { + remote-endpoint = <¶llel>; + }; + }; + + port@1 { + reg = <1>; + csi1_ep: endpoint { + remote-endpoint = <&smia_1>; + clock-lanes = <1>; + data-lanes = <2>; + lane-polarities = <0 0>; + }; + }; + + port@2 { + reg = <2>; + csi2a_ep: endpoint { + remote-endpoint = <&smia_2>; + clock-lanes = <2>; + data-lanes = <1 3>; + lane-polarities = <1 1 1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/ti,vip.yaml b/Documentation/devicetree/bindings/media/ti,vip.yaml new file mode 100644 index 000000000000..e30cc461542b --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,vip.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2025 Texas Instruments Incorporated - http://www.ti.com/ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,vip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DRA7x Video Input Port (VIP) + +maintainers: + - Yemike Abhilash Chandra <y-abhilashchandra@ti.com> + +description: |- + Video Input Port (VIP) can be found on devices such as DRA7xx and + provides the system interface and the processing capability to + connect parallel image-sensor as well as BT.656/1120 capable encoder + chip to DRA7x device. + + Each VIP instance supports 2 independently configurable external + video input capture slices (Slice 0 and Slice 1) each providing + up to two video input ports (Port A and Port B). + +properties: + compatible: + enum: + - ti,dra7-vip + + reg: + maxItems: 1 + + interrupts: + items: + - description: IRQ index 0 is used for Slice0 interrupts + - description: IRQ index 1 is used for Slice1 interrupts + + ti,ctrl-module: + description: + Reference to the device control module that provides clock-edge + inversion control for VIP ports. These controls allow the + VIP to sample pixel data on the correct clock edge. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle to device control module + - description: offset to the CTRL_CORE_SMA_SW_1 register + - description: Bit field to slice 0 port A + - description: Bit field to slice 0 port B + - description: Bit field to slice 1 port A + - description: Bit field to slice 1 port B + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port@[0-3]$': + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + Each VIP instance supports 2 independently configurable external video + input capture slices (Slice 0 and Slice 1) each providing up to two video + input ports (Port A and Port B). These ports represent the following + port@0 -> Slice 0 Port A + port@1 -> Slice 0 Port B + port@2 -> Slice 1 Port A + port@3 -> Slice 1 Port B + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-width: + enum: [8, 16, 24] + default: 8 + +required: + - compatible + - reg + - interrupts + - ti,ctrl-module + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + video@48970000 { + compatible = "ti,dra7-vip"; + reg = <0x48970000 0x1000>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>; + ti,ctrl-module = <&scm_conf 0x534 0x0 0x2 0x1 0x3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + vin1a: port@0 { + reg = <0>; + + vin1a_ep: endpoint { + remote-endpoint = <&camera1>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <8>; + }; + }; + + vin1b: port@1 { + reg = <1>; + + vin1b_ep: endpoint { + remote-endpoint = <&camera2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <8>; + }; + }; + + vin2a: port@2 { + reg = <2>; + + vin2a_ep: endpoint { + remote-endpoint = <&camera3>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <16>; + }; + }; + + vin2b: port@3 { + reg = <3>; + + vin2b_ep: endpoint { + remote-endpoint = <&camera4>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <8>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml new file mode 100644 index 000000000000..928961c74026 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr4.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DDR4 SDRAM compliant to JEDEC JESD79-4D + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +allOf: + - $ref: jedec,sdram-props.yaml# + +properties: + compatible: + items: + - pattern: "^ddr4-[0-9a-f]{4},[a-z]{1,20}-[0-9a-f]{2}$" + - const: jedec,ddr4 + +required: + - compatible + - density + - io-width + +unevaluatedProperties: false + +examples: + - | + ddr { + compatible = "ddr4-00ff,azaz-ff", "jedec,ddr4"; + density = <8192>; + io-width = <8>; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml deleted file mode 100644 index 30267ce70124..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml +++ /dev/null @@ -1,74 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Common properties for LPDDR types - -description: - Different LPDDR types generally use the same properties and only differ in the - range of legal values for each. This file defines the common parts that can be - reused for each type. Nodes using this schema should generally be nested under - an LPDDR channel node. - -maintainers: - - Krzysztof Kozlowski <krzk@kernel.org> - -properties: - compatible: - description: - Compatible strings can be either explicit vendor names and part numbers - (e.g. elpida,ECB240ABACN), or generated strings of the form - lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID - (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are - formatted in lower case hexadecimal representation with leading zeroes. - The latter form can be useful when LPDDR nodes are created at runtime by - boot firmware that doesn't have access to static part number information. - - reg: - description: - The rank number of this LPDDR rank when used as a subnode to an LPDDR - channel. - minimum: 0 - maximum: 3 - - revision-id: - $ref: /schemas/types.yaml#/definitions/uint32-array - description: - Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>). - maxItems: 2 - items: - minimum: 0 - maximum: 255 - - density: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - Density in megabits of SDRAM chip. Decoded from Mode Register 8. - enum: - - 64 - - 128 - - 256 - - 512 - - 1024 - - 2048 - - 3072 - - 4096 - - 6144 - - 8192 - - 12288 - - 16384 - - 24576 - - 32768 - - io-width: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - IO bus width in bits of SDRAM chip. Decoded from Mode Register 8. - enum: - - 8 - - 16 - - 32 - -additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml index a237bc259273..704bbc562528 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml @@ -10,7 +10,7 @@ maintainers: - Krzysztof Kozlowski <krzk@kernel.org> allOf: - - $ref: jedec,lpddr-props.yaml# + - $ref: jedec,sdram-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index e328a1195ba6..0d28df3d2bfa 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -10,7 +10,7 @@ maintainers: - Krzysztof Kozlowski <krzk@kernel.org> allOf: - - $ref: jedec,lpddr-props.yaml# + - $ref: jedec,sdram-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml index a078892fecee..65aa07861453 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml @@ -10,7 +10,7 @@ maintainers: - Krzysztof Kozlowski <krzk@kernel.org> allOf: - - $ref: jedec,lpddr-props.yaml# + - $ref: jedec,sdram-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml index e441dac5f154..cf5d5a8e94b3 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml @@ -10,7 +10,7 @@ maintainers: - Krzysztof Kozlowski <krzk@kernel.org> allOf: - - $ref: jedec,lpddr-props.yaml# + - $ref: jedec,sdram-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml index 34b5bd153f63..5cdd8ef45100 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml @@ -1,23 +1,28 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml# +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,sdram-channel.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: LPDDR channel with chip/rank topology description +title: SDRAM channel with chip/rank topology description description: - An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS, - CK, etc.) that connect one or more LPDDR chips to a host system. The main - purpose of this node is to overall LPDDR topology of the system, including the - amount of individual LPDDR chips and the ranks per chip. + A memory channel of SDRAM memory like DDR SDRAM or LPDDR SDRAM is a completely + independent set of pins (DQ, CA, CS, CK, etc.) that connect one or more memory + chips to a host system. The main purpose of this node is to overall memory + topology of the system, including the amount of individual memory chips and + the ranks per chip. maintainers: - Julius Werner <jwerner@chromium.org> properties: + $nodename: + pattern: "sdram-channel-[0-9]+$" + compatible: enum: + - jedec,ddr4-channel - jedec,lpddr2-channel - jedec,lpddr3-channel - jedec,lpddr4-channel @@ -26,14 +31,14 @@ properties: io-width: description: The number of DQ pins in the channel. If this number is different - from (a multiple of) the io-width of the LPDDR chip, that means that + from (a multiple of) the io-width of the SDRAM chip, that means that multiple instances of that type of chip are wired in parallel on this channel (with the channel's DQ pins split up between the different chips, and the CA, CS, etc. pins of the different chips all shorted together). This means that the total physical memory controlled by a channel is equal to the sum of the densities of each rank on the - connected LPDDR chip, times the io-width of the channel divided by - the io-width of the LPDDR chip. + connected SDRAM chip, times the io-width of the channel divided by + the io-width of the SDRAM chip. enum: - 8 - 16 @@ -51,8 +56,8 @@ patternProperties: "^rank@[0-9]+$": type: object description: - Each physical LPDDR chip may have one or more ranks. Ranks are - internal but fully independent sub-units of the chip. Each LPDDR bus + Each physical SDRAM chip may have one or more ranks. Ranks are + internal but fully independent sub-units of the chip. Each SDRAM bus transaction on the channel targets exactly one rank, based on the state of the CS pins. Different ranks may have different densities and timing requirements. @@ -64,6 +69,15 @@ allOf: properties: compatible: contains: + const: jedec,ddr4-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,ddr4.yaml# + - if: + properties: + compatible: + contains: const: jedec,lpddr2-channel then: patternProperties: @@ -107,7 +121,7 @@ additionalProperties: false examples: - | - lpddr-channel0 { + sdram-channel-0 { #address-cells = <1>; #size-cells = <0>; compatible = "jedec,lpddr3-channel"; @@ -122,7 +136,7 @@ examples: }; }; - lpddr-channel1 { + sdram-channel-1 { #address-cells = <1>; #size-cells = <0>; compatible = "jedec,lpddr4-channel"; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-props.yaml new file mode 100644 index 000000000000..fedd66eeb9d5 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-props.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,sdram-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common properties for SDRAM types + +description: + Different SDRAM types generally use the same properties and only differ in the + range of legal values for each. This file defines the common parts that can be + reused for each type. Nodes using this schema should generally be nested under + a SDRAM channel node. + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +properties: + compatible: + description: | + Compatible strings can be either explicit vendor names and part numbers + (e.g. elpida,ECB240ABACN), or generated strings of the form + lpddrX-YY,ZZZZ or ddrX-YYYY,AAAA...-ZZ where X, Y, and Z are lowercase + hexadecimal with leading zeroes, and A is lowercase ASCII. + For LPDDR and DDR SDRAM, X is the SDRAM version (2, 3, 4, etc.). + For LPDDR SDRAM: + - YY is the manufacturer ID (from MR5), 1 byte + - ZZZZ is the revision ID (from MR6 and MR7), 2 bytes + For DDR4 SDRAM with SPD, according to JEDEC SPD4.1.2.L-6: + - YYYY is the manufacturer ID, 2 bytes, from bytes 320 and 321 + - AAAA... is the part number, 20 bytes (20 chars) from bytes 329 to 348 + without trailing spaces + - ZZ is the revision ID, 1 byte, from byte 349 + The former form is useful when the SDRAM vendor and part number are + known, for example, when memory is soldered on the board. The latter + form is useful when SDRAM nodes are created at runtime by boot firmware + that doesn't have access to static part number information. + + reg: + description: + The rank number of this memory rank when used as a subnode to an memory + channel. + minimum: 0 + maximum: 3 + + revision-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + SDRAM revision ID: + - LPDDR SDRAM, decoded from Mode Registers 6 and 7, always 2 bytes. + - DDR4 SDRAM, decoded from the SPD from byte 349 according to + JEDEC SPD4.1.2.L-6, always 1 byte. + One byte per uint32 cell (e.g., <MR6 MR7>). + maxItems: 2 + items: + minimum: 0 + maximum: 255 + + density: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Density of the SDRAM chip in megabits: + - LPDDR SDRAM, decoded from Mode Register 8. + - DDR4 SDRAM, decoded from the SPD from bits 3-0 of byte 4 according to + JEDEC SPD4.1.2.L-6. + enum: + - 64 + - 128 + - 256 + - 512 + - 1024 + - 2048 + - 3072 + - 4096 + - 6144 + - 8192 + - 12288 + - 16384 + - 24576 + - 32768 + + io-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + I/O bus width in bits of the SDRAM chip: + - LPDDR SDRAM, decoded from Mode Register 8. + - DDR4 SDRAM, decoded from the SPD from bits 2-0 of byte 12 according to + JEDEC SPD4.1.2.L-6. + enum: + - 8 + - 16 + - 32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml index b901f1b3e0fc..7b03b589168b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml @@ -92,10 +92,14 @@ patternProperties: clocks: items: - description: external memory clock + - description: data backbone clock + minItems: 1 clock-names: items: - const: emc + - const: dbb + minItems: 1 "#interconnect-cells": const: 0 @@ -115,6 +119,9 @@ patternProperties: reg: maxItems: 1 + clocks: + maxItems: 1 + - if: properties: compatible: @@ -124,6 +131,9 @@ patternProperties: reg: minItems: 2 + clocks: + maxItems: 1 + - if: properties: compatible: @@ -133,6 +143,9 @@ patternProperties: reg: minItems: 2 + clocks: + maxItems: 1 + - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index da1887d7a8fe..a87f31fce019 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -130,6 +130,23 @@ patternProperties: - description: silicon id information registers - description: unique chip id registers + '^smp-memram@[0-9a-f]+$': + description: Memory region used for the AST2600's custom SMP bringup protocol + type: object + additionalProperties: false + + properties: + compatible: + const: aspeed,ast2600-smpmem + + reg: + description: The SMP memory region + maxItems: 1 + + required: + - compatible + - reg + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml b/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml index 4aa36903e755..dfee8707bac2 100644 --- a/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml +++ b/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml @@ -25,6 +25,7 @@ properties: - atmel,sama5d4-hlcdc - microchip,sam9x60-hlcdc - microchip,sam9x75-xlcdc + - microchip,sama7d65-xlcdc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml index c7d6cf96796c..5e5dec2f6564 100644 --- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml +++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml @@ -20,6 +20,7 @@ properties: - const: atmel,sama5d2-flexcom - items: - enum: + - microchip,lan9691-flexcom - microchip,sam9x7-flexcom - microchip,sama7d65-flexcom - microchip,sama7g5-flexcom diff --git a/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml b/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml new file mode 100644 index 000000000000..3cdc90ba421b --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/bitmain,bm1880-sctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bitmain BM1880 System Controller + +maintainers: + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + items: + - const: bitmain,bm1880-sctrl + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + '^pinctrl@[0-9a-f]+$': + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: bitmain,bm1880-pinctrl + + '^clock-controller@[0-9a-f]+$': + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: bitmain,bm1880-clk + + '^reset-controller@[0-9a-f]+$': + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: bitmain,bm1880-reset + +required: + - compatible + - reg + - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/mfd/da9055.txt b/Documentation/devicetree/bindings/mfd/da9055.txt index 131a53283e17..d3099bf56002 100644 --- a/Documentation/devicetree/bindings/mfd/da9055.txt +++ b/Documentation/devicetree/bindings/mfd/da9055.txt @@ -15,7 +15,7 @@ The CODEC device in DA9055 has a separate, configurable I2C address and so is instantiated separately from the PMIC. For details on accompanying CODEC I2C device, see the following: -Documentation/devicetree/bindings/sound/da9055.txt +Documentation/devicetree/bindings/sound/trivial-codec.yaml ====== diff --git a/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml new file mode 100644 index 000000000000..28e488cdde2d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp. + +maintainers: + - Luka Kovacic <luka.kovacic@sartura.hr> + +description: | + IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards. + It's used for controlling system power states, fans, LEDs and temperature + sensors. + + For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the + binding documents under the respective subsystem directories. + +properties: + compatible: + const: iei,wt61p803-puzzle + + current-speed: true + + enable-beep: + type: boolean + + hwmon: + $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml + + leds: + $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml + +required: + - compatible + - current-speed + +additionalProperties: false + +examples: + - | + #include <dt-bindings/leds/common.h> + serial { + mcu { + compatible = "iei,wt61p803-puzzle"; + current-speed = <115200>; + enable-beep; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_BLUE>; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <64 102 170 230 250>; + }; + + fan-group@1 { + #cooling-cells = <2>; + reg = <0x01>; + cooling-levels = <64 102 170 230 250>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml index 6a89b479d10f..05c121b0cb3d 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml @@ -90,6 +90,7 @@ properties: - enum: - mediatek,mt6323-regulator - mediatek,mt6328-regulator + - mediatek,mt6331-regulator - mediatek,mt6358-regulator - mediatek,mt6359-regulator - mediatek,mt6397-regulator diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml index 0e1d43c96fb9..4cafa381979b 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek System Control Processor System maintainers: - - MandyJH Liu <mandyjh.liu@mediatek.com> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + - Matthias Brugger <matthias.bgg@gmail.com> description: MediaTek System Control Processor System (SCPSYS) has several @@ -18,6 +19,7 @@ properties: compatible: items: - enum: + - mediatek,mt6795-scpsys - mediatek,mt6893-scpsys - mediatek,mt8167-scpsys - mediatek,mt8173-scpsys diff --git a/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml b/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml new file mode 100644 index 000000000000..b993dd15135a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC32xx System Control Block + +maintainers: + - Vladimir Zapolskiy <vz@mleia.com> + +description: + NXP LPC32xx SoC series have a System Control Block, which serves for + a multitude of purposes including clock management, DMA muxes, storing + SoC unique ID etc. + +properties: + compatible: + items: + - enum: + - nxp,lpc3220-scb + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "^clock-controller@[0-9a-f]+$": + $ref: /schemas/clock/nxp,lpc3220-clk.yaml# + + "^dma-router@[0-9a-f]+$": + $ref: /schemas/dma/nxp,lpc3220-dmamux.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + syscon@400040000 { + compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd"; + reg = <0x40004000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40004000 0x1000>; + + clock-controller@0 { + compatible = "nxp,lpc3220-clk"; + reg = <0x0 0x114>; + clocks = <&xtal_32k>, <&xtal>; + clock-names = "xtal_32k", "xtal"; + #clock-cells = <1>; + }; + + dma-router@78 { + compatible = "nxp,lpc3220-dmamux"; + reg = <0x78 0x8>; + dma-masters = <&dma>; + #dma-cells = <3>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 65c80e3b4500..e5931d18d998 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -77,8 +77,12 @@ properties: - qcom,pmc8180 - qcom,pmc8180c - qcom,pmc8380 + - qcom,pmcx0102 - qcom,pmd8028 - qcom,pmd9635 + - qcom,pmh0101 + - qcom,pmh0104 + - qcom,pmh0110 - qcom,pmi632 - qcom,pmi8950 - qcom,pmi8962 @@ -89,6 +93,7 @@ properties: - qcom,pmk8002 - qcom,pmk8350 - qcom,pmk8550 + - qcom,pmk8850 - qcom,pmm8155au - qcom,pmm8654au - qcom,pmp8074 @@ -101,6 +106,7 @@ properties: - qcom,pmx75 - qcom,smb2351 - qcom,smb2360 + - qcom,smb2370 - const: qcom,spmi-pmic reg: diff --git a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml index 5454d9403cad..12e738b1270a 100644 --- a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml +++ b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml @@ -16,6 +16,7 @@ description: properties: compatible: enum: + - qnap,ts133-mcu - qnap,ts233-mcu - qnap,ts433-mcu diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml b/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml new file mode 100644 index 000000000000..b0342df0e32a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/realtek,rtd1xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTD1xxx system controllers + +maintainers: + - Andreas Färber <afaerber@suse.de> + +properties: + compatible: + items: + - enum: + - realtek,rtd1293-crt + - realtek,rtd1293-iso + - realtek,rtd1293-misc + - realtek,rtd1293-sb2 + - realtek,rtd1293-scpu-wrapper + - realtek,rtd1295-crt + - realtek,rtd1295-iso + - realtek,rtd1295-misc + - realtek,rtd1295-sb2 + - realtek,rtd1295-scpu-wrapper + - realtek,rtd1296-crt + - realtek,rtd1296-iso + - realtek,rtd1296-misc + - realtek,rtd1296-sb2 + - realtek,rtd1296-scpu-wrapper + - realtek,rtd1395-crt + - realtek,rtd1395-iso + - realtek,rtd1395-misc + - realtek,rtd1395-sb2 + - realtek,rtd1395-scpu-wrapper + - realtek,rtd1619-crt + - realtek,rtd1619-iso + - realtek,rtd1619-misc + - realtek,rtd1619-sb2 + - realtek,rtd1619-scpu-wrapper + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + reg-io-width: + const: 4 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + '@[0-9a-f]+$': + type: object + + required: + - compatible + +required: + - compatible + - reg + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml new file mode 100644 index 000000000000..7c71447200ba --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml @@ -0,0 +1,197 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RK801 Power Management Integrated Circuit + +maintainers: + - Joseph Chen <chenjh@rock-chips.com> + +description: | + Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD + that includes multiple switchable regulators. + +properties: + compatible: + enum: + - rockchip,rk801 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + system-power-controller: + type: boolean + description: + Telling whether or not this PMIC is controlling the system power. + + wakeup-source: + type: boolean + description: + Device can be used as a wakeup source. + + vcc1-supply: + description: + The input supply for dcdc1. + + vcc2-supply: + description: + The input supply for dcdc2. + + vcc3-supply: + description: + The input supply for dcdc3. + + vcc4-supply: + description: + The input supply for dcdc4. + + vcc5-supply: + description: + The input supply for ldo1. + + vcc6-supply: + description: + The input supply for ldo2. + + vcc7-supply: + description: + The input supply for switch. + + regulators: + type: object + patternProperties: + "^(dcdc[1-4]|ldo[1-2]|switch)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + additionalProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/pinctrl/rockchip.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rk801: pmic@27 { + compatible = "rockchip,rk801"; + reg = <0x27>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + + regulators { + vdd_cpu: dcdc1 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc3v3_sys: dcdc2 { + regulator-name = "vcc3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_ddr: dcdc3 { + regulator-name = "vcc_ddr"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; + }; + }; + + vdd_logic: dcdc4 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = <0x1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd0v9_sys: ldo1 { + regulator-name = "vdd0v9_sys"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcc_1v8: ldo2 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_3v3: switch { + regulator-name = "vcc_3v3"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml new file mode 100644 index 000000000000..9f42097dfbac --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml @@ -0,0 +1,339 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd72720-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD72720 Power Management Integrated Circuit + +maintainers: + - Matti Vaittinen <mazziesaccount@gmail.com> + +description: + BD72720 is a single-chip power management IC for battery-powered portable + devices. The BD72720 integrates 10 bucks and 11 LDOs, and a 3000 mA + switching charger. The IC also includes a Coulomb counter, a real-time + clock (RTC), GPIOs and a 32.768 kHz clock gate. + +# In addition to the properties found from the charger node, the ROHM BD72720 +# uses properties from a static battery node. Please see the: +# Documentation/devicetree/bindings/power/supply/battery.yaml +# +# Following properties are used +# when present: +# +# charge-full-design-microamp-hours: Battry capacity in mAh +# voltage-max-design-microvolt: Maximum voltage +# voltage-min-design-microvolt: Minimum voltage system is still operating. +# degrade-cycle-microamp-hours: Capacity lost due to aging at each full +# charge cycle. +# ocv-capacity-celsius: Array of OCV table temperatures. 1/table. +# ocv-capacity-table-<N>: Table of OCV voltage/SOC pairs. Corresponds +# N.th temperature in ocv-capacity-celsius +# +# volt-drop-thresh-microvolt: Threshold for starting the VDR correction +# volt-drop-soc: Table of capacity values matching the +# values in VDR tables. +# +# volt-drop-temperatures-millicelsius: Temperatures corresponding to the volage +# drop values given in volt-drop-[0-9]-microvolt +# +# volt-drop-[0-9]-microvolt: VDR table for a temperature specified in +# volt-drop-temperatures-millicelsius +# +# VDR tables are (usually) determined for a specific battery by ROHM. +# The battery node would then be referred from the charger node: +# +# monitored-battery = <&battery>; + +properties: + compatible: + const: rohm,bd72720 + + reg: + description: + I2C slave address. + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: + The first cell is the pin number and the second cell is used to specify + flags. See the gpio binding document for more information. + + clocks: + maxItems: 1 + + "#clock-cells": + const: 0 + + clock-output-names: + const: bd71828-32k-out + + rohm,clkout-open-drain: + description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos". + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 1 + + rohm,charger-sense-resistor-micro-ohms: + minimum: 10000 + maximum: 50000 + description: + BD72720 has a SAR ADC for measuring charging currents. External sense + resistor (RSENSE in data sheet) should be used. If some other but + 30 mOhm resistor is used the resistance value should be given here in + micro Ohms. + + regulators: + $ref: /schemas/regulator/rohm,bd72720-regulator.yaml + description: + List of child nodes that specify the regulators. + + leds: + $ref: /schemas/leds/rohm,bd71828-leds.yaml + + rohm,pin-fault_b: + $ref: /schemas/types.yaml#/definitions/string + description: + BD72720 has an OTP option to use fault_b-pin for different + purposes. Set this property accordingly. OTP options are + OTP0 - bi-directional FAULT_B or READY indicator depending on a + 'sub option' + OTP1 - GPO + OTP2 - Power sequencer output. + enum: + - faultb + - readyind + - gpo + - pwrseq + +patternProperties: + "^rohm,pin-dvs[0-1]$": + $ref: /schemas/types.yaml#/definitions/string + description: + BD72720 has 4 different OTP options to determine the use of dvs<X>-pins. + OTP0 - regulator RUN state control. + OTP1 - GPI. + OTP2 - GPO. + OTP3 - Power sequencer output. + This property specifies the use of the pin. + enum: + - dvs-input + - gpi + - gpo + - pwrseq + + "^rohm,pin-exten[0-1]$": + $ref: /schemas/types.yaml#/definitions/string + description: BD72720 has an OTP option to use exten0-pin for different + purposes. Set this property accordingly. + OTP0 - GPO + OTP1 - Power sequencer output. + enum: + - gpo + - pwrseq + +required: + - compatible + - reg + - interrupts + - clocks + - "#clock-cells" + - regulators + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/leds/common.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + pmic: pmic@4b { + compatible = "rohm,bd72720"; + reg = <0x4b>; + + interrupt-parent = <&gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + + clocks = <&osc 0>; + #clock-cells = <0>; + clock-output-names = "bd71828-32k-out"; + + gpio-controller; + #gpio-cells = <2>; + + rohm,pin-dvs0 = "gpi"; + rohm,pin-dvs1 = "gpi"; + rohm,pin-exten0 = "gpo"; + rohm,pin-exten1 = "gpo"; + rohm,pin-fault_b = "faultb"; + + rohm,charger-sense-resistor-micro-ohms = <10000>; + + regulators { + buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <2500>; + }; + buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <2500>; + }; + buck3 { + regulator-name = "buck3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <2000000>; + }; + buck4 { + regulator-name = "buck4"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + }; + buck5 { + regulator-name = "buck5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + }; + buck6 { + regulator-name = "buck6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <2500>; + }; + buck7 { + regulator-name = "buck7"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <2500>; + }; + buck8 { + regulator-name = "buck8"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1700000>; + regulator-ramp-delay = <2500>; + rohm,dvs-run-voltage = <1700000>; + rohm,dvs-idle-voltage = <1>; + rohm,dvs-suspend-voltage = <1>; + rohm,dvs-lpsr-voltage = <0>; + regulator-boot-on; + }; + buck9 { + regulator-name = "buck9"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1700000>; + regulator-ramp-delay = <2500>; + rohm,dvs-run-voltage = <1700000>; + rohm,dvs-idle-voltage = <1>; + rohm,dvs-suspend-voltage = <1>; + rohm,dvs-lpsr-voltage = <0>; + regulator-boot-on; + }; + buck10 { + regulator-name = "buck10"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1700000>; + regulator-ramp-delay = <2500>; + rohm,dvs-run-voltage = <1700000>; + rohm,dvs-idle-voltage = <1>; + rohm,dvs-suspend-voltage = <1>; + rohm,dvs-lpsr-voltage = <0>; + regulator-boot-on; + }; + ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + ldo7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + ldo8 { + regulator-name = "ldo8"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + rohm,dvs-suspend-voltage = <0>; + rohm,dvs-lpsr-voltage = <1>; + rohm,dvs-run-voltage = <750000>; + }; + ldo9 { + regulator-name = "ldo9"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + rohm,dvs-suspend-voltage = <0>; + rohm,dvs-lpsr-voltage = <1>; + rohm,dvs-run-voltage = <750000>; + }; + ldo10 { + regulator-name = "ldo10"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + rohm,dvs-suspend-voltage = <0>; + rohm,dvs-lpsr-voltage = <1>; + rohm,dvs-run-voltage = <750000>; + }; + ldo11 { + regulator-name = "ldo11"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + rohm,dvs-suspend-voltage = <0>; + rohm,dvs-lpsr-voltage = <1>; + rohm,dvs-run-voltage = <750000>; + }; + }; + + leds { + compatible = "rohm,bd71828-leds"; + + led-1 { + rohm,led-compatible = "bd71828-grnled"; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_GREEN>; + }; + led-2 { + rohm,led-compatible = "bd71828-ambled"; + function = LED_FUNCTION_CHARGING; + color = <LED_COLOR_ID_AMBER>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml new file mode 100644 index 000000000000..0ea1a440b983 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/samsung,s2mpg10-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S2MPG10 Power Management IC + +maintainers: + - André Draszik <andre.draszik@linaro.org> + +description: | + This is part of the device tree bindings for the S2MPG10 Power Management IC + (PMIC). + + The Samsung S2MPG10 is a Power Management IC for mobile applications with buck + converters, various LDOs, power meters, RTC, clock outputs, and additional + GPIO interfaces and is typically complemented by S2MPG10 PMIC in a main/sub + configuration as the main PMIC. + +properties: + compatible: + const: samsung,s2mpg10-pmic + + clocks: + $ref: /schemas/clock/samsung,s2mps11.yaml + description: + Child node describing clock provider. + + interrupts: + maxItems: 1 + + regulators: + type: object + $ref: /schemas/regulator/samsung,s2mpg10-regulator.yaml + description: + List of child nodes that specify the regulators. + + system-power-controller: true + + wakeup-source: true + +patternProperties: + "^vinb([1-9]|10)m-supply$": + description: + Phandle to the power supply for each buck rail of this PMIC. There is a + 1:1 mapping of supply to rail, e.g. vinb1m-supply supplies buck1m. + + "^vinl([1-9]|1[0-5])m-supply$": + description: | + Phandle to the power supply for one or multiple LDO rails of this PMIC. + The mapping of supply to rail(s) is as follows: + vinl1m - ldo13m + vinl2m - ldo15m + vinl3m - ldo1m, ldo5m, ldo7m + vinl4m - ldo3m, ldo8m + vinl5m - ldo16m + vinl6m - ldo17m + vinl7m - ldo6m, ldo11m, ldo24m, ldo28m + vinl8m - ldo12m + vinl9m - ldo2m, ldo4m + vinl10m - ldo9m, ldo14m, ldo18m, 19m, ldo20m, ldo25m + vinl11m - ldo23m, ldo31m + vinl12m - ldo29m + vinl13m - ldo30m + vinl14m - ldo21m + vinl15m - ldo10m, ldo22m, ldo26m, ldo27m + +required: + - compatible + - interrupts + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h> + + pmic { + compatible = "samsung,s2mpg10-pmic"; + interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + system-power-controller; + wakeup-source; + + vinl3m-supply = <&buck8m>; + + clocks { + compatible = "samsung,s2mpg10-clk"; + #clock-cells = <1>; + clock-output-names = "rtc32k_ap", "peri32k1", "peri32k2"; + }; + + regulators { + buck8m { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <450000>; + regulator-max-microvolt = <1300000>; + regulator-ramp-delay = <6250>; + }; + + ldo1m { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + }; + + ldo20m { + regulator-name = "vdd_dmics"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + samsung,ext-control = <S2MPG10_EXTCTRL_LDO20M_EN2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml new file mode 100644 index 000000000000..62cedbbd9d8c --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/samsung,s2mpg11-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S2MPG11 Power Management IC + +maintainers: + - André Draszik <andre.draszik@linaro.org> + +description: | + This is part of the device tree bindings for the S2MPG11 Power Management IC + (PMIC). + + The Samsung S2MPG11 is a Power Management IC for mobile applications with buck + converters, various LDOs, power meters, NTC thermistor inputs, and additional + GPIO interfaces and typically complements an S2MPG10 PMIC in a main/sub + configuration as the sub-PMIC. + +properties: + compatible: + const: samsung,s2mpg11-pmic + + interrupts: + maxItems: 1 + + regulators: + type: object + $ref: /schemas/regulator/samsung,s2mpg11-regulator.yaml + description: + List of child nodes that specify the regulators. + + wakeup-source: true + +patternProperties: + "^vinb(([1-9]|10)s|[abd])-supply$": + description: + Phandle to the power supply for each buck rail of this PMIC. There is a + 1:1 mapping of numbered supply to rail, e.g. vinb1s-supply supplies + buck1s. The remaining mapping is as follows + vinba - bucka + vinbb - buck boost + vinbd - buckd + + "^vinl[1-6]s-supply$": + description: | + Phandle to the power supply for one or multiple LDO rails of this PMIC. + The mapping of supply to rail(s) is as follows + vinl1s - ldo1s, ldo2s + vinl2s - ldo8s, ldo9s + vinl3s - ldo3s, ldo5s, ldo7s, ldo15s + vinl4s - ldo10s, ldo11s, ldo12s, ldo14s + vinl5s - ldo4s, ldo6s + vinl6s - ldo13s + +required: + - compatible + - interrupts + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h> + + pmic { + compatible = "samsung,s2mpg11-pmic"; + interrupts-extended = <&gpa0 7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + wakeup-source; + + vinl1s-supply = <&buck8m>; + vinl2s-supply = <&buck6s>; + + regulators { + buckd { + regulator-name = "vcc_ufs"; + regulator-ramp-delay = <6250>; + enable-gpios = <&gpp0 1 GPIO_ACTIVE_HIGH>; + samsung,ext-control = <S2MPG11_EXTCTRL_UFS_EN>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml index 31d544a9c05c..ac5d0c149796 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml @@ -20,7 +20,6 @@ description: | properties: compatible: enum: - - samsung,s2mpg10-pmic - samsung,s2mps11-pmic - samsung,s2mps13-pmic - samsung,s2mps14-pmic @@ -59,12 +58,11 @@ properties: reset (setting buck voltages to default values). type: boolean - system-power-controller: true - wakeup-source: true required: - compatible + - reg - regulators additionalProperties: false @@ -74,31 +72,6 @@ allOf: properties: compatible: contains: - const: samsung,s2mpg10-pmic - then: - properties: - reg: false - samsung,s2mps11-acokb-ground: false - samsung,s2mps11-wrstbi-ground: false - - # oneOf is required, because dtschema's fixups.py doesn't handle this - # nesting here. Its special treatment to allow either interrupt property - # when only one is specified in the binding works at the top level only. - oneOf: - - required: [interrupts] - - required: [interrupts-extended] - - else: - properties: - system-power-controller: false - - required: - - reg - - - if: - properties: - compatible: - contains: const: samsung,s2mps11-pmic then: properties: diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 55efb83b1495..e57add2bacd3 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -102,6 +102,8 @@ select: - mstar,msc313-pmsleep - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm + - nxp,s32g2-gpr + - nxp,s32g3-gpr - qcom,apq8064-mmss-sfpb - qcom,apq8064-sps-sic - rockchip,px30-qos @@ -195,6 +197,7 @@ properties: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt7981-topmisc - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg @@ -212,6 +215,8 @@ properties: - mstar,msc313-pmsleep - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm + - nxp,s32g2-gpr + - nxp,s32g3-gpr - qcom,apq8064-mmss-sfpb - qcom,apq8064-sps-sic - rockchip,px30-qos diff --git a/Documentation/devicetree/bindings/misc/google,android-pipe.yaml b/Documentation/devicetree/bindings/misc/google,android-pipe.yaml new file mode 100644 index 000000000000..9e8046fd358d --- /dev/null +++ b/Documentation/devicetree/bindings/misc/google,android-pipe.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/google,android-pipe.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish QEMU Pipe + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +description: + Android QEMU pipe virtual device generated by Android emulator. + +properties: + compatible: + const: google,android-pipe + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + pipe@ff018000 { + compatible = "google,android-pipe"; + reg = <0xff018000 0x2000>; + interrupts = <18>; + }; diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml index 2f9a7a554ed8..17a8c19af8cc 100644 --- a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml @@ -25,6 +25,10 @@ properties: items: - const: pci1de4,1 + reg: + maxItems: 1 + description: The PCI Bus-Device-Function address. + '#interrupt-cells': const: 2 description: | @@ -101,6 +105,7 @@ unevaluatedProperties: false required: - compatible + - reg - '#interrupt-cells' - interrupt-controller - pci-ep-bus@1 @@ -111,8 +116,9 @@ examples: #address-cells = <3>; #size-cells = <2>; - rp1@0,0 { + dev@0,0 { compatible = "pci1de4,1"; + reg = <0x10000 0x0 0x0 0x0 0x0>; ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>; #address-cells = <3>; #size-cells = <2>; diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml index 3f6199fc9ae6..d8e47db677cc 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -18,7 +18,9 @@ description: | properties: compatible: - const: qcom,fastrpc + enum: + - qcom,kaanapali-fastrpc + - qcom,fastrpc label: enum: diff --git a/Documentation/devicetree/bindings/mmc/mmc-card.yaml b/Documentation/devicetree/bindings/mmc/mmc-card.yaml index 1d91d4272de0..a61d6c96df75 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-card.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-card.yaml @@ -32,21 +32,13 @@ properties: patternProperties: "^partitions(-boot[12]|-gp[14])?$": - $ref: /schemas/mtd/partitions/partitions.yaml + type: object + additionalProperties: true - patternProperties: - "^partition@[0-9a-f]+$": - $ref: /schemas/mtd/partitions/partition.yaml - - properties: - reg: - description: Must be multiple of 512 as it's converted - internally from bytes to SECTOR_SIZE (512 bytes) - - required: - - reg - - unevaluatedProperties: false + properties: + compatible: + contains: + const: fixed-partitions required: - compatible diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index 064e840aeaa1..3105f8e6cbd6 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -66,7 +66,6 @@ properties: items: - const: brcm,nand-iproc - const: brcm,brcmnand-v6.1 - - const: brcm,brcmnand - description: BCM63168 SoC-specific NAND controller items: - const: brcm,nand-bcm63168 diff --git a/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml index 73dc69cee4d8..367257a227b1 100644 --- a/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml +++ b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml @@ -40,6 +40,8 @@ properties: dmas: maxItems: 1 + dma-coherent: true + iommus: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.txt b/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.txt deleted file mode 100644 index 7328eb92a03c..000000000000 --- a/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.txt +++ /dev/null @@ -1,18 +0,0 @@ -* MTD SPI driver for Microchip 23K256 (and similar) serial SRAM - -Required properties: -- #address-cells, #size-cells : Must be present if the device has sub-nodes - representing partitions. -- compatible : Must be one of "microchip,mchp23k256" or "microchip,mchp23lcv1024" -- reg : Chip-Select number -- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at - -Example: - - spi-sram@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "microchip,mchp23k256"; - reg = <0>; - spi-max-frequency = <20000000>; - }; diff --git a/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.yaml b/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.yaml new file mode 100644 index 000000000000..32e9124594ac --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/microchip,mchp23k256.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/microchip,mchp23k256.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip 23K256 SPI SRAM + +maintainers: + - Richard Weinberger <richard@nod.at> + +description: + The Microchip 23K256 is a 256 Kbit (32 Kbyte) serial SRAM with an + SPI interface,supporting clock frequencies up to 20 MHz. It features + a 32-byte page size for writes and supports byte, page, and + sequential access modes. + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - microchip,mchp23k256 + - microchip,mchp23lcv1024 + + reg: + maxItems: 1 + +required: + - reg + - compatible + - spi-max-frequency + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + sram@0 { + compatible = "microchip,mchp23k256"; + reg = <0>; + spi-max-frequency = <20000000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/mtd.yaml b/Documentation/devicetree/bindings/mtd/mtd.yaml index bbb56216a4e2..5a2d06c96c0d 100644 --- a/Documentation/devicetree/bindings/mtd/mtd.yaml +++ b/Documentation/devicetree/bindings/mtd/mtd.yaml @@ -30,18 +30,14 @@ properties: deprecated: true partitions: - $ref: /schemas/mtd/partitions/partitions.yaml + type: object required: - compatible patternProperties: - "@[0-9a-f]+$": - $ref: partitions/partition.yaml - deprecated: true - - "^partition@[0-9a-f]+": - $ref: partitions/partition.yaml + "(^partition)?@[0-9a-f]+$": + $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node deprecated: true "^otp(-[0-9]+)?$": diff --git a/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml new file mode 100644 index 000000000000..81c041aa2610 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Macronix Raw NAND Controller + +maintainers: + - Mason Yang <masonccyang@mxic.com.tw> + +description: + The Macronix Multi-Interface Raw NAND Controller is a versatile flash + memory controller for embedding in SoCs, capable of interfacing with + various NAND devices. It requires dedicated clock inputs for core, data + transmit, and delayed transmit paths along with register space and an + interrupt line for operation. + +allOf: + - $ref: nand-controller.yaml# + +properties: + compatible: + const: mxic,multi-itfc-v009-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: ps + - const: send + - const: send_dly + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + nand-controller@43c30000 { + compatible = "mxic,multi-itfc-v009-nand-controller"; + reg = <0x43c30000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; + clock-names = "ps", "send", "send_dly"; + + nand@0 { + reg = <0>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/mxic-nand.txt b/Documentation/devicetree/bindings/mtd/mxic-nand.txt deleted file mode 100644 index 46c55295a3e6..000000000000 --- a/Documentation/devicetree/bindings/mtd/mxic-nand.txt +++ /dev/null @@ -1,36 +0,0 @@ -Macronix Raw NAND Controller Device Tree Bindings -------------------------------------------------- - -Required properties: -- compatible: should be "mxic,multi-itfc-v009-nand-controller" -- reg: should contain 1 entry for the registers -- #address-cells: should be set to 1 -- #size-cells: should be set to 0 -- interrupts: interrupt line connected to this raw NAND controller -- clock-names: should contain "ps", "send" and "send_dly" -- clocks: should contain 3 phandles for the "ps", "send" and - "send_dly" clocks - -Children nodes: -- children nodes represent the available NAND chips. - -See Documentation/devicetree/bindings/mtd/nand-controller.yaml -for more details on generic bindings. - -Example: - - nand: nand-controller@43c30000 { - compatible = "mxic,multi-itfc-v009-nand-controller"; - reg = <0x43c30000 0x10000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; - clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; - clock-names = "send", "send_dly", "ps"; - - nand@0 { - reg = <0>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml b/Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml new file mode 100644 index 000000000000..b417d72fa0de --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra NAND Flash Controller + +maintainers: + - Jonathan Hunter <jonathanh@nvidia.com> + +allOf: + - $ref: nand-controller.yaml + +description: + The NVIDIA NAND controller provides an interface between NVIDIA SoCs + and raw NAND flash devices. It supports standard NAND operations, + hardware-assisted ECC, OOB data access, and DMA transfers, and + integrates with the Linux MTD NAND subsystem for reliable flash management. + +properties: + compatible: + const: nvidia,tegra20-nand + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: nand + + resets: + maxItems: 1 + + reset-names: + items: + - const: nand + + power-domains: + maxItems: 1 + + operating-points-v2: + maxItems: 1 + +patternProperties: + '^nand@': + type: object + description: Individual NAND chip connected to the NAND controller + $ref: raw-nand-chip.yaml# + + properties: + reg: + maximum: 5 + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/tegra20-car.h> + #include <dt-bindings/gpio/tegra-gpio.h> + + nand-controller@70008000 { + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; + clock-names = "nand"; + resets = <&tegra_car 13>; + reset-names = "nand"; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-bus-width = <8>; + nand-on-flash-bbt; + nand-ecc-algo = "bch"; + nand-ecc-strength = <8>; + wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt b/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt deleted file mode 100644 index 4a00ec2b2540..000000000000 --- a/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt +++ /dev/null @@ -1,64 +0,0 @@ -NVIDIA Tegra NAND Flash controller - -Required properties: -- compatible: Must be one of: - - "nvidia,tegra20-nand" -- reg: MMIO address range -- interrupts: interrupt output of the NFC controller -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - nand -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following entries: - - nand - -Optional children nodes: -Individual NAND chips are children of the NAND controller node. Currently -only one NAND chip supported. - -Required children node properties: -- reg: An integer ranging from 1 to 6 representing the CS line to use. - -Optional children node properties: -- nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only - "hw" is supported. -- nand-ecc-algo: string, algorithm of NAND ECC. - Supported values with "hw" ECC mode are: "rs", "bch". -- nand-bus-width : See nand-controller.yaml -- nand-on-flash-bbt: See nand-controller.yaml -- nand-ecc-strength: integer representing the number of bits to correct - per ECC step (always 512). Supported strength using HW ECC - modes are: - - RS: 4, 6, 8 - - BCH: 4, 8, 14, 16 -- nand-ecc-maximize: See nand-controller.yaml -- nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM - are chosen. -- wp-gpios: GPIO specifier for the write protect pin. - -Optional child node of NAND chip nodes: -Partitions: see mtd.yaml - - Example: - nand-controller@70008000 { - compatible = "nvidia,tegra20-nand"; - reg = <0x70008000 0x100>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; - clock-names = "nand"; - resets = <&tegra_car 13>; - reset-names = "nand"; - - nand@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - nand-bus-width = <8>; - nand-on-flash-bbt; - nand-ecc-algo = "bch"; - nand-ecc-strength = <8>; - wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml b/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml index e9b1a6869910..d4b6013aefcc 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml @@ -9,8 +9,6 @@ title: ARM Firmware Suite (AFS) Partitions maintainers: - Linus Walleij <linusw@kernel.org> -select: false - description: | The ARM Firmware Suite is a flash partitioning system found on the ARM reference designs: Integrator AP, Integrator CP, Versatile AB, diff --git a/Documentation/devicetree/bindings/mtd/partitions/binman.yaml b/Documentation/devicetree/bindings/mtd/partitions/binman.yaml deleted file mode 100644 index bb4b08546184..000000000000 --- a/Documentation/devicetree/bindings/mtd/partitions/binman.yaml +++ /dev/null @@ -1,53 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mtd/partitions/binman.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Binman entries - -description: | - This corresponds to a binman 'entry'. It is a single partition which holds - data of a defined type. - - Binman uses the type to indicate what data file / type to place in the - partition. There are quite a number of binman-specific entry types, such as - section, fill and files, to be added later. - -maintainers: - - Simon Glass <sjg@chromium.org> - -allOf: - - $ref: /schemas/mtd/partitions/partition.yaml# - -properties: - compatible: - enum: - - u-boot # u-boot.bin from U-Boot project - - tfa-bl31 # bl31.bin or bl31.elf from TF-A project - -required: - - compatible - -unevaluatedProperties: false - -examples: - - | - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@100000 { - compatible = "u-boot"; - reg = <0x100000 0xf00000>; - align-size = <0x1000>; - align-end = <0x10000>; - }; - - partition@200000 { - compatible = "tfa-bl31"; - reg = <0x200000 0x100000>; - align = <0x4000>; - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml index 94f0742b375c..d9fefb46d2fa 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml @@ -17,8 +17,6 @@ description: | maintainers: - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> -select: false - properties: compatible: const: brcm,bcm4908-partitions @@ -31,11 +29,7 @@ properties: patternProperties: "^partition@[0-9a-f]+$": - $ref: partition.yaml# - properties: - compatible: - const: brcm,bcm4908-firmware - unevaluatedProperties: false + $ref: partition.yaml#/$defs/partition-node required: - "#address-cells" diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml index 939e7b50db22..3484e06d6bcb 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml @@ -35,8 +35,6 @@ description: | maintainers: - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> -select: false - properties: compatible: const: brcm,bcm947xx-cfe-partitions diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-imagetag.txt b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-imagetag.txt deleted file mode 100644 index f8b7418ed817..000000000000 --- a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-imagetag.txt +++ /dev/null @@ -1,45 +0,0 @@ -Broadcom BCM963XX ImageTag Partition Container -============================================== - -Some Broadcom BCM63XX SoC based devices contain additional, non discoverable -partitions or non standard bootloader partition sizes. For these a mixed layout -needs to be used with an explicit firmware partition. - -The BCM963XX ImageTag is a simple firmware header describing the offsets and -sizes of the rootfs and kernel parts contained in the firmware. - -Required properties: -- compatible : must be "brcm,bcm963xx-imagetag" - -Example: - -flash@1e000000 { - compatible = "cfi-flash"; - reg = <0x1e000000 0x2000000>; - bank-width = <2>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - cfe@0 { - reg = <0x0 0x10000>; - read-only; - }; - - firmware@10000 { - reg = <0x10000 0x7d0000>; - compatible = "brcm,bcm963xx-imagetag"; - }; - - caldata@7e0000 { - reg = <0x7e0000 0x10000>; - read-only; - }; - - nvram@7f0000 { - reg = <0x7f0000 0x10000>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt b/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt deleted file mode 100644 index c2175d3c82ec..000000000000 --- a/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt +++ /dev/null @@ -1,42 +0,0 @@ -Broadcom TRX Container Partition -================================ - -TRX is Broadcom's official firmware format for the BCM947xx boards. It's used by -most of the vendors building devices based on Broadcom's BCM47xx SoCs and is -supported by the CFE bootloader. - -Design of the TRX format is very minimalistic. Its header contains -identification fields, CRC32 checksum and the locations of embedded partitions. -Its purpose is to store a few partitions in a format that can be distributed as -a standalone file and written in a flash memory. - -Container can hold up to 4 partitions. The first partition has to contain a -device executable binary (e.g. a kernel) as it's what the CFE bootloader starts -executing. Other partitions can be used for operating system purposes. This is -useful for systems that keep kernel and rootfs separated. - -TRX doesn't enforce any strict partition boundaries or size limits. All -partitions have to be less than the 4GiB max size limit. - -There are two existing/known TRX variants: -1) v1 which contains 3 partitions -2) v2 which contains 4 partitions - -There aren't separated compatible bindings for them as version can be trivialy -detected by a software parsing TRX header. - -Required properties: -- compatible : (required) must be "brcm,trx" - -Optional properties: - -- brcm,trx-magic: TRX magic, if it is different from the default magic - 0x30524448 as a u32. - -Example: - -flash@0 { - partitions { - compatible = "brcm,trx"; - }; -}; diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.yaml b/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.yaml new file mode 100644 index 000000000000..71458b2c05fe --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/partitions/brcm,trx.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/partitions/brcm,trx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom TRX Container Partition + +maintainers: + - Hauke Mehrtens <hauke@hauke-m.de> + - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> + +description: > + TRX is Broadcom's official firmware format for the BCM947xx boards. It's used by + most of the vendors building devices based on Broadcom's BCM47xx SoCs and is + supported by the CFE bootloader. + + Design of the TRX format is very minimalistic. Its header contains + identification fields, CRC32 checksum and the locations of embedded partitions. + Its purpose is to store a few partitions in a format that can be distributed as + a standalone file and written in a flash memory. + + Container can hold up to 4 partitions. The first partition has to contain a + device executable binary (e.g. a kernel) as it's what the CFE bootloader starts + executing. Other partitions can be used for operating system purposes. This is + useful for systems that keep kernel and rootfs separated. + + TRX doesn't enforce any strict partition boundaries or size limits. All + partitions have to be less than the 4GiB max size limit. + + There are two existing/known TRX variants: + 1) v1 which contains 3 partitions + 2) v2 which contains 4 partitions + + There aren't separated compatible bindings for them as version can be trivially + detected by a software parsing TRX header. + +properties: + compatible: + oneOf: + - items: + - const: linksys,ns-firmware + - const: brcm,trx + - const: brcm,trx + + brcm,trx-magic: + description: TRX magic, if it is different from the default magic. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0x30524448 + +required: + - compatible + +allOf: + - $ref: partition.yaml# + +unevaluatedProperties: false + +examples: + - | + flash { + partitions { + compatible = "brcm,trx"; + }; + }; diff --git a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml index 62086366837c..984823108f9c 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml @@ -25,47 +25,25 @@ properties: - const: sercomm,sc-partitions - const: fixed-partitions - "#address-cells": true + "#address-cells": + enum: [ 1, 2 ] - "#size-cells": true - - compression: - $ref: /schemas/types.yaml#/definitions/string - description: | - Compression algorithm used to store the data in this partition, chosen - from a list of well-known algorithms. - - The contents are compressed using this algorithm. - - enum: - - none - - bzip2 - - gzip - - lzop - - lz4 - - lzma - - xz - - zstd + "#size-cells": + enum: [ 1, 2 ] patternProperties: "@[0-9a-f]+$": - $ref: partition.yaml# - - properties: - sercomm,scpart-id: - description: Partition id in Sercomm partition map. Mtd parser - uses this id to find a record in the partition map containing - offset and size of the current partition. The values from - partition map overrides partition offset and size defined in - reg property of the dts. Frequently these values are the same, - but may differ if device has bad eraseblocks on a flash. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: partition.yaml#/$defs/partition-node required: - "#address-cells" - "#size-cells" -additionalProperties: true +# fixed-partitions can be nested +allOf: + - $ref: partition.yaml# + +unevaluatedProperties: false examples: - | @@ -141,7 +119,6 @@ examples: compatible = "fixed-partitions"; label = "calibration"; reg = <0xf00000 0x100000>; - ranges = <0 0xf00000 0x100000>; #address-cells = <1>; #size-cells = <1>; diff --git a/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml index c5fa78ff7125..61d7e701b110 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml @@ -18,8 +18,6 @@ description: | maintainers: - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> -select: false - properties: compatible: const: linksys,ns-partitions @@ -32,13 +30,7 @@ properties: patternProperties: "^partition@[0-9a-f]+$": - $ref: partition.yaml# - properties: - compatible: - items: - - const: linksys,ns-firmware - - const: brcm,trx - unevaluatedProperties: false + $ref: partition.yaml#/$defs/partition-node required: - "#address-cells" diff --git a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml index 80d0452a2a33..2397d97ecac5 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml @@ -108,17 +108,59 @@ properties: with the padding bytes, so may grow. If ‘align-end’ is not provided, no alignment is performed. + compression: + $ref: /schemas/types.yaml#/definitions/string + description: | + Compression algorithm used to store the data in this partition, chosen + from a list of well-known algorithms. + + The contents are compressed using this algorithm. + + enum: + - none + - bzip2 + - gzip + - lzop + - lz4 + - lzma + - xz + - zstd + + sercomm,scpart-id: + description: Partition id in Sercomm partition map. Mtd parser + uses this id to find a record in the partition map containing + offset and size of the current partition. The values from + partition map overrides partition offset and size defined in + reg property of the dts. Frequently these values are the same, + but may differ if device has bad eraseblocks on a flash. + $ref: /schemas/types.yaml#/definitions/uint32 + + nvmem-layout: + $ref: /schemas/nvmem/layouts/nvmem-layout.yaml + if: not: required: [ reg ] then: properties: $nodename: - pattern: '^partition-.*$' + pattern: '^partitions?(-.+)?$' # This is a generic file other binding inherit from and extend additionalProperties: true +$defs: + partition-node: + type: object + if: + not: + required: [ compatible ] + then: + $ref: '#' + unevaluatedProperties: false + else: + $ref: '#' + examples: - | partitions { diff --git a/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml deleted file mode 100644 index 1dda2c80747b..000000000000 --- a/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mtd/partitions/partitions.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Partitions - -description: | - This binding is generic and describes the content of the partitions container - node. All partition parsers must be referenced here. - -maintainers: - - Miquel Raynal <miquel.raynal@bootlin.com> - -oneOf: - - $ref: arm,arm-firmware-suite.yaml - - $ref: brcm,bcm4908-partitions.yaml - - $ref: brcm,bcm947xx-cfe-partitions.yaml - - $ref: fixed-partitions.yaml - - $ref: linksys,ns-partitions.yaml - - $ref: qcom,smem-part.yaml - - $ref: redboot-fis.yaml - - $ref: tplink,safeloader-partitions.yaml - -properties: - compatible: true - - '#address-cells': - enum: [1, 2] - - '#size-cells': - enum: [1, 2] - -patternProperties: - "^partition(-.+|@[0-9a-f]+)$": - $ref: partition.yaml - -required: - - compatible - -unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml b/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml index e3978d2bc056..dc6421150c84 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml @@ -28,10 +28,6 @@ properties: device. On a flash memory with 32KB eraseblocks, 0 means the first eraseblock at 0x00000000, 1 means the second eraseblock at 0x00008000 and so on. - '#address-cells': false - - '#size-cells': false - required: - compatible - fis-index-block diff --git a/Documentation/devicetree/bindings/mtd/partitions/seama.yaml b/Documentation/devicetree/bindings/mtd/partitions/seama.yaml deleted file mode 100644 index 4af185204b4b..000000000000 --- a/Documentation/devicetree/bindings/mtd/partitions/seama.yaml +++ /dev/null @@ -1,44 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mtd/partitions/seama.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Seattle Image Partitions - -description: The SEAttle iMAge (SEAMA) partition is a type of partition - used for NAND flash devices. This type of flash image is found in some - D-Link routers such as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, - DIR890L and DCH-M225, as well as in WD and NEC routers on the ath79 - (MIPS), Broadcom BCM53xx, and RAMIPS platforms. This partition type - does not have children defined in the device tree, they need to be - detected by software. - -allOf: - - $ref: partition.yaml# - -maintainers: - - Linus Walleij <linusw@kernel.org> - -properties: - compatible: - const: seama - -required: - - compatible - -unevaluatedProperties: false - -examples: - - | - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - compatible = "seama"; - reg = <0x0 0x800000>; - label = "firmware"; - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/partitions/simple-partition.yaml b/Documentation/devicetree/bindings/mtd/partitions/simple-partition.yaml new file mode 100644 index 000000000000..14f5006c54a8 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/partitions/simple-partition.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/partitions/simple-partition.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Simple partition types + +description: + Simple partition types which only define a "compatible" value and no custom + properties. + +maintainers: + - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> + - Simon Glass <sjg@chromium.org> + +allOf: + - $ref: partition.yaml# + +properties: + compatible: + oneOf: + - const: brcm,bcm4908-firmware + description: + Broadcom BCM4908 CFE bootloader firmware partition + + - const: brcm,bcm963xx-imagetag + description: + The BCM963XX ImageTag is a simple firmware header describing the + offsets and sizes of the rootfs and kernel parts contained in the + firmware. + + - const: seama + description: + The SEAttle iMAge (SEAMA) partition is a type of partition used for + NAND flash devices. This type of flash image is found in some D-Link + routers such as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L + and DCH-M225, as well as in WD and NEC routers on the ath79 (MIPS), + Broadcom BCM53xx, and RAMIPS platforms. This partition type does not + have children defined in the device tree, they need to be detected by + software. + + - const: u-boot + description: > + u-boot.bin from U-Boot project. + + This corresponds to a binman 'entry'. It is a single partition which holds + data of a defined type. + + Binman uses the type to indicate what data file / type to place in the + partition. There are quite a number of binman-specific entry types, such as + section, fill and files, to be added later. + + - const: tfa-bl31 + description: > + bl31.bin or bl31.elf from TF-A project + + This corresponds to a binman 'entry'. It is a single partition which holds + data of a defined type. + +unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml index a24bbaac3a90..40e6eaab03ce 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml @@ -38,7 +38,7 @@ properties: patternProperties: "^partition-.*$": - $ref: partition.yaml# + $ref: partition.yaml#/$defs/partition-node required: - partitions-table-offset diff --git a/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml b/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml index 327fa872c001..d51bdcb7e585 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml @@ -29,7 +29,7 @@ properties: patternProperties: "^partition-.*$": - $ref: partition.yaml# + $ref: partition.yaml#/$defs/partition-node unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mtd/spear_smi.txt b/Documentation/devicetree/bindings/mtd/spear_smi.txt deleted file mode 100644 index c41873e92d26..000000000000 --- a/Documentation/devicetree/bindings/mtd/spear_smi.txt +++ /dev/null @@ -1,29 +0,0 @@ -* SPEAr SMI - -Required properties: -- compatible : "st,spear600-smi" -- reg : Address range of the mtd chip -- #address-cells, #size-cells : Must be present if the device has sub-nodes - representing partitions. -- interrupts: Should contain the STMMAC interrupts -- clock-rate : Functional clock rate of SMI in Hz - -Optional properties: -- st,smi-fast-mode : Flash supports read in fast mode - -Example: - - smi: flash@fc000000 { - compatible = "st,spear600-smi"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0xfc000000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <12>; - clock-rate = <50000000>; /* 50MHz */ - - flash@f8000000 { - st,smi-fast-mode; - ... - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml b/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml new file mode 100644 index 000000000000..8fe27aae7527 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/st,spear600-smi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics SPEAr600 Serial Memory Interface (SMI) Controller + +maintainers: + - Richard Weinberger <richard@nod.at> + +description: + The SPEAr600 Serial Memory Interface (SMI) is a dedicated serial flash + controller supporting up to four chip selects for serial NOR flashes + connected in parallel. The controller is memory-mapped and the attached + flash devices appear in the CPU address space.The driver + (drivers/mtd/devices/spear_smi.c) probes the attached flashes + dynamically by sending commands (e.g., RDID) to each bank. + Flash sub nodes describe the memory range and optional per-flash + properties. + +allOf: + - $ref: mtd.yaml# + +properties: + compatible: + const: st,spear600-smi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + clock-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Functional clock rate of the SMI controller in Hz. + + st,smi-fast-mode: + type: boolean + description: Indicates that the attached flash supports fast read mode. + +required: + - compatible + - reg + - clock-rate + +unevaluatedProperties: false + +examples: + - | + flash@fc000000 { + compatible = "st,spear600-smi"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xfc000000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <12>; + clock-rate = <50000000>; /* 50 MHz */ + + flash@f8000000 { + reg = <0xfc000000 0x1000>; + st,smi-fast-mode; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/st,spi-fsm.yaml b/Documentation/devicetree/bindings/mtd/st,spi-fsm.yaml new file mode 100644 index 000000000000..77099dc0fe53 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/st,spi-fsm.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/st,spi-fsm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics SPI FSM Serial NOR Flash Controller + +maintainers: + - Angus Clark <angus.clark@st.com> + +description: + The STMicroelectronics Fast Sequence Mode (FSM) controller is a dedicated + hardware accelerator integrated in older STiH4xx/STiDxxx set-top box SoCs + (such as STiH407, STiH416, STiD127). It connects directly to a single + external serial flash device used as the primary boot device. The FSM + executes hard-coded or configurable instruction sequences in hardware, + providing low-latency reads suitable for execute-in-place (XIP) boot + and high read bandwidth. + +properties: + compatible: + const: st,spi-fsm + + reg: + maxItems: 1 + + reg-names: + const: spi-fsm + + interrupts: + maxItems: 1 + + st,syscfg: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the system configuration registers used for boot-device selection. + + st,boot-device-reg: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset of the boot-device register within the st,syscfg node. + + st,boot-device-spi: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Expected boot-device value when booting from this SPI controller. + +required: + - compatible + - reg + - reg-names + - interrupts + - pinctrl-0 + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + spifsm@fe902000 { + compatible = "st,spi-fsm"; + reg = <0xfe902000 0x1000>; + reg-names = "spi-fsm"; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&pinctrl_fsm>; + st,syscfg = <&syscfg_rear>; + st,boot-device-reg = <0x958>; + st,boot-device-spi = <0x1a>; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/st-fsm.txt b/Documentation/devicetree/bindings/mtd/st-fsm.txt deleted file mode 100644 index 54cef9ef3083..000000000000 --- a/Documentation/devicetree/bindings/mtd/st-fsm.txt +++ /dev/null @@ -1,25 +0,0 @@ -* ST-Microelectronics SPI FSM Serial (NOR) Flash Controller - -Required properties: - - compatible : Should be "st,spi-fsm" - - reg : Contains register's location and length. - - reg-names : Should contain the reg names "spi-fsm" - - interrupts : The interrupt number - - pinctrl-0 : Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt) - -Optional properties: - - st,syscfg : Phandle to boot-device system configuration registers - - st,boot-device-reg : Address of the aforementioned boot-device register(s) - - st,boot-device-spi : Expected boot-device value if booted via this device - -Example: - spifsm: spifsm@fe902000{ - compatible = "st,spi-fsm"; - reg = <0xfe902000 0x1000>; - reg-names = "spi-fsm"; - pinctrl-0 = <&pinctrl_fsm>; - st,syscfg = <&syscfg_rear>; - st,boot-device-reg = <0x958>; - st,boot-device-spi = <0x1a>; - }; - diff --git a/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml b/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml index ed24b0ea86e5..7619b19e7a04 100644 --- a/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml @@ -24,7 +24,9 @@ properties: - description: AEMIF control registers. partitions: - $ref: /schemas/mtd/partitions/partitions.yaml + type: object + required: + - compatible ti,davinci-chipselect: description: diff --git a/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml b/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml index 7d3ace4f5505..8db991dee7eb 100644 --- a/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml +++ b/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml @@ -36,7 +36,7 @@ properties: patternProperties: "@[0-9a-f]+$": - $ref: /schemas/mtd/partitions/partition.yaml + $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node allOf: - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index c425a9f1886d..f594055c2b15 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -52,6 +52,20 @@ properties: description: Enable 25MHz reference clock output on CLK25_REF pin. type: boolean + adi,low-cmode-impedance: + description: | + Configure PHY for the lowest common-mode impedance on the receive pair + for 100BASE-TX. This is suited for capacitive coupled applications and + other applications where there may be a path for high common-mode noise + to reach the PHY. + If not present, by default the PHY is configured for normal termination + (zero-power termination) mode. + + Note: There is a trade-off of 12 mW increased power consumption with + the lowest common-mode impedance setting, but in all cases the + differential impedance is 100 ohms. + type: boolean + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml index 59c57f58116b..aefa19c5b424 100644 --- a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml +++ b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml @@ -42,14 +42,13 @@ properties: - description: wlan irq line5 memory-region: - oneOf: - - items: - - description: NPU firmware binary region - - items: - - description: NPU firmware binary region - - description: NPU wlan offload RX buffers region - - description: NPU wlan offload TX buffers region - - description: NPU wlan offload TX packet identifiers region + items: + - description: NPU firmware binary region + - description: NPU wlan offload RX buffers region + - description: NPU wlan offload TX buffers region + - description: NPU wlan offload TX packet identifiers region + - description: NPU wlan Block Ack buffers region + minItems: 1 memory-region-names: items: @@ -57,6 +56,13 @@ properties: - const: pkt - const: tx-pkt - const: tx-bufid + - const: ba + minItems: 1 + + firmware-name: + items: + - description: Firmware name of RiscV core + - description: Firmware name of Data section required: - compatible @@ -93,7 +99,9 @@ examples: <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>, - <&npu_txbufid>; - memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid"; + <&npu_txbufid>, <&npu_ba>; + memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid", "ba"; + firmware-name = "airoha/en7581_npu_rv32.bin", + "airoha/en7581_npu_data.bin"; }; }; diff --git a/Documentation/devicetree/bindings/net/airoha,en8811h.yaml b/Documentation/devicetree/bindings/net/airoha,en8811h.yaml index ecb5149ec6b0..0de6e9284fbc 100644 --- a/Documentation/devicetree/bindings/net/airoha,en8811h.yaml +++ b/Documentation/devicetree/bindings/net/airoha,en8811h.yaml @@ -16,6 +16,7 @@ description: allOf: - $ref: ethernet-phy.yaml# + - $ref: /schemas/phy/phy-common-props.yaml# properties: compatible: @@ -30,12 +31,18 @@ properties: description: Reverse rx polarity of the SERDES. This is the receiving side of the lines from the MAC towards the EN881H. + This property is deprecated, for details please refer to + Documentation/devicetree/bindings/phy/phy-common-props.yaml + deprecated: true airoha,pnswap-tx: type: boolean description: Reverse tx polarity of SERDES. This is the transmitting side of the lines from EN8811H towards the MAC. + This property is deprecated, for details please refer to + Documentation/devicetree/bindings/phy/phy-common-props.yaml + deprecated: true required: - reg @@ -44,6 +51,8 @@ unevaluatedProperties: false examples: - | + #include <dt-bindings/phy/phy.h> + mdio { #address-cells = <1>; #size-cells = <0>; @@ -51,6 +60,6 @@ examples: ethernet-phy@1 { compatible = "ethernet-phy-id03a2.a411"; reg = <1>; - airoha,pnswap-rx; + rx-polarity = <PHY_POL_INVERT>; }; }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml new file mode 100644 index 000000000000..c8e9c55c1afb --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,bluetooth-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Bluetooth Common Properties + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + firmware-name: + minItems: 1 + items: + - description: specify the name of nvm firmware to load + - description: specify the name of rampatch firmware to load + + qcom,local-bd-address-broken: + type: boolean + description: + boot firmware is incorrectly passing the address in big-endian order + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml new file mode 100644 index 000000000000..d4f167c9b7e1 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca2066-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCA2006 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,qca2066-bt + - qcom,qca6174-bt + + clocks: + items: + - description: External low-power 32.768 kHz clock input + + enable-gpios: + maxItems: 1 + +required: + - compatible + - clocks + - enable-gpios + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + serial { + bluetooth { + compatible = "qcom,qca6174-bt"; + clocks = <&divclk4>; + enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; + firmware-name = "nvm_00440302.bin"; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml new file mode 100644 index 000000000000..cffbc9e61cd6 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca6390-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCA6390 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,qca6390-bt + + vddaon-supply: + description: VDD_AON supply regulator handle + + vddbtcmx-supply: + description: VDD_BT_CMX supply regulator handle + + vddrfa0p8-supply: + description: VDD_RFA_0P8 supply regulator handle + + vddrfa1p2-supply: + description: VDD_RFA_1P2 supply regulator handle + + vddrfa1p7-supply: + description: VDD_RFA_1P7 supply regulator handle + + vddrfacmn-supply: + description: VDD_RFA_CMN supply regulator handle + +required: + - compatible + - vddaon-supply + - vddbtcmx-supply + - vddrfa0p8-supply + - vddrfa1p2-supply + - vddrfa1p7-supply + - vddrfacmn-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + serial { + bluetooth { + compatible = "qcom,qca6390-bt"; + vddaon-supply = <&vreg_pmu_aon_0p59>; + vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml new file mode 100644 index 000000000000..3fe9476c1d74 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca9377-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCA9377 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,qca9377-bt + + clocks: + items: + - description: External low-power 32.768 kHz clock input + + enable-gpios: + maxItems: 1 + + vddio-supply: + description: VDD_IO supply regulator handle + + vddxo-supply: + description: VDD_XO supply regulator handle + +required: + - compatible + - clocks + - enable-gpios + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + serial { + bluetooth { + compatible = "qcom,qca9377-bt"; + clocks = <&rk809 1>; + enable-gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_enable>; + vddio-supply = <&vcc_1v8>; + vddxo-supply = <&vcc3v3_sys>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml new file mode 100644 index 000000000000..83382f3c9049 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3950-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCN3950/WCN3988 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,wcn3950-bt + - qcom,wcn3988-bt + + enable-gpios: + maxItems: 1 + + swctrl-gpios: + maxItems: 1 + description: gpio specifier is used to find status + of clock supply to SoC + + vddch0-supply: + description: VDD_CH0 supply regulator handle + + vddio-supply: + description: VDD_IO supply regulator handle + + vddrf-supply: + description: VDD_RF supply regulator handle + + vddxo-supply: + description: VDD_XO supply regulator handle + +required: + - compatible + - vddch0-supply + - vddio-supply + - vddrf-supply + - vddxo-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + serial { + bluetooth { + compatible = "qcom,wcn3950-bt"; + enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; + max-speed = <3200000>; + vddch0-supply = <&pm4125_l22>; + vddio-supply = <&pm4125_l15>; + vddrf-supply = <&pm4125_l10>; + vddxo-supply = <&pm4125_l13>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml new file mode 100644 index 000000000000..89ceb1f7def0 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3990-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCN3990/WCN3991/WCN3998 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,wcn3990-bt + - qcom,wcn3991-bt + - qcom,wcn3998-bt + + clocks: + items: + - description: External low-power 32.768 kHz clock input + + vddch0-supply: + description: VDD_CH0 supply regulator handle + + vddch1-supply: + description: VDD_CH1 supply regulator handle + + vddio-supply: + description: VDD_IO supply regulator handle + + vddrf-supply: + description: VDD_RF supply regulator handle + + vddxo-supply: + description: VDD_XO supply regulator handle + +required: + - compatible + - vddch0-supply + - vddio-supply + - vddrf-supply + - vddxo-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + serial { + bluetooth { + compatible = "qcom,wcn3990-bt"; + firmware-name = "crnv21.bin"; + max-speed = <3200000>; + vddio-supply = <&vreg_s4a_1p8>; + vddch0-supply = <&vreg_l25a_3p3>; + vddch1-supply = <&vreg_l23a_3p3>; + vddrf-supply = <&vreg_l17a_1p3>; + vddxo-supply = <&vreg_l7a_1p8>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml new file mode 100644 index 000000000000..8606a45ac9b9 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6750-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCN6750 Bluetooth + +maintainers: + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,wcn6750-bt + + enable-gpios: + maxItems: 1 + deprecated: true + + swctrl-gpios: + maxItems: 1 + description: gpio specifier is used to find status + of clock supply to SoC + deprecated: true + + vddaon-supply: + description: VDD_AON supply regulator handle + + vddasd-supply: + description: VDD_ASD supply regulator handle + deprecated: true + + vddbtcmx-supply: + description: VDD_BT_CMX supply regulator handle + + vddbtcxmx-supply: + description: VDD_BT_CXMX supply regulator handle + deprecated: true + + vddio-supply: + description: VDD_IO supply regulator handle + deprecated: true + + vddrfa0p8-supply: + description: VDD_RFA_0P8 supply regulator handle + + vddrfa1p2-supply: + description: VDD_RFA_1P2 supply regulator handle + + vddrfa1p7-supply: + description: VDD_RFA_1P7 supply regulator handle + + vddrfa2p2-supply: + description: VDD_RFA_2P2 supply regulator handle + + vddrfacmn-supply: + description: VDD_RFA_CMN supply regulator handle + +required: + - compatible + - vddaon-supply + - vddrfa0p8-supply + - vddrfa1p2-supply + - vddrfa1p7-supply + - vddrfacmn-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + serial { + bluetooth { + compatible = "qcom,wcn6750-bt"; + + firmware-name = "msnv11.bin"; + max-speed = <3200000>; + vddaon-supply = <&vreg_pmu_aon_0p59>; + vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml new file mode 100644 index 000000000000..45630067d3c8 --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6855-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCN6855 Bluetooth + +maintainers: + - Bartosz Golaszewski <brgl@bgdev.pl> + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,wcn6855-bt + + enable-gpios: + maxItems: 1 + deprecated: true + + swctrl-gpios: + maxItems: 1 + description: gpio specifier is used to find status + of clock supply to SoC + deprecated: true + + vddaon-supply: + description: VDD_AON supply regulator handle + + vddbtcmx-supply: + description: VDD_BT_CMX supply regulator handle + + vddbtcxmx-supply: + description: VDD_BT_CXMX supply regulator handle + deprecated: true + + vddio-supply: + description: VDD_IO supply regulator handle + deprecated: true + + vddrfa0p8-supply: + description: VDD_RFA_0P8 supply regulator handle + + vddrfa1p2-supply: + description: VDD_RFA_1P2 supply regulator handle + + vddrfa1p7-supply: + description: VDD_RFA_1P7 supply regulator handle + deprecated: true + + vddrfa1p8-supply: + description: VDD_RFA_1P8 supply regulator handle + + vddrfacmn-supply: + description: VDD_RFA_CMN supply regulator handle + + vddwlcx-supply: + description: VDD_WLCX supply regulator handle + + vddwlmx-supply: + description: VDD_WLMX supply regulator handle + +required: + - compatible + - vddaon-supply + - vddbtcmx-supply + - vddrfa0p8-supply + - vddrfa1p2-supply + - vddrfa1p8-supply + - vddrfacmn-supply + - vddwlcx-supply + - vddwlmx-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + serial { + bluetooth { + compatible = "qcom,wcn6855-bt"; + + max-speed = <3000000>; + vddaon-supply = <&vreg_pmu_aon_0p8>; + vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>; + vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>; + vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply = <&vreg_pmu_wlmx_0p8>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml new file mode 100644 index 000000000000..8108ef83e99b --- /dev/null +++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn7850-bt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCN7850 Bluetooth + +maintainers: + - Bartosz Golaszewski <brgl@bgdev.pl> + - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> + - Rocky Liao <quic_rjliao@quicinc.com> + +properties: + compatible: + enum: + - qcom,wcn7850-bt + + enable-gpios: + maxItems: 1 + deprecated: true + + swctrl-gpios: + maxItems: 1 + description: gpio specifier is used to find status + of clock supply to SoC + deprecated: true + + vddaon-supply: + description: VDD_AON supply regulator handle + + vdddig-supply: + description: VDD_DIG supply regulator handle + deprecated: true + + vddio-supply: + description: VDD_IO supply regulator handle + deprecated: true + + vddrfa0p8-supply: + description: VDD_RFA_0P8 supply regulator handle + + vddrfa1p2-supply: + description: VDD_RFA_1P2 supply regulator handle + + vddrfa1p8-supply: + description: VDD_RFA_1P8 supply regulator handle + + vddrfa1p9-supply: + description: VDD_RFA_1P9 supply regulator handle + deprecated: true + + vddrfacmn-supply: + description: VDD_RFA_CMN supply regulator handle + + vddwlcx-supply: + description: VDD_WLCX supply regulator handle + + vddwlmx-supply: + description: VDD_WLMX supply regulator handle + +required: + - compatible + - vddrfacmn-supply + - vddaon-supply + - vddwlcx-supply + - vddwlmx-supply + - vddrfa0p8-supply + - vddrfa1p2-supply + - vddrfa1p8-supply + +allOf: + - $ref: bluetooth-controller.yaml# + - $ref: qcom,bluetooth-common.yaml + - $ref: /schemas/serial/serial-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + serial { + bluetooth { + compatible = "qcom,wcn7850-bt"; + + max-speed = <3200000>; + vddaon-supply = <&vreg_pmu_aon_0p59>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; + vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml deleted file mode 100644 index 6353a336f382..000000000000 --- a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml +++ /dev/null @@ -1,259 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/net/bluetooth/qualcomm-bluetooth.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Bluetooth Chips - -maintainers: - - Balakrishna Godavarthi <quic_bgodavar@quicinc.com> - - Rocky Liao <quic_rjliao@quicinc.com> - -description: - This binding describes Qualcomm UART-attached bluetooth chips. - -properties: - compatible: - enum: - - qcom,qca2066-bt - - qcom,qca6174-bt - - qcom,qca9377-bt - - qcom,wcn3950-bt - - qcom,wcn3988-bt - - qcom,wcn3990-bt - - qcom,wcn3991-bt - - qcom,wcn3998-bt - - qcom,qca6390-bt - - qcom,wcn6750-bt - - qcom,wcn6855-bt - - qcom,wcn7850-bt - - enable-gpios: - maxItems: 1 - description: gpio specifier used to enable chip - - swctrl-gpios: - maxItems: 1 - description: gpio specifier is used to find status - of clock supply to SoC - - clocks: - maxItems: 1 - description: clock provided to the controller (SUSCLK_32KHZ) - - vddio-supply: - description: VDD_IO supply regulator handle - - vddxo-supply: - description: VDD_XO supply regulator handle - - vddrf-supply: - description: VDD_RF supply regulator handle - - vddch0-supply: - description: VDD_CH0 supply regulator handle - - vddch1-supply: - description: VDD_CH1 supply regulator handle - - vddaon-supply: - description: VDD_AON supply regulator handle - - vdddig-supply: - description: VDD_DIG supply regulator handle - - vddbtcmx-supply: - description: VDD_BT_CMX supply regulator handle - - vddbtcxmx-supply: - description: VDD_BT_CXMX supply regulator handle - - vddrfacmn-supply: - description: VDD_RFA_CMN supply regulator handle - - vddrfa0p8-supply: - description: VDD_RFA_0P8 supply regulator handle - - vddrfa1p7-supply: - description: VDD_RFA_1P7 supply regulator handle - - vddrfa1p8-supply: - description: VDD_RFA_1P8 supply regulator handle - - vddrfa1p2-supply: - description: VDD_RFA_1P2 supply regulator handle - - vddrfa1p9-supply: - description: VDD_RFA_1P9 supply regulator handle - - vddrfa2p2-supply: - description: VDD_RFA_2P2 supply regulator handle - - vddasd-supply: - description: VDD_ASD supply regulator handle - - vddwlcx-supply: - description: VDD_WLCX supply regulator handle - - vddwlmx-supply: - description: VDD_WLMX supply regulator handle - - max-speed: true - - firmware-name: - minItems: 1 - items: - - description: specify the name of nvm firmware to load - - description: specify the name of rampatch firmware to load - - local-bd-address: true - - qcom,local-bd-address-broken: - type: boolean - description: - boot firmware is incorrectly passing the address in big-endian order - -required: - - compatible - -additionalProperties: false - -allOf: - - $ref: bluetooth-controller.yaml# - - $ref: /schemas/serial/serial-peripheral-props.yaml# - - if: - properties: - compatible: - contains: - enum: - - qcom,qca2066-bt - - qcom,qca6174-bt - then: - required: - - enable-gpios - - clocks - - - if: - properties: - compatible: - contains: - enum: - - qcom,wcn3950-bt - - qcom,wcn3988-bt - - qcom,wcn3990-bt - - qcom,wcn3991-bt - - qcom,wcn3998-bt - then: - required: - - vddio-supply - - vddxo-supply - - vddrf-supply - - vddch0-supply - - - if: - properties: - compatible: - contains: - enum: - - qcom,wcn6750-bt - then: - required: - - vddaon-supply - - vddrfacmn-supply - - vddrfa0p8-supply - - vddrfa1p7-supply - - vddrfa1p2-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,wcn6855-bt - then: - required: - - vddrfacmn-supply - - vddaon-supply - - vddwlcx-supply - - vddwlmx-supply - - vddbtcmx-supply - - vddrfa0p8-supply - - vddrfa1p2-supply - - vddrfa1p8-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,wcn7850-bt - then: - required: - - vddrfacmn-supply - - vddaon-supply - - vddwlcx-supply - - vddwlmx-supply - - vddrfa0p8-supply - - vddrfa1p2-supply - - vddrfa1p8-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,qca6390-bt - then: - required: - - vddrfacmn-supply - - vddaon-supply - - vddbtcmx-supply - - vddrfa0p8-supply - - vddrfa1p2-supply - - vddrfa1p7-supply - -examples: - - | - #include <dt-bindings/gpio/gpio.h> - serial { - - bluetooth { - compatible = "qcom,qca6174-bt"; - enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; - clocks = <&divclk4>; - firmware-name = "nvm_00440302.bin"; - }; - }; - - | - serial { - - bluetooth { - compatible = "qcom,wcn3990-bt"; - vddio-supply = <&vreg_s4a_1p8>; - vddxo-supply = <&vreg_l7a_1p8>; - vddrf-supply = <&vreg_l17a_1p3>; - vddch0-supply = <&vreg_l25a_3p3>; - max-speed = <3200000>; - firmware-name = "crnv21.bin"; - }; - }; - - | - serial { - - bluetooth { - compatible = "qcom,wcn6750-bt"; - pinctrl-names = "default"; - pinctrl-0 = <&bt_en_default>; - enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; - swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; - vddio-supply = <&vreg_l19b_1p8>; - vddaon-supply = <&vreg_s7b_0p9>; - vddbtcxmx-supply = <&vreg_s7b_0p9>; - vddrfacmn-supply = <&vreg_s7b_0p9>; - vddrfa0p8-supply = <&vreg_s7b_0p9>; - vddrfa1p7-supply = <&vreg_s1b_1p8>; - vddrfa1p2-supply = <&vreg_s8b_1p2>; - vddrfa2p2-supply = <&vreg_s1c_2p2>; - vddasd-supply = <&vreg_l11c_2p8>; - max-speed = <3200000>; - firmware-name = "msnv11.bin"; - }; - }; diff --git a/Documentation/devicetree/bindings/net/brcm,amac.yaml b/Documentation/devicetree/bindings/net/brcm,amac.yaml index 210fb29c4e7b..be1bf07985e4 100644 --- a/Documentation/devicetree/bindings/net/brcm,amac.yaml +++ b/Documentation/devicetree/bindings/net/brcm,amac.yaml @@ -73,6 +73,8 @@ properties: - const: idm_base - const: nicpm_base + dma-coherent: true + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml index ec0c2168e4b9..6bcfff970117 100644 --- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml +++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml @@ -87,6 +87,7 @@ required: allOf: - $ref: can-controller.yaml# + - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml index f4ac21c68427..b9d9dd7a7967 100644 --- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml +++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml @@ -12,6 +12,10 @@ maintainers: properties: compatible: oneOf: + - enum: + - renesas,r9a09g047-canfd # RZ/G3E + - renesas,r9a09g077-canfd # RZ/T2H + - items: - enum: - renesas,r8a774a1-canfd # RZ/G2M @@ -42,7 +46,15 @@ properties: - renesas,r9a07g054-canfd # RZ/V2L - const: renesas,rzg2l-canfd # RZ/G2L family - - const: renesas,r9a09g047-canfd # RZ/G3E + - items: + - enum: + - renesas,r9a09g056-canfd # RZ/V2N + - renesas,r9a09g057-canfd # RZ/V2H(P) + - const: renesas,r9a09g047-canfd + + - items: + - const: renesas,r9a09g087-canfd # RZ/N2H + - const: renesas,r9a09g077-canfd reg: maxItems: 1 @@ -122,12 +134,25 @@ properties: resets: true + reset-names: + items: + - const: rstp_n + - const: rstc_n + renesas,no-can-fd: $ref: /schemas/types.yaml#/definitions/flag description: - The controller can operate in either CAN FD only mode (default) or - Classical CAN only mode. The mode is global to all channels. - Specify this property to put the controller in Classical CAN only mode. + The controller can operate in either CAN-FD mode (default) or FD-Only + mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this + property to put the controller in Classical CAN mode. + + renesas,fd-only: + $ref: /schemas/types.yaml#/definitions/flag + description: + The CANFD on RZ/{G2L,G3E} and R-Car Gen4 SoCs support 3 modes FD-Only + mode, Classical CAN mode and CAN-FD mode (default). In FD-Only mode, + communication in Classical CAN frame format is disabled. Specify this + property to put the controller in FD-Only mode. assigned-clocks: description: @@ -160,7 +185,6 @@ required: - clocks - clock-names - power-domains - - resets - assigned-clocks - assigned-clock-rates - channel0 @@ -187,13 +211,6 @@ allOf: minItems: 2 maxItems: 2 - reset-names: - minItems: 2 - maxItems: 2 - - required: - - reset-names - - if: properties: compatible: @@ -231,18 +248,25 @@ allOf: minItems: 2 maxItems: 2 - reset-names: - minItems: 2 - maxItems: 2 + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-canfd + then: + properties: + interrupts: + maxItems: 8 - required: - - reset-names + interrupt-names: + maxItems: 8 - if: properties: compatible: contains: enum: + - renesas,r9a09g077-canfd - renesas,rcar-gen3-canfd - renesas,rzg2l-canfd then: @@ -267,6 +291,65 @@ allOf: patternProperties: "^channel[6-7]$": false + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen3-canfd + then: + properties: + renesas,fd-only: false + + - if: + required: + - renesas,no-can-fd + then: + properties: + renesas,fd-only: false + + - if: + required: + - renesas,fd-only + then: + properties: + renesas,no-can-fd: false + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-canfd + then: + properties: + resets: false + reset-names: false + + - if: + properties: + compatible: + contains: + enum: + - renesas,r9a09g047-canfd + - renesas,rzg2l-canfd + then: + required: + - resets + - reset-names + + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen3-canfd + - renesas,rcar-gen4-canfd + then: + required: + - resets + properties: + reset-names: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml index 205b683849a5..49af5573e452 100644 --- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml +++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml @@ -19,6 +19,8 @@ maintainers: properties: compatible: enum: + - intel,gsw150 + - lantiq,peb7084 - lantiq,xrx200-gswip - lantiq,xrx300-gswip - lantiq,xrx330-gswip @@ -103,9 +105,33 @@ patternProperties: patternProperties: "^(ethernet-)?port@[0-6]$": $ref: dsa-port.yaml# + allOf: + - $ref: /schemas/phy/phy-common-props.yaml# unevaluatedProperties: false properties: + maxlinear,slew-rate-txc: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + RMII/RGMII TX Clock Slew Rate: + + 0: Normal + 1: Slow + + If not present, the configuration made by the switch bootloader is + preserved. + maxlinear,slew-rate-txd: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + RMII/RGMII TX Non-Clock PAD Slew Rate: + + 0: Normal + 1: Slow + + If not present, the configuration made by the switch bootloader is + preserved. maxlinear,rmii-refclk-out: type: boolean description: @@ -264,6 +290,7 @@ examples: - | #include <dt-bindings/leds/common.h> + #include <dt-bindings/phy/phy.h> mdio { #address-cells = <1>; @@ -296,6 +323,7 @@ examples: label = "wan"; phy-mode = "1000base-x"; managed = "in-band-status"; + tx-polarity = <PHY_POL_INVERT>; }; port@5 { @@ -316,7 +344,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - switchphy0: switchphy@0 { + switchphy0: ethernet-phy@0 { reg = <0>; leds { @@ -331,7 +359,7 @@ examples: }; }; - switchphy1: switchphy@1 { + switchphy1: ethernet-phy@1 { reg = <1>; leds { diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml index 19f15bdd1c97..19ae600e9339 100644 --- a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -72,7 +72,7 @@ properties: '#interrupt-cells': description: The internal interrupt controller only supports triggering - on active high level interrupts so the second cell must alway be set to + on active high level interrupts so the second cell must always be set to IRQ_TYPE_LEVEL_HIGH. const: 2 diff --git a/Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml b/Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml new file mode 100644 index 000000000000..f1d667f7a055 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/maxlinear,mxl862xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MaxLinear MxL862xx Ethernet Switch Family + +maintainers: + - Daniel Golle <daniel@makrotopia.org> + +description: + The MaxLinear MxL862xx switch family are multi-port Ethernet switches with + integrated 2.5GE PHYs. The MxL86252 has five PHY ports and the MxL86282 + has eight PHY ports. Both models come with two 10 Gigabit/s SerDes + interfaces to be used to connect external PHYs or SFP cages, or as CPU + port. + +allOf: + - $ref: dsa.yaml#/$defs/ethernet-ports + +properties: + compatible: + enum: + - maxlinear,mxl86252 + - maxlinear,mxl86282 + + reg: + maxItems: 1 + description: MDIO address of the switch + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + +required: + - compatible + - mdio + - reg + +unevaluatedProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + compatible = "maxlinear,mxl86282"; + reg = <0>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + /* Microcontroller port */ + port@0 { + reg = <0>; + status = "disabled"; + }; + + port@1 { + reg = <1>; + phy-handle = <&phy0>; + phy-mode = "internal"; + }; + + port@2 { + reg = <2>; + phy-handle = <&phy1>; + phy-mode = "internal"; + }; + + port@3 { + reg = <3>; + phy-handle = <&phy2>; + phy-mode = "internal"; + }; + + port@4 { + reg = <4>; + phy-handle = <&phy3>; + phy-mode = "internal"; + }; + + port@5 { + reg = <5>; + phy-handle = <&phy4>; + phy-mode = "internal"; + }; + + port@6 { + reg = <6>; + phy-handle = <&phy5>; + phy-mode = "internal"; + }; + + port@7 { + reg = <7>; + phy-handle = <&phy6>; + phy-mode = "internal"; + }; + + port@8 { + reg = <8>; + phy-handle = <&phy7>; + phy-mode = "internal"; + }; + + port@9 { + reg = <9>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "usxgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + }; + + phy6: ethernet-phy@6 { + reg = <6>; + }; + + phy7: ethernet-phy@7 { + reg = <7>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index a8c8009414ae..8d4a3a9a33fc 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -40,6 +40,7 @@ properties: - const: reset description: Used during reset for strap configuration. + minItems: 1 reset-gpios: description: @@ -153,6 +154,8 @@ allOf: const: microchip,ksz8463 then: properties: + pinctrl-names: + minItems: 2 straps-rxd-gpios: description: RXD0 and RXD1 pins, used to select SPI as bus interface. diff --git a/Documentation/devicetree/bindings/net/ethernet-connector.yaml b/Documentation/devicetree/bindings/net/ethernet-connector.yaml new file mode 100644 index 000000000000..9ad7a00d4d01 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-connector.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic Ethernet Connector + +maintainers: + - Maxime Chevallier <maxime.chevallier@bootlin.com> + +description: + An Ethernet Connector represents the output of a network component such as + a PHY, an Ethernet controller with no PHY, or an SFP module. + +properties: + + pairs: + description: + Defines the number of BaseT pairs that are used on the connector. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 4] + + media: + description: + The mediums, as defined in 802.3, that can be used on the port. + enum: + - BaseT + - BaseK + - BaseS + - BaseC + - BaseL + - BaseD + - BaseE + - BaseF + - BaseV + - BaseMLD + +required: + - media + +allOf: + - if: + properties: + media: + const: BaseT + then: + required: + - pairs + else: + properties: + pairs: false + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index bb4c49fc5fd8..58634fee9fc4 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -281,6 +281,17 @@ properties: additionalProperties: false + mdi: + type: object + + patternProperties: + '^connector-[0-9]+$': + $ref: /schemas/net/ethernet-connector.yaml# + + unevaluatedProperties: false + + additionalProperties: false + required: - reg @@ -317,5 +328,12 @@ examples: default-state = "keep"; }; }; + /* Fast Ethernet port, with only 2 pairs wired */ + mdi { + connector-0 { + pairs = <2>; + media = "BaseT"; + }; + }; }; }; diff --git a/Documentation/devicetree/bindings/net/micrel,gigabit.yaml b/Documentation/devicetree/bindings/net/micrel,gigabit.yaml new file mode 100644 index 000000000000..384b4ea6181e --- /dev/null +++ b/Documentation/devicetree/bindings/net/micrel,gigabit.yaml @@ -0,0 +1,253 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/micrel,gigabit.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Micrel series Gigabit Ethernet PHYs + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Stefan Eichenberger <eichest@gmail.com> + +description: + Some boards require special skew tuning values, particularly when it comes + to clock delays. These values can be specified in the device tree using + the properties listed here. + +properties: + compatible: + enum: + - ethernet-phy-id0022.1610 # KSZ9021 + - ethernet-phy-id0022.1611 # KSZ9021RLRN + - ethernet-phy-id0022.1620 # KSZ9031 + - ethernet-phy-id0022.1631 # KSZ9477 + - ethernet-phy-id0022.1640 # KSZ9131 + - ethernet-phy-id0022.1650 # LAN8841 + - ethernet-phy-id0022.1660 # LAN8814 + - ethernet-phy-id0022.1670 # LAN8804 + + micrel,force-master: + type: boolean + description: | + Force phy to master mode. Only set this option if the phy reference + clock provided at CLK125_NDO pin is used as MAC reference clock + because the clock jitter in slave mode is too high (errata#2). + Attention: The link partner must be configurable as slave otherwise + no link will be established. + + coma-mode-gpios: + maxItems: 1 + description: | + If present the given gpio will be deasserted when the PHY is probed. + + Some PHYs have a COMA mode input pin which puts the PHY into + isolate and power-down mode. On some boards this input is connected + to a GPIO of the SoC. + + micrel,led-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + LED mode value to set for PHYs with configurable LEDs. + + Configure the LED mode with single value. The list of PHYs and the + bits that are currently supported: + + LAN8814: register EP5.0, bit 6 + + See the respective PHY datasheet for the mode values. + minimum: 0 + maximum: 1 + +patternProperties: + '^([rt]xc)-skew-psec$': + $ref: /schemas/types.yaml#/definitions/int32 + description: + Skew control of the pad in picoseconds. + minimum: -700 + maximum: 2400 + multipleOf: 100 + default: 0 + + '^([rt]xd[0-3]|rxdv|txen)-skew-psec$': + $ref: /schemas/types.yaml#/definitions/int32 + description: | + Skew control of the pad in picoseconds. + minimum: -700 + maximum: 800 + multipleOf: 100 + default: 0 + +allOf: + - $ref: ethernet-phy.yaml# + - if: + properties: + compatible: + contains: + enum: + - ethernet-phy-id0022.1610 + - ethernet-phy-id0022.1611 + then: + patternProperties: + '^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-ps$': + description: | + Skew control of the pad in picoseconds. + The actual increment on the chip is 120ps ranging from -840ps to + 960ps, this mismatch comes from a documentation error before + datasheet revision 1.2 (Feb 2014). + + The device tree value to delay mapping looks as follows: + Device Tree Value Delay + -------------------------- + 0 -840ps + 200 -720ps + 400 -600ps + 600 -480ps + 800 -360ps + 1000 -240ps + 1200 -120ps + 1400 0ps + 1600 120ps + 1800 240ps + 2000 360ps + 2200 480ps + 2400 600ps + 2600 720ps + 2800 840ps + 3000 960ps + minimum: 0 + maximum: 3000 + multipleOf: 200 + default: 1400 + - if: + properties: + compatible: + contains: + const: ethernet-phy-id0022.1620 + then: + patternProperties: + '^([rt]xc)-skew-ps$': + description: | + Skew control of the pad in picoseconds. + + The device tree value to delay mapping is as follows: + Device Tree Value Delay + -------------------------- + 0 -900ps + 60 -840ps + 120 -780ps + 180 -720ps + 240 -660ps + 300 -600ps + 360 -540ps + 420 -480ps + 480 -420ps + 540 -360ps + 600 -300ps + 660 -240ps + 720 -180ps + 780 -120ps + 840 -60ps + 900 0ps + 960 60ps + 1020 120ps + 1080 180ps + 1140 240ps + 1200 300ps + 1260 360ps + 1320 420ps + 1380 480ps + 1440 540ps + 1500 600ps + 1560 660ps + 1620 720ps + 1680 780ps + 1740 840ps + 1800 900ps + 1860 960ps + minimum: 0 + maximum: 1860 + multipleOf: 60 + default: 900 + '^([rt]xd[0-3]|rxdv|txen)-skew-ps$': + description: | + Skew control of the pad in picoseconds. + + The device tree value to delay mapping is as follows: + Device Tree Value Delay + -------------------------- + 0 -420ps + 60 -360ps + 120 -300ps + 180 -240ps + 240 -180ps + 300 -120ps + 360 -60ps + 420 0ps + 480 60ps + 540 120ps + 600 180ps + 660 240ps + 720 300ps + 780 360ps + 840 420ps + 900 480ps + minimum: 0 + maximum: 900 + multipleOf: 60 + default: 420 + - if: + not: + properties: + compatible: + contains: + enum: + - ethernet-phy-id0022.1640 + - ethernet-phy-id0022.1650 + then: + patternProperties: + '^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-psec$': false + - if: + not: + properties: + compatible: + contains: + const: ethernet-phy-id0022.1620 + then: + properties: + micrel,force-master: false + - if: + not: + properties: + compatible: + contains: + const: ethernet-phy-id0022.1660 + then: + properties: + coma-mode-gpios: false + micrel,led-mode: false + +unevaluatedProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@7 { + compatible = "ethernet-phy-id0022.1610"; + reg = <7>; + rxc-skew-ps = <3000>; + rxdv-skew-ps = <0>; + txc-skew-ps = <3000>; + txen-skew-ps = <0>; + }; + + ethernet-phy@9 { + compatible = "ethernet-phy-id0022.1640"; + reg = <9>; + rxc-skew-psec = <(-100)>; + txc-skew-psec = <(-100)>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt deleted file mode 100644 index 6f7b907d5a04..000000000000 --- a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +++ /dev/null @@ -1,228 +0,0 @@ -Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY - -Some boards require special tuning values, particularly when it comes -to clock delays. You can specify clock delay values in the PHY OF -device node. Deprecated, but still supported, these properties can -also be added to an Ethernet OF device node. - -Note that these settings are applied after any phy-specific fixup from -phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c), -and therefore may overwrite them. - -KSZ9021: - - All skew control options are specified in picoseconds. The minimum - value is 0, the maximum value is 3000, and it can be specified in 200ps - steps, *but* these values are in no way what you get because this chip's - skew values actually increase in 120ps steps, starting from -840ps. The - incorrect values came from an error in the original KSZ9021 datasheet - before it was corrected in revision 1.2 (Feb 2014), but it is too late to - change the driver now because of the many existing device trees that have - been created using values that go up in increments of 200. - - The following table shows the actual skew delay you will get for each of the - possible devicetree values, and the number that will be programmed into the - corresponding pad skew register: - - Device Tree Value Delay Pad Skew Register Value - ----------------------------------------------------- - 0 -840ps 0000 - 200 -720ps 0001 - 400 -600ps 0010 - 600 -480ps 0011 - 800 -360ps 0100 - 1000 -240ps 0101 - 1200 -120ps 0110 - 1400 0ps 0111 - 1600 120ps 1000 - 1800 240ps 1001 - 2000 360ps 1010 - 2200 480ps 1011 - 2400 600ps 1100 - 2600 720ps 1101 - 2800 840ps 1110 - 3000 960ps 1111 - - Optional properties: - - - rxc-skew-ps : Skew control of RXC pad - - rxdv-skew-ps : Skew control of RX CTL pad - - txc-skew-ps : Skew control of TXC pad - - txen-skew-ps : Skew control of TX CTL pad - - rxd0-skew-ps : Skew control of RX data 0 pad - - rxd1-skew-ps : Skew control of RX data 1 pad - - rxd2-skew-ps : Skew control of RX data 2 pad - - rxd3-skew-ps : Skew control of RX data 3 pad - - txd0-skew-ps : Skew control of TX data 0 pad - - txd1-skew-ps : Skew control of TX data 1 pad - - txd2-skew-ps : Skew control of TX data 2 pad - - txd3-skew-ps : Skew control of TX data 3 pad - -KSZ9031: - - All skew control options are specified in picoseconds. The minimum - value is 0, and the maximum is property-dependent. The increment - step is 60ps. The default value is the neutral setting, so setting - rxc-skew-ps=<0> actually results in -900 picoseconds adjustment. - - The KSZ9031 hardware supports a range of skew values from negative to - positive, where the specific range is property dependent. All values - specified in the devicetree are offset by the minimum value so they - can be represented as positive integers in the devicetree since it's - difficult to represent a negative number in the devictree. - - The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps. - - Pad Skew Value Delay (ps) Devicetree Value - ------------------------------------------------------ - 0_0000 -900ps 0 - 0_0001 -840ps 60 - 0_0010 -780ps 120 - 0_0011 -720ps 180 - 0_0100 -660ps 240 - 0_0101 -600ps 300 - 0_0110 -540ps 360 - 0_0111 -480ps 420 - 0_1000 -420ps 480 - 0_1001 -360ps 540 - 0_1010 -300ps 600 - 0_1011 -240ps 660 - 0_1100 -180ps 720 - 0_1101 -120ps 780 - 0_1110 -60ps 840 - 0_1111 0ps 900 - 1_0000 60ps 960 - 1_0001 120ps 1020 - 1_0010 180ps 1080 - 1_0011 240ps 1140 - 1_0100 300ps 1200 - 1_0101 360ps 1260 - 1_0110 420ps 1320 - 1_0111 480ps 1380 - 1_1000 540ps 1440 - 1_1001 600ps 1500 - 1_1010 660ps 1560 - 1_1011 720ps 1620 - 1_1100 780ps 1680 - 1_1101 840ps 1740 - 1_1110 900ps 1800 - 1_1111 960ps 1860 - - The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps - data pads, and the rxdv-skew-ps, txen-skew-ps control pads. - - Pad Skew Value Delay (ps) Devicetree Value - ------------------------------------------------------ - 0000 -420ps 0 - 0001 -360ps 60 - 0010 -300ps 120 - 0011 -240ps 180 - 0100 -180ps 240 - 0101 -120ps 300 - 0110 -60ps 360 - 0111 0ps 420 - 1000 60ps 480 - 1001 120ps 540 - 1010 180ps 600 - 1011 240ps 660 - 1100 300ps 720 - 1101 360ps 780 - 1110 420ps 840 - 1111 480ps 900 - - Optional properties: - - Maximum value of 1860, default value 900: - - - rxc-skew-ps : Skew control of RX clock pad - - txc-skew-ps : Skew control of TX clock pad - - Maximum value of 900, default value 420: - - - rxdv-skew-ps : Skew control of RX CTL pad - - txen-skew-ps : Skew control of TX CTL pad - - rxd0-skew-ps : Skew control of RX data 0 pad - - rxd1-skew-ps : Skew control of RX data 1 pad - - rxd2-skew-ps : Skew control of RX data 2 pad - - rxd3-skew-ps : Skew control of RX data 3 pad - - txd0-skew-ps : Skew control of TX data 0 pad - - txd1-skew-ps : Skew control of TX data 1 pad - - txd2-skew-ps : Skew control of TX data 2 pad - - txd3-skew-ps : Skew control of TX data 3 pad - - - micrel,force-master: - Boolean, force phy to master mode. Only set this option if the phy - reference clock provided at CLK125_NDO pin is used as MAC reference - clock because the clock jitter in slave mode is too high (errata#2). - Attention: The link partner must be configurable as slave otherwise - no link will be established. - -KSZ9131: -LAN8841: - - All skew control options are specified in picoseconds. The increment - step is 100ps. Unlike KSZ9031, the values represent picoseccond delays. - A negative value can be assigned as rxc-skew-psec = <(-100)>;. - - Optional properties: - - Range of the value -700 to 2400, default value 0: - - - rxc-skew-psec : Skew control of RX clock pad - - txc-skew-psec : Skew control of TX clock pad - - Range of the value -700 to 800, default value 0: - - - rxdv-skew-psec : Skew control of RX CTL pad - - txen-skew-psec : Skew control of TX CTL pad - - rxd0-skew-psec : Skew control of RX data 0 pad - - rxd1-skew-psec : Skew control of RX data 1 pad - - rxd2-skew-psec : Skew control of RX data 2 pad - - rxd3-skew-psec : Skew control of RX data 3 pad - - txd0-skew-psec : Skew control of TX data 0 pad - - txd1-skew-psec : Skew control of TX data 1 pad - - txd2-skew-psec : Skew control of TX data 2 pad - - txd3-skew-psec : Skew control of TX data 3 pad - -Examples: - - /* Attach to an Ethernet device with autodetected PHY */ - &enet { - rxc-skew-ps = <1800>; - rxdv-skew-ps = <0>; - txc-skew-ps = <1800>; - txen-skew-ps = <0>; - status = "okay"; - }; - - /* Attach to an explicitly-specified PHY */ - mdio { - phy0: ethernet-phy@0 { - rxc-skew-ps = <1800>; - rxdv-skew-ps = <0>; - txc-skew-ps = <1800>; - txen-skew-ps = <0>; - reg = <0>; - }; - }; - ethernet@70000 { - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - -References - - Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014. - http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf - - Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014. - http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf - -Notes: - - Note that a previous version of the Micrel ksz9021rl/rn Data Sheet - was missing extended register 106 (transmit data pad skews), and - incorrectly specified the ps per step as 200ps/step instead of - 120ps/step. The latest update to this document reflects the latest - revision of the Micrel specification even though usage in the kernel - still reflects that incorrect document. diff --git a/Documentation/devicetree/bindings/net/micrel.txt b/Documentation/devicetree/bindings/net/micrel.txt deleted file mode 100644 index 01622ce58112..000000000000 --- a/Documentation/devicetree/bindings/net/micrel.txt +++ /dev/null @@ -1,57 +0,0 @@ -Micrel PHY properties. - -These properties cover the base properties Micrel PHYs. - -Optional properties: - - - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs. - - Configure the LED mode with single value. The list of PHYs and the - bits that are currently supported: - - KSZ8001: register 0x1e, bits 15..14 - KSZ8041: register 0x1e, bits 15..14 - KSZ8021: register 0x1f, bits 5..4 - KSZ8031: register 0x1f, bits 5..4 - KSZ8051: register 0x1f, bits 5..4 - KSZ8081: register 0x1f, bits 5..4 - KSZ8091: register 0x1f, bits 5..4 - LAN8814: register EP5.0, bit 6 - - See the respective PHY datasheet for the mode values. - - - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select - bit selects 25 MHz mode - - Setting the RMII Reference Clock Select bit enables 25 MHz rather - than 50 MHz clock mode. - - Note that this option is only needed for certain PHY revisions with a - non-standard, inverted function of this configuration bit. - Specifically, a clock reference ("rmii-ref" below) is always needed to - actually select a mode. - - - clocks, clock-names: contains clocks according to the common clock bindings. - - supported clocks: - - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference - input clock. Used to determine the XI input clock. - - - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode - - Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled - by the FXEN boot strapping pin. It can't be determined from the PHY - registers whether the PHY is in fiber mode, so this boolean device tree - property can be used to describe it. - - In fiber mode, auto-negotiation is disabled and the PHY can only work in - 100base-fx (full and half duplex) modes. - - - coma-mode-gpios: If present the given gpio will be deasserted when the - PHY is probed. - - Some PHYs have a COMA mode input pin which puts the PHY into - isolate and power-down mode. On some boards this input is connected - to a GPIO of the SoC. - - Supported on the LAN8814. diff --git a/Documentation/devicetree/bindings/net/micrel.yaml b/Documentation/devicetree/bindings/net/micrel.yaml new file mode 100644 index 000000000000..ecc00169ef80 --- /dev/null +++ b/Documentation/devicetree/bindings/net/micrel.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/micrel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Micrel KSZ series PHYs and switches + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Stefan Eichenberger <eichest@gmail.com> + +description: + The Micrel KSZ series contains different network phys and switches. + +properties: + compatible: + enum: + - ethernet-phy-id000e.7237 # KSZ8873MLL + - ethernet-phy-id0022.1430 # KSZ886X + - ethernet-phy-id0022.1435 # KSZ8863 + - ethernet-phy-id0022.1510 # KSZ8041 + - ethernet-phy-id0022.1537 # KSZ8041RNLI + - ethernet-phy-id0022.1550 # KSZ8051 + - ethernet-phy-id0022.1555 # KSZ8021 + - ethernet-phy-id0022.1556 # KSZ8031 + - ethernet-phy-id0022.1560 # KSZ8081, KSZ8091 + - ethernet-phy-id0022.1570 # KSZ8061 + - ethernet-phy-id0022.161a # KSZ8001 + - ethernet-phy-id0022.1720 # KS8737 + + micrel,fiber-mode: + type: boolean + description: | + If present the PHY is configured to operate in fiber mode. + + The KSZ8041FTL variant supports fiber mode, enabled by the FXEN + boot strapping pin. It can't be determined from the PHY registers + whether the PHY is in fiber mode, so this boolean device tree + property can be used to describe it. + + In fiber mode, auto-negotiation is disabled and the PHY can only + work in 100base-fx (full and half duplex) modes. + + micrel,led-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + LED mode value to set for PHYs with configurable LEDs. + + Configure the LED mode with single value. The list of PHYs and the + bits that are currently supported: + + KSZ8001: register 0x1e, bits 15..14 + KSZ8041: register 0x1e, bits 15..14 + KSZ8021: register 0x1f, bits 5..4 + KSZ8031: register 0x1f, bits 5..4 + KSZ8051: register 0x1f, bits 5..4 + KSZ8081: register 0x1f, bits 5..4 + KSZ8091: register 0x1f, bits 5..4 + + See the respective PHY datasheet for the mode values. + minimum: 0 + maximum: 3 + +allOf: + - $ref: ethernet-phy.yaml# + - if: + not: + properties: + compatible: + contains: + const: ethernet-phy-id0022.1510 + then: + properties: + micrel,fiber-mode: false + - if: + not: + properties: + compatible: + contains: + enum: + - ethernet-phy-id0022.1510 + - ethernet-phy-id0022.1555 + - ethernet-phy-id0022.1556 + - ethernet-phy-id0022.1550 + - ethernet-phy-id0022.1560 + - ethernet-phy-id0022.161a + then: + properties: + micrel,led-mode: false + - if: + properties: + compatible: + contains: + enum: + - ethernet-phy-id0022.1555 + - ethernet-phy-id0022.1556 + - ethernet-phy-id0022.1560 + then: + properties: + clock-names: + const: rmii-ref + description: + The RMII reference input clock. Used to determine the XI input + clock. + micrel,rmii-reference-clock-select-25-mhz: + type: boolean + description: | + RMII Reference Clock Select bit selects 25 MHz mode + + Setting the RMII Reference Clock Select bit enables 25 MHz rather + than 50 MHz clock mode. + +dependentRequired: + micrel,rmii-reference-clock-select-25-mhz: [ clock-names ] + +unevaluatedProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@5 { + compatible = "ethernet-phy-id0022.1510"; + reg = <5>; + micrel,led-mode = <2>; + micrel,fiber-mode; + }; + }; diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml index 5491d0775ede..75c7c8d1f411 100644 --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -151,10 +151,23 @@ properties: required: - reg - - phys - phy-mode - microchip,bandwidth + if: + not: + properties: + phy-mode: + contains: + enum: + - rgmii + - rgmii-id + - rgmii-rxid + - rgmii-txid + then: + required: + - phys + oneOf: - required: - phy-handle diff --git a/Documentation/devicetree/bindings/net/mscc,miim.yaml b/Documentation/devicetree/bindings/net/mscc,miim.yaml index 792f26b06b06..2207b33aee76 100644 --- a/Documentation/devicetree/bindings/net/mscc,miim.yaml +++ b/Documentation/devicetree/bindings/net/mscc,miim.yaml @@ -14,9 +14,14 @@ allOf: properties: compatible: - enum: - - mscc,ocelot-miim - - microchip,lan966x-miim + oneOf: + - enum: + - mscc,ocelot-miim + - microchip,lan966x-miim + - items: + - enum: + - microchip,lan9691-miim + - const: mscc,ocelot-miim "#address-cells": const: 1 diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml index 2b8b74c5feec..1b2934f3c87c 100644 --- a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -32,6 +32,18 @@ properties: - description: Main GMAC registers - description: GMAC PHY mode control register + nxp,phy-sel: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the GPR syscon node + - description: offset of PHY selection register + description: + This phandle points to the GMAC_0_CTRL_STS register which controls the + GMAC_0 configuration options. The register lets you select the PHY + interface and the PHY mode. It also controls if the FTM_0 or FTM_1 + FlexTimer Modules connect to GMAC_0. + interrupts: maxItems: 1 @@ -74,6 +86,7 @@ examples: compatible = "nxp,s32g2-dwmac"; reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ + nxp,phy-sel = <&gpr 0x4>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; diff --git a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml index 1bacc0eeff75..b8478416f8ef 100644 --- a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml +++ b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml @@ -39,12 +39,17 @@ properties: const: 1 mediatek,pnswap: - description: Invert polarity of the SGMII data lanes + description: + Invert polarity of the SGMII data lanes. + This property is deprecated, for details please refer to + Documentation/devicetree/bindings/phy/phy-common-props.yaml. type: boolean + deprecated: true pcs: type: object description: MediaTek LynxI HSGMII PCS + $ref: /schemas/phy/phy-common-props.yaml# properties: compatible: const: mediatek,mt7988-sgmii diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml index 3adbcf56d2be..f9d39114e667 100644 --- a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml @@ -86,6 +86,13 @@ patternProperties: and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs. $ref: /schemas/types.yaml#/definitions/uint32 + renesas,miic-phy-link-active-low: + type: boolean + description: Indicates that the PHY-link signal provided by the Ethernet switch, + EtherCAT, or SERCOS3 interface is active low. When present, this property + sets the corresponding signal polarity to active low. When omitted, the signal + defaults to active high. + required: - reg - renesas,miic-input diff --git a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml index bd53ab300f50..2125b5ddf73d 100644 --- a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml +++ b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml @@ -27,6 +27,9 @@ properties: compatible: oneOf: - items: + - const: renesas,r9a08g046-gbeth # RZ/G3L + - const: snps,dwmac-5.30a + - items: - enum: - renesas,r9a09g047-gbeth # RZ/G3E - renesas,r9a09g056-gbeth # RZ/V2N @@ -47,13 +50,19 @@ properties: clocks: oneOf: - items: - - description: CSR clock - - description: AXI system clock + - description: CSR/Register access clock + - description: AXI system/Main clock - description: PTP clock - description: TX clock - description: RX clock - description: TX clock phase-shifted by 180 degrees - description: RX clock phase-shifted by 180 degrees + - description: RMII clock + - description: RMII TX clock + - description: RMII RX clock + + minItems: 7 + - items: - description: CSR clock - description: AXI system clock @@ -69,6 +78,12 @@ properties: - const: rx - const: tx-180 - const: rx-180 + - const: rmii + - const: rmii_tx + - const: rmii_rx + + minItems: 7 + - items: - const: stmmaceth - const: pclk @@ -96,6 +111,22 @@ properties: - const: rx-queue-1 - const: rx-queue-2 - const: rx-queue-3 + - const: tx-queue-0 + - const: tx-queue-1 + - const: tx-queue-2 + - const: tx-queue-3 + - const: ptp-pps-0 + - const: ptp-pps-1 + - const: ptp-pps-2 + - const: ptp-pps-3 + - items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + - const: rx-queue-0 + - const: rx-queue-1 + - const: rx-queue-2 + - const: rx-queue-3 - const: rx-queue-4 - const: rx-queue-5 - const: rx-queue-6 @@ -139,6 +170,27 @@ allOf: properties: compatible: contains: + const: renesas,r9a08g046-gbeth + then: + properties: + clocks: + minItems: 10 + + clock-names: + minItems: 10 + + interrupts: + minItems: 15 + maxItems: 15 + + interrupt-names: + minItems: 15 + maxItems: 15 + + - if: + properties: + compatible: + contains: const: renesas,r9a09g077-gbeth then: properties: @@ -164,11 +216,25 @@ allOf: - reset-names else: properties: + resets: + maxItems: 1 + + pcs-handle: false + + reset-names: false + + - if: + properties: + compatible: + contains: + const: renesas,rzv2h-gbeth + then: + properties: clocks: - minItems: 7 + maxItems: 7 clock-names: - minItems: 7 + maxItems: 7 interrupts: minItems: 11 @@ -178,13 +244,6 @@ allOf: minItems: 11 maxItems: 11 - resets: - maxItems: 1 - - pcs-handle: false - - reset-names: false - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml index d17112527dab..80c252845349 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -85,6 +85,8 @@ properties: - clk_mac_refout - clk_mac_speed + dma-coherent: true + clock_in_out: description: For RGMII, it must be "input", means main clock(125MHz) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index dd3c72e8363e..38bc34dc4f09 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -75,6 +75,7 @@ properties: - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos - renesas,r9a06g032-gmac + - renesas,r9a08g046-gbeth - renesas,r9a09g077-gbeth - renesas,rzn1-gmac - renesas,rzv2h-gbeth @@ -142,6 +143,8 @@ properties: pattern: '^rx-queue-[0-7]$' - description: Per channel transmit completion interrupt pattern: '^tx-queue-[0-7]$' + - description: PPS interrupt + pattern: '^ptp-pps-[0-3]$' clocks: minItems: 1 diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml index 28a0bddb9af9..23c70d863c39 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83822.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml @@ -47,6 +47,9 @@ properties: is disabled. In fiber mode, auto-negotiation is disabled and the PHY can only work in 100base-fx (full and half duplex) modes. + This property is deprecated, for details please refer to + Documentation/devicetree/bindings/net/ethernet-connector.yaml + deprecated: true rx-internal-delay-ps: description: | @@ -141,7 +144,11 @@ examples: tx-internal-delay-ps = <1>; ti,gpio2-clk-out = "xi"; mac-termination-ohms = <43>; + mdi { + connector-0 { + media = "BaseF"; + }; + }; }; }; - ... diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml index e34d42a30192..0162e365798b 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml @@ -37,6 +37,7 @@ properties: firmware-name: maxItems: 1 + deprecated: true description: If present, a board or platform specific string used to lookup usecase-specific firmware files for the device. diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index c089677702cf..0cc1dbf2beef 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -214,15 +214,6 @@ allOf: - const: wbm2host-tx-completions-ring2 - const: wbm2host-tx-completions-ring1 - const: tcl2host-status-ring - - - if: - properties: - compatible: - contains: - enum: - - qcom,ipq8074-wifi - - qcom,ipq6018-wifi - then: required: - interrupt-names diff --git a/Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml b/Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml new file mode 100644 index 000000000000..99e322c72f9e --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/google,gs101-otp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google GS101 OTP Controller + +maintainers: + - Tudor Ambarus <tudor.ambarus@linaro.org> + +description: | + OTP controller drives a NVMEM memory where system or user specific data + can be stored. The OTP controller register space is of interest as well + because it contains dedicated registers where it stores the Product ID + and the Chip ID (apart other things like TMU or ASV info). + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + items: + - const: google,gs101-otp + + clocks: + maxItems: 1 + + clock-names: + const: pclk + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/google,gs101.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + efuse@10000000 { + compatible = "google,gs101-otp"; + reg = <0x10000000 0xf084>; + clocks = <&cmu_misc CLK_GOUT_MISC_OTP_CON_TOP_PCLK>; + clock-names = "pclk"; + interrupts = <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml index c9bf34ee0efb..f9323b3ecfc8 100644 --- a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml @@ -28,6 +28,7 @@ properties: - enum: - mediatek,mt8188-efuse - mediatek,mt8189-efuse + - mediatek,mt8196-efuse - const: mediatek,mt8186-efuse - const: mediatek,mt8186-efuse diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 7d1612acca48..839513d4b499 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -55,6 +55,7 @@ properties: - qcom,sm8450-qfprom - qcom,sm8550-qfprom - qcom,sm8650-qfprom + - qcom,sm8750-qfprom - qcom,x1e80100-qfprom - const: qcom,qfprom diff --git a/Documentation/devicetree/bindings/pci/aspeed,ast2600-pcie.yaml b/Documentation/devicetree/bindings/pci/aspeed,ast2600-pcie.yaml new file mode 100644 index 000000000000..d9478249418a --- /dev/null +++ b/Documentation/devicetree/bindings/pci/aspeed,ast2600-pcie.yaml @@ -0,0 +1,182 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/aspeed,ast2600-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED PCIe Root Complex Controller + +maintainers: + - Jacky Chou <jacky_chou@aspeedtech.com> + +description: + The ASPEED PCIe Root Complex controller provides PCI Express Root Complex + functionality for ASPEED SoCs, such as the AST2600 and AST2700. + This controller enables connectivity to PCIe endpoint devices, supporting + memory and I/O windows, MSI and INTx interrupts, and integration with + the SoC's clock, reset, and pinctrl subsystems. On AST2600, the PCIe Root + Port device number is always 8. + +properties: + compatible: + enum: + - aspeed,ast2600-pcie + - aspeed,ast2700-pcie + + reg: + maxItems: 1 + + ranges: + minItems: 2 + maxItems: 2 + + interrupts: + maxItems: 1 + description: INTx and MSI interrupt + + resets: + items: + - description: PCIe controller reset + + reset-names: + items: + - const: h2x + + aspeed,ahbc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the ASPEED AHB Controller (AHBC) syscon node. + This reference is used by the PCIe controller to access + system-level configuration registers related to the AHB bus. + To enable AHB access for the PCIe controller. + + aspeed,pciecfg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the ASPEED PCIe configuration syscon node. + This reference allows the PCIe controller to access + SoC-specific PCIe configuration registers. There are the others + functions such PCIe RC and PCIe EP will use this common register + to configure the SoC interfaces. + + interrupt-controller: true + +patternProperties: + "^pcie@[0-9a-f]+,0$": + type: object + $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + reg: + maxItems: 1 + + resets: + items: + - description: PERST# signal + + reset-names: + items: + - const: perst + + clocks: + maxItems: 1 + + phys: + maxItems: 1 + + required: + - resets + - reset-names + - clocks + - phys + - ranges + + unevaluatedProperties: false + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + - if: + properties: + compatible: + contains: + const: aspeed,ast2600-pcie + then: + required: + - aspeed,ahbc + else: + properties: + aspeed,ahbc: false + - if: + properties: + compatible: + contains: + const: aspeed,ast2700-pcie + then: + required: + - aspeed,pciecfg + else: + properties: + aspeed,pciecfg: false + +required: + - reg + - interrupts + - bus-range + - ranges + - resets + - reset-names + - msi-controller + - interrupt-controller + - interrupt-map-mask + - interrupt-map + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/ast2600-clock.h> + + pcie0: pcie@1e770000 { + compatible = "aspeed,ast2600-pcie"; + device_type = "pci"; + reg = <0x1e770000 0x100>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + + ranges = <0x01000000 0x0 0x00018000 0x00018000 0x0 0x00008000 + 0x02000000 0x0 0x60000000 0x60000000 0x0 0x20000000>; + + resets = <&syscon ASPEED_RESET_H2X>; + reset-names = "h2x"; + + #interrupt-cells = <1>; + msi-controller; + + aspeed,ahbc = <&ahbc>; + + interrupt-controller; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie0 0>, + <0 0 0 2 &pcie0 1>, + <0 0 0 3 &pcie0 2>, + <0 0 0 4 &pcie0 3>; + + pcie@8,0 { + compatible = "pciclass,0604"; + reg = <0x00004000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + resets = <&syscon ASPEED_RESET_PCIE_RC_O>; + reset-names = "perst"; + clocks = <&syscon ASPEED_CLK_GATE_BCLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcierc1_default>; + phys = <&pcie_phy1>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index ca5f2970f217..12a01f7a5744 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -44,7 +44,7 @@ properties: clock-names: minItems: 3 - maxItems: 5 + maxItems: 6 interrupts: minItems: 1 @@ -212,14 +212,17 @@ allOf: then: properties: clocks: - maxItems: 5 + minItems: 5 + maxItems: 6 clock-names: + minItems: 5 items: - const: pcie - const: pcie_bus - const: pcie_phy - const: pcie_aux - const: ref + - const: extref # Optional unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml index e5bba63aa947..26e77218b901 100644 --- a/Documentation/devicetree/bindings/pci/loongson.yaml +++ b/Documentation/devicetree/bindings/pci/loongson.yaml @@ -32,6 +32,8 @@ properties: minItems: 1 maxItems: 3 + msi-parent: true + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml b/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml index d286b77921e0..8f5d33050348 100644 --- a/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mobiveil AXI PCIe Host Bridge maintainers: - - Frank Li <Frank Li@nxp.com> + - Frank Li <Frank.Li@nxp.com> description: Mobiveil's GPEX 4.0 is a PCIe Gen4 host bridge IP. This configurable IP diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 0278845701ce..4db700fc36ba 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,6 +48,7 @@ properties: oneOf: - items: - enum: + - mediatek,mt7981-pcie - mediatek,mt7986-pcie - mediatek,mt8188-pcie - mediatek,mt8195-pcie diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml new file mode 100644 index 000000000000..eb5b81d1defc --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8064.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm APQ8064/IPQ8064 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-apq8064 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8064-v2 + + reg: + maxItems: 4 + + reg-names: + items: + - const: dbi + - const: elbi + - const: parf + - const: config + + clocks: + minItems: 3 + maxItems: 5 + + clock-names: + minItems: 3 + items: + - const: core # Clocks the pcie hw block + - const: iface # Configuration AHB clock + - const: phy + - const: aux + - const: ref + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: msi + + resets: + minItems: 5 + maxItems: 6 + + reset-names: + minItems: 5 + items: + - const: axi + - const: ahb + - const: por + - const: pci + - const: phy + - const: ext + + vdda-supply: + description: A phandle to the core analog power supply + + vdda_phy-supply: + description: A phandle to the core analog power supply for PHY + + vdda_refclk-supply: + description: A phandle to the core analog power supply for IC which generates reference clock + +required: + - resets + - reset-names + - vdda-supply + - vdda_phy-supply + - vdda_refclk-supply + +allOf: + - $ref: qcom,pcie-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-apq8064 + then: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + resets: + maxItems: 5 + reset-names: + maxItems: 5 + else: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + resets: + minItems: 6 + reset-names: + minItems: 6 + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8960.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/qcom,gcc-msm8960.h> + + pcie@1b500000 { + compatible = "qcom,pcie-apq8064"; + reg = <0x1b500000 0x1000>, + <0x1b502000 0x80>, + <0x1b600000 0x100>, + <0x0ff00000 0x100000>; + reg-names = "dbi", "elbi", "parf", "config"; + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */ + <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */ + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc PCIE_A_CLK>, + <&gcc PCIE_H_CLK>, + <&gcc PCIE_PHY_REF_CLK>; + clock-names = "core", "iface", "phy"; + + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + resets = <&gcc PCIE_ACLK_RESET>, + <&gcc PCIE_HCLK_RESET>, + <&gcc PCIE_POR_RESET>, + <&gcc PCIE_PCI_RESET>, + <&gcc PCIE_PHY_RESET>; + reset-names = "axi", "ahb", "por", "pci", "phy"; + + perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; + vdda-supply = <&pm8921_s3>; + vdda_phy-supply = <&pm8921_lvs6>; + vdda_refclk-supply = <&v3p3_fixed>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-apq8084.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8084.yaml new file mode 100644 index 000000000000..a6403a3de076 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8084.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8084.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm APQ8084 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-apq8084 + + reg: + minItems: 4 + maxItems: 5 + + reg-names: + minItems: 4 + items: + - const: parf + - const: dbi + - const: elbi + - const: config + - const: mhi + + clocks: + maxItems: 4 + + clock-names: + items: + - const: iface # Configuration AHB clock + - const: master_bus # Master AXI clock + - const: slave_bus # Slave AXI clock + - const: aux + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: msi + + resets: + maxItems: 1 + + reset-names: + items: + - const: core + + vdda-supply: + description: A phandle to the core analog power supply + +required: + - power-domains + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/gpio/gpio.h> + pcie@fc520000 { + compatible = "qcom,pcie-apq8084"; + reg = <0xfc520000 0x2000>, + <0xff000000 0x1000>, + <0xff001000 0x1000>, + <0xff002000 0x2000>; + reg-names = "parf", "dbi", "elbi", "config"; + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, + <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc 324>, + <&gcc 325>, + <&gcc 327>, + <&gcc 323>; + clock-names = "iface", "master_bus", "slave_bus", "aux"; + resets = <&gcc 81>; + reset-names = "core"; + power-domains = <&gcc 1>; + vdda-supply = <&pma8084_l3>; + phys = <&pciephy0>; + phy-names = "pciephy"; + perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie0_pins_default>; + pinctrl-names = "default"; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq4019.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq4019.yaml new file mode 100644 index 000000000000..fd6ecd1c43a1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq4019.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq4019.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ4019 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-ipq4019 + + reg: + maxItems: 4 + + reg-names: + items: + - const: dbi + - const: elbi + - const: parf + - const: config + + clocks: + maxItems: 3 + + clock-names: + items: + - const: aux + - const: master_bus # Master AXI clock + - const: slave_bus # Slave AXI clock + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: msi + + resets: + maxItems: 12 + + reset-names: + items: + - const: axi_m # AXI master reset + - const: axi_s # AXI slave reset + - const: pipe + - const: axi_m_vmid + - const: axi_s_xpu + - const: parf + - const: phy + - const: axi_m_sticky # AXI master sticky reset + - const: pipe_sticky + - const: pwr + - const: ahb + - const: phy_ahb + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq4019.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie@40000000 { + compatible = "qcom,pcie-ipq4019"; + reg = <0x40000000 0xf1d>, + <0x40000f20 0xa8>, + <0x80000 0x2000>, + <0x40100000 0x1000>; + reg-names = "dbi", "elbi", "parf", "config"; + ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>, + <0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_PCIE_AHB_CLK>, + <&gcc GCC_PCIE_AXI_M_CLK>, + <&gcc GCC_PCIE_AXI_S_CLK>; + clock-names = "aux", + "master_bus", + "slave_bus"; + + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + resets = <&gcc PCIE_AXI_M_ARES>, + <&gcc PCIE_AXI_S_ARES>, + <&gcc PCIE_PIPE_ARES>, + <&gcc PCIE_AXI_M_VMIDMT_ARES>, + <&gcc PCIE_AXI_S_XPU_ARES>, + <&gcc PCIE_PARF_XPU_ARES>, + <&gcc PCIE_PHY_ARES>, + <&gcc PCIE_AXI_M_STICKY_ARES>, + <&gcc PCIE_PIPE_STICKY_ARES>, + <&gcc PCIE_PWR_ARES>, + <&gcc PCIE_AHB_ARES>, + <&gcc PCIE_PHY_AHB_ARES>; + reset-names = "axi_m", + "axi_s", + "pipe", + "axi_m_vmid", + "axi_s_xpu", + "parf", + "phy", + "axi_m_sticky", + "pipe_sticky", + "pwr", + "ahb", + "phy_ahb"; + + perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq5018.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq5018.yaml new file mode 100644 index 000000000000..20c2c946f474 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq5018.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq5018.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5018 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-ipq5018 + + reg: + minItems: 5 + maxItems: 6 + + reg-names: + minItems: 5 + items: + - const: dbi + - const: elbi + - const: atu + - const: parf + - const: config + - const: mhi + + clocks: + maxItems: 6 + + clock-names: + items: + - const: iface # PCIe to SysNOC BIU clock + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: ahb + - const: aux + - const: axi_bridge + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + resets: + maxItems: 8 + + reset-names: + items: + - const: pipe + - const: sleep + - const: sticky # Core sticky reset + - const: axi_m # AXI master reset + - const: axi_s # AXI slave reset + - const: ahb + - const: axi_m_sticky # AXI master sticky reset + - const: axi_s_sticky # AXI slave sticky reset + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq5018.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/qcom,gcc-ipq5018.h> + + pcie@a0000000 { + compatible = "qcom,pcie-ipq5018"; + reg = <0xa0000000 0xf1d>, + <0xa0000f20 0xa8>, + <0xa0001000 0x1000>, + <0x00080000 0x3000>, + <0xa0100000 0x1000>, + <0x00083000 0x1000>; + reg-names = "dbi", + "elbi", + "atu", + "parf", + "config", + "mhi"; + ranges = <0x01000000 0 0x00000000 0xa0200000 0 0x00100000>, + <0x02000000 0 0xa0300000 0xa0300000 0 0x10000000>; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <2>; + #address-cells = <3>; + #size-cells = <2>; + + /* The controller supports Gen3, but the connected PHY is Gen2-capable */ + max-link-speed = <2>; + + clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, + <&gcc GCC_PCIE0_AXI_M_CLK>, + <&gcc GCC_PCIE0_AXI_S_CLK>, + <&gcc GCC_PCIE0_AHB_CLK>, + <&gcc GCC_PCIE0_AUX_CLK>, + <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>; + clock-names = "iface", + "axi_m", + "axi_s", + "ahb", + "aux", + "axi_bridge"; + + msi-map = <0x0 &v2m0 0x0 0xff8>; + + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "global"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + + phys = <&pcie0_phy>; + phy-names = "pciephy"; + + resets = <&gcc GCC_PCIE0_PIPE_ARES>, + <&gcc GCC_PCIE0_SLEEP_ARES>, + <&gcc GCC_PCIE0_CORE_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE0_AHB_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; + reset-names = "pipe", + "sleep", + "sticky", + "axi_m", + "axi_s", + "ahb", + "axi_m_sticky", + "axi_s_sticky"; + + perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 16 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq6018.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq6018.yaml new file mode 100644 index 000000000000..6843570eb051 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq6018.yaml @@ -0,0 +1,179 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq6018.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ6018 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-ipq6018 + - qcom,pcie-ipq8074-gen3 + + reg: + minItems: 5 + maxItems: 6 + + reg-names: + minItems: 5 + items: + - const: dbi + - const: elbi + - const: atu + - const: parf + - const: config + - const: mhi + + clocks: + maxItems: 5 + + clock-names: + items: + - const: iface # PCIe to SysNOC BIU clock + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: axi_bridge + - const: rchng + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + resets: + maxItems: 8 + + reset-names: + items: + - const: pipe + - const: sleep + - const: sticky # Core sticky reset + - const: axi_m # AXI master reset + - const: axi_s # AXI slave reset + - const: ahb + - const: axi_m_sticky # AXI master sticky reset + - const: axi_s_sticky # AXI slave sticky reset + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/qcom,gcc-ipq6018.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@20000000 { + compatible = "qcom,pcie-ipq6018"; + reg = <0x0 0x20000000 0x0 0xf1d>, + <0x0 0x20000f20 0x0 0xa8>, + <0x0 0x20001000 0x0 0x1000>, + <0x0 0x80000 0x0 0x4000>, + <0x0 0x20100000 0x0 0x1000>; + reg-names = "dbi", "elbi", "atu", "parf", "config"; + ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>, + <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + max-link-speed = <3>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, + <&gcc GCC_PCIE0_AXI_M_CLK>, + <&gcc GCC_PCIE0_AXI_S_CLK>, + <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, + <&gcc PCIE0_RCHNG_CLK>; + clock-names = "iface", + "axi_m", + "axi_s", + "axi_bridge", + "rchng"; + + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "global"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 0 GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 0 GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 0 GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + phys = <&pcie_phy>; + phy-names = "pciephy"; + + resets = <&gcc GCC_PCIE0_PIPE_ARES>, + <&gcc GCC_PCIE0_SLEEP_ARES>, + <&gcc GCC_PCIE0_CORE_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE0_AHB_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; + reset-names = "pipe", + "sleep", + "sticky", + "axi_m", + "axi_s", + "ahb", + "axi_m_sticky", + "axi_s_sticky"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml new file mode 100644 index 000000000000..da975f943a7b --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml @@ -0,0 +1,165 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq8074.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ8074 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-ipq8074 + + reg: + maxItems: 4 + + reg-names: + items: + - const: dbi + - const: elbi + - const: parf + - const: config + + clocks: + maxItems: 5 + + clock-names: + items: + - const: iface # PCIe to SysNOC BIU clock + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: ahb + - const: aux + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + resets: + maxItems: 7 + + reset-names: + items: + - const: pipe + - const: sleep + - const: sticky # Core sticky reset + - const: axi_m # AXI master reset + - const: axi_s # AXI slave reset + - const: ahb + - const: axi_m_sticky # AXI master sticky reset + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq8074.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie@10000000 { + compatible = "qcom,pcie-ipq8074"; + reg = <0x10000000 0xf1d>, + <0x10000f20 0xa8>, + <0x00088000 0x2000>, + <0x10100000 0x1000>; + reg-names = "dbi", "elbi", "parf", "config"; + ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */ + <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */ + + device_type = "pci"; + linux,pci-domain = <1>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + max-link-speed = <2>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_SYS_NOC_PCIE1_AXI_CLK>, + <&gcc GCC_PCIE1_AXI_M_CLK>, + <&gcc GCC_PCIE1_AXI_S_CLK>, + <&gcc GCC_PCIE1_AHB_CLK>, + <&gcc GCC_PCIE1_AUX_CLK>; + clock-names = "iface", + "axi_m", + "axi_s", + "ahb", + "aux"; + + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "global"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + phys = <&pcie_qmp1>; + phy-names = "pciephy"; + + resets = <&gcc GCC_PCIE1_PIPE_ARES>, + <&gcc GCC_PCIE1_SLEEP_ARES>, + <&gcc GCC_PCIE1_CORE_STICKY_ARES>, + <&gcc GCC_PCIE1_AXI_MASTER_ARES>, + <&gcc GCC_PCIE1_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE1_AHB_ARES>, + <&gcc GCC_PCIE1_AXI_MASTER_STICKY_ARES>; + reset-names = "pipe", + "sleep", + "sticky", + "axi_m", + "axi_s", + "ahb", + "axi_m_sticky"; + + perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml new file mode 100644 index 000000000000..4be342cc04e1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml @@ -0,0 +1,183 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq9574.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ9574 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + oneOf: + - enum: + - qcom,pcie-ipq9574 + - items: + - enum: + - qcom,pcie-ipq5332 + - qcom,pcie-ipq5424 + - const: qcom,pcie-ipq9574 + + reg: + maxItems: 6 + + reg-names: + items: + - const: dbi + - const: elbi + - const: atu + - const: parf + - const: config + - const: mhi + + clocks: + maxItems: 6 + + clock-names: + items: + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: axi_bridge + - const: rchng + - const: ahb + - const: aux + + interrupts: + minItems: 8 + maxItems: 9 + + interrupt-names: + minItems: 8 + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + resets: + maxItems: 8 + + reset-names: + items: + - const: pipe + - const: sticky # Core sticky reset + - const: axi_s_sticky # AXI Slave Sticky reset + - const: axi_s # AXI slave reset + - const: axi_m_sticky # AXI Master Sticky reset + - const: axi_m # AXI master reset + - const: aux + - const: ahb + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,ipq9574-gcc.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interconnect/qcom,ipq9574.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/qcom,ipq9574-gcc.h> + + pcie@10000000 { + compatible = "qcom,pcie-ipq9574"; + reg = <0x10000000 0xf1d>, + <0x10000f20 0xa8>, + <0x10001000 0x1000>, + <0x000f8000 0x4000>, + <0x10100000 0x1000>, + <0x000fe000 0x1000>; + reg-names = "dbi", + "elbi", + "atu", + "parf", + "config", + "mhi"; + ranges = <0x01000000 0x0 0x00000000 0x10200000 0x0 0x100000>, + <0x02000000 0x0 0x10300000 0x10300000 0x0 0x7d00000>; + + device_type = "pci"; + linux,pci-domain = <1>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_PCIE1_AXI_M_CLK>, + <&gcc GCC_PCIE1_AXI_S_CLK>, + <&gcc GCC_PCIE1_AXI_S_BRIDGE_CLK>, + <&gcc GCC_PCIE1_RCHNG_CLK>, + <&gcc GCC_PCIE1_AHB_CLK>, + <&gcc GCC_PCIE1_AUX_CLK>; + clock-names = "axi_m", + "axi_s", + "axi_bridge", + "rchng", + "ahb", + "aux"; + + interconnects = <&gcc MASTER_ANOC_PCIE1 &gcc SLAVE_ANOC_PCIE1>, + <&gcc MASTER_SNOC_PCIE1 &gcc SLAVE_SNOC_PCIE1>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + + resets = <&gcc GCC_PCIE1_PIPE_ARES>, + <&gcc GCC_PCIE1_CORE_STICKY_ARES>, + <&gcc GCC_PCIE1_AXI_S_STICKY_ARES>, + <&gcc GCC_PCIE1_AXI_S_ARES>, + <&gcc GCC_PCIE1_AXI_M_STICKY_ARES>, + <&gcc GCC_PCIE1_AXI_M_ARES>, + <&gcc GCC_PCIE1_AUX_ARES>, + <&gcc GCC_PCIE1_AHB_ARES>; + reset-names = "pipe", + "sticky", + "axi_s_sticky", + "axi_s", + "axi_m_sticky", + "axi_m", + "aux", + "ahb"; + + phys = <&pcie1_phy>; + phy-names = "pciephy"; + + perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-msm8996.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-msm8996.yaml new file mode 100644 index 000000000000..f2081ae1593f --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-msm8996.yaml @@ -0,0 +1,156 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-msm8996.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8996 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + oneOf: + - enum: + - qcom,pcie-msm8996 + - items: + - const: qcom,pcie-msm8998 + - const: qcom,pcie-msm8996 + + reg: + minItems: 4 + maxItems: 5 + + reg-names: + minItems: 4 + items: + - const: parf + - const: dbi + - const: elbi + - const: config + - const: mhi + + clocks: + maxItems: 5 + + clock-names: + items: + - const: pipe # Pipe Clock driving internal logic + - const: aux + - const: cfg + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + + interrupts: + minItems: 8 + maxItems: 9 + + interrupt-names: + minItems: 8 + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + vdda-supply: + description: A phandle to the core analog power supply + + vddpe-3v3-supply: + description: A phandle to the PCIe endpoint power supply + +required: + - power-domains + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8996.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie@600000 { + compatible = "qcom,pcie-msm8996"; + reg = <0x00600000 0x2000>, + <0x0c000000 0xf1d>, + <0x0c000f20 0xa8>, + <0x0c100000 0x100000>; + reg-names = "parf", "dbi", "elbi", "config"; + ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>, + <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; + + device_type = "pci"; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + linux,pci-domain = <0>; + + clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, + <&gcc GCC_PCIE_0_AUX_CLK>, + <&gcc GCC_PCIE_0_CFG_AHB_CLK>, + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_AXI_CLK>; + clock-names = "pipe", + "aux", + "cfg", + "bus_master", + "bus_slave"; + + interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pcie0_state_on>; + pinctrl-1 = <&pcie0_state_off>; + + phys = <&pciephy_0>; + phy-names = "pciephy"; + + power-domains = <&gcc PCIE0_GDSC>; + + perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; + vddpe-3v3-supply = <&wlan_en>; + vdda-supply = <&vreg_l28a_0p925>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml new file mode 100644 index 000000000000..99b3ed43b87c --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-qcs404.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCS404 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-qcs404 + + reg: + maxItems: 4 + + reg-names: + items: + - const: dbi + - const: elbi + - const: parf + - const: config + + clocks: + maxItems: 4 + + clock-names: + items: + - const: iface # AHB clock + - const: aux + - const: master_bus # AXI Master clock + - const: slave_bus # AXI Slave clock + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: msi + + resets: + maxItems: 6 + + reset-names: + items: + - const: axi_m # AXI Master reset + - const: axi_s # AXI Slave reset + - const: axi_m_sticky # AXI Master Sticky reset + - const: pipe_sticky + - const: pwr + - const: ahb + +required: + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-qcs404.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie@10000000 { + compatible = "qcom,pcie-qcs404"; + reg = <0x10000000 0xf1d>, + <0x10000f20 0xa8>, + <0x07780000 0x2000>, + <0x10001000 0x2000>; + reg-names = "dbi", "elbi", "parf", "config"; + ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */ + <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */ + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>, + <&gcc GCC_PCIE_0_AUX_CLK>, + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_AXI_CLK>; + clock-names = "iface", "aux", "master_bus", "slave_bus"; + + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + phys = <&pcie_phy>; + phy-names = "pciephy"; + + perst-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + + resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>, + <&gcc GCC_PCIE_0_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>, + <&gcc GCC_PCIE_0_CORE_STICKY_ARES>, + <&gcc GCC_PCIE_0_BCR>, + <&gcc GCC_PCIE_0_AHB_ARES>; + reset-names = "axi_m", + "axi_s", + "axi_m_sticky", + "pipe_sticky", + "pwr", + "ahb"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml deleted file mode 100644 index 6a7c410c9fc3..000000000000 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml +++ /dev/null @@ -1,168 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/pci/qcom,pcie-sc8180x.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SC8180x PCI Express Root Complex - -maintainers: - - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <mani@kernel.org> - -description: - Qualcomm SC8180x SoC PCIe root complex controller is based on the Synopsys - DesignWare PCIe IP. - -properties: - compatible: - const: qcom,pcie-sc8180x - - reg: - minItems: 5 - maxItems: 6 - - reg-names: - minItems: 5 - items: - - const: parf # Qualcomm specific registers - - const: dbi # DesignWare PCIe registers - - const: elbi # External local bus interface registers - - const: atu # ATU address space - - const: config # PCIe configuration space - - const: mhi # MHI registers - - clocks: - minItems: 6 - maxItems: 6 - - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - interrupts: - minItems: 8 - maxItems: 9 - - interrupt-names: - minItems: 8 - items: - - const: msi0 - - const: msi1 - - const: msi2 - - const: msi3 - - const: msi4 - - const: msi5 - - const: msi6 - - const: msi7 - - const: global - - resets: - maxItems: 1 - - reset-names: - items: - - const: pci - -allOf: - - $ref: qcom,pcie-common.yaml# - -unevaluatedProperties: false - -examples: - - | - #include <dt-bindings/clock/qcom,gcc-sc8180x.h> - #include <dt-bindings/interconnect/qcom,sc8180x.h> - #include <dt-bindings/interrupt-controller/arm-gic.h> - - soc { - #address-cells = <2>; - #size-cells = <2>; - - pcie@1c00000 { - compatible = "qcom,pcie-sc8180x"; - reg = <0 0x01c00000 0 0x3000>, - <0 0x60000000 0 0xf1d>, - <0 0x60000f20 0 0xa8>, - <0 0x60001000 0 0x1000>, - <0 0x60100000 0 0x100000>; - reg-names = "parf", - "dbi", - "elbi", - "atu", - "config"; - ranges = <0x01000000 0x0 0x60200000 0x0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; - - bus-range = <0x00 0xff>; - device_type = "pci"; - linux,pci-domain = <0>; - num-lanes = <2>; - - #address-cells = <3>; - #size-cells = <2>; - - assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>; - assigned-clock-rates = <19200000>; - - clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, - <&gcc GCC_PCIE_0_AUX_CLK>, - <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave", - "slave_q2a"; - - dma-coherent; - - interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi0", - "msi1", - "msi2", - "msi3", - "msi4", - "msi5", - "msi6", - "msi7", - "global"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - interconnects = <&aggre2_noc MASTER_PCIE 0 &mc_virt SLAVE_EBI_CH0 0>, - <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; - interconnect-names = "pcie-mem", "cpu-pcie"; - - iommu-map = <0x0 &apps_smmu 0x1d80 0x1>, - <0x100 &apps_smmu 0x1d81 0x1>; - - phys = <&pcie0_phy>; - phy-names = "pciephy"; - - power-domains = <&gcc PCIE_0_GDSC>; - - resets = <&gcc GCC_PCIE_0_BCR>; - reset-names = "pci"; - }; - }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml new file mode 100644 index 000000000000..1ec9e4f3ff57 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-sdm845.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM845 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-sdm845 + + reg: + minItems: 4 + maxItems: 5 + + reg-names: + minItems: 4 + items: + - const: parf + - const: dbi + - const: elbi + - const: config + - const: mhi + + clocks: + minItems: 7 + maxItems: 8 + + clock-names: + minItems: 7 + items: + - const: pipe + - const: aux + - const: cfg + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a + - enum: [ ref, tbu ] + - const: tbu + + interrupts: + minItems: 8 + maxItems: 9 + + interrupt-names: + minItems: 8 + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + + resets: + maxItems: 1 + + reset-names: + items: + - const: pci + +required: + - power-domains + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@1c00000 { + compatible = "qcom,pcie-sdm845"; + reg = <0x0 0x01c00000 0x0 0x2000>, + <0x0 0x60000000 0x0 0xf1d>, + <0x0 0x60000f20 0x0 0xa8>, + <0x0 0x60100000 0x0 0x100000>, + <0x0 0x01c07000 0x0 0x1000>; + reg-names = "parf", "dbi", "elbi", "config", "mhi"; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + + #address-cells = <3>; + #size-cells = <2>; + + clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, + <&gcc GCC_PCIE_0_AUX_CLK>, + <&gcc GCC_PCIE_0_CFG_AHB_CLK>, + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + clock-names = "pipe", + "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "tbu"; + + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "global"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + iommu-map = <0x0 &apps_smmu 0x1c10 0x1>, + <0x100 &apps_smmu 0x1c11 0x1>, + <0x200 &apps_smmu 0x1c12 0x1>, + <0x300 &apps_smmu 0x1c13 0x1>, + <0x400 &apps_smmu 0x1c14 0x1>, + <0x500 &apps_smmu 0x1c15 0x1>, + <0x600 &apps_smmu 0x1c16 0x1>, + <0x700 &apps_smmu 0x1c17 0x1>, + <0x800 &apps_smmu 0x1c18 0x1>, + <0x900 &apps_smmu 0x1c19 0x1>, + <0xa00 &apps_smmu 0x1c1a 0x1>, + <0xb00 &apps_smmu 0x1c1b 0x1>, + <0xc00 &apps_smmu 0x1c1c 0x1>, + <0xd00 &apps_smmu 0x1c1d 0x1>, + <0xe00 &apps_smmu 0x1c1e 0x1>, + <0xf00 &apps_smmu 0x1c1f 0x1>; + + power-domains = <&gcc PCIE_0_GDSC>; + + phys = <&pcie0_phy>; + phy-names = "pciephy"; + + resets = <&gcc GCC_PCIE_0_BCR>; + reset-names = "pci"; + + perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; + + vddpe-3v3-supply = <&pcie0_3p3v_dual>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sdx55.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sdx55.yaml new file mode 100644 index 000000000000..7f6fd81e7ed0 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sdx55.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-sdx55.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDX55 PCI Express Root Complex + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - qcom,pcie-sdx55 + + reg: + minItems: 5 + maxItems: 6 + + reg-names: + minItems: 5 + items: + - const: parf + - const: dbi + - const: elbi + - const: atu + - const: config + - const: mhi + + clocks: + maxItems: 7 + + clock-names: + items: + - const: pipe + - const: aux + - const: cfg + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a + - const: sleep + + interrupts: + maxItems: 8 + + interrupt-names: + items: + - const: msi + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: msi8 + + resets: + maxItems: 1 + + reset-names: + items: + - const: pci + +required: + - power-domains + - resets + - reset-names + +allOf: + - $ref: qcom,pcie-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdx55.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie@1c00000 { + compatible = "qcom,pcie-sdx55"; + reg = <0x01c00000 0x3000>, + <0x40000000 0xf1d>, + <0x40000f20 0xc8>, + <0x40001000 0x1000>, + <0x40100000 0x100000>; + reg-names = "parf", + "dbi", + "elbi", + "atu", + "config"; + ranges = <0x01000000 0x0 0x00000000 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3fd00000>; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + + #address-cells = <3>; + #size-cells = <2>; + + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "msi8"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + clocks = <&gcc GCC_PCIE_PIPE_CLK>, + <&gcc GCC_PCIE_AUX_CLK>, + <&gcc GCC_PCIE_CFG_AHB_CLK>, + <&gcc GCC_PCIE_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_SLV_AXI_CLK>, + <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>, + <&gcc GCC_PCIE_SLEEP_CLK>; + clock-names = "pipe", + "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "sleep"; + + assigned-clocks = <&gcc GCC_PCIE_AUX_CLK>; + assigned-clock-rates = <19200000>; + + iommu-map = <0x0 &apps_smmu 0x0200 0x1>, + <0x100 &apps_smmu 0x0201 0x1>, + <0x200 &apps_smmu 0x0202 0x1>, + <0x300 &apps_smmu 0x0203 0x1>, + <0x400 &apps_smmu 0x0204 0x1>; + + power-domains = <&gcc PCIE_GDSC>; + + phys = <&pcie_phy>; + phy-names = "pciephy"; + + resets = <&gcc GCC_PCIE_BCR>; + reset-names = "pci"; + + perst-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml index 6a5421e4f19d..ea29d0900a25 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml @@ -17,6 +17,7 @@ description: properties: compatible: oneOf: + - const: qcom,pcie-sc8180x - const: qcom,pcie-sm8150 - items: - enum: diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml index 62c674ca0cf7..3d3b9f309a73 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml @@ -16,7 +16,12 @@ description: properties: compatible: - const: qcom,pcie-x1e80100 + oneOf: + - const: qcom,pcie-x1e80100 + - items: + - enum: + - qcom,glymur-pcie + - const: qcom,pcie-x1e80100 reg: minItems: 6 diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml deleted file mode 100644 index c61930441be0..000000000000 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ /dev/null @@ -1,782 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm PCI express root complex - -maintainers: - - Bjorn Andersson <bjorn.andersson@linaro.org> - - Manivannan Sadhasivam <mani@kernel.org> - -description: | - Qualcomm PCIe root complex controller is based on the Synopsys DesignWare - PCIe IP. - -properties: - compatible: - oneOf: - - enum: - - qcom,pcie-apq8064 - - qcom,pcie-apq8084 - - qcom,pcie-ipq4019 - - qcom,pcie-ipq5018 - - qcom,pcie-ipq6018 - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064-v2 - - qcom,pcie-ipq8074 - - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 - - qcom,pcie-msm8996 - - qcom,pcie-qcs404 - - qcom,pcie-sdm845 - - qcom,pcie-sdx55 - - items: - - enum: - - qcom,pcie-ipq5332 - - qcom,pcie-ipq5424 - - const: qcom,pcie-ipq9574 - - items: - - const: qcom,pcie-msm8998 - - const: qcom,pcie-msm8996 - - reg: - minItems: 4 - maxItems: 6 - - reg-names: - minItems: 4 - maxItems: 6 - - interrupts: - minItems: 1 - maxItems: 9 - - interrupt-names: - minItems: 1 - maxItems: 9 - - iommu-map: - minItems: 1 - maxItems: 16 - - # Common definitions for clocks, clock-names and reset. - # Platform constraints are described later. - clocks: - minItems: 3 - maxItems: 13 - - clock-names: - minItems: 3 - maxItems: 13 - - dma-coherent: true - - interconnects: - maxItems: 2 - - interconnect-names: - items: - - const: pcie-mem - - const: cpu-pcie - - resets: - minItems: 1 - maxItems: 12 - - reset-names: - minItems: 1 - maxItems: 12 - - vdda-supply: - description: A phandle to the core analog power supply - - vdda_phy-supply: - description: A phandle to the core analog power supply for PHY - - vdda_refclk-supply: - description: A phandle to the core analog power supply for IC which generates reference clock - - vddpe-3v3-supply: - description: A phandle to the PCIe endpoint power supply - - phys: - maxItems: 1 - - phy-names: - items: - - const: pciephy - - power-domains: - maxItems: 1 - - perst-gpios: - description: GPIO controlled connection to PERST# signal - maxItems: 1 - - required-opps: - maxItems: 1 - - wake-gpios: - description: GPIO controlled connection to WAKE# signal - maxItems: 1 - -required: - - compatible - - reg - - reg-names - - interrupt-map-mask - - interrupt-map - - clocks - - clock-names - -anyOf: - - required: - - interrupts - - interrupt-names - - "#interrupt-cells" - - required: - - msi-map - -allOf: - - $ref: /schemas/pci/pci-host-bridge.yaml# - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8064 - - qcom,pcie-ipq4019 - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064v2 - - qcom,pcie-ipq8074 - - qcom,pcie-qcs404 - then: - properties: - reg: - minItems: 4 - maxItems: 4 - reg-names: - items: - - const: dbi # DesignWare PCIe registers - - const: elbi # External local bus interface registers - - const: parf # Qualcomm specific registers - - const: config # PCIe configuration space - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq5018 - - qcom,pcie-ipq6018 - - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 - then: - properties: - reg: - minItems: 5 - maxItems: 6 - reg-names: - minItems: 5 - items: - - const: dbi # DesignWare PCIe registers - - const: elbi # External local bus interface registers - - const: atu # ATU address space - - const: parf # Qualcomm specific registers - - const: config # PCIe configuration space - - const: mhi # MHI registers - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8084 - - qcom,pcie-msm8996 - - qcom,pcie-sdm845 - then: - properties: - reg: - minItems: 4 - maxItems: 5 - reg-names: - minItems: 4 - items: - - const: parf # Qualcomm specific registers - - const: dbi # DesignWare PCIe registers - - const: elbi # External local bus interface registers - - const: config # PCIe configuration space - - const: mhi # MHI registers - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-sdx55 - then: - properties: - reg: - minItems: 5 - maxItems: 6 - reg-names: - minItems: 5 - items: - - const: parf # Qualcomm specific registers - - const: dbi # DesignWare PCIe registers - - const: elbi # External local bus interface registers - - const: atu # ATU address space - - const: config # PCIe configuration space - - const: mhi # MHI registers - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8064 - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064v2 - then: - properties: - clocks: - minItems: 3 - maxItems: 5 - clock-names: - minItems: 3 - items: - - const: core # Clocks the pcie hw block - - const: iface # Configuration AHB clock - - const: phy # Clocks the pcie PHY block - - const: aux # Clocks the pcie AUX block, not on apq8064 - - const: ref # Clocks the pcie ref block, not on apq8064 - resets: - minItems: 5 - maxItems: 6 - reset-names: - minItems: 5 - items: - - const: axi # AXI reset - - const: ahb # AHB reset - - const: por # POR reset - - const: pci # PCI reset - - const: phy # PHY reset - - const: ext # EXT reset, not on apq8064 - required: - - vdda-supply - - vdda_phy-supply - - vdda_refclk-supply - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8084 - then: - properties: - clocks: - minItems: 4 - maxItems: 4 - clock-names: - items: - - const: iface # Configuration AHB clock - - const: master_bus # Master AXI clock - - const: slave_bus # Slave AXI clock - - const: aux # Auxiliary (AUX) clock - resets: - maxItems: 1 - reset-names: - items: - - const: core # Core reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq4019 - then: - properties: - clocks: - minItems: 3 - maxItems: 3 - clock-names: - items: - - const: aux # Auxiliary (AUX) clock - - const: master_bus # Master AXI clock - - const: slave_bus # Slave AXI clock - resets: - minItems: 12 - maxItems: 12 - reset-names: - items: - - const: axi_m # AXI master reset - - const: axi_s # AXI slave reset - - const: pipe # PIPE reset - - const: axi_m_vmid # VMID reset - - const: axi_s_xpu # XPU reset - - const: parf # PARF reset - - const: phy # PHY reset - - const: axi_m_sticky # AXI sticky reset - - const: pipe_sticky # PIPE sticky reset - - const: pwr # PWR reset - - const: ahb # AHB reset - - const: phy_ahb # PHY AHB reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq5018 - then: - properties: - clocks: - minItems: 6 - maxItems: 6 - clock-names: - items: - - const: iface # PCIe to SysNOC BIU clock - - const: axi_m # AXI Master clock - - const: axi_s # AXI Slave clock - - const: ahb # AHB clock - - const: aux # Auxiliary clock - - const: axi_bridge # AXI bridge clock - resets: - minItems: 8 - maxItems: 8 - reset-names: - items: - - const: pipe # PIPE reset - - const: sleep # Sleep reset - - const: sticky # Core sticky reset - - const: axi_m # AXI master reset - - const: axi_s # AXI slave reset - - const: ahb # AHB reset - - const: axi_m_sticky # AXI master sticky reset - - const: axi_s_sticky # AXI slave sticky reset - interrupts: - minItems: 9 - maxItems: 9 - interrupt-names: - items: - - const: msi0 - - const: msi1 - - const: msi2 - - const: msi3 - - const: msi4 - - const: msi5 - - const: msi6 - - const: msi7 - - const: global - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-msm8996 - then: - properties: - clocks: - minItems: 5 - maxItems: 5 - clock-names: - items: - - const: pipe # Pipe Clock driving internal logic - - const: aux # Auxiliary (AUX) clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - resets: false - reset-names: false - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq8074 - then: - properties: - clocks: - minItems: 5 - maxItems: 5 - clock-names: - items: - - const: iface # PCIe to SysNOC BIU clock - - const: axi_m # AXI Master clock - - const: axi_s # AXI Slave clock - - const: ahb # AHB clock - - const: aux # Auxiliary clock - resets: - minItems: 7 - maxItems: 7 - reset-names: - items: - - const: pipe # PIPE reset - - const: sleep # Sleep reset - - const: sticky # Core Sticky reset - - const: axi_m # AXI Master reset - - const: axi_s # AXI Slave reset - - const: ahb # AHB Reset - - const: axi_m_sticky # AXI Master Sticky reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq6018 - - qcom,pcie-ipq8074-gen3 - then: - properties: - clocks: - minItems: 5 - maxItems: 5 - clock-names: - items: - - const: iface # PCIe to SysNOC BIU clock - - const: axi_m # AXI Master clock - - const: axi_s # AXI Slave clock - - const: axi_bridge # AXI bridge clock - - const: rchng - resets: - minItems: 8 - maxItems: 8 - reset-names: - items: - - const: pipe # PIPE reset - - const: sleep # Sleep reset - - const: sticky # Core Sticky reset - - const: axi_m # AXI Master reset - - const: axi_s # AXI Slave reset - - const: ahb # AHB Reset - - const: axi_m_sticky # AXI Master Sticky reset - - const: axi_s_sticky # AXI Slave Sticky reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq9574 - then: - properties: - clocks: - minItems: 6 - maxItems: 6 - clock-names: - items: - - const: axi_m # AXI Master clock - - const: axi_s # AXI Slave clock - - const: axi_bridge - - const: rchng - - const: ahb - - const: aux - - resets: - minItems: 8 - maxItems: 8 - reset-names: - items: - - const: pipe # PIPE reset - - const: sticky # Core Sticky reset - - const: axi_s_sticky # AXI Slave Sticky reset - - const: axi_s # AXI Slave reset - - const: axi_m_sticky # AXI Master Sticky reset - - const: axi_m # AXI Master reset - - const: aux # AUX Reset - - const: ahb # AHB Reset - - interrupts: - minItems: 8 - interrupt-names: - minItems: 8 - items: - - const: msi0 - - const: msi1 - - const: msi2 - - const: msi3 - - const: msi4 - - const: msi5 - - const: msi6 - - const: msi7 - - const: global - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-qcs404 - then: - properties: - clocks: - minItems: 4 - maxItems: 4 - clock-names: - items: - - const: iface # AHB clock - - const: aux # Auxiliary clock - - const: master_bus # AXI Master clock - - const: slave_bus # AXI Slave clock - resets: - minItems: 6 - maxItems: 6 - reset-names: - items: - - const: axi_m # AXI Master reset - - const: axi_s # AXI Slave reset - - const: axi_m_sticky # AXI Master Sticky reset - - const: pipe_sticky # PIPE sticky reset - - const: pwr # PWR reset - - const: ahb # AHB reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-sdm845 - then: - oneOf: - # Unfortunately the "optional" ref clock is used in the middle of the list - - properties: - clocks: - minItems: 8 - maxItems: 8 - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: ref # REFERENCE clock - - const: tbu # PCIe TBU clock - - properties: - clocks: - minItems: 7 - maxItems: 7 - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: tbu # PCIe TBU clock - properties: - resets: - maxItems: 1 - reset-names: - items: - - const: pci # PCIe core reset - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-sdx55 - then: - properties: - clocks: - minItems: 7 - maxItems: 7 - clock-names: - items: - - const: pipe # PIPE clock - - const: aux # Auxiliary clock - - const: cfg # Configuration clock - - const: bus_master # Master AXI clock - - const: bus_slave # Slave AXI clock - - const: slave_q2a # Slave Q2A clock - - const: sleep # PCIe Sleep clock - resets: - maxItems: 1 - reset-names: - items: - - const: pci # PCIe core reset - - - if: - not: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8064 - - qcom,pcie-ipq4019 - - qcom,pcie-ipq5018 - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064v2 - - qcom,pcie-ipq8074 - - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 - - qcom,pcie-qcs404 - then: - required: - - power-domains - - - if: - not: - properties: - compatible: - contains: - enum: - - qcom,pcie-msm8996 - then: - required: - - resets - - reset-names - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-ipq6018 - - qcom,pcie-ipq8074 - - qcom,pcie-ipq8074-gen3 - - qcom,pcie-msm8996 - - qcom,pcie-msm8998 - - qcom,pcie-sdm845 - then: - oneOf: - - properties: - interrupts: - maxItems: 1 - interrupt-names: - items: - - const: msi - - properties: - interrupts: - minItems: 8 - maxItems: 9 - interrupt-names: - minItems: 8 - items: - - const: msi0 - - const: msi1 - - const: msi2 - - const: msi3 - - const: msi4 - - const: msi5 - - const: msi6 - - const: msi7 - - const: global - - - if: - properties: - compatible: - contains: - enum: - - qcom,pcie-apq8064 - - qcom,pcie-apq8084 - - qcom,pcie-ipq4019 - - qcom,pcie-ipq8064 - - qcom,pcie-ipq8064-v2 - - qcom,pcie-qcs404 - then: - properties: - interrupts: - maxItems: 1 - interrupt-names: - items: - - const: msi - -unevaluatedProperties: false - -examples: - - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pcie@1b500000 { - compatible = "qcom,pcie-ipq8064"; - reg = <0x1b500000 0x1000>, - <0x1b502000 0x80>, - <0x1b600000 0x100>, - <0x0ff00000 0x100000>; - reg-names = "dbi", "elbi", "parf", "config"; - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, - <0x82000000 0 0 0x08000000 0 0x07e00000>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc 41>, - <&gcc 43>, - <&gcc 44>, - <&gcc 42>, - <&gcc 248>; - clock-names = "core", "iface", "phy", "aux", "ref"; - resets = <&gcc 27>, - <&gcc 26>, - <&gcc 25>, - <&gcc 24>, - <&gcc 23>, - <&gcc 22>; - reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; - pinctrl-0 = <&pcie_pins_default>; - pinctrl-names = "default"; - vdda-supply = <&pm8921_s3>; - vdda_phy-supply = <&pm8921_lvs6>; - vdda_refclk-supply = <&ext_3p3v>; - }; - - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/gpio/gpio.h> - pcie@fc520000 { - compatible = "qcom,pcie-apq8084"; - reg = <0xfc520000 0x2000>, - <0xff000000 0x1000>, - <0xff001000 0x1000>, - <0xff002000 0x2000>; - reg-names = "parf", "dbi", "elbi", "config"; - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, - <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; - interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc 324>, - <&gcc 325>, - <&gcc 327>, - <&gcc 323>; - clock-names = "iface", "master_bus", "slave_bus", "aux"; - resets = <&gcc 81>; - reset-names = "core"; - power-domains = <&gcc 1>; - vdda-supply = <&pma8084_l3>; - phys = <&pciephy0>; - phy-names = "pciephy"; - perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pcie0_pins_default>; - pinctrl-names = "default"; - }; -... diff --git a/Documentation/devicetree/bindings/pci/qcom,sa8255p-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,sa8255p-pcie-ep.yaml new file mode 100644 index 000000000000..e338797d5dc2 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,sa8255p-pcie-ep.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,sa8255p-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm firmware managed PCIe Endpoint Controller + +description: + Qualcomm SA8255p SoC PCIe endpoint controller is based on the Synopsys + DesignWare PCIe IP which is managed by firmware. + +maintainers: + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + const: qcom,sa8255p-pcie-ep + + reg: + items: + - description: Qualcomm-specific PARF configuration registers + - description: DesignWare PCIe registers + - description: External local bus interface registers + - description: Address Translation Unit (ATU) registers + - description: Memory region used to map remote RC address space + - description: BAR memory region + - description: DMA register space + + reg-names: + items: + - const: parf + - const: dbi + - const: elbi + - const: atu + - const: addr_space + - const: mmio + - const: dma + + interrupts: + items: + - description: PCIe Global interrupt + - description: PCIe Doorbell interrupt + - description: DMA interrupt + + interrupt-names: + items: + - const: global + - const: doorbell + - const: dma + + iommus: + maxItems: 1 + + reset-gpios: + description: GPIO used as PERST# input signal + maxItems: 1 + + wake-gpios: + description: GPIO used as WAKE# output signal + maxItems: 1 + + power-domains: + maxItems: 1 + + dma-coherent: true + + num-lanes: + default: 2 + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - reset-gpios + - power-domains + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + pcie1_ep: pcie-ep@1c10000 { + compatible = "qcom,sa8255p-pcie-ep"; + reg = <0x0 0x01c10000 0x0 0x3000>, + <0x0 0x60000000 0x0 0xf20>, + <0x0 0x60000f20 0x0 0xa8>, + <0x0 0x60001000 0x0 0x4000>, + <0x0 0x60200000 0x0 0x100000>, + <0x0 0x01c13000 0x0 0x1000>, + <0x0 0x60005000 0x0 0x2000>; + reg-names = "parf", "dbi", "elbi", "atu", "addr_space", "mmio", "dma"; + interrupts = <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "global", "doorbell", "dma"; + reset-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + dma-coherent; + iommus = <&pcie_smmu 0x80 0x7f>; + power-domains = <&scmi6_pd 1>; + num-lanes = <4>; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index 6339a76499b2..2c4dc04f9984 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -106,6 +106,12 @@ properties: be connected to a single source of the periodic signal). const: ref - description: + Some dwc wrappers (like i.MX95 PCIes) have two reference clock + inputs, one from an internal PLL, the other from an off-chip crystal + oscillator. If present, 'extref' refers to a reference clock from + an external oscillator. + const: extref + - description: Clock for the PHY registers interface. Originally this is a PHY-viewport-based interface, but some platform may have specifically designed one. diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml index c07b0ed51613..8a2f1eef51bd 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml @@ -51,7 +51,7 @@ properties: phy-names: const: pcie-phy - interrupt-controller: + legacy-interrupt-controller: type: object additionalProperties: false @@ -111,7 +111,7 @@ examples: <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; - pcie_intc: interrupt-controller { + pcie_intc: legacy-interrupt-controller { #address-cells = <0>; interrupt-controller; #interrupt-cells = <1>; diff --git a/Documentation/devicetree/bindings/phy/apple,atcphy.yaml b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml new file mode 100644 index 000000000000..0acac7e3ee67 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml @@ -0,0 +1,222 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple Type-C PHY (ATCPHY) + +maintainers: + - Sven Peter <sven@kernel.org> + +description: > + The Apple Type-C PHY (ATCPHY) is a combined PHY for USB 2.0, USB 3.x, + USB4/Thunderbolt, and DisplayPort connectivity via Type-C ports found in + Apple Silicon SoCs. + + The PHY handles muxing between these different protocols and also provides the + reset controller for the attached DWC3 USB controller. + + It is designed for USB4 operation and does not handle individual differential + pairs as distinct DisplayPort lanes. Any reference to lane in this binding + hence refers to two differential pairs (RX and TX) as used in USB terminology. + + In order to correctly setup these lanes for the various modes calibration + values copied from Apple's firmware and converted to the format described + below by our bootloader m1n1 are required. Without these only USB2 operation + is possible. + +allOf: + - $ref: /schemas/usb/usb-switch.yaml# + +$defs: + apple,tunable: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: Register offset + - description: Mask to be applied to the register value + - description: Bits to be set after applying the mask + description: > + List of (register offset, mask, value) tuples copied from Apple's Device + Tree by our bootloader m1n1 and used to configure the PHY. These values + even vary for a single product/device and likely contain calibration + values determined by Apple at manufacturing time. + Unless otherwise noted these tunables are always applied to the core + register region. + +properties: + compatible: + oneOf: + - items: + - enum: + - apple,t6000-atcphy + - apple,t6020-atcphy + - apple,t8112-atcphy + - const: apple,t8103-atcphy + - const: apple,t8103-atcphy + + reg: + items: + - description: Common controls for all PHYs (USB2/3/4, DisplayPort, TBT) + - description: DisplayPort Alternate Mode PHY specific controls + - description: Type-C PHY AXI to Apple Fabric interconnect controls + - description: USB2 PHY specific controls + - description: USB3 PIPE interface controls + + reg-names: + items: + - const: core + - const: lpdptx + - const: axi2af + - const: usb2phy + - const: pipehandler + + "#phy-cells": + const: 1 + + "#reset-cells": + const: 0 + + mode-switch: true + orientation-switch: true + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Outgoing connection to the SS port of the Type-C connector. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Incoming endpoint from the USB3 controller. + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Incoming endpoint from the DisplayPort controller. + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Incoming endpoint from the USB4/Thunderbolt controller. + + apple,tunable-common-a: + $ref: "#/$defs/apple,tunable" + description: > + Common tunables required for all modes, applied before tunable-axi2af. + + apple,tunable-axi2af: + $ref: "#/$defs/apple,tunable" + description: > + AXI to Apple Fabric tunables, required for all modes. Unlike all other + tunables these are applied to the axi2af region. + + apple,tunable-common-b: + $ref: "#/$defs/apple,tunable" + description: > + Common tunables required for all modes, applied after tunable-axi2af. + + apple,tunable-lane0-usb: + $ref: "#/$defs/apple,tunable" + description: USB3 tunables for lane 0. + + apple,tunable-lane1-usb: + $ref: "#/$defs/apple,tunable" + description: USB3 tunables for lane 1. + + apple,tunable-lane0-cio: + $ref: "#/$defs/apple,tunable" + description: USB4/Thunderbolt ("Converged IO") tunables for lane 0. + + apple,tunable-lane1-cio: + $ref: "#/$defs/apple,tunable" + description: USB4/Thunderbolt ("Converged IO") tunables for lane 1. + + apple,tunable-lane0-dp: + $ref: "#/$defs/apple,tunable" + description: > + DisplayPort tunables for lane 0. + + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort + and not to an individual DisplayPort differential lane. + + apple,tunable-lane1-dp: + $ref: "#/$defs/apple,tunable" + description: > + DisplayPort tunables for lane 1. + + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort + and not to an individual DisplayPort differential lane. + +required: + - compatible + - reg + - reg-names + - "#phy-cells" + - "#reset-cells" + - orientation-switch + - mode-switch + - power-domains + - ports + +additionalProperties: false + +examples: + - | + phy@83000000 { + compatible = "apple,t8103-atcphy"; + reg = <0x83000000 0x4c000>, + <0x83050000 0x8000>, + <0x80000000 0x4000>, + <0x82a90000 0x4000>, + <0x82a84000 0x4000>; + reg-names = "core", "lpdptx", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells = <1>; + #reset-cells = <0>; + + orientation-switch; + mode-switch; + power-domains = <&ps_atc0_usb>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&typec_connector_ss>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&dwc3_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&dcp_dp_out>; + }; + }; + + port@3 { + reg = <3>; + + endpoint { + remote-endpoint = <&acio_tbt_out>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml index ff9f9ca0f19c..e96229c2f8fb 100644 --- a/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml @@ -20,6 +20,32 @@ properties: "#phy-cells": const: 1 + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^phy@[0-7]$": + type: object + description: SerDes lane (single RX/TX differential pair) + + properties: + reg: + minimum: 0 + maximum: 7 + description: Lane index as seen in register map + + "#phy-cells": + const: 0 + + required: + - reg + - "#phy-cells" + + additionalProperties: false + required: - compatible - reg @@ -32,9 +58,52 @@ examples: soc { #address-cells = <2>; #size-cells = <2>; - serdes_1: phy@1ea0000 { + + serdes@1ea0000 { compatible = "fsl,lynx-28g"; reg = <0x0 0x1ea0000 0x0 0x1e30>; + #address-cells = <1>; + #size-cells = <0>; #phy-cells = <1>; + + phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + + phy@3 { + reg = <3>; + #phy-cells = <0>; + }; + + phy@4 { + reg = <4>; + #phy-cells = <0>; + }; + + phy@5 { + reg = <5>; + #phy-cells = <0>; + }; + + phy@6 { + reg = <6>; + #phy-cells = <0>; + }; + + phy@7 { + reg = <7>; + #phy-cells = <0>; + }; }; }; diff --git a/Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml b/Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml new file mode 100644 index 000000000000..427e2e3425f6 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2025, Google LLC +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/google,lga-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Tensor Series G5 (Laguna) USB PHY + +maintainers: + - Roy Luo <royluo@google.com> + +description: + Describes the USB PHY interfaces integrated with the DWC3 USB controller on + Google Tensor SoCs, starting with the G5 generation (laguna). + Two specific PHY IPs from Synopsys are integrated, including eUSB 2.0 PHY IP + and USB3.2/DisplayPort combo PHY IP. + +properties: + compatible: + const: google,lga-usb-phy + + reg: + items: + - description: USB3.2/DisplayPort combo PHY core registers. + - description: USB3.2/DisplayPort combo PHY Type-C Assist registers. + - description: eUSB 2.0 PHY core registers. + - description: Top-level wrapper registers for the integrated PHYs. + + reg-names: + items: + - const: usb3_core + - const: usb3_tca + - const: usb2_core + - const: usbdp_top + + "#phy-cells": + description: | + The phandle's argument in the PHY specifier selects one of the three + following PHY interfaces. + - 0 for USB high-speed. + - 1 for USB super-speed. + - 2 for DisplayPort. + const: 1 + + clocks: + items: + - description: USB2 PHY clock. + - description: USB2 PHY APB clock. + - description: USB3.2/DisplayPort combo PHY clock. + - description: USB3.2/DisplayPort combo PHY firmware clock. + + clock-names: + items: + - const: usb2 + - const: usb2_apb + - const: usb3 + - const: usb3_fw + + resets: + items: + - description: USB2 PHY reset. + - description: USB2 PHY APB reset. + - description: USB3.2/DisplayPort combo PHY reset. + + reset-names: + items: + - const: usb2 + - const: usb2_apb + - const: usb3 + + power-domains: + maxItems: 1 + + orientation-switch: + type: boolean + description: + Indicates the PHY as a handler of USB Type-C orientation changes + + google,usb-cfg-csr: + description: + A phandle to a syscon node used to access the USB configuration + registers. These registers are the top-level wrapper of the USB + subsystem and provide control and status for the integrated USB + controller and USB PHY. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the syscon node. + - description: USB2 PHY configuration register offset. + +required: + - compatible + - reg + - reg-names + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + - power-domains + - orientation-switch + - google,usb-cfg-csr + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb-phy@c410000 { + compatible = "google,lga-usb-phy"; + reg = <0 0x0c410000 0 0x20000>, + <0 0x0c430000 0 0x1000>, + <0 0x0c440000 0 0x10000>, + <0 0x0c637000 0 0xa0>; + reg-names = "usb3_core", "usb3_tca", "usb2_core", "usbdp_top"; + #phy-cells = <1>; + clocks = <&hsion_usb2_phy_clk>, <&hsion_u2phy_apb_clk>, + <&hsion_usb3_phy_clk>, <&hsion_usb3_phy_fw_clk>; + clock-names = "usb2", "usb2_apb", "usb3", "usb3_fw"; + resets = <&hsion_resets_usb2_phy>, + <&hsion_resets_u2phy_apb>, + <&hsion_resets_usb3_phy>; + reset-names = "usb2", "usb2_apb", "usb3"; + power-domains = <&hsio_n_usb_pd>; + orientation-switch; + google,usb-cfg-csr = <&usb_cfg_csr 0x14>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml index f3a8b0b745d1..ac93069f4801 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml @@ -26,6 +26,10 @@ properties: - enum: - mediatek,mt7623-hdmi-phy - const: mediatek,mt2701-hdmi-phy + - items: + - enum: + - mediatek,mt8188-hdmi-phy + - const: mediatek,mt8195-hdmi-phy - const: mediatek,mt2701-hdmi-phy - const: mediatek,mt8173-hdmi-phy - const: mediatek,mt8195-hdmi-phy @@ -34,16 +38,23 @@ properties: maxItems: 1 clocks: + minItems: 1 items: - description: PLL reference clock + - description: HDMI 26MHz clock + - description: HDMI PLL1 clock + - description: HDMI PLL2 clock clock-names: + minItems: 1 items: - const: pll_ref + - const: 26m + - const: pll1 + - const: pll2 clock-output-names: - items: - - const: hdmitx_dig_cts + maxItems: 1 "#phy-cells": const: 0 @@ -76,6 +87,20 @@ required: - "#phy-cells" - "#clock-cells" +allOf: + - if: + not: + properties: + compatible: + contains: + const: mediatek,mt8195-hdmi-phy + then: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/phy-common-props.yaml b/Documentation/devicetree/bindings/phy/phy-common-props.yaml new file mode 100644 index 000000000000..b2c709cc1b0d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-common-props.yaml @@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/phy-common-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common PHY and network PCS properties + +description: + Common PHY and network PCS properties, such as peak-to-peak transmit + amplitude. + +maintainers: + - Marek Behún <kabel@kernel.org> + +$defs: + protocol-names: + description: + Names of the PHY modes. If a value of 'default' is provided, the system + should use it for any PHY mode that is otherwise not defined here. If + 'default' is not provided, the system should use manufacturer default value. + minItems: 1 + maxItems: 16 + uniqueItems: true + items: + enum: + - default + + # ethernet modes + - sgmii + - qsgmii + - xgmii + - 1000base-x + - 2500base-x + - 5gbase-r + - rxaui + - xaui + - 10gbase-kr + - usxgmii + - 10gbase-r + - 25gbase-r + + # PCIe modes + - pcie + - pcie1 + - pcie2 + - pcie3 + - pcie4 + - pcie5 + - pcie6 + + # USB modes + - usb + - usb-ls + - usb-fs + - usb-hs + - usb-ss + - usb-ss+ + - usb-4 + + # storage modes + - sata + - ufs-hs + - ufs-hs-a + - ufs-hs-b + + # display modes + - lvds + - dp + - dp-rbr + - dp-hbr + - dp-hbr2 + - dp-hbr3 + - dp-uhbr-10 + - dp-uhbr-13.5 + - dp-uhbr-20 + + # camera modes + - mipi-dphy + - mipi-dphy-univ + - mipi-dphy-v2.5-univ + +properties: + tx-p2p-microvolt: + description: + Transmit amplitude voltages in microvolts, peak-to-peak. If this property + contains multiple values for various PHY modes, the + 'tx-p2p-microvolt-names' property must be provided and contain + corresponding mode names. + + tx-p2p-microvolt-names: + description: + Names of the modes corresponding to voltages in the 'tx-p2p-microvolt' + property. Required only if multiple voltages are provided. + $ref: "#/$defs/protocol-names" + + rx-polarity: + description: + An array of values indicating whether the differential receiver's + polarity is inverted. Each value can be one of + PHY_POL_NORMAL (0) which means the negative signal is decoded from the + RXN input, and the positive signal from the RXP input; + PHY_POL_INVERT (1) which means the negative signal is decoded from the + RXP input, and the positive signal from the RXN input; + PHY_POL_AUTO (2) which means the receiver performs automatic polarity + detection and correction, which is a mandatory part of link training for + some protocols (PCIe, USB SS). + + The values are defined in <dt-bindings/phy/phy.h>. If the property is + absent, the default value is undefined. + + Note that the RXP and RXN inputs refer to the block that this property is + under, and do not necessarily directly translate to external pins. + + If this property contains multiple values for various protocols, the + 'rx-polarity-names' property must be provided. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16 + items: + enum: [0, 1, 2] + + rx-polarity-names: + $ref: '#/$defs/protocol-names' + + tx-polarity: + description: + Like 'rx-polarity', except it applies to differential transmitters, + and only the values of PHY_POL_NORMAL and PHY_POL_INVERT are possible. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16 + items: + enum: [0, 1] + + tx-polarity-names: + $ref: '#/$defs/protocol-names' + +dependencies: + tx-p2p-microvolt-names: [ tx-p2p-microvolt ] + rx-polarity-names: [ rx-polarity ] + tx-polarity-names: [ tx-polarity ] + +additionalProperties: true + +examples: + - | + #include <dt-bindings/phy/phy.h> + + phy: phy { + #phy-cells = <1>; + tx-p2p-microvolt = <915000>, <1100000>, <1200000>; + tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss"; + rx-polarity = <PHY_POL_AUTO>, <PHY_POL_NORMAL>; + rx-polarity-names = "usb-ss", "default"; + tx-polarity = <PHY_POL_INVERT>; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index eb97181cbb95..4a1daae3d8d4 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -18,6 +18,7 @@ properties: compatible: oneOf: - enum: + - qcom,glymur-dp-phy - qcom,sa8775p-edp-phy - qcom,sc7280-edp-phy - qcom,sc8180x-edp-phy @@ -37,12 +38,15 @@ properties: - description: PLL register block clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: + minItems: 2 items: - const: aux - const: cfg_ahb + - const: ref "#clock-cells": const: 1 @@ -64,6 +68,30 @@ required: - "#clock-cells" - "#phy-cells" +allOf: + - if: + properties: + compatible: + enum: + - qcom,glymur-dp-phy + - qcom,x1e80100-dp-phy + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + minItems: 3 + maxItems: 3 + else: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml index c84c62d0e8cb..cd6b84213a7c 100644 --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml @@ -15,9 +15,13 @@ description: properties: compatible: - items: - - enum: - - qcom,sm8750-m31-eusb2-phy + oneOf: + - items: + - enum: + - qcom,glymur-m31-eusb2-phy + - qcom,kaanapali-m31-eusb2-phy + - const: qcom,sm8750-m31-eusb2-phy + - const: qcom,sm8750-m31-eusb2-phy reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml new file mode 100644 index 000000000000..efb465c71c1b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,qcs615-qmp-usb3dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP USB3-DP PHY controller (DP, QCS615) + +maintainers: + - Xiangxu Yin <xiangxu.yin@oss.qualcomm.com> + +description: + The QMP PHY controller supports physical layer functionality for both USB3 + and DisplayPort over USB-C. While it enables mode switching between USB3 and + DisplayPort, but does not support combo mode. + +properties: + compatible: + enum: + - qcom,qcs615-qmp-usb3-dp-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aux + - const: ref + - const: cfg_ahb + - const: pipe + + resets: + maxItems: 2 + + reset-names: + items: + - const: phy_phy + - const: dp_phy + + vdda-phy-supply: true + + vdda-pll-supply: true + + "#clock-cells": + const: 1 + description: + See include/dt-bindings/phy/phy-qcom-qmp.h + + "#phy-cells": + const: 1 + description: + See include/dt-bindings/phy/phy-qcom-qmp.h + + qcom,tcsr-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to TCSR hardware block + - description: offset of the VLS CLAMP register + - description: offset of the PHY mode register + description: Clamp and PHY mode register present in the TCSR + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + - "#clock-cells" + - "#phy-cells" + - qcom,tcsr-reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,qcs615-gcc.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + phy@88e8000 { + compatible = "qcom,qcs615-qmp-usb3-dp-phy"; + reg = <0x88e8000 0x2000>; + + clocks = <&gcc GCC_USB2_SEC_PHY_AUX_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_CLK>, + <&gcc GCC_AHB2PHY_WEST_CLK>, + <&gcc GCC_USB2_SEC_PHY_PIPE_CLK>; + clock-names = "aux", + "ref", + "cfg_ahb", + "pipe"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_DP_PHY_SEC_BCR>; + reset-names = "phy_phy", + "dp_phy"; + + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l12a>; + + #clock-cells = <1>; + #phy-cells = <1>; + + qcom,tcsr-reg = <&tcsr 0xbff0 0xb24c>; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 48bd11410e8c..3a35120a77ec 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -16,7 +16,9 @@ description: properties: compatible: enum: + - qcom,glymur-qmp-gen4x2-pcie-phy - qcom,glymur-qmp-gen5x4-pcie-phy + - qcom,kaanapali-qmp-gen3x2-pcie-phy - qcom,qcs615-qmp-gen3x1-pcie-phy - qcom,qcs8300-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy @@ -56,7 +58,7 @@ properties: clocks: minItems: 5 - maxItems: 7 + maxItems: 6 clock-names: minItems: 5 @@ -67,7 +69,6 @@ properties: - enum: [rchng, refgen] - const: pipe - const: pipediv2 - - const: phy_aux power-domains: maxItems: 1 @@ -147,6 +148,7 @@ allOf: compatible: contains: enum: + - qcom,kaanapali-qmp-gen3x2-pcie-phy - qcom,qcs615-qmp-gen3x1-pcie-phy - qcom,sar2130p-qmp-gen3x2-pcie-phy - qcom,sc8180x-qmp-pcie-phy @@ -179,7 +181,9 @@ allOf: compatible: contains: enum: + - qcom,glymur-qmp-gen4x2-pcie-phy - qcom,glymur-qmp-gen5x4-pcie-phy + - qcom,qcs8300-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x4-pcie-phy - qcom,sc8280xp-qmp-gen3x1-pcie-phy @@ -202,20 +206,9 @@ allOf: compatible: contains: enum: - - qcom,qcs8300-qmp-gen4x2-pcie-phy - then: - properties: - clocks: - minItems: 7 - clock-names: - minItems: 7 - - - if: - properties: - compatible: - contains: - enum: + - qcom,glymur-qmp-gen4x2-pcie-phy - qcom,glymur-qmp-gen5x4-pcie-phy + - qcom,kaanapali-qmp-gen3x2-pcie-phy - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen3x2-pcie-phy diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml index fba7b2549dde..a1731b08c9d1 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml @@ -22,6 +22,10 @@ properties: - const: qcom,sm6115-qmp-ufs-phy - items: - enum: + - qcom,x1e80100-qmp-ufs-phy + - const: qcom,sm8550-qmp-ufs-phy + - items: + - enum: - qcom,qcs8300-qmp-ufs-phy - const: qcom,sa8775p-qmp-ufs-phy - items: @@ -29,6 +33,7 @@ properties: - qcom,kaanapali-qmp-ufs-phy - const: qcom,sm8750-qmp-ufs-phy - enum: + - qcom,milos-qmp-ufs-phy - qcom,msm8996-qmp-ufs-phy - qcom,msm8998-qmp-ufs-phy - qcom,sa8775p-qmp-ufs-phy @@ -98,6 +103,7 @@ allOf: compatible: contains: enum: + - qcom,milos-qmp-ufs-phy - qcom,msm8998-qmp-ufs-phy - qcom,sa8775p-qmp-ufs-phy - qcom,sc7180-qmp-ufs-phy diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml index 863a1a446739..623c2f8c7d22 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml @@ -16,6 +16,7 @@ description: properties: compatible: enum: + - qcom,glymur-qmp-usb3-uni-phy - qcom,ipq5424-qmp-usb3-phy - qcom,ipq6018-qmp-usb3-phy - qcom,ipq8074-qmp-usb3-phy @@ -61,6 +62,8 @@ properties: vdda-pll-supply: true + refgen-supply: true + "#clock-cells": const: 0 @@ -113,6 +116,7 @@ allOf: compatible: contains: enum: + - qcom,glymur-qmp-usb3-uni-phy - qcom,qcs8300-qmp-usb3-uni-phy - qcom,qdu1000-qmp-usb3-uni-phy - qcom,sa8775p-qmp-usb3-uni-phy @@ -156,6 +160,7 @@ allOf: compatible: contains: enum: + - qcom,glymur-qmp-usb3-uni-phy - qcom,sa8775p-qmp-usb3-uni-phy - qcom,sc8180x-qmp-usb3-uni-phy - qcom,sc8280xp-qmp-usb3-uni-phy @@ -164,6 +169,19 @@ allOf: required: - power-domains + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-qmp-usb3-uni-phy + then: + required: + - refgen-supply + else: + properties: + refgen-supply: false + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml index e0ec45b96bf5..3d537b7f9985 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml @@ -15,22 +15,28 @@ description: properties: compatible: - enum: - - qcom,sar2130p-qmp-usb3-dp-phy - - qcom,sc7180-qmp-usb3-dp-phy - - qcom,sc7280-qmp-usb3-dp-phy - - qcom,sc8180x-qmp-usb3-dp-phy - - qcom,sc8280xp-qmp-usb43dp-phy - - qcom,sdm845-qmp-usb3-dp-phy - - qcom,sm6350-qmp-usb3-dp-phy - - qcom,sm8150-qmp-usb3-dp-phy - - qcom,sm8250-qmp-usb3-dp-phy - - qcom,sm8350-qmp-usb3-dp-phy - - qcom,sm8450-qmp-usb3-dp-phy - - qcom,sm8550-qmp-usb3-dp-phy - - qcom,sm8650-qmp-usb3-dp-phy - - qcom,sm8750-qmp-usb3-dp-phy - - qcom,x1e80100-qmp-usb3-dp-phy + oneOf: + - items: + - enum: + - qcom,kaanapali-qmp-usb3-dp-phy + - const: qcom,sm8750-qmp-usb3-dp-phy + - enum: + - qcom,glymur-qmp-usb3-dp-phy + - qcom,sar2130p-qmp-usb3-dp-phy + - qcom,sc7180-qmp-usb3-dp-phy + - qcom,sc7280-qmp-usb3-dp-phy + - qcom,sc8180x-qmp-usb3-dp-phy + - qcom,sc8280xp-qmp-usb43dp-phy + - qcom,sdm845-qmp-usb3-dp-phy + - qcom,sm6350-qmp-usb3-dp-phy + - qcom,sm8150-qmp-usb3-dp-phy + - qcom,sm8250-qmp-usb3-dp-phy + - qcom,sm8350-qmp-usb3-dp-phy + - qcom,sm8450-qmp-usb3-dp-phy + - qcom,sm8550-qmp-usb3-dp-phy + - qcom,sm8650-qmp-usb3-dp-phy + - qcom,sm8750-qmp-usb3-dp-phy + - qcom,x1e80100-qmp-usb3-dp-phy reg: maxItems: 1 @@ -63,6 +69,8 @@ properties: vdda-pll-supply: true + refgen-supply: true + "#clock-cells": const: 1 description: @@ -194,14 +202,16 @@ allOf: - if: properties: compatible: - enum: - - qcom,sar2130p-qmp-usb3-dp-phy - - qcom,sc8280xp-qmp-usb43dp-phy - - qcom,sm6350-qmp-usb3-dp-phy - - qcom,sm8550-qmp-usb3-dp-phy - - qcom,sm8650-qmp-usb3-dp-phy - - qcom,sm8750-qmp-usb3-dp-phy - - qcom,x1e80100-qmp-usb3-dp-phy + contains: + enum: + - qcom,glymur-qmp-usb3-dp-phy + - qcom,sar2130p-qmp-usb3-dp-phy + - qcom,sc8280xp-qmp-usb43dp-phy + - qcom,sm6350-qmp-usb3-dp-phy + - qcom,sm8550-qmp-usb3-dp-phy + - qcom,sm8650-qmp-usb3-dp-phy + - qcom,sm8750-qmp-usb3-dp-phy + - qcom,x1e80100-qmp-usb3-dp-phy then: required: - power-domains @@ -209,6 +219,18 @@ allOf: properties: power-domains: false + - if: + properties: + compatible: + enum: + - qcom,glymur-qmp-usb3-dp-phy + then: + required: + - refgen-supply + else: + properties: + refgen-supply: false + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml index 5bf0d6c9c025..f29fc335f3f5 100644 --- a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml @@ -24,6 +24,7 @@ properties: - qcom,pm8550b-eusb2-repeater - qcom,pmiv0104-eusb2-repeater - qcom,smb2360-eusb2-repeater + - qcom,smb2370-eusb2-repeater reg: maxItems: 1 @@ -59,6 +60,14 @@ properties: minimum: 0 maximum: 7 + qcom,squelch-detector-bp: + description: + This adjusts the voltage level for the threshold used to detect valid + high-speed data. + minimum: -6000 + maximum: 1000 + multipleOf: 1000 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/phy/renesas,rzg3e-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,rzg3e-usb3-phy.yaml index b86dc7a291a4..6d97e038a927 100644 --- a/Documentation/devicetree/bindings/phy/renesas,rzg3e-usb3-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,rzg3e-usb3-phy.yaml @@ -11,7 +11,14 @@ maintainers: properties: compatible: - const: renesas,r9a09g047-usb3-phy + oneOf: + - const: renesas,r9a09g047-usb3-phy # RZ/G3E + + - items: + - enum: + - renesas,r9a09g056-usb3-phy # RZ/V2N + - renesas,r9a09g057-usb3-phy # RZ/V2H(P) + - const: renesas,r9a09g047-usb3-phy reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index 2bbec8702a1e..9740e5b335f9 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -41,7 +41,9 @@ properties: - const: renesas,rzg2l-usb2-phy - items: - - const: renesas,usb2-phy-r9a09g056 # RZ/V2N + - enum: + - renesas,usb2-phy-r9a09g047 # RZ/G3E + - renesas,usb2-phy-r9a09g056 # RZ/V2N - const: renesas,usb2-phy-r9a09g057 - const: renesas,usb2-phy-r9a09g077 # RZ/T2H @@ -89,6 +91,12 @@ properties: Phandle to a regulator that provides power to the VBUS. This regulator will be managed during the PHY power on/off sequence. + vbus-regulator: + $ref: /schemas/regulator/regulator.yaml# + description: USB VBUS internal regulator + type: object + unevaluatedProperties: false + renesas,no-otg-pins: $ref: /schemas/types.yaml#/definitions/flag description: | @@ -96,6 +104,11 @@ properties: dr_mode: true + mux-states: + description: + phandle to a mux controller node that select the source for USB VBUS. + maxItems: 1 + if: properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml index d70ffeb6e824..2b20c0a5e509 100644 --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -36,6 +36,9 @@ properties: minItems: 1 maxItems: 4 + power-domains: + maxItems: 1 + samsung,pmu-syscon: $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml index ea1135c91fb7..4562e0468f4f 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml @@ -34,6 +34,9 @@ properties: - samsung,exynos7870-usbdrd-phy - samsung,exynos850-usbdrd-phy - samsung,exynos990-usbdrd-phy + - samsung,exynosautov920-usb31drd-combo-ssphy + - samsung,exynosautov920-usbdrd-combo-hsphy + - samsung,exynosautov920-usbdrd-phy clocks: minItems: 1 @@ -51,6 +54,9 @@ properties: settings register. For Exynos5420 this is given as 'sclk_usbphy30' in the CMU. It's not needed for Exynos2200. + power-domains: + maxItems: 1 + "#phy-cells": const: 1 @@ -110,6 +116,15 @@ properties: vddh-usbdp-supply: description: VDDh power supply for the USB DP phy. + dvdd-supply: + description: 0.75V power supply for the USB phy. + + vdd18-supply: + description: 1.8V power supply for the USB phy. + + vdd33-supply: + description: 3.3V power supply for the USB phy. + required: - compatible - clocks @@ -221,6 +236,9 @@ allOf: - samsung,exynos7870-usbdrd-phy - samsung,exynos850-usbdrd-phy - samsung,exynos990-usbdrd-phy + - samsung,exynosautov920-usb31drd-combo-ssphy + - samsung,exynosautov920-usbdrd-combo-hsphy + - samsung,exynosautov920-usbdrd-phy then: properties: clocks: @@ -238,6 +256,39 @@ allOf: reg-names: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-usb31drd-combo-ssphy + - samsung,exynosautov920-usbdrd-combo-hsphy + - samsung,exynosautov920-usbdrd-phy + then: + required: + - dvdd-supply + - vdd18-supply + + else: + properties: + dvdd-supply: false + vdd18-supply: false + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-usbdrd-combo-hsphy + - samsung,exynosautov920-usbdrd-phy + then: + required: + - vdd33-supply + + else: + properties: + vdd33-supply: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml new file mode 100644 index 000000000000..b59476cd78b5 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/spacemit,k1-combo-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 PCIe/USB3 Combo PHY + +maintainers: + - Alex Elder <elder@riscstar.com> + +description: > + Of the three PHYs on the SpacemiT K1 SoC capable of being used for + PCIe, one is a combo PHY that can also be configured for use by a + USB 3 controller. Using PCIe or USB 3 is a board design decision. + + The combo PHY is also the only PCIe PHY that is able to determine + PCIe calibration values to use, and this must be determined before + the other two PCIe PHYs can be used. This calibration must be + performed with the combo PHY in PCIe mode, and is this is done + when the combo PHY is probed. + + The combo PHY uses an external oscillator as a reference clock. + During normal operation, the PCIe or USB port driver is responsible + for ensuring all other clocks needed by a PHY are enabled, and all + resets affecting the PHY are deasserted. However, for the combo + PHY to perform calibration independent of whether it's later used + for PCIe or USB, all PCIe mode clocks and resets must be defined. + +properties: + compatible: + const: spacemit,k1-combo-phy + + reg: + items: + - description: PHY control registers + + clocks: + items: + - description: External oscillator used by the PHY PLL + - description: DWC PCIe Data Bus Interface (DBI) clock + - description: DWC PCIe application AXI-bus Master interface clock + - description: DWC PCIe application AXI-bus slave interface clock + + clock-names: + items: + - const: refclk + - const: dbi + - const: mstr + - const: slv + + resets: + items: + - description: PHY reset; remains deasserted after initialization + - description: DWC PCIe Data Bus Interface (DBI) reset + - description: DWC PCIe application AXI-bus Master interface reset + - description: DWC PCIe application AXI-bus slave interface reset + + reset-names: + items: + - const: phy + - const: dbi + - const: mstr + - const: slv + + spacemit,apmu: + description: + A phandle that refers to the APMU system controller, whose + regmap is used in setting the mode + $ref: /schemas/types.yaml#/definitions/phandle + + "#phy-cells": + const: 1 + description: + The argument value (PHY_TYPE_PCIE or PHY_TYPE_USB3) determines + whether the PHY operates in PCIe or USB3 mode. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - spacemit,apmu + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/spacemit,k1-syscon.h> + phy@c0b10000 { + compatible = "spacemit,k1-combo-phy"; + reg = <0xc0b10000 0x1000>; + clocks = <&vctcxo_24m>, + <&syscon_apmu CLK_PCIE0_DBI>, + <&syscon_apmu CLK_PCIE0_MASTER>, + <&syscon_apmu CLK_PCIE0_SLAVE>; + clock-names = "refclk", + "dbi", + "mstr", + "slv"; + resets = <&syscon_apmu RESET_PCIE0_GLOBAL>, + <&syscon_apmu RESET_PCIE0_DBI>, + <&syscon_apmu RESET_PCIE0_MASTER>, + <&syscon_apmu RESET_PCIE0_SLAVE>; + reset-names = "phy", + "dbi", + "mstr", + "slv"; + spacemit,apmu = <&syscon_apmu>; + #phy-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml new file mode 100644 index 000000000000..019b28349be7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/spacemit,k1-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 PCIe PHY + +maintainers: + - Alex Elder <elder@riscstar.com> + +description: > + Two PHYs on the SpacemiT K1 SoC used for only for PCIe. These + PHYs must be configured using calibration values that are + determined by a third "combo PHY". The combo PHY determines + these calibration values during probe so they can be used for + the two PCIe-only PHYs. + + The PHY uses an external oscillator as a reference clock. During + normal operation, the PCIe host driver is responsible for ensuring + all other clocks needed by a PHY are enabled, and all resets + affecting the PHY are deasserted. + +properties: + compatible: + const: spacemit,k1-pcie-phy + + reg: + items: + - description: PHY control registers + + clocks: + items: + - description: External oscillator used by the PHY PLL + + clock-names: + const: refclk + + resets: + items: + - description: PHY reset; remains deasserted after initialization + + reset-names: + const: phy + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/spacemit,k1-syscon.h> + phy@c0c10000 { + compatible = "spacemit,k1-pcie-phy"; + reg = <0xc0c10000 0x1000>; + clocks = <&vctcxo_24m>; + clock-names = "refclk"; + resets = <&syscon_apmu RESET_PCIE1_GLOBAL>; + reset-names = "phy"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml new file mode 100644 index 000000000000..43eaca90d88c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/spacemit,usb2-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 SoC USB 2.0 PHY + +maintainers: + - Ze Huang <huang.ze@linux.dev> + +properties: + compatible: + const: spacemit,k1-usb2-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - "#phy-cells" + +additionalProperties: false + +examples: + - | + usb-phy@c09c0000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0xc09c0000 0x200>; + clocks = <&syscon_apmu 15>; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml b/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml new file mode 100644 index 000000000000..4ecb1611ee65 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/ti,control-phy-otghs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP Control PHY Module + +maintainers: + - Roger Quadros <rogerq@ti.com> + +description: + The TI OMAP Control PHY module is a hardware block within the system + control module (SCM) of Texas Instruments OMAP SoCs. It provides + centralized control over power, configuration, and auxiliary features + for multiple on-chip PHYs. This module is essential for proper PHY + operation in power-constrained embedded systems. + +properties: + $nodename: + pattern: "^phy@[0-9a-f]+$" + + compatible: + enum: + - ti,control-phy-otghs + - ti,control-phy-pcie + - ti,control-phy-pipe3 + - ti,control-phy-usb2 + - ti,control-phy-usb2-am437 + - ti,control-phy-usb2-dra7 + + reg: + minItems: 1 + maxItems: 3 + + reg-names: + minItems: 1 + maxItems: 3 + items: + enum: [otghs_control, power, pcie_pcs, control_sma] + +allOf: + - if: + properties: + compatible: + contains: + enum: + - ti,control-phy-otghs + then: + properties: + reg-names: + const: otghs_control + + - if: + properties: + compatible: + contains: + enum: + - ti,control-phy-pcie + then: + properties: + reg: + minItems: 3 + + reg-names: + items: + - const: power + - const: pcie_pcs + - const: control_sma + + - if: + properties: + compatible: + contains: + enum: + - ti,control-phy-usb2 + - ti,control-phy-usb2-dra7 + - ti,control-phy-usb2-am437 + - ti,control-phy-pipe3 + then: + properties: + reg-names: + const: power + +required: + - reg + - compatible + - reg-names + +unevaluatedProperties: false + +examples: + - | + phy@4a00233c { + compatible = "ti,control-phy-otghs"; + reg = <0x4a00233c 0x4>; + reg-names = "otghs_control"; + }; +... diff --git a/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml new file mode 100644 index 000000000000..84f538aa587c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/ti,phy-usb3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI PIPE3 PHY Module + +maintainers: + - Roger Quadros <rogerq@ti.com> + +description: + The TI PIPE3 PHY is a high-speed SerDes (Serializer/Deserializer) + transceiver integrated in OMAP5, DRA7xx/AM57xx, and similar SoCs. + It supports multiple protocols (USB3, SATA, PCIe) using the PIPE3 + interface standard, which defines a common physical layer for + high-speed serial interfaces. + +properties: + $nodename: + pattern: "^(pcie-phy|usb3-phy|phy)@[0-9a-f]+$" + + compatible: + enum: + - ti,omap-usb3 + - ti,phy-pipe3-pcie + - ti,phy-pipe3-sata + - ti,phy-usb3 + + reg: + minItems: 2 + maxItems: 3 + + reg-names: + minItems: 2 + items: + - const: phy_rx + - const: phy_tx + - const: pll_ctrl + + "#phy-cells": + const: 0 + + clocks: + minItems: 2 + maxItems: 7 + + clock-names: + minItems: 2 + maxItems: 7 + items: + enum: [wkupclk, sysclk, refclk, dpll_ref, + dpll_ref_m2, phy-div, div-clk] + + syscon-phy-power: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + items: + items: + - description: Phandle to the system control module + - description: Register offset controlling PHY power + + syscon-pllreset: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + items: + items: + - description: Phandle to the system control module + - description: Register offset of CTRL_CORE_SMA_SW_0 + + syscon-pcs: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + items: + items: + - description: Phandle to the system control module + - description: Register offset for PCS delay programming + + ctrl-module: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle of control module for PHY power on. + deprecated: true + +allOf: + - if: + properties: + compatible: + contains: + const: ti,phy-pipe3-sata + then: + properties: + syscon-pllreset: true + else: + properties: + syscon-pllreset: false + +required: + - reg + - compatible + - reg-names + - "#phy-cells" + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + /* TI PIPE3 USB3 PHY */ + usb3-phy@4a084400 { + compatible = "ti,phy-usb3"; + reg = <0x4a084400 0x80>, + <0x4a084800 0x64>, + <0x4a084c00 0x40>; + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + #phy-cells = <0>; + clocks = <&usb_phy_cm_clk32k>, + <&sys_clkin>, + <&usb_otg_ss_refclk960m>; + clock-names = "wkupclk", "sysclk", "refclk"; + ctrl-module = <&omap_control_usb>; + }; + + - | + /* TI PIPE3 SATA PHY */ + phy@4a096000 { + compatible = "ti,phy-pipe3-sata"; + reg = <0x4a096000 0x80>, /* phy_rx */ + <0x4a096400 0x64>, /* phy_tx */ + <0x4a096800 0x40>; /* pll_ctrl */ + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + clocks = <&sys_clkin1>, <&sata_ref_clk>; + clock-names = "sysclk", "refclk"; + syscon-pllreset = <&scm_conf 0x3fc>; + #phy-cells = <0>; + }; +... diff --git a/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml b/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml index c686d06f5f56..9f5c37ca6496 100644 --- a/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml +++ b/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml @@ -20,6 +20,9 @@ properties: - microchip,ata6561 - ti,tcan1051 - const: ti,tcan1042 + - items: + - const: ti,tcan1046 + - const: nxp,tja1048 - enum: - ti,tcan1042 - ti,tcan1043 diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt deleted file mode 100644 index 7c7936b89f2c..000000000000 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt +++ /dev/null @@ -1,98 +0,0 @@ -TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs - -OMAP CONTROL PHY - -Required properties: - - compatible: Should be one of - "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4. - "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register - e.g. USB2_PHY on OMAP5. - "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control - e.g. USB3 PHY and SATA PHY on OMAP5. - "ti,control-phy-pcie" - for pcie to support external clock for pcie and to - set PCS delay value. - e.g. PCIE PHY in DRA7x - "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on - DRA7 platform. - "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on - AM437 platform. - - reg : register ranges as listed in the reg-names property - - reg-names: "otghs_control" for control-phy-otghs - "power", "pcie_pcs" and "control_sma" for control-phy-pcie - "power" for all other types - -omap_control_usb: omap-control-usb@4a002300 { - compatible = "ti,control-phy-otghs"; - reg = <0x4a00233c 0x4>; - reg-names = "otghs_control"; -}; - -TI PIPE3 PHY - -Required properties: - - compatible: Should be "ti,phy-usb3", "ti,phy-pipe3-sata" or - "ti,phy-pipe3-pcie. "ti,omap-usb3" is deprecated. - - reg : Address and length of the register set for the device. - - reg-names: The names of the register addresses corresponding to the registers - filled in "reg". - - #phy-cells: determine the number of cells that should be given in the - phandle while referencing this phy. - - clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. - - clock-names: should include: - * "wkupclk" - wakeup clock. - * "sysclk" - system clock. - * "refclk" - reference clock. - * "dpll_ref" - external dpll ref clk - * "dpll_ref_m2" - external dpll ref clk - * "phy-div" - divider for apll - * "div-clk" - apll clock - -Optional properties: - - id: If there are multiple instance of the same type, in order to - differentiate between each instance "id" can be used (e.g., multi-lane PCIe - PHY). If "id" is not provided, it is set to default value of '1'. - - syscon-pllreset: Handle to system control region that contains the - CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0 - register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy. - - syscon-pcs : phandle/offset pair. Phandle to the system control module and the - register offset to write the PCS delay value. - -Deprecated properties: - - ctrl-module : phandle of the control module used by PHY driver to power on - the PHY. - -Recommended properties: - - syscon-phy-power : phandle/offset pair. Phandle to the system control - module and the register offset to power on/off the PHY. - -This is usually a subnode of ocp2scp to which it is connected. - -usb3phy@4a084400 { - compatible = "ti,phy-usb3"; - reg = <0x4a084400 0x80>, - <0x4a084800 0x64>, - <0x4a084c00 0x40>; - reg-names = "phy_rx", "phy_tx", "pll_ctrl"; - ctrl-module = <&omap_control_usb>; - #phy-cells = <0>; - clocks = <&usb_phy_cm_clk32k>, - <&sys_clkin>, - <&usb_otg_ss_refclk960m>; - clock-names = "wkupclk", - "sysclk", - "refclk"; -}; - -sata_phy: phy@4a096000 { - compatible = "ti,phy-pipe3-sata"; - reg = <0x4A096000 0x80>, /* phy_rx */ - <0x4A096400 0x64>, /* phy_tx */ - <0x4A096800 0x40>; /* pll_ctrl */ - reg-names = "phy_rx", "phy_tx", "pll_ctrl"; - ctrl-module = <&omap_control_sata>; - clocks = <&sys_clkin1>, <&sata_ref_clk>; - clock-names = "sysclk", "refclk"; - syscon-pllreset = <&scm_conf 0x3fc>; - #phy-cells = <0>; -}; diff --git a/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml b/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml deleted file mode 100644 index 617f3c0b3dfb..000000000000 --- a/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml +++ /dev/null @@ -1,103 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Common PHY and network PCS transmit amplitude property - -description: - Binding describing the peak-to-peak transmit amplitude for common PHYs - and network PCSes. - -maintainers: - - Marek Behún <kabel@kernel.org> - -properties: - tx-p2p-microvolt: - description: - Transmit amplitude voltages in microvolts, peak-to-peak. If this property - contains multiple values for various PHY modes, the - 'tx-p2p-microvolt-names' property must be provided and contain - corresponding mode names. - - tx-p2p-microvolt-names: - description: | - Names of the modes corresponding to voltages in the 'tx-p2p-microvolt' - property. Required only if multiple voltages are provided. - - If a value of 'default' is provided, the system should use it for any PHY - mode that is otherwise not defined here. If 'default' is not provided, the - system should use manufacturer default value. - minItems: 1 - maxItems: 16 - items: - enum: - - default - - # ethernet modes - - sgmii - - qsgmii - - xgmii - - 1000base-x - - 2500base-x - - 5gbase-r - - rxaui - - xaui - - 10gbase-kr - - usxgmii - - 10gbase-r - - 25gbase-r - - # PCIe modes - - pcie - - pcie1 - - pcie2 - - pcie3 - - pcie4 - - pcie5 - - pcie6 - - # USB modes - - usb - - usb-ls - - usb-fs - - usb-hs - - usb-ss - - usb-ss+ - - usb-4 - - # storage modes - - sata - - ufs-hs - - ufs-hs-a - - ufs-hs-b - - # display modes - - lvds - - dp - - dp-rbr - - dp-hbr - - dp-hbr2 - - dp-hbr3 - - dp-uhbr-10 - - dp-uhbr-13.5 - - dp-uhbr-20 - - # camera modes - - mipi-dphy - - mipi-dphy-univ - - mipi-dphy-v2.5-univ - -dependencies: - tx-p2p-microvolt-names: [ tx-p2p-microvolt ] - -additionalProperties: true - -examples: - - | - phy: phy { - #phy-cells = <1>; - tx-p2p-microvolt = <915000>, <1100000>, <1200000>; - tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss"; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index 990b78765427..45b7a0b6c626 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -106,7 +106,7 @@ patternProperties: # the pin numbers then, # - Finally, the name will end with either -pin or pins. - "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": + "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z0-9][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": type: object properties: diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml index 005d95a9e4d6..ec9848192351 100644 --- a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml +++ b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml @@ -33,7 +33,7 @@ properties: interrupts: description: Specifies the interrupt lines to be used by the controller. - Each interrupt line is shared by upto 4 GPIO lines. + Each interrupt line is shared by up to 4 GPIO lines. maxItems: 8 interrupt-controller: true diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml index 51bad2e8d6f1..4f9013d36874 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml @@ -88,7 +88,7 @@ patternProperties: pcie1_clkreq, pcie1_wakeup, pmic0, pmic1, ptp, ptp_clk, ptp_trig, pwm0, pwm1, pwm2, pwm3, rgmii, sdio0, sdio_sb, smi, spi_cs1, spi_cs2, spi_cs3, spi_quad, uart1, uart2, - usb2_drvvbus1, usb32_drvvbus ] + usb2_drvvbus1, usb32_drvvbus0 ] function: enum: [ drvbus, emmc, gpio, i2c, jtag, led, mii, mii_err, onewire, diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml new file mode 100644 index 000000000000..fe05196160f4 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/microchip,mpfs-pinctrl-mssio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Polarfire SoC MSSIO pinctrl + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +properties: + compatible: + oneOf: + - const: microchip,mpfs-pinctrl-mssio + - items: + - const: microchip,pic64gx-pinctrl-mssio + - const: microchip,mpfs-pinctrl-mssio + + reg: + maxItems: 1 + + pinctrl-use-default: true + +patternProperties: + '-cfg$': + type: object + additionalProperties: false + + patternProperties: + '-pins$': + type: object + additionalProperties: false + + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + description: + The list of IOs that properties in the pincfg node apply to. + + function: + description: + A string containing the name of the function to mux for these + pins. The "reserved" function tristates a pin. + enum: [ sd, emmc, qspi, spi, usb, uart, i2c, can, mdio, misc + reserved, gpio, fabric-test, tied-low, tied-high, tristate ] + + bias-bus-hold: true + bias-disable: true + bias-pull-down: true + bias-pull-up: true + input-schmitt-enable: true + low-power-enable: true + + drive-strength: + enum: [ 2, 4, 6, 8, 10, 12, 16, 20 ] + + power-source: + description: + Which bank voltage to use. This cannot differ for pins in a + given bank, the whole bank uses the same voltage. + enum: [ 1200000, 1500000, 1800000, 2500000, 3300000 ] + + microchip,clamp-diode: + $ref: /schemas/types.yaml#/definitions/flag + description: + Reflects the "Clamp Diode" setting in the MSS Configurator for + this pin. This setting controls whether or not input voltage + clamping should be enabled. + + microchip,ibufmd: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: + Reflects the "IBUFMD" bits in the MSS Configurator output files + for this pin. + + required: + - pins + - function + - power-source + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@204 { + compatible = "microchip,mpfs-pinctrl-mssio"; + reg = <0x204 0x7c>; + + ikrd-spi1-cfg { + spi1-pins { + pins = <30>, <31>, <32>, <33>; + function = "spi"; + bias-pull-up; + drive-strength = <8>; + power-source = <3300000>; + microchip,ibufmd = <0x1>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml index fa47732d7cef..9fbbafcdc063 100644 --- a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml @@ -21,10 +21,15 @@ properties: pattern: '^gpio@[0-9a-f]+$' compatible: - enum: - - microchip,sparx5-sgpio - - mscc,ocelot-sgpio - - mscc,luton-sgpio + oneOf: + - enum: + - microchip,sparx5-sgpio + - mscc,ocelot-sgpio + - mscc,luton-sgpio + - items: + - enum: + - microchip,lan9691-sgpio + - const: microchip,sparx5-sgpio '#address-cells': const: 1 @@ -80,7 +85,12 @@ patternProperties: type: object properties: compatible: - const: microchip,sparx5-sgpio-bank + oneOf: + - items: + - enum: + - microchip,lan9691-sgpio-bank + - const: microchip,sparx5-sgpio-bank + - const: microchip,sparx5-sgpio-bank reg: description: | diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml index 31bc30a81752..930955caacd1 100644 --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml @@ -14,6 +14,7 @@ properties: compatible: oneOf: - enum: + - microchip,lan96455f-pinctrl - microchip,lan966x-pinctrl - microchip,lan9691-pinctrl - microchip,sparx5-pinctrl @@ -30,6 +31,11 @@ properties: - microchip,lan9693-pinctrl - microchip,lan9692-pinctrl - const: microchip,lan9691-pinctrl + - items: + - enum: + - microchip,lan96457f-pinctrl + - microchip,lan96459f-pinctrl + - const: microchip,lan96455f-pinctrl reg: items: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml index d2b0cfeffb50..2836a1a10579 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml @@ -10,14 +10,16 @@ maintainers: - Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> description: - Top Level Mode Multiplexer pin controller in Qualcomm Glymur SoC. + Top Level Mode Multiplexer pin controller in Qualcomm Glymur and Mahua SoC. allOf: - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: compatible: - const: qcom,glymur-tlmm + enum: + - qcom,glymur-tlmm + - qcom,mahua-tlmm reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml index 36d665971484..f049013a4e0c 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml @@ -49,6 +49,17 @@ properties: gpio-ranges: maxItems: 1 + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell contains the global GPIO port index, constructed using the + RZT2H_GPIO() helper macro from <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h> + and the second cell is used to specify the flag. + E.g. "interrupts = <RZT2H_GPIO(8, 6) IRQ_TYPE_EDGE_FALLING>;" if P08_6 is + being used as an interrupt. + clocks: maxItems: 1 @@ -139,6 +150,8 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 288>; + interrupt-controller; + #interrupt-cells = <2>; power-domains = <&cpg>; serial0-pins { diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml index f3c433015b12..2b88f25e80a6 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -48,6 +48,7 @@ properties: - enum: - google,gs101-wakeup-eint - samsung,exynos2200-wakeup-eint + - samsung,exynos9610-wakeup-eint - samsung,exynos9810-wakeup-eint - samsung,exynos990-wakeup-eint - samsung,exynosautov9-wakeup-eint diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index ddc5e2efff21..7b006009ca0e 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -55,6 +55,7 @@ properties: - samsung,exynos850-pinctrl - samsung,exynos8890-pinctrl - samsung,exynos8895-pinctrl + - samsung,exynos9610-pinctrl - samsung,exynos9810-pinctrl - samsung,exynos990-pinctrl - samsung,exynosautov9-pinctrl diff --git a/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml index d80e88aa07b4..3e734aeb01cc 100644 --- a/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml @@ -11,7 +11,9 @@ maintainers: properties: compatible: - const: spacemit,k1-pinctrl + enum: + - spacemit,k1-pinctrl + - spacemit,k3-pinctrl reg: items: @@ -30,6 +32,10 @@ properties: resets: maxItems: 1 + spacemit,apbc: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to syscon that access the protected register + patternProperties: '-cfg$': type: object @@ -72,10 +78,20 @@ patternProperties: enum: [ 0, 1 ] drive-strength: - description: | - typical current when output high level. - 1.8V output: 11, 21, 32, 42 (mA) - 3.3V output: 7, 10, 13, 16, 19, 23, 26, 29 (mA) + description: + typical current (in mA) when the output at high level. + anyOf: + - enum: [ 11, 21, 32, 42 ] + description: For K1 SoC, 1.8V voltage output + + - enum: [ 7, 10, 13, 16, 19, 23, 26, 29 ] + description: For K1 SoC, 3.3V voltage output + + - enum: [ 2, 4, 6, 7, 9, 11, 13, 14, 21, 23, 25, 26, 28, 30, 31, 33 ] + description: For K3 SoC, 1.8V voltage output + + - enum: [ 3, 5, 7, 9, 11, 13, 15, 17, 25, 27, 29, 31, 33, 35, 37, 38 ] + description: For K3 SoC, 3.3V voltage output input-schmitt: description: | @@ -126,6 +142,7 @@ examples: clocks = <&syscon_apbc 42>, <&syscon_apbc 94>; clock-names = "func", "bus"; + spacemit,apbc = <&syscon_apbc>; uart0_2_cfg: uart0-2-cfg { uart0-2-pins { diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml index 9de3fe73c1eb..d49a5130b87c 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml @@ -38,6 +38,9 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 0 + interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index f8a13928f615..9507b342a7ee 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek Power Domains Controller maintainers: - - MandyJH Liu <mandyjh.liu@mediatek.com> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> - Matthias Brugger <mbrugger@suse.com> description: | diff --git a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml index d342b113fca2..b5e92b500764 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml @@ -23,6 +23,9 @@ properties: compatible: const: syscon-poweroff + reg: + maxItems: 1 + mask: $ref: /schemas/types.yaml#/definitions/uint32 description: Update only the register bits defined by the mask (32 bit). @@ -44,7 +47,10 @@ properties: required: - compatible - - offset + +anyOf: + - required: [offset] + - required: [reg] additionalProperties: false diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index ccd555870094..b1c0bcb1e25d 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -79,7 +79,7 @@ allOf: required: - value - oneOf: + anyOf: - required: [offset] - required: [reg] diff --git a/Documentation/devicetree/bindings/power/supply/battery.yaml b/Documentation/devicetree/bindings/power/supply/battery.yaml index 491488e7b970..8ebf05d9497c 100644 --- a/Documentation/devicetree/bindings/power/supply/battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/battery.yaml @@ -64,7 +64,16 @@ properties: description: battery design capacity trickle-charge-current-microamp: - description: current for trickle-charge phase + description: current for trickle-charge phase. + Please note that the trickle-charging here, refers "wake-up" or + "pre-pre" -charging, for very empty batteries. Similar term is also + used for "maintenance" or "top-off" -charging of batteries (like + NiMh bq24400) - that is different and not controlled by this + property. + + tricklecharge-upper-limit-microvolt: + description: limit when to change to precharge from trickle charge + Trickle-charging here refers "wake-up" or "pre-pre" -charging. precharge-current-microamp: description: current for pre-charge phase @@ -119,6 +128,21 @@ properties: - description: alert when battery temperature is lower than this value - description: alert when battery temperature is higher than this value + # The volt-drop* -properties describe voltage-drop for a battery, described + # as VDROP in: + # https://patentimages.storage.googleapis.com/6c/f5/17/c1d901c220f6a9/US20150032394A1.pdf + volt-drop-thresh-microvolt: + description: Threshold for starting the VDR correction + maximum: 48000000 + + volt-drop-soc-bp: + description: Table of capacity values matching the values in VDR tables. + The value should be given as basis points, 1/100 of a percent. + + volt-drop-temperatures-millicelsius: + description: An array containing the temperature in milli celsius, for each + of the VDR lookup table. + required: - compatible @@ -137,6 +161,13 @@ patternProperties: - description: battery capacity percent maximum: 100 + '^volt-drop-[0-9]-microvolt': + description: Table of the voltage drop rate (VDR) values. Each entry in the + table should match a capacity value in the volt-drop-soc table. + Furthermore, the values should be obtained for the temperature given in + volt-drop-temperatures-millicelsius table at index matching the + number in this table's name. + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/power/supply/google,goldfish-battery.yaml b/Documentation/devicetree/bindings/power/supply/google,goldfish-battery.yaml new file mode 100644 index 000000000000..634327c89c88 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/google,goldfish-battery.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/google,goldfish-battery.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish Battery + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +allOf: + - $ref: power-supply.yaml# + +description: + Android goldfish battery device generated by Android emulator. + +properties: + compatible: + const: google,goldfish-battery + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + battery@9020000 { + compatible = "google,goldfish-battery"; + reg = <0x9020000 0x1000>; + interrupts = <3>; + }; diff --git a/Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml b/Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml new file mode 100644 index 000000000000..357790df876f --- /dev/null +++ b/Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ptp/amazon,vmclock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Virtual Machine Clock + +maintainers: + - David Woodhouse <dwmw2@infradead.org> + +description: + The vmclock device provides a precise clock source and allows for + accurate timekeeping across live migration and snapshot/restore + operations. The full specification of the shared data structure is + available at https://uapi-group.org/specifications/specs/vmclock/ + +properties: + compatible: + const: amazon,vmclock + + reg: + description: + Specifies the shared memory region containing the vmclock_abi structure. + maxItems: 1 + + interrupts: + description: + Interrupt used to notify when the contents of the vmclock_abi structure + have been updated. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + ptp@80000000 { + compatible = "amazon,vmclock"; + reg = <0x80000000 0x1000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>; + }; diff --git a/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml index d8ebb0735c96..cdd83ac29caf 100644 --- a/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml @@ -27,6 +27,7 @@ properties: required: - compatible - reg + - clocks - '#pwm-cells' allOf: @@ -36,9 +37,12 @@ unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/lpc32xx-clock.h> + pwm@4005c000 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005c000 0x4>; + clocks = <&clk LPC32XX_CLK_PWM1>; #pwm-cells = <3>; }; diff --git a/Documentation/devicetree/bindings/regulator/adi,max77675.yaml b/Documentation/devicetree/bindings/regulator/adi,max77675.yaml new file mode 100644 index 000000000000..c138e61380a4 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/adi,max77675.yaml @@ -0,0 +1,184 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/adi,max77675.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX77675 PMIC Regulator + +maintainers: + - Joan Na <joan.na@analog.com> + +description: + The MAX77675 is a Power Management IC providing four switching buck + regulators (SBB0–SBB3) accessible via I2C. It supports configuration + of output voltages and enable controls for each regulator. + +allOf: + - $ref: /schemas/input/input.yaml + - $ref: /schemas/pinctrl/pincfg-node.yaml + +properties: + compatible: + const: adi,max77675 + + reg: + maxItems: 1 + + reset-time-sec: + description: Manual reset time in seconds + enum: [4, 8, 12, 16] + default: 4 + + bias-disable: + type: boolean + description: Disable internal pull-up for EN pin + + input-debounce: + description: Debounce time for the enable pin, in microseconds + items: + - enum: [100, 30000] + default: 100 + + adi,en-mode: + description: | + Enable mode configuration. + The debounce time set by 'input-debounce' applies to + both push-button and slide-switch modes. + "push-button" - A long press triggers power-on or power-down + "slide-switch" - Low : powers on, High : powers down + "logic" - Low : powers on, High : powers down (no debounce time) + $ref: /schemas/types.yaml#/definitions/string + enum: [push-button, slide-switch, logic] + default: slide-switch + + adi,voltage-change-latency-us: + description: + Specifies the delay (in microseconds) between an output voltage change + request and the start of the SBB voltage ramp. + enum: [10, 100] + default: 100 + + adi,drv-sbb-strength: + description: | + SIMO Buck-Boost Drive Strength Trim. + Controls the drive strength of the SIMO regulator's power MOSFETs. + This setting affects switching speed, impacting power efficiency and EMI. + "max" – Maximum drive strength (~0.6 ns transition time) + "high" – High drive strength (~1.2 ns transition time) + "low" – Low drive strength (~1.8 ns transition time) + "min" – Minimum drive strength (~8 ns transition time) + $ref: /schemas/types.yaml#/definitions/string + enum: [max, high, low, min] + default: max + + adi,dvs-slew-rate-mv-per-us: + description: + Dynamic rising slew rate for output voltage transitions, in mV/μs. + This setting is only used when 'adi,fixed-slew-rate' is not present. + enum: [5, 10] + default: 5 + + adi,bias-low-power-request: + type: boolean + description: Request low-power bias mode + + adi,simo-ldo-always-on: + type: boolean + description: Set internal LDO to always supply 1.8V + + regulators: + type: object + description: Regulator child nodes + patternProperties: + "^sbb[0-3]$": + type: object + $ref: regulator.yaml# + properties: + adi,fps-slot: + description: | + FPS (Flexible Power Sequencer) slot selection. + The Flexible Power Sequencer allows resources to power up under + hardware or software control. Additionally, each resource can + power up independently or among a group of other regulators with + adjustable power-up and power-down slots. + "slot0" - Assign to FPS Slot 0 + "slot1" - Assign to FPS Slot 1 + "slot2" - Assign to FPS Slot 2 + "slot3" - Assign to FPS Slot 3 + "default" - Use the default FPS slot value stored in register + $ref: /schemas/types.yaml#/definitions/string + enum: [slot0, slot1, slot2, slot3, default] + default: default + + adi,fixed-slew-rate: + type: boolean + description: + When this property is present, the device uses a constant 2 mV/μs + slew rate and ignores any dynamic slew rate configuration. + When absent, the device uses the dynamic slew rate specified + by 'adi,dvs-slew-rate-mv-per-us' + + unevaluatedProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + max77675: pmic@44 { + compatible = "adi,max77675"; + reg = <0x44>; + + reset-time-sec = <4>; + input-debounce = <100>; + + adi,en-mode = "slide-switch"; + adi,voltage-change-latency-us = <100>; + adi,drv-sbb-strength = "max"; + adi,dvs-slew-rate-mv-per-us = <5>; + + regulators { + sbb0: sbb0 { + regulator-name = "sbb0"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5500000>; + adi,fps-slot = "default"; + adi,fixed-slew-rate; + }; + + sbb1: sbb1 { + regulator-name = "sbb1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5500000>; + adi,fps-slot = "default"; + adi,fixed-slew-rate; + }; + + sbb2: sbb2 { + regulator-name = "sbb2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5500000>; + adi,fps-slot = "default"; + adi,fixed-slew-rate; + }; + + sbb3: sbb3 { + regulator-name = "sbb3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <5500000>; + adi,fps-slot = "default"; + adi,fixed-slew-rate; + }; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml index c654acf13768..eb16e53cb5bf 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -40,13 +40,13 @@ patternProperties: unevaluatedProperties: false - "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$": + "^ldo-v(dig18|emc33|ibr|io28|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$": type: object $ref: regulator.yaml# properties: regulator-name: - pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$" + pattern: "^v(dig18|emc33|ibr|io28|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$" unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml index d6b3b5a5c0b3..fe4ac9350ba0 100644 --- a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml @@ -287,7 +287,7 @@ examples: regulator-max-microvolt = <1700000>; }; mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 { - regulator-name = "vrfck"; + regulator-name = "vrfck_1"; regulator-min-microvolt = <1240000>; regulator-max-microvolt = <1600000>; }; @@ -309,7 +309,7 @@ examples: regulator-max-microvolt = <3300000>; }; mt6359_vemc_1_ldo_reg: ldo_vemc_1 { - regulator-name = "vemc"; + regulator-name = "vemc_1"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3300000>; }; diff --git a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml new file mode 100644 index 000000000000..9a7abc878b83 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/qcom,wcn3990-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. WCN3990 PMU Regulators + +maintainers: + - Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> + +description: + The WCN3990 package contains discrete modules for WLAN and Bluetooth. They + are powered by the Power Management Unit (PMU) that takes inputs from the + host and provides LDO outputs. This document describes this module. + +properties: + compatible: + enum: + - qcom,wcn3950-pmu + - qcom,wcn3988-pmu + - qcom,wcn3990-pmu + - qcom,wcn3991-pmu + - qcom,wcn3998-pmu + + vddio-supply: + description: VDD_IO supply regulator handle + + vddxo-supply: + description: VDD_XTAL supply regulator handle + + vddrf-supply: + description: VDD_RF supply regulator handle + + vddch0-supply: + description: chain 0 supply regulator handle + + vddch1-supply: + description: chain 1 supply regulator handle + + swctrl-gpios: + maxItems: 1 + description: GPIO line indicating the state of the clock supply to the BT module + + clocks: + maxItems: 1 + description: Reference clock handle + + regulators: + type: object + description: + LDO outputs of the PMU + + patternProperties: + "^ldo[0-9]$": + $ref: regulator.yaml# + type: object + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - regulators + - vddio-supply + - vddxo-supply + - vddrf-supply + - vddch0-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + pmu { + compatible = "qcom,wcn3990-pmu"; + + vddio-supply = <&vreg_io>; + vddxo-supply = <&vreg_xo>; + vddrf-supply = <&vreg_rf>; + vddch0-supply = <&vreg_ch0>; + + regulators { + vreg_pmu_io: ldo0 { + regulator-name = "vreg_pmu_io"; + }; + + vreg_pmu_xo: ldo1 { + regulator-name = "vreg_pmu_xo"; + }; + + vreg_pmu_rf: ldo2 { + regulator-name = "vreg_pmu_rf"; + }; + + vreg_pmu_ch0: ldo3 { + regulator-name = "vreg_pmu_ch0"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml index 41678400e63f..6c23f18a32c6 100644 --- a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml @@ -24,6 +24,11 @@ properties: reg: maxItems: 1 + gpio-controller: true + + "#gpio-cells": + const: 2 + additionalProperties: false required: diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml index 77573bcb6b79..042e56396399 100644 --- a/Documentation/devicetree/bindings/regulator/regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/regulator.yaml @@ -274,6 +274,7 @@ patternProperties: suspend. This property is now deprecated, instead setting voltage for suspend mode via the API which regulator driver provides is recommended. + deprecated: true regulator-changeable-in-suspend: description: whether the default voltage and the regulator on/off diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml index e95e046e9ed6..983f4c1ce380 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml @@ -15,6 +15,10 @@ description: | supply of 2.5V to 5.5V. It can provide up to 3.5A continuous current capability at over 80% high efficiency. + The RT8092 is similar type buck converter. Compared to RT5739, it can offer + up to 4A output current and more output voltage range to meet the application + on most mobile products. + allOf: - $ref: regulator.yaml# @@ -23,6 +27,7 @@ properties: enum: - richtek,rt5733 - richtek,rt5739 + - richtek,rt8092 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd72720-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd72720-regulator.yaml new file mode 100644 index 000000000000..5518082129bd --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd72720-regulator.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd72720-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD72720 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen <mazziesaccount@gmail.com> + +description: | + This module is part of the ROHM BD72720 MFD device. For more details + see Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml. + + The regulator controller is represented as a sub-node of the PMIC node + on the device tree. + + Regulator nodes should be named to BUCK_<number> and LDO_<number>. + The valid names for BD72720 regulator nodes are + buck1, buck2, buck3, buck4, buck5, buck6, buck7, buck8, buck9, buck10 + ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldo8, ldo9, ldo10, ldo11 + +patternProperties: + "^ldo([1-9]|1[0-1])$": + type: object + description: + Properties for single LDO regulator. + $ref: regulator.yaml# + + properties: + regulator-name: + pattern: "^ldo([1-9]|1[0-1])$" + + rohm,dvs-run-voltage: + description: + PMIC default "RUN" state voltage in uV. See below table for + LDOs which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-idle-voltage: + description: + PMIC default "IDLE" state voltage in uV. See below table for + LDOs which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-suspend-voltage: + description: + PMIC default "SUSPEND" state voltage in uV. See below table for + LDOs which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-lpsr-voltage: + description: + PMIC default "deep-idle" state voltage in uV. See below table for + LDOs which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + # Supported default DVS states: + # ldo | run | idle | suspend | lpsr + # -------------------------------------------------------------- + # 1, 2, 3, and 4 | supported | supported | supported | supported + # -------------------------------------------------------------- + # 5 - 11 | supported (*) + # -------------------------------------------------------------- + # + # (*) All states use same voltage but have own enable / disable + # settings. Voltage 0 can be specified for a state to make + # regulator disabled on that state. + + unevaluatedProperties: false + + "^buck([1-9]|10)$": + type: object + description: + Properties for single BUCK regulator. + $ref: regulator.yaml# + + properties: + regulator-name: + pattern: "^buck([1-9]|10)$" + + rohm,ldon-head-microvolt: + description: + Set this on boards where BUCK10 is used to supply LDOs 1-4. The bucki + voltage will be changed by the PMIC to follow the LDO output voltages + with the offset voltage given here. This will improve the LDO efficiency. + minimum: 50000 + maximum: 300000 + + rohm,dvs-run-voltage: + description: + PMIC default "RUN" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-idle-voltage: + description: + PMIC default "IDLE" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-suspend-voltage: + description: + PMIC default "SUSPEND" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + rohm,dvs-lpsr-voltage: + description: + PMIC default "deep-idle" state voltage in uV. See below table for + bucks which support this. 0 means disabled. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3300000 + + # Supported default DVS states: + # buck | run | idle | suspend | lpsr + # -------------------------------------------------------------- + # 1, 2, 3, and 4 | supported | supported | supported | supported + # -------------------------------------------------------------- + # 5 - 10 | supported (*) + # -------------------------------------------------------------- + # + # (*) All states use same voltage but have own enable / disable + # settings. Voltage 0 can be specified for a state to make + # regulator disabled on that state. + + required: + - regulator-name + + unevaluatedProperties: false + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml new file mode 100644 index 000000000000..7252f94b3a8f --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/samsung,s2mpg10-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S2MPG10 Power Management IC regulators + +maintainers: + - André Draszik <andre.draszik@linaro.org> + +description: | + This is part of the device tree bindings for the S2MG10 Power Management IC + (PMIC). + + The S2MPG10 PMIC provides 10 buck and 31 LDO regulators. + + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for + additional information and example. + +properties: + # 1 LDO with possible (but limited) external control + ldo20m: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single LDO regulator. + + allOf: + - $ref: "#/$defs/s2mpg10-ext-control" + + properties: + regulator-ramp-delay: false + + samsung,ext-control: + minimum: 11 + +patternProperties: + # 10 bucks + "^buck([1-9]|10)m$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single buck regulator. + + allOf: + - $ref: "#/$defs/s2mpg10-ext-control" + + properties: + regulator-ramp-delay: + enum: [6250, 12500, 25000] + default: 6250 + + samsung,ext-control: + maximum: 10 + + # 12 standard LDOs + "^ldo(2[1-9]?|3[0-1])m$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator. + + properties: + regulator-ramp-delay: false + + # 12 LDOs with possible external control + "^ldo([3-689]|1[046-9])m$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single LDO regulator. + + allOf: + - $ref: "#/$defs/s2mpg10-ext-control" + + properties: + regulator-ramp-delay: false + + samsung,ext-control: + maximum: 10 + + # 6 LDOs with ramp support, 5 out of those with possible external control + "^ldo(1[1235]?|7)m$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single LDO regulator. + + allOf: + - $ref: "#/$defs/s2mpg10-ext-control" + + properties: + regulator-ramp-delay: + enum: [6250, 12500] + default: 6250 + + samsung,ext-control: + maximum: 10 + +$defs: + s2mpg10-ext-control: + properties: + samsung,ext-control: + description: | + These rails can be controlled via one of several possible external + (hardware) signals. If so, this property configures the signal the PMIC + should monitor. For S2MPG10 rails where external control is possible other + than ldo20m, the following values generally corresponding to the + respective on-chip pin are valid: + - 0 # S2MPG10_EXTCTRL_PWREN - PWREN pin + - 1 # S2MPG10_EXTCTRL_PWREN_MIF - PWREN_MIF pin + - 2 # S2MPG10_EXTCTRL_AP_ACTIVE_N - ~AP_ACTIVE_N pin + - 3 # S2MPG10_EXTCTRL_CPUCL1_EN - CPUCL1_EN pin + - 4 # S2MPG10_EXTCTRL_CPUCL1_EN2 - CPUCL1_EN & PWREN pins + - 5 # S2MPG10_EXTCTRL_CPUCL2_EN - CPUCL2_EN pin + - 6 # S2MPG10_EXTCTRL_CPUCL2_EN2 - CPUCL2_E2 & PWREN pins + - 7 # S2MPG10_EXTCTRL_TPU_EN - TPU_EN pin + - 8 # S2MPG10_EXTCTRL_TPU_EN2 - TPU_EN & ~AP_ACTIVE_N pins + - 9 # S2MPG10_EXTCTRL_TCXO_ON - TCXO_ON pin + - 10 # S2MPG10_EXTCTRL_TCXO_ON2 - TCXO_ON & ~AP_ACTIVE_N pins + + For S2MPG10 ldo20m, the following values are valid + - 11 # S2MPG10_EXTCTRL_LDO20M_EN2 - VLDO20M_EN & LDO20M_SFR + - 12 # S2MPG10_EXTCTRL_LDO20M_EN - VLDO20M_EN pin + + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 12 + + enable-gpios: + description: + For rails where external control is done via a GPIO, this optional + property describes the GPIO line used. + + dependentRequired: + enable-gpios: [ "samsung,ext-control" ] + +allOf: + # Bucks 8, 9, and LDO 1 can not be controlled externally - above definition + # allows it and we deny it here. This approach reduces repetition. + - if: + anyOf: + - required: [buck8m] + - required: [buck9m] + - required: [ldo1m] + then: + patternProperties: + "^(buck[8-9]|ldo1)m$": + properties: + samsung,ext-control: false + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mpg11-regulator.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mpg11-regulator.yaml new file mode 100644 index 000000000000..119386325d1b --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/samsung,s2mpg11-regulator.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/samsung,s2mpg11-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S2MPG11 Power Management IC regulators + +maintainers: + - André Draszik <andre.draszik@linaro.org> + +description: | + This is part of the device tree bindings for the S2MG11 Power Management IC + (PMIC). + + The S2MPG11 PMIC provides 12 buck, 1 buck-boost, and 15 LDO regulators. + + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for + additional information and example. + +properties: + buckboost: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for the buck-boost regulator. + + properties: + regulator-ramp-delay: false + +patternProperties: + # 12 bucks + "^buck(([1-9]|10)s|[ad])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single buck regulator. + + allOf: + - $ref: "#/$defs/s2mpg11-ext-control" + + properties: + regulator-ramp-delay: + enum: [6250, 12500, 25000] + default: 6250 + + # 11 standard LDOs + "^ldo([3-79]|1[01245])s$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single LDO regulator. + + properties: + regulator-ramp-delay: false + + # 2 LDOs with possible external control + "^ldo(8|13)s$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator. + + allOf: + - $ref: "#/$defs/s2mpg11-ext-control" + + properties: + regulator-ramp-delay: false + + # 2 LDOs with ramp support and possible external control + "^ldo[12]s$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single LDO regulator. + + allOf: + - $ref: "#/$defs/s2mpg11-ext-control" + + properties: + regulator-ramp-delay: + enum: [6250, 12500] + default: 6250 + +$defs: + s2mpg11-ext-control: + properties: + samsung,ext-control: + description: | + These rails can be controlled via one of several possible external + (hardware) signals. If so, this property configures the signal the PMIC + should monitor. The following values generally corresponding to the + respective on-chip pin are valid: + - 0 # S2MPG11_EXTCTRL_PWREN - PWREN pin + - 1 # S2MPG11_EXTCTRL_PWREN_MIF - PWREN_MIF pin + - 2 # S2MPG11_EXTCTRL_AP_ACTIVE_N - ~AP_ACTIVE_N pin + - 3 # S2MPG11_EXTCTRL_G3D_EN - G3D_EN pin + - 4 # S2MPG11_EXTCTRL_G3D_EN2 - G3D_EN & ~AP_ACTIVE_N pins + - 5 # S2MPG11_EXTCTRL_AOC_VDD - AOC_VDD pin + - 6 # S2MPG11_EXTCTRL_AOC_RET - AOC_RET pin + - 7 # S2MPG11_EXTCTRL_UFS_EN - UFS_EN pin + - 8 # S2MPG11_EXTCTRL_LDO13S_EN - VLDO13S_EN pin + + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 8 + + enable-gpios: + description: + For rails where external control is done via a GPIO, this optional + property describes the GPIO line used. + + dependentRequired: + enable-gpios: [ "samsung,ext-control" ] + +allOf: + # Bucks 4, 6, 7 and 10 can not be controlled externally - above definition + # allows it and we deny it here. This approach reduces repetition. + - if: + anyOf: + - required: [buck4s] + - required: [buck6s] + - required: [buck7s] + - required: [buck10s] + then: + patternProperties: + "^buck([467]|10)s$": + properties: + samsung,ext-control: false + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/ti,tps65185.yaml b/Documentation/devicetree/bindings/regulator/ti,tps65185.yaml new file mode 100644 index 000000000000..af0f638b80bc --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/ti,tps65185.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/ti,tps65185.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI TPS65185 Power Management Integrated Circuit + +maintainers: + - Andreas Kemnade <andreas@kemnade.info> + +description: + TPS65185 is a Power Management IC to provide Power for EPDs with one 3.3V + switch, 2 symmetric LDOs behind 2 DC/DC converters, and one unsymmetric + regulator for a compensation voltage. + +properties: + compatible: + const: ti,tps65185 + + reg: + maxItems: 1 + + enable-gpios: + description: + PWRUP pin + maxItems: 1 + + pwr-good-gpios: + maxItems: 1 + + vcom-ctrl-gpios: + maxItems: 1 + + wakeup-gpios: + maxItems: 1 + + vin-supply: true + + interrupts: + maxItems: 1 + + regulators: + type: object + additionalProperties: false + patternProperties: + "^(vcom|vposneg|v3p3)$": + unevaluatedProperties: false + type: object + $ref: /schemas/regulator/regulator.yaml + +required: + - compatible + - reg + - pwr-good-gpios + - vin-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@18 { + compatible = "ti,tps65185"; + reg = <0x18>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tps65185_gpio>; + pwr-good-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + vcom-ctrl-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; + wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + vin-supply = <&epdc_pmic_supply>; + interrupts-extended = <&gpio2 0 IRQ_TYPE_LEVEL_LOW>; + + regulators { + vcom { + regulator-name = "vcom"; + }; + + vposneg { + regulator-name = "vposneg"; + regulator-min-microvolt = <15000000>; + regulator-max-microvolt = <15000000>; + }; + + v3p3 { + regulator-name = "v3p3"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml index 57d75acb0b5e..ce8ec0119469 100644 --- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml @@ -28,6 +28,7 @@ properties: - fsl,imx8qxp-cm4 - fsl,imx8ulp-cm33 - fsl,imx93-cm33 + - fsl,imx95-cm7 clocks: maxItems: 1 diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 179c98b33b4d..bdbb12118da4 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek SCP maintainers: - - Tinghan Shen <tinghan.shen@mediatek.com> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> description: This binding provides support for ARM Cortex M4 Co-processor found on some diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 137f95028313..16a245fe2738 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -32,6 +32,8 @@ properties: reg: maxItems: 1 + cx-supply: true + px-supply: description: Phandle to the PX regulator @@ -159,6 +161,9 @@ allOf: items: - const: lcx - const: lmx + else: + properties: + cx-supply: false - if: properties: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml index 63a82e7a8bf8..68c17bf18987 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -44,6 +44,9 @@ properties: - const: stop-ack - const: shutdown-ack + iommus: + maxItems: 1 + power-domains: minItems: 1 maxItems: 3 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml index 2dd479cf4821..11b056d6a480 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -187,7 +187,6 @@ allOf: enum: - qcom,sm8550-adsp-pas - qcom,sm8650-adsp-pas - - qcom,sm8750-adsp-pas - qcom,x1e80100-adsp-pas then: properties: diff --git a/Documentation/devicetree/bindings/remoteproc/ti,hsm-m4fss.yaml b/Documentation/devicetree/bindings/remoteproc/ti,hsm-m4fss.yaml new file mode 100644 index 000000000000..9244e60acee3 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,hsm-m4fss.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,hsm-m4fss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI K3 HSM M4F processor subsystems + +maintainers: + - Beleswar Padhi <b-padhi@ti.com> + +description: | + Some K3 family SoCs have a HSM (High Security Module) M4F core in the + Wakeup Voltage Domain which could be used to run secure services like + Authentication. Some of those are J721S2, J784S4, J722S, AM62X. + +$ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# + +properties: + compatible: + enum: + - ti,hsm-m4fss + + reg: + items: + - description: SRAM0_0 internal memory region + - description: SRAM0_1 internal memory region + - description: SRAM1 internal memory region + + reg-names: + items: + - const: sram0_0 + - const: sram0_1 + - const: sram1 + + resets: + maxItems: 1 + + firmware-name: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - resets + - firmware-name + - ti,sci + - ti,sci-dev-id + - ti,sci-proc-ids + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@43c00000 { + compatible = "ti,hsm-m4fss"; + reg = <0x00 0x43c00000 0x00 0x20000>, + <0x00 0x43c20000 0x00 0x10000>, + <0x00 0x43c30000 0x00 0x10000>; + reg-names = "sram0_0", "sram0_1", "sram1"; + resets = <&k3_reset 225 1>; + firmware-name = "hsm.bin"; + ti,sci = <&sms>; + ti,sci-dev-id = <225>; + ti,sci-proc-ids = <0x80 0xff>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt index 463a97c11eff..91f0a3b0c0b2 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt +++ b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt @@ -66,7 +66,7 @@ The following are the mandatory properties: - kick-gpios: Should specify the gpio device needed for the virtio IPC stack. This will be used to interrupt the remote processor. The gpio device to be used is as per the bindings in, - Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt + Documentation/devicetree/bindings/gpio/ti,keystone-dsp-gpio.yaml SoC-specific Required properties: --------------------------------- diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index d733c0bd534f..5feeb2203050 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -61,6 +61,7 @@ properties: - sifive,u7 - sifive,u74 - sifive,u74-mc + - spacemit,x100 - spacemit,x60 - thead,c906 - thead,c908 diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 565cb2cbb49b..c6ec9290fe07 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -24,12 +24,6 @@ description: | ratified states, with the exception of the I, Zicntr & Zihpm extensions. See the "i" property for more information. -select: - properties: - compatible: - contains: - const: riscv - properties: riscv,isa: description: @@ -109,6 +103,13 @@ properties: The standard C extension for compressed instructions, as ratified in the 20191213 version of the unprivileged ISA specification. + - const: b + description: + The standard B extension for bit manipulation instructions, as + ratified in the 20240411 version of the unprivileged ISA + specification. The B standard extension comprises instructions + provided by the Zba, Zbb, and Zbs extensions. + - const: v description: The standard V extension for vector operations, as ratified @@ -117,10 +118,62 @@ properties: - const: h description: - The standard H extension for hypervisors as ratified in the 20191213 - version of the privileged ISA specification. + The standard H extension for hypervisors as ratified in the RISC-V + Instruction Set Manual, Volume II Privileged Architecture, + Document Version 20211203. # multi-letter extensions, sorted alphanumerically + - const: sha + description: | + The standard Sha extension for augmented hypervisor extension as + ratified in RVA23 Profiles Version 1.0, with commit 0273f3c921b6 + ("rva23/rvb23 ratified"). + + Sha captures the full set of features that are mandated to be + supported along with the H extension. Sha comprises the following + extensions: H, Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala, + Shvstvecd, and Ssstateen. + + - const: shcounterenw + description: | + The standard Shcounterenw extension for support writable enables + in hcounteren for any supported counter, as ratified in RISC-V + Profiles Version 1.0, with commit b1d806605f87 ("Updated to + ratified state.") + + - const: shgatpa + description: | + The standard Shgatpa extension indicates that for each supported + virtual memory scheme SvNN supported in satp, the corresponding + hgatp SvNNx4 mode must be supported. The hgatp mode Bare must + also be supported. It is ratified in RISC-V Profiles Version 1.0, + with commit b1d806605f87 ("Updated to ratified state.") + + - const: shtvala + description: | + The standard Shtvala extension for htval be written with the + faulting guest physical address in all circumstances permitted by + the ISA. It is ratified in RISC-V Profiles Version 1.0, with + commit b1d806605f87 ("Updated to ratified state.") + + - const: shvsatpa + description: | + The standard Shvsatpa extension for vsatp supporting all translation + modes supported in satp, as ratified in RISC-V Profiles Version 1.0, + with commit b1d806605f87 ("Updated to ratified state.") + + - const: shvstvala + description: | + The standard Shvstvala extension for vstval provides all needed + values as ratified in RISC-V Profiles Version 1.0, with commit + b1d806605f87 ("Updated to ratified state.") + + - const: shvstvecd + description: | + The standard Shvstvecd extension for vstvec supporting Direct mode, + as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87 + ("Updated to ratified state.") + - const: smaia description: | The standard Smaia supervisor-level extension for the advanced @@ -153,24 +206,62 @@ properties: behavioural changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: ssccptr + description: | + The standard Ssccptr extension for main memory (cacheability and + coherence) hardware page-table reads, as ratified in RISC-V + Profiles Version 1.0, with commit b1d806605f87 ("Updated to + ratified state.") + - const: sscofpmf description: | The standard Sscofpmf supervisor-level extension for count overflow and mode-based filtering as ratified at commit 01d1df0 ("Add ability to manually trigger workflow. (#2)") of riscv-count-overflow. + - const: sscounterenw + description: | + The standard Sscounterenw extension for support writable enables + in scounteren for any supported counter, as ratified in RISC-V + Profiles Version 1.0, with commit b1d806605f87 ("Updated to + ratified state.") + - const: ssnpm description: | The standard Ssnpm extension for next-mode pointer masking as ratified at commit d70011dde6c2 ("Update to ratified state") of riscv-j-extension. + - const: ssstateen + description: | + The standard Ssstateen extension for supervisor-mode view of the + state-enable extension, as ratified in RISC-V Profiles Version 1.0, + with commit b1d806605f87 ("Updated to ratified state.") + - const: sstc description: | The standard Sstc supervisor-level extension for time compare as ratified at commit 3f9ed34 ("Add ability to manually trigger workflow. (#2)") of riscv-time-compare. + - const: sstvala + description: | + The standard Sstvala extension for stval provides all needed values + as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87 + ("Updated to ratified state.") + + - const: sstvecd + description: | + The standard Sstvecd extension for stvec supports Direct mode as + ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87 + ("Updated to ratified state.") + + - const: ssu64xl + description: | + The standard Ssu64xl extension for UXLEN=64 must be supported, as + ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87 + ("Updated to ratified state.") + - const: svade description: | The standard Svade supervisor-level extension for SW-managed PTE A/D @@ -202,20 +293,22 @@ properties: - const: svinval description: The standard Svinval supervisor-level extension for fine-grained - address-translation cache invalidation as ratified in the 20191213 - version of the privileged ISA specification. + address-translation cache invalidation as ratified in the RISC-V + Instruction Set Manual, Volume II Privileged Architecture, + Document Version 20211203. - const: svnapot description: The standard Svnapot supervisor-level extensions for napot - translation contiguity as ratified in the 20191213 version of the - privileged ISA specification. + translation contiguity as ratified in the RISC-V Instruction Set + Manual, Volume II Privileged Architecture, Document Version + 20211203. - const: svpbmt description: The standard Svpbmt supervisor-level extensions for page-based - memory types as ratified in the 20191213 version of the privileged - ISA specification. + memory types as ratified in the RISC-V Instruction Set Manual, + Volume II Privileged Architecture, Document Version 20211203. - const: svrsw60t59b description: @@ -230,6 +323,12 @@ properties: as ratified at commit 4a69197e5617 ("Update to ratified state") of riscv-svvptc. + - const: za64rs + description: + The standard Za64rs extension for reservation set size of at most + 64 bytes, as ratified in RISC-V Profiles Version 1.0, with commit + b1d806605f87 ("Updated to ratified state.") + - const: zaamo description: | The standard Zaamo extension for atomic memory operations as @@ -371,12 +470,47 @@ properties: in commit 64074bc ("Update version numbers for Zfh/Zfinx") of riscv-isa-manual. + - const: ziccamoa + description: + The standard Ziccamoa extension for main memory (cacheability and + coherence) must support all atomics in A, as ratified in RISC-V + Profiles Version 1.0, with commit b1d806605f87 ("Updated to + ratified state.") + + - const: ziccif + description: + The standard Ziccif extension for main memory (cacheability and + coherence) instruction fetch atomicity, as ratified in RISC-V + Profiles Version 1.0, with commit b1d806605f87 ("Updated to + ratified state.") + + - const: zicclsm + description: + The standard Zicclsm extension for main memory (cacheability and + coherence) must support misaligned loads and stores, as ratified + in RISC-V Profiles Version 1.0, with commit b1d806605f87 ("Updated + to ratified state.") + - const: ziccrse description: The standard Ziccrse extension which provides forward progress guarantee on LR/SC sequences, as ratified in commit b1d806605f87 ("Updated to ratified state.") of the riscv profiles specification. + - const: zilsd + description: + The standard Zilsd extension which provides support for aligned + register-pair load and store operations in 32-bit instruction + encodings, as ratified in commit f88abf1 ("Integrating + load/store pair for RV32 with the main manual") of riscv-isa-manual. + + - const: zclsd + description: + The Zclsd extension implements the compressed (16-bit) version of the + Load/Store Pair for RV32. As with Zilsd, this extension was ratified + in commit f88abf1 ("Integrating load/store pair for RV32 with the + main manual") of riscv-isa-manual. + - const: zk description: The standard Zk Standard Scalar cryptography extension as ratified @@ -455,6 +589,20 @@ properties: The standard Zicboz extension for cache-block zeroing as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. + - const: zicfilp + description: | + The standard Zicfilp extension for enforcing forward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + + - const: zicfiss + description: | + The standard Zicfiss extension for enforcing backward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + - const: zicntr description: The standard Zicntr extension for base counters and timers, as @@ -735,6 +883,42 @@ properties: then: contains: const: f + # B comprises Zba, Zbb, and Zbs + - if: + contains: + const: b + then: + allOf: + - contains: + const: zba + - contains: + const: zbb + - contains: + const: zbs + # Zba, Zbb, Zbs together require B + - if: + allOf: + - contains: + const: zba + - contains: + const: zbb + - contains: + const: zbs + then: + contains: + const: b + # Za64rs and Ziccrse depend on Zalrsc or A + - if: + contains: + anyOf: + - const: za64rs + - const: ziccrse + then: + oneOf: + - contains: + const: zalrsc + - contains: + const: a # Zcb depends on Zca - if: contains: @@ -776,6 +960,16 @@ properties: then: contains: const: f + # Ziccamoa depends on Zaamo or A + - if: + contains: + const: ziccamoa + then: + oneOf: + - contains: + const: zaamo + - contains: + const: a # Zvfbfmin depends on V or Zve32f - if: contains: @@ -882,6 +1076,16 @@ properties: anyOf: - const: v - const: zve32x + # Zclsd depends on Zilsd and Zca + - if: + contains: + anyOf: + - const: zclsd + then: + contains: + allOf: + - const: zilsd + - const: zca allOf: # Zcf extension does not exist on rv64 @@ -899,6 +1103,18 @@ allOf: not: contains: const: zcf + # Zilsd extension does not exist on rv64 + - if: + properties: + riscv,isa-base: + contains: + const: rv64i + then: + properties: + riscv,isa-extensions: + not: + contains: + const: zilsd additionalProperties: true ... diff --git a/Documentation/devicetree/bindings/riscv/spacemit.yaml b/Documentation/devicetree/bindings/riscv/spacemit.yaml index 9c49482002f7..b958b94a924d 100644 --- a/Documentation/devicetree/bindings/riscv/spacemit.yaml +++ b/Documentation/devicetree/bindings/riscv/spacemit.yaml @@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: SpacemiT SoC-based boards maintainers: + - Guodong Xu <guodong@riscstar.com> - Yangyu Chen <cyy@cyyself.name> - Yixun Lan <dlan@gentoo.org> @@ -26,6 +27,10 @@ properties: - xunlong,orangepi-r2s - xunlong,orangepi-rv2 - const: spacemit,k1 + - items: + - enum: + - spacemit,k3-pico-itx + - const: spacemit,k3 additionalProperties: true diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 9253aab21518..8ba0e10b529a 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -41,6 +41,7 @@ properties: - starfive,visionfive-2-lite - starfive,visionfive-2-lite-emmc - const: starfive,jh7110s + - const: starfive,jh7110 additionalProperties: true diff --git a/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml b/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml index 1a71935d8a19..699831927932 100644 --- a/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml +++ b/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml @@ -12,9 +12,13 @@ maintainers: properties: compatible: - enum: - - samsung,exynos5250-trng - - samsung,exynos850-trng + oneOf: + - enum: + - samsung,exynos5250-trng + - samsung,exynos850-trng + - items: + - const: google,gs101-trng + - const: samsung,exynos850-trng clocks: minItems: 1 @@ -24,6 +28,9 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/rtc/cpcap-rtc.txt b/Documentation/devicetree/bindings/rtc/cpcap-rtc.txt deleted file mode 100644 index 45750ff3112d..000000000000 --- a/Documentation/devicetree/bindings/rtc/cpcap-rtc.txt +++ /dev/null @@ -1,18 +0,0 @@ -Motorola CPCAP PMIC RTC ------------------------ - -This module is part of the CPCAP. For more details about the whole -chip see Documentation/devicetree/bindings/mfd/motorola-cpcap.txt. - -Requires node properties: -- compatible: should contain "motorola,cpcap-rtc" -- interrupts: An interrupt specifier for alarm and 1 Hz irq - -Example: - -&cpcap { - cpcap_rtc: rtc { - compatible = "motorola,cpcap-rtc"; - interrupts = <39 IRQ_TYPE_NONE>, <26 IRQ_TYPE_NONE>; - }; -}; diff --git a/Documentation/devicetree/bindings/rtc/loongson,rtc.yaml b/Documentation/devicetree/bindings/rtc/loongson,rtc.yaml index f89c1f660aee..aac91c79ffdb 100644 --- a/Documentation/devicetree/bindings/rtc/loongson,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/loongson,rtc.yaml @@ -23,6 +23,7 @@ properties: - loongson,ls1b-rtc - loongson,ls1c-rtc - loongson,ls7a-rtc + - loongson,ls2k0300-rtc - loongson,ls2k1000-rtc - items: - enum: @@ -42,6 +43,18 @@ required: unevaluatedProperties: false +if: + properties: + compatible: + contains: + enum: + - loongson,ls1c-rtc + - loongson,ls2k0300-rtc + +then: + properties: + interrupts: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/rtc/motorola,cpcap-rtc.yaml b/Documentation/devicetree/bindings/rtc/motorola,cpcap-rtc.yaml new file mode 100644 index 000000000000..bf2efd432a23 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/motorola,cpcap-rtc.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/motorola,cpcap-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Motorola CPCAP PMIC RTC + +maintainers: + - Svyatoslav Ryhel <clamor95@gmail.com> + +description: + This module is part of the Motorola CPCAP MFD device. For more details + see Documentation/devicetree/bindings/mfd/motorola,cpcap.yaml. The + RTC is represented as a sub-node of the PMIC node on the device tree. + +properties: + compatible: + const: motorola,cpcap-rtc + + interrupts: + items: + - description: alarm interrupt + - description: 1 Hz interrupt + +required: + - compatible + - interrupts + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml index ccb1638c35b9..988bb9fa8143 100644 --- a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml +++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - renesas,r9a08g045-rtca3 # RZ/G3S + - renesas,r9a09g056-rtca3 # RZ/V2N - renesas,r9a09g057-rtca3 # RZ/V2H - const: renesas,rz-rtca3 @@ -82,7 +83,9 @@ allOf: properties: compatible: contains: - const: renesas,r9a09g057-rtca3 + enum: + - renesas,r9a09g056-rtca3 + - renesas,r9a09g057-rtca3 then: properties: resets: diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index 167ddcbd8800..73851f19330d 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -160,6 +160,7 @@ properties: - enum: - mrvl,mmp-uart - spacemit,k1-uart + - spacemit,k3-uart - const: intel,xscale-uart - items: - enum: diff --git a/Documentation/devicetree/bindings/serial/google,goldfish-tty.yaml b/Documentation/devicetree/bindings/serial/google,goldfish-tty.yaml new file mode 100644 index 000000000000..0626ce58740c --- /dev/null +++ b/Documentation/devicetree/bindings/serial/google,goldfish-tty.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/google,goldfish-tty.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Goldfish TTY + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +allOf: + - $ref: /schemas/serial/serial.yaml# + +description: + Android goldfish TTY device generated by Android emulator. + +properties: + compatible: + const: google,goldfish-tty + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + serial@1f004000 { + compatible = "google,goldfish-tty"; + reg = <0x1f004000 0x1000>; + interrupts = <12>; + }; diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml index 6b1f827a335b..e059b14775eb 100644 --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml @@ -10,46 +10,78 @@ maintainers: - Geert Uytterhoeven <geert+renesas@glider.be> - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: + - enum: + - renesas,r9a09g047-rsci # RZ/G3E + - renesas,r9a09g077-rsci # RZ/T2H + - items: - - const: renesas,r9a09g087-rsci # RZ/N2H - - const: renesas,r9a09g077-rsci # RZ/T2H + - enum: + - renesas,r9a09g056-rsci # RZ/V2N + - renesas,r9a09g057-rsci # RZ/V2H(P) + - const: renesas,r9a09g047-rsci - items: + - const: renesas,r9a09g087-rsci # RZ/N2H - const: renesas,r9a09g077-rsci # RZ/T2H reg: maxItems: 1 interrupts: + minItems: 4 items: - description: Error interrupt - description: Receive buffer full interrupt - description: Transmit buffer empty interrupt - description: Transmit end interrupt + - description: Active edge detection interrupt + - description: Break field detection interrupt interrupt-names: + minItems: 4 items: - const: eri - const: rxi - const: txi - const: tei + - const: aed + - const: bfd clocks: minItems: 2 - maxItems: 3 + maxItems: 6 clock-names: - minItems: 2 + oneOf: + - items: + - const: operation + - const: bus + - const: sck # optional external clock input + + minItems: 2 + + - items: + - const: pclk + - const: tclk + - const: tclk_div4 + - const: tclk_div16 + - const: tclk_div64 + - const: sck # optional external clock input + + minItems: 5 + + resets: items: - - const: operation - - const: bus - - const: sck # optional external clock input + - description: Input for resetting the APB clock + - description: Input for resetting TCLK + + reset-names: + items: + - const: presetn + - const: tresetn power-domains: maxItems: 1 @@ -62,6 +94,57 @@ required: - clock-names - power-domains +allOf: + - $ref: serial.yaml# + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-rsci + then: + properties: + interrupts: + maxItems: 4 + + interrupt-names: + maxItems: 4 + + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + maxItems: 3 + + resets: false + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-rsci + then: + properties: + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + clocks: + minItems: 5 + maxItems: 6 + + clock-names: + minItems: 5 + maxItems: 6 + + required: + - resets + - reset-names + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 72483bc3274d..82f54446835e 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -12,6 +12,11 @@ maintainers: properties: compatible: oneOf: + - enum: + - renesas,scif-r7s9210 # RZ/A2 + - renesas,scif-r9a07g044 # RZ/G2{L,LC} + - renesas,scif-r9a09g057 # RZ/V2H(P) + - items: - enum: - renesas,scif-r7s72100 # RZ/A1H @@ -19,10 +24,6 @@ properties: - items: - enum: - - renesas,scif-r7s9210 # RZ/A2 - - - items: - - enum: - renesas,scif-r8a7778 # R-Car M1 - renesas,scif-r8a7779 # R-Car H1 - const: renesas,rcar-gen1-scif # R-Car Gen1 @@ -78,17 +79,12 @@ properties: - items: - enum: - - renesas,scif-r9a07g044 # RZ/G2{L,LC} - - - items: - - enum: - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five - renesas,scif-r9a07g054 # RZ/V2L - renesas,scif-r9a08g045 # RZ/G3S + - renesas,scif-r9a08g046 # RZ/G3L - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback - - const: renesas,scif-r9a09g057 # RZ/V2H(P) - - items: - enum: - renesas,scif-r9a09g047 # RZ/G3E diff --git a/Documentation/devicetree/bindings/soc/altera/altr,sys-mgr.yaml b/Documentation/devicetree/bindings/soc/altera/altr,sys-mgr.yaml index d56ff4c05ae5..2dd3395f3f63 100644 --- a/Documentation/devicetree/bindings/soc/altera/altr,sys-mgr.yaml +++ b/Documentation/devicetree/bindings/soc/altera/altr,sys-mgr.yaml @@ -13,7 +13,9 @@ properties: compatible: oneOf: - description: Cyclone5/Arria5/Arria10 - const: altr,sys-mgr + items: + - const: altr,sys-mgr + - const: syscon - description: Stratix10 SoC items: - const: altr,sys-mgr-s10 @@ -45,7 +47,7 @@ additionalProperties: false examples: - | sysmgr@ffd08000 { - compatible = "altr,sys-mgr"; + compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x1000>; cpu1-start-addr = <0xffd080c4>; }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml index 4c96d4917967..27cce748e0ca 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml @@ -34,6 +34,10 @@ properties: maxItems: 1 description: DVFSRC common register address and length. + clocks: + items: + - description: Clock that drives the DVFSRC MCU + regulators: type: object $ref: /schemas/regulator/mediatek,mt6873-dvfsrc-regulator.yaml# @@ -50,6 +54,7 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8195-clk.h> soc { #address-cells = <2>; #size-cells = <2>; @@ -57,6 +62,7 @@ examples: system-controller@10012000 { compatible = "mediatek,mt8195-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + clocks = <&topckgen CLK_TOP_DVFSRC>; regulators { compatible = "mediatek,mt8195-dvfsrc-regulator"; diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml index 39987f722411..44e4a50c3155 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml @@ -42,6 +42,10 @@ properties: type: object $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml + pinctrl@204: + type: object + $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-mssio.yaml + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml new file mode 100644 index 000000000000..1a31c11bc3b4 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/renesas/renesas,rzn1-gpioirqmux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 SoCs GPIO Interrupt Multiplexer + +description: | + The Renesas RZ/N1 GPIO Interrupt Multiplexer multiplexes GPIO interrupt + lines to the interrupt controller available in the SoC. + + It selects up to 8 of the 96 GPIO interrupt lines available and connect them + to 8 output interrupt lines. + +maintainers: + - Herve Codina <herve.codina@bootlin.com> + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-gpioirqmux + - const: renesas,rzn1-gpioirqmux + + reg: + maxItems: 1 + + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + interrupt-map-mask: + items: + - const: 0x7f + + interrupt-map: + description: | + Specifies the mapping from external GPIO interrupt lines to the output + interrupts. The array has up to 8 items defining the mapping related to + the output line 0 (GIC 103) up to the output line 7 (GIC 110). + + The child interrupt number set in arrays items is computed using the + following formula: + gpio_bank * 32 + gpio_number + with: + - gpio_bank: The GPIO bank number + - 0 for GPIO0A, + - 1 for GPIO1A, + - 2 for GPIO2A + - gpio_number: Number of the gpio in the bank (0..31) + minItems: 1 + maxItems: 8 + +required: + - compatible + - reg + - "#address-cells" + - "#interrupt-cells" + - interrupt-map-mask + - interrupt-map + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gic: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <3>; + }; + + interrupt-controller@51000480 { + compatible = "renesas,r9a06g032-gpioirqmux", "renesas,rzn1-gpioirqmux"; + reg = <0x51000480 0x20>; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0x7f>; + interrupt-map = + <32 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* line 0, GPIO1A.0 */ + <89 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* line 1, GPIO2A.25 */ + <9 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; /* line 3, GPIO0A.9 */ + }; diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 6de47489ee42..76ce7e98c10f 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -9,34 +9,13 @@ title: Samsung Exynos SoC series Power Management Unit (PMU) maintainers: - Krzysztof Kozlowski <krzk@kernel.org> -# Custom select to avoid matching all nodes with 'syscon' -select: - properties: - compatible: - contains: - enum: - - google,gs101-pmu - - samsung,exynos3250-pmu - - samsung,exynos4210-pmu - - samsung,exynos4212-pmu - - samsung,exynos4412-pmu - - samsung,exynos5250-pmu - - samsung,exynos5260-pmu - - samsung,exynos5410-pmu - - samsung,exynos5420-pmu - - samsung,exynos5433-pmu - - samsung,exynos7-pmu - - samsung,exynos850-pmu - - samsung-s5pv210-pmu - required: - - compatible - properties: compatible: oneOf: + - enum: + - google,gs101-pmu - items: - enum: - - google,gs101-pmu - samsung,exynos3250-pmu - samsung,exynos4210-pmu - samsung,exynos4212-pmu @@ -52,6 +31,7 @@ properties: - const: syscon - items: - enum: + - axis,artpec9-pmu - samsung,exynos2200-pmu - samsung,exynos7870-pmu - samsung,exynos7885-pmu diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 5e1e155510b3..9c63dbcd4d77 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -15,6 +15,7 @@ properties: - items: - enum: - google,gs101-apm-sysreg + - google,gs101-dpu-sysreg - google,gs101-hsi0-sysreg - google,gs101-hsi2-sysreg - google,gs101-misc-sysreg @@ -92,6 +93,7 @@ allOf: compatible: contains: enum: + - google,gs101-dpu-sysreg - google,gs101-hsi0-sysreg - google,gs101-hsi2-sysreg - google,gs101-misc-sysreg diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml index 133a391ee68c..d3a7c93c3c54 100644 --- a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml +++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml @@ -4,13 +4,13 @@ $id: http://devicetree.org/schemas/soc/spacemit/spacemit,k1-syscon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: SpacemiT K1 SoC System Controller +title: SpacemiT K1/K3 SoC System Controller maintainers: - Haylen Chu <heylenay@4d2.org> description: - System controllers found on SpacemiT K1 SoC, which are capable of + System controllers found on SpacemiT K1/K3 SoC, which are capable of clock, reset and power-management functions. properties: @@ -22,6 +22,10 @@ properties: - spacemit,k1-syscon-rcpu - spacemit,k1-syscon-rcpu2 - spacemit,k1-syscon-apbc2 + - spacemit,k3-syscon-apbc + - spacemit,k3-syscon-apmu + - spacemit,k3-syscon-dciu + - spacemit,k3-syscon-mpmu reg: maxItems: 1 @@ -39,13 +43,20 @@ properties: "#clock-cells": const: 1 description: - See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices. + For K1 SoC, check <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices. + For K3 SoC, check <dt-bindings/clock/spacemit,k3-clocks.h> for valid indices. "#power-domain-cells": const: 1 "#reset-cells": const: 1 + description: | + ID of the reset controller line. Valid IDs are defined in corresponding + files: + + For SpacemiT K1, see include/dt-bindings/clock/spacemit,k1-syscon.h + For SpacemiT K3, see include/dt-bindings/reset/spacemit,k3-resets.h required: - compatible @@ -60,6 +71,8 @@ allOf: enum: - spacemit,k1-syscon-apmu - spacemit,k1-syscon-mpmu + - spacemit,k3-syscon-apmu + - spacemit,k3-syscon-mpmu then: required: - "#power-domain-cells" @@ -74,6 +87,9 @@ allOf: - spacemit,k1-syscon-apbc - spacemit,k1-syscon-apmu - spacemit,k1-syscon-mpmu + - spacemit,k3-syscon-apbc + - spacemit,k3-syscon-apmu + - spacemit,k3-syscon-mpmu then: required: - clocks diff --git a/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml b/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml index 1fdbeecc5eff..3a3313ea0890 100644 --- a/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml +++ b/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml @@ -21,10 +21,10 @@ properties: reg: maxItems: 1 - avdd-supply: + AVDD-supply: description: Analog power supply - dvdd-supply: + DVDD-supply: description: Digital power supply reset-gpios: @@ -60,7 +60,7 @@ allOf: properties: dsd-path: false -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml b/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml index d3d494ae8abf..18919d9112a3 100644 --- a/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml +++ b/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml @@ -19,10 +19,10 @@ properties: reg: maxItems: 1 - avdd-supply: + AVDD-supply: description: A 1.8V supply that powers up the AVDD pin. - dvdd-supply: + DVDD-supply: description: A 1.2V supply that powers up the DVDD pin. reset-gpios: @@ -32,7 +32,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/sound/awinic,aw87390.yaml b/Documentation/devicetree/bindings/sound/awinic,aw87390.yaml index ba9d8767c5d5..9c1baae767c4 100644 --- a/Documentation/devicetree/bindings/sound/awinic,aw87390.yaml +++ b/Documentation/devicetree/bindings/sound/awinic,aw87390.yaml @@ -15,12 +15,15 @@ description: sound quallity, which is a new high efficiency, low noise, constant large volume, 6th Smart K audio amplifier. -allOf: - - $ref: dai-common.yaml# - properties: compatible: - const: awinic,aw87390 + oneOf: + - enum: + - awinic,aw87390 + - items: + - enum: + - anbernic,rgds-amp + - const: awinic,aw87391 reg: maxItems: 1 @@ -40,10 +43,31 @@ required: - compatible - reg - "#sound-dai-cells" - - awinic,audio-channel unevaluatedProperties: false +allOf: + - $ref: dai-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - awinic,aw87390 + then: + required: + - awinic,audio-channel + + - if: + properties: + compatible: + contains: + enum: + - anbernic,rgds-amp + then: + properties: + vdd-supply: true + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml b/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml index bb92d6ca3144..994d68c074a9 100644 --- a/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml +++ b/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml @@ -33,6 +33,8 @@ properties: reset-gpios: maxItems: 1 + dvdd-supply: true + awinic,audio-channel: description: It is used to distinguish multiple PA devices, so that different @@ -65,6 +67,17 @@ allOf: then: properties: reset-gpios: false + - if: + properties: + compatible: + contains: + const: awinic,aw88261 + then: + required: + - dvdd-supply + else: + properties: + dvdd-supply: false unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml index beef193aaaeb..87559d0d079a 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml @@ -40,11 +40,33 @@ properties: tdm-slots: $ref: /schemas/types.yaml#/definitions/uint32 description: - number of channels over one serializer - the property is ignored in DIT mode + Number of channels over one serializer. This property + specifies the TX playback TDM slot count, along with default RX slot count + if tdm-slots-rx is not specified. + The property is ignored in DIT mode. minimum: 2 maximum: 32 + tdm-slots-rx: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Number of RX capture channels over one serializer. If specified, + allows independent RX TDM slot count separate from TX. Requires + ti,async-mode to be enabled for independent TX/RX clock rates. + The property is ignored in DIT mode. + minimum: 2 + maximum: 32 + + ti,async-mode: + description: + Specify to allow independent TX & RX clocking, + to enable audio playback & record with different sampling rate, + and different number of bits per frame. + if property is omitted, TX and RX will share same bit clock and frame clock signals, + thus RX need to use same bits per frame and sampling rate as TX in synchronous mode. + the property is ignored in DIT mode (as DIT is TX-only) + type: boolean + serial-dir: description: A list of serializer configuration @@ -125,7 +147,21 @@ properties: auxclk-fs-ratio: $ref: /schemas/types.yaml#/definitions/uint32 - description: ratio of AUCLK and FS rate if applicable + description: + Ratio of AUCLK and FS rate if applicable. This property specifies + the TX ratio, along with default RX ratio if auxclk-fs-ratio-rx + is not specified. + When not specified, the inputted system clock frequency via set_sysclk + callback by the machine driver is used for divider calculation. + + auxclk-fs-ratio-rx: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Ratio of AUCLK and FS rate for RX. If specified, allows + for a different RX ratio. Requires ti,async-mode to be + enabled when the ratio differs from auxclk-fs-ratio. + When not specified, it defaults to the value of auxclk-fs-ratio. + The property is ignored in DIT mode. gpio-controller: true @@ -170,14 +206,38 @@ allOf: - $ref: dai-common.yaml# - if: properties: - opmode: + op-mode: enum: - 0 - then: required: - tdm-slots + - if: + properties: + op-mode: + const: 1 + then: + properties: + tdm-slots: false + tdm-slots-rx: false + ti,async-mode: false + auxclk-fs-ratio-rx: false + + - if: + required: + - tdm-slots-rx + then: + required: + - ti,async-mode + + - if: + required: + - auxclk-fs-ratio-rx + then: + required: + - ti,async-mode + unevaluatedProperties: false examples: @@ -190,6 +250,7 @@ examples: interrupt-names = "tx", "rx"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; + ti,async-mode; dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>; dma-names = "tx", "rx"; serial-dir = < diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.yaml b/Documentation/devicetree/bindings/sound/everest,es8316.yaml index 81a0215050e0..fe5d938ca310 100644 --- a/Documentation/devicetree/bindings/sound/everest,es8316.yaml +++ b/Documentation/devicetree/bindings/sound/everest,es8316.yaml @@ -49,6 +49,10 @@ properties: items: - const: mclk + interrupts: + maxItems: 1 + description: Headphone detect interrupt + port: $ref: audio-graph-port.yaml# unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/everest,es8389.yaml b/Documentation/devicetree/bindings/sound/everest,es8389.yaml index a673df485ab3..75ce0bc48904 100644 --- a/Documentation/devicetree/bindings/sound/everest,es8389.yaml +++ b/Documentation/devicetree/bindings/sound/everest,es8389.yaml @@ -30,10 +30,20 @@ properties: "#sound-dai-cells": const: 0 + vdda-supply: + description: + Analogue power supply. + + vddd-supply: + description: + Interface power supply. + required: - compatible - reg - "#sound-dai-cells" + - vddd-supply + - vdda-supply additionalProperties: false @@ -46,5 +56,7 @@ examples: compatible = "everest,es8389"; reg = <0x10>; #sound-dai-cells = <0>; + vddd-supply = <&vdd3v3>; + vdda-supply = <&vdd3v3>; }; }; diff --git a/Documentation/devicetree/bindings/sound/fsl,audmix.yaml b/Documentation/devicetree/bindings/sound/fsl,audmix.yaml index 3ad197b3c82c..07b9a38761f2 100644 --- a/Documentation/devicetree/bindings/sound/fsl,audmix.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,audmix.yaml @@ -34,7 +34,9 @@ description: | properties: compatible: - const: fsl,imx8qm-audmix + enum: + - fsl,imx8qm-audmix + - fsl,imx952-audmix reg: maxItems: 1 @@ -80,7 +82,17 @@ required: - reg - clocks - clock-names - - power-domains + +allOf: + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-audmix + then: + required: + - power-domains unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml index c9152bac7421..608defc93c1e 100644 --- a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml @@ -25,6 +25,7 @@ properties: - fsl,imx53-asrc - fsl,imx8qm-asrc - fsl,imx8qxp-asrc + - fsl,imx952-asrc - items: - enum: - fsl,imx6sx-asrc diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml index 1415247c92c8..bcc265a742c7 100644 --- a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml @@ -68,6 +68,16 @@ allOf: compatible: contains: enum: + - fsl,imx6sx-mqs + - fsl,imx93-mqs + then: + required: + - gpr + - if: + properties: + compatible: + contains: + enum: - fsl,imx8qm-mqs - fsl,imx8qxp-mqs then: @@ -91,8 +101,6 @@ allOf: clock-names: items: - const: mclk - required: - - gpr unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml index 3d5d435c765b..3a32f7517d0c 100644 --- a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml @@ -22,14 +22,20 @@ allOf: properties: compatible: - enum: - - fsl,imx7ulp-rpmsg-audio - - fsl,imx8mn-rpmsg-audio - - fsl,imx8mm-rpmsg-audio - - fsl,imx8mp-rpmsg-audio - - fsl,imx8ulp-rpmsg-audio - - fsl,imx93-rpmsg-audio - - fsl,imx95-rpmsg-audio + oneOf: + - enum: + - fsl,imx7ulp-rpmsg-audio + - fsl,imx8mn-rpmsg-audio + - fsl,imx8mm-rpmsg-audio + - fsl,imx8mp-rpmsg-audio + - fsl,imx8ulp-rpmsg-audio + - fsl,imx93-rpmsg-audio + - fsl,imx95-rpmsg-audio + - items: + - enum: + - fsl,imx94-rpmsg-audio + - fsl,imx952-rpmsg-audio + - const: fsl,imx95-rpmsg-audio clocks: items: diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml index 0d733e5b08a4..83b5ea5f3d70 100644 --- a/Documentation/devicetree/bindings/sound/fsl,sai.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml @@ -44,6 +44,7 @@ properties: - items: - enum: - fsl,imx94-sai + - fsl,imx952-sai - const: fsl,imx95-sai reg: @@ -132,6 +133,13 @@ properties: - description: dataline mask for 'rx' - description: dataline mask for 'tx' + fsl,sai-amix-mode: + $ref: /schemas/types.yaml#/definitions/string + description: + The audmix module is bypassed from hardware or not. + enum: [none, bypass, audmix] + default: none + fsl,sai-mclk-direction-output: description: SAI will output the SAI MCLK clock. type: boolean @@ -179,6 +187,15 @@ allOf: properties: fsl,sai-synchronous-rx: false + - if: + required: + - fsl,sai-amix-mode + then: + properties: + compatible: + contains: + const: fsl,imx952-sai + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/google,goldfish-audio.yaml b/Documentation/devicetree/bindings/sound/google,goldfish-audio.yaml new file mode 100644 index 000000000000..d395a5cbc945 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/google,goldfish-audio.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/google,goldfish-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish Audio + +maintainers: + - Kuan-Wei Chiu <visitorckw@gmail.com> + +description: + Android goldfish audio device generated by Android emulator. + +properties: + compatible: + const: google,goldfish-audio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + sound@9030000 { + compatible = "google,goldfish-audio"; + reg = <0x9030000 0x100>; + interrupts = <4>; + }; diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml index 8ddf49b0040d..16ae3328f70d 100644 --- a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml +++ b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml @@ -47,16 +47,118 @@ properties: - description: AFE clock - description: ADDA DAC clock - description: ADDA DAC pre-distortion clock - - description: audio infra sys clock - - description: audio infra 26M clock + - description: ADDA ADC clock + - description: ADDA6 ADC clock + - description: Audio low-jitter 22.5792m clock + - description: Audio low-jitter 24.576m clock + - description: Audio PLL1 tuner clock + - description: Audio PLL2 tuner clock + - description: Audio Time-Division Multiplexing interface clock + - description: ADDA ADC Sine Generator clock + - description: audio Non-LE clock + - description: Audio DAC High-Resolution clock + - description: Audio High-Resolution ADC clock + - description: Audio High-Resolution ADC SineGen clock + - description: Audio ADDA6 High-Resolution ADC clock + - description: Tertiary ADDA DAC clock + - description: Tertiary ADDA DAC pre-distortion clock + - description: Tertiary ADDA DAC Sine Generator clock + - description: Tertiary ADDA DAC High-Resolution clock + - description: Audio infra sys clock + - description: Audio infra 26M clock + - description: Mux for audio clock + - description: Mux for audio internal bus clock + - description: Mux main divider by 4 + - description: Primary audio mux + - description: Primary audio PLL + - description: Secondary audio mux + - description: Secondary audio PLL + - description: Primary audio en-generator clock + - description: Primary PLL divider by 4 for IEC + - description: Secondary audio en-generator clock + - description: Secondary PLL divider by 4 for IEC + - description: Mux selector for I2S port 0 + - description: Mux selector for I2S port 1 + - description: Mux selector for I2S port 2 + - description: Mux selector for I2S port 3 + - description: Mux selector for I2S port 4 + - description: Mux selector for I2S port 5 + - description: Mux selector for I2S port 6 + - description: Mux selector for I2S port 7 + - description: Mux selector for I2S port 8 + - description: Mux selector for I2S port 9 + - description: APLL1 and APLL2 divider for I2S port 0 + - description: APLL1 and APLL2 divider for I2S port 1 + - description: APLL1 and APLL2 divider for I2S port 2 + - description: APLL1 and APLL2 divider for I2S port 3 + - description: APLL1 and APLL2 divider for I2S port 4 + - description: APLL1 and APLL2 divider for IEC + - description: APLL1 and APLL2 divider for I2S port 5 + - description: APLL1 and APLL2 divider for I2S port 6 + - description: APLL1 and APLL2 divider for I2S port 7 + - description: APLL1 and APLL2 divider for I2S port 8 + - description: APLL1 and APLL2 divider for I2S port 9 + - description: Top mux for audio subsystem + - description: 26MHz clock for audio subsystem clock-names: items: - const: aud_afe_clk - const: aud_dac_clk - const: aud_dac_predis_clk + - const: aud_adc_clk + - const: aud_adda6_adc_clk + - const: aud_apll22m_clk + - const: aud_apll24m_clk + - const: aud_apll1_tuner_clk + - const: aud_apll2_tuner_clk + - const: aud_tdm_clk + - const: aud_tml_clk + - const: aud_nle + - const: aud_dac_hires_clk + - const: aud_adc_hires_clk + - const: aud_adc_hires_tml + - const: aud_adda6_adc_hires_clk + - const: aud_3rd_dac_clk + - const: aud_3rd_dac_predis_clk + - const: aud_3rd_dac_tml + - const: aud_3rd_dac_hires_clk - const: aud_infra_clk - const: aud_infra_26m_clk + - const: top_mux_audio + - const: top_mux_audio_int + - const: top_mainpll_d4_d4 + - const: top_mux_aud_1 + - const: top_apll1_ck + - const: top_mux_aud_2 + - const: top_apll2_ck + - const: top_mux_aud_eng1 + - const: top_apll1_d4 + - const: top_mux_aud_eng2 + - const: top_apll2_d4 + - const: top_i2s0_m_sel + - const: top_i2s1_m_sel + - const: top_i2s2_m_sel + - const: top_i2s3_m_sel + - const: top_i2s4_m_sel + - const: top_i2s5_m_sel + - const: top_i2s6_m_sel + - const: top_i2s7_m_sel + - const: top_i2s8_m_sel + - const: top_i2s9_m_sel + - const: top_apll12_div0 + - const: top_apll12_div1 + - const: top_apll12_div2 + - const: top_apll12_div3 + - const: top_apll12_div4 + - const: top_apll12_divb + - const: top_apll12_div5 + - const: top_apll12_div6 + - const: top_apll12_div7 + - const: top_apll12_div8 + - const: top_apll12_div9 + - const: top_mux_audio_h + - const: top_clk26m_clk required: - compatible @@ -83,23 +185,69 @@ examples: afe: mt8192-afe-pcm { compatible = "mediatek,mt8192-audio"; interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&audsys CLK_AUD_AFE>, <&audsys CLK_AUD_DAC>, + <&audsys CLK_AUD_DAC_PREDIS>, <&audsys CLK_AUD_ADC>, + <&audsys CLK_AUD_ADDA6_ADC>, <&audsys CLK_AUD_22M>, + <&audsys CLK_AUD_24M>, <&audsys CLK_AUD_APLL_TUNER>, + <&audsys CLK_AUD_APLL2_TUNER>, <&audsys CLK_AUD_TDM>, + <&audsys CLK_AUD_TML>, <&audsys CLK_AUD_NLE>, + <&audsys CLK_AUD_DAC_HIRES>, <&audsys CLK_AUD_ADC_HIRES>, + <&audsys CLK_AUD_ADC_HIRES_TML>, <&audsys CLK_AUD_ADDA6_ADC_HIRES>, + <&audsys CLK_AUD_3RD_DAC>, <&audsys CLK_AUD_3RD_DAC_PREDIS>, + <&audsys CLK_AUD_3RD_DAC_TML>, <&audsys CLK_AUD_3RD_DAC_HIRES>, + <&infracfg CLK_INFRA_AUDIO>, <&infracfg CLK_INFRA_AUDIO_26M_B>, + <&topckgen CLK_TOP_AUDIO_SEL>, <&topckgen CLK_TOP_AUD_INTBUS_SEL>, + <&topckgen CLK_TOP_MAINPLL_D4_D4>, <&topckgen CLK_TOP_AUD_1_SEL>, + <&topckgen CLK_TOP_APLL1>, <&topckgen CLK_TOP_AUD_2_SEL>, + <&topckgen CLK_TOP_APLL2>, <&topckgen CLK_TOP_AUD_ENGEN1_SEL>, + <&topckgen CLK_TOP_APLL1_D4>, <&topckgen CLK_TOP_AUD_ENGEN2_SEL>, + <&topckgen CLK_TOP_APLL2_D4>, <&topckgen CLK_TOP_APLL_I2S0_M_SEL>, + <&topckgen CLK_TOP_APLL_I2S1_M_SEL>, <&topckgen CLK_TOP_APLL_I2S2_M_SEL>, + <&topckgen CLK_TOP_APLL_I2S3_M_SEL>, <&topckgen CLK_TOP_APLL_I2S4_M_SEL>, + <&topckgen CLK_TOP_APLL_I2S5_M_SEL>, <&topckgen CLK_TOP_APLL_I2S6_M_SEL>, + <&topckgen CLK_TOP_APLL_I2S7_M_SEL>, <&topckgen CLK_TOP_APLL_I2S8_M_SEL>, + <&topckgen CLK_TOP_APLL_I2S9_M_SEL>, <&topckgen CLK_TOP_APLL12_DIV0>, + <&topckgen CLK_TOP_APLL12_DIV1>, <&topckgen CLK_TOP_APLL12_DIV2>, + <&topckgen CLK_TOP_APLL12_DIV3>, <&topckgen CLK_TOP_APLL12_DIV4>, + <&topckgen CLK_TOP_APLL12_DIVB>, <&topckgen CLK_TOP_APLL12_DIV5>, + <&topckgen CLK_TOP_APLL12_DIV6>, <&topckgen CLK_TOP_APLL12_DIV7>, + <&topckgen CLK_TOP_APLL12_DIV8>, <&topckgen CLK_TOP_APLL12_DIV9>, + <&topckgen CLK_TOP_AUDIO_H_SEL>, <&clk26m>; + clock-names = "aud_afe_clk", "aud_dac_clk", + "aud_dac_predis_clk", "aud_adc_clk", + "aud_adda6_adc_clk", "aud_apll22m_clk", + "aud_apll24m_clk", "aud_apll1_tuner_clk", + "aud_apll2_tuner_clk", "aud_tdm_clk", + "aud_tml_clk", "aud_nle", + "aud_dac_hires_clk", "aud_adc_hires_clk", + "aud_adc_hires_tml", "aud_adda6_adc_hires_clk", + "aud_3rd_dac_clk", "aud_3rd_dac_predis_clk", + "aud_3rd_dac_tml", "aud_3rd_dac_hires_clk", + "aud_infra_clk", "aud_infra_26m_clk", + "top_mux_audio", "top_mux_audio_int", + "top_mainpll_d4_d4", "top_mux_aud_1", + "top_apll1_ck", "top_mux_aud_2", + "top_apll2_ck", "top_mux_aud_eng1", + "top_apll1_d4", "top_mux_aud_eng2", + "top_apll2_d4", "top_i2s0_m_sel", + "top_i2s1_m_sel", "top_i2s2_m_sel", + "top_i2s3_m_sel", "top_i2s4_m_sel", + "top_i2s5_m_sel", "top_i2s6_m_sel", + "top_i2s7_m_sel", "top_i2s8_m_sel", + "top_i2s9_m_sel", "top_apll12_div0", + "top_apll12_div1", "top_apll12_div2", + "top_apll12_div3", "top_apll12_div4", + "top_apll12_divb", "top_apll12_div5", + "top_apll12_div6", "top_apll12_div7", + "top_apll12_div8", "top_apll12_div9", + "top_mux_audio_h", "top_clk26m_clk"; + memory-region = <&afe_dma_mem>; + power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>; reset-names = "audiosys"; mediatek,apmixedsys = <&apmixedsys>; mediatek,infracfg = <&infracfg>; mediatek,topckgen = <&topckgen>; - power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; - clocks = <&audsys CLK_AUD_AFE>, - <&audsys CLK_AUD_DAC>, - <&audsys CLK_AUD_DAC_PREDIS>, - <&infracfg CLK_INFRA_AUDIO>, - <&infracfg CLK_INFRA_AUDIO_26M_B>; - clock-names = "aud_afe_clk", - "aud_dac_clk", - "aud_dac_predis_clk", - "aud_infra_clk", - "aud_infra_26m_clk"; - memory-region = <&afe_dma_mem>; }; ... diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml index da89523ccf5f..92bc3ef56f2c 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml @@ -23,6 +23,7 @@ properties: enum: - nvidia,tegra210-audio-graph-card - nvidia,tegra186-audio-graph-card + - nvidia,tegra238-audio-graph-card - nvidia,tegra264-audio-graph-card clocks: diff --git a/Documentation/devicetree/bindings/sound/realtek,rt5575.yaml b/Documentation/devicetree/bindings/sound/realtek,rt5575.yaml new file mode 100644 index 000000000000..981ebc39b195 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/realtek,rt5575.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/realtek,rt5575.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ALC5575 audio CODEC + +maintainers: + - Oder Chiou <oder_chiou@realtek.com> + +description: + The device supports both I2C and SPI. I2C is mandatory, while SPI is + optional depending on the hardware configuration. SPI is used for + firmware loading if present. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: realtek,rt5575 + + reg: + maxItems: 1 + + spi-parent: + description: + Optional phandle reference to the SPI controller used for firmware + loading. The argument specifies the chip select. + $ref: /schemas/types.yaml#/definitions/phandle-array + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + # I2C-only node + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + codec@57 { + compatible = "realtek,rt5575"; + reg = <0x57>; + }; + }; + + # I2C + optional SPI node + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + codec@57 { + compatible = "realtek,rt5575"; + reg = <0x57>; + spi-parent = <&spi0 0>; /* chip-select 0 */ + }; + }; diff --git a/Documentation/devicetree/bindings/sound/realtek,rt5640.yaml b/Documentation/devicetree/bindings/sound/realtek,rt5640.yaml index 3f4f59287c1c..2eb631950963 100644 --- a/Documentation/devicetree/bindings/sound/realtek,rt5640.yaml +++ b/Documentation/devicetree/bindings/sound/realtek,rt5640.yaml @@ -47,6 +47,12 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + + clock-names: + const: mclk + interrupts: maxItems: 1 description: The CODEC's interrupt output. @@ -98,6 +104,7 @@ properties: - 4 # Use GPIO2 for jack-detect - 5 # Use GPIO3 for jack-detect - 6 # Use GPIO4 for jack-detect + - 7 # Use HDA header for jack-detect realtek,jack-detect-not-inverted: description: @@ -121,6 +128,10 @@ properties: - 2 # Scale current by 1.0 - 3 # Scale current by 1.5 + port: + $ref: audio-graph-port.yaml# + unevaluatedProperties: false + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/realtek,rt5651.yaml b/Documentation/devicetree/bindings/sound/realtek,rt5651.yaml new file mode 100644 index 000000000000..dc4f2eef7cf9 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/realtek,rt5651.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/realtek,rt5651.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RT5651 audio CODEC + +maintainers: + - Bard Liao <bardliao@realtek.com> + +description: > + This device supports I2C only. + + Pins on the device (for linking into audio routes) for RT5651: + + * DMIC L1 + * DMIC R1 + * IN1P + * IN2P + * IN2N + * IN3P + * HPOL + * HPOR + * LOUTL + * LOUTR + * PDML + * PDMR + +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +properties: + compatible: + const: realtek,rt5651 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: mclk + + '#sound-dai-cells': + const: 0 + + realtek,in2-differential: + type: boolean + description: Indicate MIC2 input are differential, rather than single-ended. + + realtek,dmic-en: + type: boolean + description: Indicates DMIC is used. + + realtek,jack-detect-source: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Select jack-detect input pin. + enum: [1, 2, 3] + + realtek,jack-detect-not-inverted: + type: boolean + description: + Normal jack-detect switches give an inverted (active-low) signal. Set this + bool in the rare case you've a jack-detect switch which is not inverted. + + realtek,over-current-threshold-microamp: + description: Micbias over-current detection threshold in µA. + enum: [600, 1500, 2000] + + realtek,over-current-scale-factor: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Micbias over-current detection scale factor: + + 0: scale current by 0.5 + 1: scale current by 0.75 + 2: scale current by 1.0 + 3: scale current by 1.5 + enum: [0, 1, 2, 3] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + codec@1a { + compatible = "realtek,rt5651"; + reg = <0x1a>; + realtek,dmic-en; + realtek,in2-differential; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml index e4cdbf2202b9..1394f78281fc 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml @@ -20,6 +20,7 @@ properties: - renesas,r9a07g044-ssi # RZ/G2{L,LC} - renesas,r9a07g054-ssi # RZ/V2L - renesas,r9a08g045-ssi # RZ/G3S + - renesas,r9a08g046-ssi # RZ/G3L - const: renesas,rz-ssi reg: diff --git a/Documentation/devicetree/bindings/sound/richtek,rtq9128.yaml b/Documentation/devicetree/bindings/sound/richtek,rtq9128.yaml index d54686a19ab7..a125663988a5 100644 --- a/Documentation/devicetree/bindings/sound/richtek,rtq9128.yaml +++ b/Documentation/devicetree/bindings/sound/richtek,rtq9128.yaml @@ -14,13 +14,21 @@ description: class-D audio power amplifier and delivering 4x75W into 4OHm at 10% THD+N from a 25V supply in automotive applications. + The RTQ9154 is the family series of RTQ9128. The major change is to modify + the package size. Beside this, whole functions are almost all the same. + allOf: - $ref: dai-common.yaml# properties: compatible: - enum: - - richtek,rtq9128 + oneOf: + - enum: + - richtek,rtq9128 + - items: + - enum: + - richtek,rtq9154 + - const: richtek,rtq9128 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml b/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml index 32dea7392e8d..56c755c22945 100644 --- a/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml @@ -70,6 +70,9 @@ properties: "#sound-dai-cells": const: 0 + port: + $ref: /schemas/graph.yaml#/properties/port + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/rt5651.txt b/Documentation/devicetree/bindings/sound/rt5651.txt deleted file mode 100644 index 56e736a1cba9..000000000000 --- a/Documentation/devicetree/bindings/sound/rt5651.txt +++ /dev/null @@ -1,63 +0,0 @@ -RT5651 audio CODEC - -This device supports I2C only. - -Required properties: - -- compatible : "realtek,rt5651". - -- reg : The I2C address of the device. - -Optional properties: - -- realtek,in2-differential - Boolean. Indicate MIC2 input are differential, rather than single-ended. - -- realtek,dmic-en - Boolean. true if dmic is used. - -- realtek,jack-detect-source - u32. Valid values: - 1: Use JD1_1 pin for jack-detect - 2: Use JD1_2 pin for jack-detect - 3: Use JD2 pin for jack-detect - -- realtek,jack-detect-not-inverted - bool. Normal jack-detect switches give an inverted (active-low) signal, - set this bool in the rare case you've a jack-detect switch which is not - inverted. - -- realtek,over-current-threshold-microamp - u32, micbias over-current detection threshold in µA, valid values are - 600, 1500 and 2000µA. - -- realtek,over-current-scale-factor - u32, micbias over-current detection scale-factor, valid values are: - 0: Scale current by 0.5 - 1: Scale current by 0.75 - 2: Scale current by 1.0 - 3: Scale current by 1.5 - -Pins on the device (for linking into audio routes) for RT5651: - - * DMIC L1 - * DMIC R1 - * IN1P - * IN2P - * IN2N - * IN3P - * HPOL - * HPOR - * LOUTL - * LOUTR - * PDML - * PDMR - -Example: - -rt5651: codec@1a { - compatible = "realtek,rt5651"; - reg = <0x1a>; - realtek,dmic-en = "true"; - realtek,in2-diff = "false"; -}; diff --git a/Documentation/devicetree/bindings/sound/sophgo,cv1800b-codecs.yaml b/Documentation/devicetree/bindings/sound/sophgo,cv1800b-codecs.yaml new file mode 100644 index 000000000000..7293a98e98c5 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sophgo,cv1800b-codecs.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/sophgo,cv1800b-codecs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800B Internal ADC/DAC Codec + +maintainers: + - Anton D. Stavinskii <stavinsky@gmail.com> + +description: + Internal ADC and DAC audio codecs integrated in the Sophgo CV1800B SoC. + Codecs expose a single DAI and are intended to be connected + to an I2S/TDM controller via an ASoC machine driver. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - sophgo,cv1800b-sound-adc + - sophgo,cv1800b-sound-dac + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - "#sound-dai-cells" + +unevaluatedProperties: false + +examples: + - | + audio-codec@300a100 { + compatible = "sophgo,cv1800b-sound-adc"; + reg = <0x0300a100 0x100>; + #sound-dai-cells = <0>; + }; +... diff --git a/Documentation/devicetree/bindings/sound/sophgo,cv1800b-i2s.yaml b/Documentation/devicetree/bindings/sound/sophgo,cv1800b-i2s.yaml new file mode 100644 index 000000000000..f08362b0ca5e --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sophgo,cv1800b-i2s.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/sophgo,cv1800b-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800B I2S/TDM controller + +maintainers: + - Anton D. Stavinskii <stavinsky@gmail.com> + +description: I2S/TDM controller found in CV1800B / Sophgo SG2002/SG2000 SoCs. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: sophgo,cv1800b-i2s + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: i2s + - const: mclk + + dmas: + minItems: 1 + maxItems: 2 + + dma-names: + minItems: 1 + items: + - enum: [rx, tx] + - const: tx + +required: + - compatible + - reg + - clocks + - clock-names + - "#sound-dai-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/sophgo,cv1800.h> + + i2s@4110000 { + compatible = "sophgo,cv1800b-i2s"; + reg = <0x04110000 0x10000>; + clocks = <&clk CLK_APB_I2S1>, <&clk CLK_SDMA_AUD1>; + clock-names = "i2s", "mclk"; + dmas = <&dmamux 2 1>, <&dmamux 3 1>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + }; +... diff --git a/Documentation/devicetree/bindings/sound/tas2552.txt b/Documentation/devicetree/bindings/sound/tas2552.txt deleted file mode 100644 index a7eecad83db1..000000000000 --- a/Documentation/devicetree/bindings/sound/tas2552.txt +++ /dev/null @@ -1,36 +0,0 @@ -Texas Instruments - tas2552 Codec module - -The tas2552 serial control bus communicates through I2C protocols - -Required properties: - - compatible - One of: - "ti,tas2552" - TAS2552 - - reg - I2C slave address: it can be 0x40 if ADDR pin is 0 - or 0x41 if ADDR pin is 1. - - supply-*: Required supply regulators are: - "vbat" battery voltage - "iovdd" I/O Voltage - "avdd" Analog DAC Voltage - -Optional properties: - - enable-gpio - gpio pin to enable/disable the device - -tas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the -internal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, the PDM -reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK. -For system integration the dt-bindings/sound/tas2552.h header file provides -defined values to select and configure the PLL and PDM reference clocks. - -Example: - -tas2552: tas2552@41 { - compatible = "ti,tas2552"; - reg = <0x41>; - vbat-supply = <®_vbat>; - iovdd-supply = <®_iovdd>; - avdd-supply = <®_avdd>; - enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; -}; - -For more product information please see the link below: -https://www.ti.com/product/TAS2552 diff --git a/Documentation/devicetree/bindings/sound/ti,tas2552.yaml b/Documentation/devicetree/bindings/sound/ti,tas2552.yaml new file mode 100644 index 000000000000..10369aa5f0a8 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,tas2552.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,tas2552.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TAS2552 Codec + +maintainers: + - Shenghao Ding <shenghao-ding@ti.com> + - Kevin Lu <kevin-lu@ti.com> + - Baojun Xu <baojun.xu@ti.com> + +description: > + The TAS2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or + use the internal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, + the PDM reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK. + + For system integration the dt-bindings/sound/tas2552.h header file provides + defined values to select and configure the PLL and PDM reference clocks. + +properties: + compatible: + const: ti,tas2552 + + reg: + maxItems: 1 + + vbat-supply: true + iovdd-supply: true + avdd-supply: true + + enable-gpio: + maxItems: 1 + description: gpio pin to enable/disable the device + +required: + - compatible + - reg + - vbat-supply + - iovdd-supply + - avdd-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + audio-codec@41 { + compatible = "ti,tas2552"; + reg = <0x41>; + vbat-supply = <®_vbat>; + iovdd-supply = <®_iovdd>; + avdd-supply = <®_avdd>; + enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml index 876fa97bfbcd..a93de2debbb4 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml @@ -41,8 +41,11 @@ properties: areg-supply: description: | - Regulator with AVDD at 3.3V. If not defined then the internal regulator - is enabled. + External supply of 1.8V. If not defined then the internal regulator is + enabled instead. + + avdd-supply: true + iovdd-supply: true ti,mic-bias-source: description: | diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml index 206f6d61e362..50088698adac 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml @@ -46,6 +46,7 @@ maintainers: properties: compatible: enum: + - ti,tlv320aic23 - ti,tlv320aic3x - ti,tlv320aic33 - ti,tlv320aic3007 diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml index 003023729fb8..9447a2f371b5 100644 --- a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml +++ b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml @@ -27,6 +27,7 @@ properties: - items: - enum: - qcom,soundwire-v2.1.0 + - qcom,soundwire-v2.2.0 - const: qcom,soundwire-v2.0.0 reg: diff --git a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml index 4b3828eda6cb..0f2448371f17 100644 --- a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml +++ b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml @@ -70,6 +70,21 @@ required: unevaluatedProperties: false +patternProperties: + "^.*@[0-9a-f]+": + type: object + + properties: + spi-rx-bus-width: + maxItems: 8 + items: + enum: [0, 1] + + spi-tx-bus-width: + maxItems: 8 + items: + enum: [0, 1] + examples: - | spi@44a00000 { diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml index e1ab3f523ad6..a34e6471dbe8 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml @@ -55,10 +55,12 @@ patternProperties: maximum: 4 spi-rx-bus-width: - const: 1 + items: + - const: 1 spi-tx-bus-width: - const: 1 + items: + - const: 1 required: - compatible diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index 3b47b68b92cb..a6067030c5ed 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - const: allwinner,sun50i-r329-spi + - const: allwinner,sun55i-a523-spi - const: allwinner,sun6i-a31-spi - const: allwinner,sun8i-h3-spi - items: @@ -35,6 +36,9 @@ properties: - const: allwinner,sun20i-d1-spi-dbi - const: allwinner,sun50i-r329-spi-dbi - const: allwinner,sun50i-r329-spi + - items: + - const: allwinner,sun55i-a523-spi-dbi + - const: allwinner,sun55i-a523-spi reg: maxItems: 1 @@ -77,10 +81,12 @@ patternProperties: maximum: 4 spi-rx-bus-width: - const: 1 + items: + - const: 1 spi-tx-bus-width: - const: 1 + items: + - const: 1 required: - compatible diff --git a/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml b/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml new file mode 100644 index 000000000000..8e441742cee6 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/andestech,ae350-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andes ATCSPI200 SPI controller + +maintainers: + - CL Wang <cl634@andestech.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - andestech,qilai-spi + - const: andestech,ae350-spi + - const: andestech,ae350-spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + num-cs: + description: Number of chip selects supported + maxItems: 1 + + dmas: + items: + - description: Transmit FIFO DMA channel + - description: Receive FIFO DMA channel + + dma-names: + items: + - const: tx + - const: rx + +patternProperties: + "@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + spi-rx-bus-width: + items: + - enum: [1, 4] + + spi-tx-bus-width: + items: + - enum: [1, 4] + +allOf: + - $ref: spi-controller.yaml# + +required: + - compatible + - reg + - clocks + - dmas + - dma-names + +unevaluatedProperties: false + +examples: + - | + spi@f0b00000 { + compatible = "andestech,ae350-spi"; + reg = <0xf0b00000 0x100>; + clocks = <&clk_spi>; + dmas = <&dma0 0>, <&dma0 1>; + dma-names = "tx", "rx"; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml index 11885d0cc209..a8539b68a2f3 100644 --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml @@ -19,6 +19,7 @@ properties: - const: atmel,at91rm9200-spi - items: - enum: + - microchip,lan9691-spi - microchip,sam9x60-spi - microchip,sam9x7-spi - microchip,sama7d65-spi diff --git a/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml b/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml new file mode 100644 index 000000000000..cd2aac66fca2 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/axiado,ax3000-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Axiado AX3000 SoC SPI controller + +maintainers: + - Vladimir Moravcevic <vmoravcevic@axiado.com> + - Tzu-Hao Wei <twei@axiado.com> + - Swark Yang <syang@axiado.com> + - Prasad Bolisetty <pbolisetty@axiado.com> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + enum: + - axiado,ax3000-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-names: + items: + - const: ref + - const: pclk + + clocks: + maxItems: 2 + + num-cs: + description: | + Number of chip selects used. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 4 + default: 4 + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@80510000 { + compatible = "axiado,ax3000-spi"; + reg = <0x00 0x80510000 0x00 0x1000>; + clock-names = "ref", "pclk"; + clocks = <&spi_clk>, <&apb_pclk>; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + num-cs = <4>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 53a52fb8b819..891f578b5ac4 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -61,6 +61,20 @@ allOf: cdns,fifo-depth: enum: [ 128, 256 ] default: 128 + - if: + properties: + compatible: + contains: + const: renesas,rzn1-qspi + then: + properties: + cdns,trigger-address: false + cdns,fifo-depth: false + cdns,fifo-width: false + else: + required: + - cdns,trigger-address + - cdns,fifo-depth properties: compatible: @@ -80,6 +94,9 @@ properties: # controllers are meant to be used with flashes of all kinds, # ie. also NAND flashes, not only NOR flashes. - const: cdns,qspi-nor + - items: + - const: renesas,r9a06g032-qspi + - const: renesas,rzn1-qspi - const: cdns,qspi-nor deprecated: true @@ -163,8 +180,6 @@ required: - reg - interrupts - clocks - - cdns,fifo-width - - cdns,trigger-address - '#address-cells' - '#size-cells' @@ -172,7 +187,7 @@ unevaluatedProperties: false examples: - | - qspi: spi@ff705000 { + spi@ff705000 { compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/spi/faraday,ftssp010.yaml b/Documentation/devicetree/bindings/spi/faraday,ftssp010.yaml new file mode 100644 index 000000000000..678598de3400 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/faraday,ftssp010.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/faraday,ftssp010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Faraday FTSSP010 SPI Controller + +maintainers: + - Linus Walleij <linusw@kernel.org> + +properties: + compatible: + const: faraday,ftssp010 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + cs-gpios: true + +required: + - compatible + - interrupts + - reg + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + spi@4a000000 { + compatible = "faraday,ftssp010"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4a000000 0x1000>; + interrupts = <0>; + }; diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml index 8b3640280559..909c204b8adf 100644 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml @@ -54,10 +54,12 @@ patternProperties: properties: spi-rx-bus-width: - enum: [1, 2, 4] + items: + - enum: [1, 2, 4] spi-tx-bus-width: - enum: [1, 2, 4] + items: + - enum: [1, 2, 4] required: - compatible diff --git a/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml b/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml new file mode 100644 index 000000000000..16a0598c6d03 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/nxp,imx94-xspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP External Serial Peripheral Interface (xSPI) + +maintainers: + - Haibo Chen <haibo.chen@nxp.com> + - Han Xu <han.xu@nxp.com> + +properties: + compatible: + oneOf: + - enum: + - nxp,imx94-xspi + - items: + - enum: + - nxp,imx952-xspi + - const: nxp,imx94-xspi + + reg: + items: + - description: registers address space + - description: memory mapped address space + + reg-names: + items: + - const: base + - const: mmap + + interrupts: + items: + - description: interrupt for EENV0 + - description: interrupt for EENV1 + - description: interrupt for EENV2 + - description: interrupt for EENV3 + - description: interrupt for EENV4 + + clocks: + items: + - description: SPI serial clock + + clock-names: + items: + - const: per + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@42b90000 { + compatible = "nxp,imx94-xspi"; + reg = <0x0 0x42b90000 0x0 0x50000>, <0x0 0x28000000 0x0 0x08000000>; + reg-names = "base", "mmap"; + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&scmi_1>; + clock-names = "per"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <200000000>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <8>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/nxp,lpc3220-spi.yaml b/Documentation/devicetree/bindings/spi/nxp,lpc3220-spi.yaml index d5f780912f21..789e26e40927 100644 --- a/Documentation/devicetree/bindings/spi/nxp,lpc3220-spi.yaml +++ b/Documentation/devicetree/bindings/spi/nxp,lpc3220-spi.yaml @@ -20,6 +20,12 @@ properties: clocks: maxItems: 1 + dmas: + maxItems: 1 + + dma-names: + const: rx-tx + allOf: - $ref: spi-controller.yaml# @@ -38,6 +44,8 @@ examples: compatible = "nxp,lpc3220-spi"; reg = <0x20088000 0x1000>; clocks = <&clk LPC32XX_CLK_SPI1>; + dmas = <&dmamux 11 1 0>; + dma-names = "rx-tx"; #address-cells = <1>; #size-cells = <0>; }; diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml index 069557a587b5..a588b112e11e 100644 --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml @@ -57,6 +57,14 @@ properties: - const: presetn - const: tresetn + dmas: + maxItems: 2 + + dma-names: + items: + - const: rx + - const: tx + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 81838577cf9c..8ebebcebca16 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -26,21 +26,6 @@ allOf: properties: compatible: contains: - enum: - - baikal,bt1-sys-ssi - then: - properties: - mux-controls: - maxItems: 1 - required: - - mux-controls - else: - required: - - interrupts - - if: - properties: - compatible: - contains: const: amd,pensando-elba-spi then: required: @@ -75,10 +60,6 @@ properties: const: intel,mountevans-imc-ssi - description: AMD Pensando Elba SoC SPI Controller const: amd,pensando-elba-spi - - description: Baikal-T1 SPI Controller - const: baikal,bt1-ssi - - description: Baikal-T1 System Boot SPI Controller - const: baikal,bt1-sys-ssi - description: Canaan Kendryte K210 SoS SPI Controller const: canaan,k210-spi - description: Renesas RZ/N1 SPI Controller @@ -170,6 +151,7 @@ required: - "#address-cells" - "#size-cells" - clocks + - interrupts examples: - | @@ -190,15 +172,4 @@ examples: rx-sample-delay-ns = <7>; }; }; - - | - spi@1f040100 { - compatible = "baikal,bt1-sys-ssi"; - reg = <0x1f040100 0x900>, - <0x1c000000 0x1000000>; - #address-cells = <1>; - #size-cells = <0>; - mux-controls = <&boot_mux>; - clocks = <&ccu_sys>; - clock-names = "ssi_clk"; - }; ... diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 8b6e8fc009db..880a9f624566 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -64,9 +64,23 @@ properties: description: Bus width to the SPI bus used for read transfers. If 0 is provided, then no RX will be possible on this device. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2, 4, 8] - default: 1 + + Some SPI peripherals and controllers may have multiple data lanes for + receiving two or more words at the same time. If this is the case, each + index in the array represents the lane on both the SPI peripheral and + controller. Additional mapping properties may be needed if a lane is + skipped on either side. + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + enum: [0, 1, 2, 4, 8] + default: [1] + + spi-rx-lane-map: + description: Mapping of peripheral SDO lanes to controller SDI lanes. + Each index in the array represents a peripheral SDO lane, and the value + at that index represents the corresponding controller SDI lane. + $ref: /schemas/types.yaml#/definitions/uint32-array + default: [0, 1, 2, 3, 4, 5, 6, 7] spi-rx-delay-us: description: @@ -81,9 +95,23 @@ properties: description: Bus width to the SPI bus used for write transfers. If 0 is provided, then no TX will be possible on this device. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2, 4, 8] - default: 1 + + Some SPI peripherals and controllers may have multiple data lanes for + transmitting two or more words at the same time. If this is the case, each + index in the array represents the lane on both the SPI peripheral and + controller. Additional mapping properties may be needed if a lane is + skipped on either side. + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + enum: [0, 1, 2, 4, 8] + default: [1] + + spi-tx-lane-map: + description: Mapping of peripheral SDI lanes to controller SDO lanes. + Each index in the array represents a peripheral SDI lane, and the value + at that index represents the corresponding controller SDO lane. + $ref: /schemas/types.yaml#/definitions/uint32-array + default: [0, 1, 2, 3, 4, 5, 6, 7] spi-tx-delay-us: description: diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.yaml b/Documentation/devicetree/bindings/spi/spi-xilinx.yaml index 4beb3af0416d..24e62530d432 100644 --- a/Documentation/devicetree/bindings/spi/spi-xilinx.yaml +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.yaml @@ -38,7 +38,6 @@ properties: required: - compatible - reg - - interrupts unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index ca880a226afa..472e92974714 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -96,6 +96,9 @@ properties: The region should be defined as child node of the AHB SRAM node as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml + power-domains: + maxItems: 1 + access-controllers: minItems: 1 maxItems: 2 diff --git a/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml new file mode 100644 index 000000000000..7a534f0a1d87 --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/mediatek,mt8196-spmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8196 SPMI 2.0 Controller + +maintainers: + - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: + The MediaTek MT8196 SoC features a SPMI version 2.0 compliant controller, + with internal wrapping arbitration logic to allow for multiple on-chip + devices to control up to two SPMI buses. + The main arbiter also acts as an interrupt controller, arbitering also + the interrupts coming from SPMI-connected devices into each of the nested + interrupt controllers from any of the present SPMI buses. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt8196-spmi + - items: + - enum: + - mediatek,mt6991-spmi + - const: mediatek,mt8196-spmi + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "^spmi@[a-f0-9]+$": + type: object + $ref: /schemas/spmi/spmi.yaml + unevaluatedProperties: false + + properties: + reg: + items: + - description: controller interface registers + - description: spmi master controller registers + + reg-names: + items: + - const: pmif + - const: spmimst + + clocks: + items: + - description: controller interface system clock + - description: controller interface timer clock + - description: spmi controller master clock + + clock-names: + items: + - const: pmif_sys_ck + - const: pmif_tmr_ck + - const: spmimst_clk_mux + + interrupts: + maxItems: 1 + + interrupt-names: + const: rcs + + interrupt-controller: true + + "#interrupt-cells": + const: 3 + description: | + cell 1: slave ID for the requested interrupt (0-15) + cell 2: the requested peripheral interrupt (0-7) + cell 3: interrupt flags indicating level-sense information, + as defined in dt-bindings/interrupt-controller/irq.h + required: + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interrupt-controller + - "#interrupt-cells" + +required: + - compatible + - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spmi-arbiter@1c018000 { + compatible = "mediatek,mt8196-spmi"; + ranges = <0 0 0x1c018000 0x4900>; + #address-cells = <1>; + #size-cells = <1>; + + spmi@0 { + reg = <0 0x900>, <0x4800 0x100>; + reg-names = "pmif", "spmimst"; + interrupts-extended = <&pio 292 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rcs"; + interrupt-controller; + #interrupt-cells = <3>; + clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>; + clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux"; + }; + + spmi@2000 { + reg = <0x2000 0x900>, <0x4000 0x100>; + reg-names = "pmif", "spmimst"; + interrupts-extended = <&pio 291 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rcs"; + interrupt-controller; + #interrupt-cells = <3>; + clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>; + clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index 7f0be0ac644a..dc61d88008a9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -26,6 +26,7 @@ properties: - enum: - mediatek,mt8186-spmi - mediatek,mt8188-spmi + - mediatek,mt8189-spmi - const: mediatek,mt8195-spmi reg: diff --git a/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml new file mode 100644 index 000000000000..3b5005b96c6d --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml @@ -0,0 +1,150 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/qcom,glymur-spmi-pmic-arb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Glymur SPMI Controller (PMIC Arbiter v8) + +maintainers: + - David Collins <david.collins@oss.qualcomm.com> + +description: | + The Glymur SPMI PMIC Arbiter implements HW version 8 and it's an SPMI + controller with wrapping arbitration logic to allow for multiple on-chip + devices to control up to 4 SPMI separate buses. + + The PMIC Arbiter can also act as an interrupt controller, providing interrupts + to slave devices. + +allOf: + - $ref: /schemas/spmi/qcom,spmi-pmic-arb-common.yaml + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,kaanapali-spmi-pmic-arb + - const: qcom,glymur-spmi-pmic-arb + - enum: + - qcom,glymur-spmi-pmic-arb + + reg: + items: + - description: core registers + - description: tx-channel per virtual slave registers + - description: rx-channel (called observer) per virtual slave registers + - description: channel to PMIC peripheral mapping registers + + reg-names: + items: + - const: core + - const: chnls + - const: obsrvr + - const: chnl_map + + ranges: true + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + +patternProperties: + "^spmi@[a-f0-9]+$": + type: object + $ref: /schemas/spmi/spmi.yaml + unevaluatedProperties: false + + properties: + reg: + items: + - description: configuration registers + - description: interrupt controller registers + - description: channel owner EE mapping registers + + reg-names: + items: + - const: cnfg + - const: intr + - const: chnl_owner + + interrupts: + maxItems: 1 + + interrupt-names: + const: periph_irq + + interrupt-controller: true + + '#interrupt-cells': + const: 4 + description: | + cell 1: slave ID for the requested interrupt (0-15) + cell 2: peripheral ID for requested interrupt (0-255) + cell 3: the requested peripheral interrupt (0-7) + cell 4: interrupt flags indicating level-sense information, + as defined in dt-bindings/interrupt-controller/irq.h + +required: + - compatible + - reg-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + arbiter@c400000 { + compatible = "qcom,glymur-spmi-pmic-arb"; + reg = <0x0 0xc400000 0x0 0x3000>, + <0x0 0xc900000 0x0 0x400000>, + <0x0 0xc4c0000 0x0 0x400000>, + <0x0 0xc403000 0x0 0x8000>; + reg-names = "core", "chnls", "obsrvr", "chnl_map"; + + qcom,ee = <0>; + qcom,channel = <0>; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + spmi@c426000 { + reg = <0x0 0xc426000 0x0 0x4000>, + <0x0 0xc8c0000 0x0 0x10000>, + <0x0 0xc42a000 0x0 0x8000>; + reg-names = "cnfg", "intr", "chnl_owner"; + + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + + #address-cells = <2>; + #size-cells = <0>; + }; + + spmi@c437000 { + reg = <0x0 0xc437000 0x0 0x4000>, + <0x0 0xc8d0000 0x0 0x10000>, + <0x0 0xc43b000 0x0 0x8000>; + reg-names = "cnfg", "intr", "chnl_owner"; + + interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + + #address-cells = <2>; + #size-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-common.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-common.yaml new file mode 100644 index 000000000000..8c38ed145e74 --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-common.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SPMI Controller (common) + +maintainers: + - David Collins <david.collins@oss.qualcomm.com> + +description: | + This defines some common properties used to define Qualcomm SPMI controllers + for PMIC arbiter. + +properties: + qcom,ee: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: + indicates the active Execution Environment identifier + + qcom,channel: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: + which of the PMIC Arb provided channels to use for accesses + +required: + - qcom,ee + - qcom,channel + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml index 51daf1b847a9..d0c683dd5284 100644 --- a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml @@ -19,6 +19,7 @@ description: | allOf: - $ref: spmi.yaml + - $ref: qcom,spmi-pmic-arb-common.yaml properties: compatible: @@ -71,20 +72,6 @@ properties: '#size-cells': true - qcom,ee: - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 5 - description: > - indicates the active Execution Environment identifier - - qcom,channel: - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 5 - description: > - which of the PMIC Arb provided channels to use for accesses - qcom,bus-id: $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 @@ -97,8 +84,6 @@ properties: required: - compatible - reg-names - - qcom,ee - - qcom,channel unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml index 7c3cc20a80d6..08369fdd2161 100644 --- a/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml +++ b/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml @@ -17,6 +17,9 @@ description: | The PMIC Arbiter can also act as an interrupt controller, providing interrupts to slave devices. +allOf: + - $ref: qcom,spmi-pmic-arb-common.yaml + properties: compatible: oneOf: @@ -45,20 +48,6 @@ properties: '#size-cells': const: 2 - qcom,ee: - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 5 - description: > - indicates the active Execution Environment identifier - - qcom,channel: - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 5 - description: > - which of the PMIC Arb provided channels to use for accesses - patternProperties: "^spmi@[a-f0-9]+$": type: object @@ -96,10 +85,8 @@ patternProperties: required: - compatible - reg-names - - qcom,ee - - qcom,channel -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index 7c1337e159f2..c451140962c8 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -34,6 +34,7 @@ properties: - nvidia,tegra186-sysram - nvidia,tegra194-sysram - nvidia,tegra234-sysram + - qcom,kaanapali-imem - qcom,rpm-msg-ram - rockchip,rk3288-pmu-sram @@ -89,6 +90,7 @@ patternProperties: - arm,juno-scp-shmem - arm,scmi-shmem - arm,scp-shmem + - qcom,pil-reloc-info - renesas,smp-sram - rockchip,rk3066-smp-sram - samsung,exynos4210-sysram diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index ce767b1eccf2..81e27e50f905 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -15,8 +15,8 @@ I. For patch submitters "dt-bindings: <binding dir>: ..." - Few subsystems, like ASoC, media, regulators and SPI, expect reverse order - of the prefixes:: + Few subsystems, like ASoC, media, regulators, SCSI, SPI and UFS, expect + reverse order of the prefixes, based on subsystem name:: "<binding dir>: dt-bindings: ..." diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml index 0259cd3ce9c5..975235130670 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -18,6 +18,7 @@ description: | properties: compatible: enum: + - mediatek,mt7987-lvts-ap - mediatek,mt7988-lvts-ap - mediatek,mt8186-lvts - mediatek,mt8188-lvts-ap @@ -26,6 +27,8 @@ properties: - mediatek,mt8192-lvts-mcu - mediatek,mt8195-lvts-ap - mediatek,mt8195-lvts-mcu + - mediatek,mt8196-lvts-ap + - mediatek,mt8196-lvts-mcu reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml index befdc8b7a082..d560c58be4d6 100644 --- a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml @@ -17,10 +17,17 @@ description: properties: compatible: oneOf: - - const: renesas,r9a09g047-tsu # RZ/G3E + - enum: + - renesas,r9a09g047-tsu # RZ/G3E + - renesas,r9a09g077-tsu # RZ/T2H - items: - - const: renesas,r9a09g057-tsu # RZ/V2H + - enum: + - renesas,r9a09g056-tsu # RZ/V2N + - renesas,r9a09g057-tsu # RZ/V2H - const: renesas,r9a09g047-tsu # RZ/G3E + - items: + - const: renesas,r9a09g087-tsu # RZ/N2H + - const: renesas,r9a09g077-tsu # RZ/T2H reg: maxItems: 1 @@ -63,12 +70,31 @@ required: - compatible - reg - clocks - - resets - power-domains - interrupts - interrupt-names - "#thermal-sensor-cells" - - renesas,tsu-trim + +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-tsu + then: + required: + - resets + - renesas,tsu-trim + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-tsu + then: + properties: + resets: false + renesas,tsu-trim: false additionalProperties: false diff --git a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml index fe6bc4173789..0643cfcc6bc7 100644 --- a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml +++ b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml @@ -8,7 +8,7 @@ title: Marvell MMP Timer maintainers: - Daniel Lezcano <daniel.lezcano@linaro.org> - - Thomas Gleixner <tglx@linutronix.de> + - Thomas Gleixner <tglx@kernel.org> - Rob Herring <robh@kernel.org> properties: diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index 0d3b8dc362ba..3bab40500df9 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -33,6 +33,7 @@ properties: - eswin,eic7700-clint # ESWIN EIC7700 - sifive,fu540-c000-clint # SiFive FU540 - spacemit,k1-clint # SpacemiT K1 + - spacemit,k3-clint # SpacemiT K3 - starfive,jh7100-clint # StarFive JH7100 - starfive,jh7110-clint # StarFive JH7110 - starfive,jh8100-clint # StarFive JH8100 diff --git a/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml b/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml index af7720dc4a12..fdd7fd874e01 100644 --- a/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml +++ b/Documentation/devicetree/bindings/tpm/tcg,tpm-tis-i2c.yaml @@ -33,6 +33,7 @@ properties: - infineon,slb9673 - nuvoton,npct75x - st,st33ktpm2xi2c + - st,st33tphf2ei2c - const: tcg,tpm-tis-i2c - description: TPM 1.2 and 2.0 chips with vendor-specific I²C interface diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index d0f7dbf15d6f..a482aeadcd44 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -91,6 +91,8 @@ properties: - delta,ahe50dc-fan # Delta Electronics DPS-650-AB power supply - delta,dps650ab + # Delta Electronics DPS-800-AB power supply + - delta,dps800 # Delta Electronics DPS920AB 920W 54V Power Supply - delta,dps920ab # 1/4 Brick DC/DC Regulated Power Module @@ -123,6 +125,8 @@ properties: - fsl,mma8450 # MPR121: Proximity Capacitive Touch Sensor Controller - fsl,mpr121 + # HiTRON AC/DC CompactPCI Power Supply + - hitron,hac300s # Honeywell Humidicon HIH-6130 humidity/temperature sensor - honeywell,hi6130 # IBM Common Form Factor Power Supply Versions (all versions) @@ -133,10 +137,14 @@ properties: - ibm,cffps2 # IBM On-Chip Controller hwmon device - ibm,p8-occ-hwmon + # Infineon Digital Multi-phase Controller + - infineon,ir35221 # Infineon IR36021 digital POL buck controller - infineon,ir36021 # Infineon IRPS5401 Voltage Regulator (PMIC) - infineon,irps5401 + # Infineon Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller + - infineon,pxe1610 # Infineon Hot-swap controller xdp710 - infineon,xdp710 # Infineon Multi-phase Digital VR Controller xdpe11280 @@ -229,6 +237,10 @@ properties: - meas,tsys01 # MEMSIC magnetometer - memsic,mmc35240 + # MEMSIC 3-axis magnetometer + - memsic,mmc5603 + # MEMSIC 3-axis magnetometer (Support I3C HDR) + - memsic,mmc5633 # MEMSIC 3-axis accelerometer - memsic,mxc4005 # MEMSIC 2-axis 8-bit digital accelerometer @@ -319,6 +331,8 @@ properties: - mps,mp5023 # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5920 - mps,mp5920 + # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5926 + - mps,mp5926 # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5990 - mps,mp5990 # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5998 @@ -414,8 +428,12 @@ properties: - smsc,emc6d103 # Temperature sensor with integrated fan control - smsc,emc6d103s + # Socionext Uniphier SMP control registers + - socionext,uniphier-smpctrl # SparkFun Qwiic Joystick (COM-15168) with i2c interface - sparkfun,qwiic-joystick + # STMicroelectronics Hot-swap controller stef48h28 + - st,stef48h28 # Sierra Wireless mangOH Green SPI IoT interface - swir,mangoh-iotport-spi # Synaptics I2C touchpad diff --git a/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml new file mode 100644 index 000000000000..75fae9f1eba7 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8255P UFS Host Controller + +maintainers: + - Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com> + +properties: + compatible: + const: qcom,sa8255p-ufshc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + iommus: + maxItems: 1 + + dma-coherent: true + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - power-domains + - iommus + - dma-coherent + +allOf: + - $ref: ufs-common.yaml + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + ufshc@1d84000 { + compatible = "qcom,sa8255p-ufshc"; + reg = <0x01d84000 0x3000>; + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; + lanes-per-direction = <2>; + + iommus = <&apps_smmu 0x100 0x0>; + power-domains = <&scmi3_pd 0>; + dma-coherent; + }; diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml index 9f04f34d8c5a..ed97f5682509 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -48,8 +48,8 @@ properties: enum: [1, 2] default: 2 description: - Number of lanes available per direction. Note that it is assume same - number of lanes is used both directions at once. + Number of lanes available per direction. Note that it is assumed that + the same number of lanes are used in both directions at once. vdd-hba-supply: description: diff --git a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml index 7f22f9c031b2..b8bac2cce949 100644 --- a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml +++ b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml @@ -17,8 +17,8 @@ description: |+ Supported number of devices and endpoints vary depending on hardware revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices - and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream - devices and 21 generic endpoints. + and 15 generic endpoints, while AST2600 and AST2700 Virtual Hub supports + 7 downstream devices and 21 generic endpoints. properties: compatible: @@ -26,6 +26,7 @@ properties: - aspeed,ast2400-usb-vhub - aspeed,ast2500-usb-vhub - aspeed,ast2600-usb-vhub + - aspeed,ast2700-usb-vhub reg: maxItems: 1 @@ -33,6 +34,9 @@ properties: clocks: maxItems: 1 + resets: + maxItems: 1 + interrupts: maxItems: 1 @@ -107,6 +111,20 @@ required: - aspeed,vhub-downstream-ports - aspeed,vhub-generic-endpoints +if: + properties: + compatible: + contains: + const: aspeed,ast2700-usb-vhub + +then: + required: + - resets + +else: + properties: + resets: false + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 4e84bead0232..601f097c09a6 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -93,6 +93,8 @@ properties: minItems: 1 maxItems: 2 + dma-coherent: true + interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml index 3ee1586fc8b9..961cbf85eeb5 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -64,6 +64,8 @@ properties: reg: maxItems: 1 + dma-coherent: true + interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml b/Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml new file mode 100644 index 000000000000..95be84c843f5 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/google,lga-dwc3.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2025, Google LLC +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/google,lga-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Tensor Series G5 (Laguna) DWC3 USB SoC Controller + +maintainers: + - Roy Luo <royluo@google.com> + +description: + Describes the DWC3 USB controller block implemented on Google Tensor SoCs, + starting with the G5 generation (laguna). Based on Synopsys DWC3 IP, the + controller features Dual-Role Device single port with hibernation add-on. + +properties: + compatible: + const: google,lga-dwc3 + + reg: + items: + - description: Core DWC3 IP registers. + + interrupts: + items: + - description: Core DWC3 interrupt. + - description: High speed power management event for remote wakeup. + - description: Super speed power management event for remote wakeup. + + interrupt-names: + items: + - const: core + - const: hs_pme + - const: ss_pme + + clocks: + items: + - description: Non-sticky module clock. + - description: Sticky module clock. + + clock-names: + items: + - const: non_sticky + - const: sticky + + resets: + items: + - description: Non-sticky module reset. + - description: Sticky module reset. + - description: DRD bus reset. + - description: Top-level reset. + + reset-names: + items: + - const: non_sticky + - const: sticky + - const: drd_bus + - const: top + + power-domains: + items: + - description: Power switchable domain, the child of top domain. + Turning it on puts the controller into full power state, + turning it off puts the controller into power gated state. + - description: Top domain, the parent of power switchable domain. + Turning it on puts the controller into power gated state, + turning it off completely shuts off the controller. + + power-domain-names: + items: + - const: psw + - const: top + + iommus: + maxItems: 1 + + google,usb-cfg-csr: + description: + A phandle to a syscon node used to access the USB configuration + registers. These registers are the top-level wrapper of the USB + subsystem and provide control and status for the integrated USB + controller and USB PHY. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the syscon node. + - description: USB host controller configuration register offset. + - description: USB custom interrrupts control register offset. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - power-domains + - power-domain-names + - google,usb-cfg-csr + +allOf: + - $ref: snps,dwc3-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb@c400000 { + compatible = "google,lga-dwc3"; + reg = <0 0x0c400000 0 0xd060>; + interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "core", "hs_pme", "ss_pme"; + clocks = <&hsion_usbc_non_sticky_clk>, <&hsion_usbc_sticky_clk>; + clock-names = "non_sticky", "sticky"; + resets = <&hsion_resets_usbc_non_sticky>, <&hsion_resets_usbc_sticky>, + <&hsion_resets_usb_drd_bus>, <&hsion_resets_usb_top>; + reset-names = "non_sticky", "sticky", "drd_bus", "top"; + power-domains = <&hsio_n_usb_psw>, <&hsio_n_usb>; + power-domain-names = "psw", "top"; + phys = <&usb_phy 0>; + phy-names = "usb2-phy"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,gfladj-refclk-lpm-sel-quirk; + snps,incr-burst-type-adjustment = <4>; + google,usb-cfg-csr = <&usb_cfg_csr 0x0 0x20>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/usb/ite,it5205.yaml b/Documentation/devicetree/bindings/usb/ite,it5205.yaml index 889710733de5..045fcb41ac4b 100644 --- a/Documentation/devicetree/bindings/usb/ite,it5205.yaml +++ b/Documentation/devicetree/bindings/usb/ite,it5205.yaml @@ -49,7 +49,7 @@ additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> - i2c2 { + i2c { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml b/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml new file mode 100644 index 000000000000..08113eac74b8 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/microchip,lan9691-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip LAN969x SuperSpeed DWC3 USB SoC controller + +maintainers: + - Robert Marko <robert.marko@sartura.hr> + +select: + properties: + compatible: + contains: + enum: + - microchip,lan9691-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - microchip,lan9691-dwc3 + - const: snps,dwc3 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Gated USB DRD clock + - description: Controller reference clock + + clock-names: + items: + - const: bus_early + - const: ref + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +allOf: + - $ref: snps,dwc3.yaml# + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + usb@300000 { + compatible = "microchip,lan9691-dwc3", "snps,dwc3"; + reg = <0x300000 0x80000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 12>, <&clks 11>; + clock-names = "bus_early", "ref"; + }; diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index a792434c59db..a7f58114c02e 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -406,7 +406,6 @@ allOf: compatible: contains: enum: - - qcom,ipq5018-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8074-dwc3 - qcom,msm8953-dwc3 @@ -428,6 +427,7 @@ allOf: compatible: contains: enum: + - qcom,msm8994-dwc3 - qcom,msm8996-dwc3 - qcom,qcs404-dwc3 - qcom,sdm660-dwc3 @@ -451,6 +451,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 then: properties: @@ -488,7 +489,6 @@ allOf: enum: - qcom,ipq4019-dwc3 - qcom,ipq8064-dwc3 - - qcom,msm8994-dwc3 - qcom,qcs615-dwc3 - qcom,qcs8300-dwc3 - qcom,qdu1000-dwc3 diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml index 8cee7c5582f2..7d784a648b7d 100644 --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -420,7 +420,6 @@ allOf: compatible: contains: enum: - - qcom,ipq5018-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8074-dwc3 - qcom,msm8953-dwc3 @@ -443,6 +442,7 @@ allOf: compatible: contains: enum: + - qcom,msm8994-dwc3 - qcom,msm8996-dwc3 - qcom,qcs404-dwc3 - qcom,sdm660-dwc3 @@ -467,6 +467,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 then: properties: @@ -509,7 +510,6 @@ allOf: - qcom,ipq4019-dwc3 - qcom,ipq8064-dwc3 - qcom,kaanapali-dwc3 - - qcom,msm8994-dwc3 - qcom,qcs615-dwc3 - qcom,qcs8300-dwc3 - qcom,qdu1000-dwc3 diff --git a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml index 0b8b90dd1951..dc74e70f1b92 100644 --- a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml +++ b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml @@ -27,6 +27,7 @@ properties: - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} - renesas,usbhs-r9a07g054 # RZ/V2L - renesas,usbhs-r9a08g045 # RZ/G3S + - renesas,usbhs-r9a09g047 # RZ/G3E - renesas,usbhs-r9a09g056 # RZ/V2N - renesas,usbhs-r9a09g057 # RZ/V2H(P) - const: renesas,rzg2l-usbhs diff --git a/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file mode 100644 index 000000000000..2b253339c199 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller + +maintainers: + - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> + - Masami Hiramatsu <mhiramat@kernel.org> + +select: + properties: + compatible: + contains: + const: socionext,uniphier-dwc3 + required: + - compatible + +properties: + compatible: + items: + - const: socionext,uniphier-dwc3 + - const: snps,dwc3 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: Host or single combined interrupt + - description: Peripheral interrupt + + interrupt-names: + minItems: 1 + items: + - enum: + - dwc_usb3 + - host + - const: peripheral + + clocks: + maxItems: 3 + + clock-names: + items: + - const: ref + - const: bus_early + - const: suspend + + phys: + description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs + minItems: 1 + maxItems: 6 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + +unevaluatedProperties: false + +allOf: + - $ref: snps,dwc3.yaml# + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + usb@65a00000 { + compatible = "socionext,uniphier-dwc3", "snps,dwc3"; + reg = <0x65a00000 0xcd00>; + interrupt-names = "dwc_usb3"; + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "ref", "bus_early", "suspend"; + clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; + resets = <&usb0_rst 15>; + phys = <&usb0_hsphy0>, <&usb0_hsphy1>, + <&usb0_ssphy0>, <&usb0_ssphy1>; + dr_mode = "host"; + }; diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml new file mode 100644 index 000000000000..2fdca14dc1de --- /dev/null +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: WCH CH334/CH335 USB 2.0 Hub Controller + +maintainers: + - Chaoyi Chen <kernel@airkyi.com> + +allOf: + - $ref: usb-hub.yaml# + +properties: + compatible: + enum: + - usb1a86,8091 + + reg: true + + reset-gpios: + description: GPIO controlling the RESET# pin. + + vdd33-supply: + description: + The regulator that provides 3.3V core power to the hub. + + v5-supply: + description: + The regulator that provides 3.3V or 5V power to the hub. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port@': + $ref: /schemas/graph.yaml#/properties/port + + properties: + reg: + minimum: 1 + maximum: 4 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + usb { + #address-cells = <1>; + #size-cells = <0>; + + hub: hub@1 { + compatible = "usb1a86,8091"; + reg = <1>; + reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + v5-supply = <&vcc_3v3>; + vdd33-supply = <&vcc_3v3>; + }; + }; diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index c7591b2aec2a..1ef679f88203 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -86,6 +86,8 @@ patternProperties: description: Aldec, Inc. "^alfa-network,.*": description: ALFA Network Inc. + "^algoltek,.*": + description: AlgolTek, Inc. "^allegro,.*": description: Allegro DVT "^allegromicro,.*": @@ -158,6 +160,8 @@ patternProperties: description: Arctic Sand "^arcx,.*": description: arcx Inc. / Archronix Inc. + "^arduino,.*": + description: Arduino SRL "^argon40,.*": description: Argon 40 Technologies Limited "^ariaboard,.*": @@ -555,6 +559,8 @@ patternProperties: description: Exegin Technologies Limited "^ezchip,.*": description: EZchip Semiconductor + "^ezurio,.*": + description: Ezurio LLC "^facebook,.*": description: Facebook "^fairchild,.*": @@ -701,6 +707,8 @@ patternProperties: description: Hitachi Ltd. "^hitex,.*": description: Hitex Development Tools + "^hitron,.*": + description: HiTRON Electronics Corporation "^holt,.*": description: Holt Integrated Circuits, Inc. "^holtek,.*": @@ -755,6 +763,8 @@ patternProperties: description: IEI Integration Corp. "^ifi,.*": description: Ingenieurburo Fur Ic-Technologie (I/F/I) + "^ifm,.*": + description: ifm electronic gmbh "^ilitek,.*": description: ILI Technology Corporation (ILITEK) "^imagis,.*": @@ -995,6 +1005,8 @@ patternProperties: description: Mustek Limited "^mediatek,.*": description: MediaTek Inc. + "^medion,.*": + description: Medion AG "^megachips,.*": description: MegaChips "^mele,.*": @@ -1361,6 +1373,8 @@ patternProperties: description: Revolution Robotics, Inc. (Revotics) "^rex,.*": description: iMX6 Rex Project + "^rfdigital,.*": + description: RF Digital Corporation "^richtek,.*": description: Richtek Technology Corporation "^ricoh,.*": @@ -1697,6 +1711,8 @@ patternProperties: description: Theobroma Systems Design und Consulting GmbH "^turing,.*": description: Turing Machines, Inc. + "^tuxedo,.*": + description: TUXEDO Computers GmbH "^tyan,.*": description: Tyan Computer Corporation "^tyhx,.*": @@ -1745,6 +1761,8 @@ patternProperties: description: Variscite Ltd. "^vdl,.*": description: Van der Laan b.v. + "^verisilicon,.*": + description: VeriSilicon Microelectronics (Shanghai) Co., Ltd. "^vertexcom,.*": description: Vertexcom Technologies, Inc. "^via,.*": diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt deleted file mode 100644 index a384ff5b3ce8..000000000000 --- a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx) - -Required properties: -- compatible: Shall contain one of the following: - "mpc83xx_wdt" for an mpc83xx - "fsl,mpc8610-wdt" for an mpc86xx - "fsl,mpc823-wdt" for an mpc8xx -- reg: base physical address and length of the area hosting the - watchdog registers. - On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> - On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> - On the 8xx, "General System Interface Unit" area: <0x0 0x10> - -Optional properties: -- reg: additional physical address and length (4) of location of the - Reset Status Register (called RSTRSCR on the mpc86xx) - On the 83xx, it is located at offset 0x910 - On the 86xx, it is located at offset 0xe0094 - On the 8xx, it is located at offset 0x288 - -Example: - WDT: watchdog@0 { - compatible = "fsl,mpc823-wdt"; - reg = <0x0 0x10 0x288 0x4>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml new file mode 100644 index 000000000000..67ad4f1eda8d --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx) + +maintainers: + - J. Neuschäfer <j.ne@posteo.net> + +properties: + compatible: + enum: + - mpc83xx_wdt # for an mpc83xx + - fsl,mpc8610-wdt # for an mpc86xx + - fsl,mpc823-wdt # for an mpc8xx + + device_type: + const: watchdog + + reg: + minItems: 1 + items: + - description: | + Base physical address and length of the area hosting the watchdog + registers. + + On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> + On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> + On the 8xx, "General System Interface Unit" area: <0x0 0x10> + + - description: | + Additional optional physical address and length (4) of location of + the Reset Status Register (called RSTRSCR on the mpc86xx) + + On the 83xx, it is located at offset 0x910 + On the 86xx, it is located at offset 0xe0094 + On the 8xx, it is located at offset 0x288 + +required: + - compatible + - reg + +allOf: + - $ref: watchdog.yaml# + +additionalProperties: false + +examples: + - | + watchdog@0 { + compatible = "fsl,mpc823-wdt"; + reg = <0x0 0x10 0x288 0x4>; + }; + + - | + watchdog@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + device_type = "watchdog"; + }; + +... diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 54f5311ed016..9f861045b71e 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -17,6 +17,7 @@ properties: oneOf: - items: - enum: + - qcom,apss-wdt-glymur - qcom,kpss-wdt-ipq4019 - qcom,apss-wdt-ipq5018 - qcom,apss-wdt-ipq5332 @@ -43,6 +44,7 @@ properties: - qcom,apss-wdt-sm6350 - qcom,apss-wdt-sm8150 - qcom,apss-wdt-sm8250 + - qcom,apss-wdt-x1e80100 - const: qcom,kpss-wdt - const: qcom,kpss-wdt deprecated: true diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml index 53fc64f5b56d..41aee1655b0c 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml @@ -19,7 +19,6 @@ properties: oneOf: - enum: - google,gs101-wdt # for Google gs101 - - samsung,s3c2410-wdt # for S3C2410 - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4 - samsung,exynos5250-wdt # for Exynos5250 - samsung,exynos5420-wdt # for Exynos5420 @@ -49,6 +48,7 @@ properties: samsung,cluster-index: $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] description: Index of CPU cluster on which watchdog is running (in case of Exynos850, Exynos990 or Google gs101). @@ -74,26 +74,31 @@ allOf: contains: enum: - google,gs101-wdt - - samsung,exynos5250-wdt - - samsung,exynos5420-wdt - - samsung,exynos7-wdt - samsung,exynos850-wdt - - samsung,exynos990-wdt - samsung,exynosautov9-wdt - samsung,exynosautov920-wdt then: + properties: + clocks: + items: + - description: Bus clock, used for register interface + - description: Source clock (driving watchdog counter) + clock-names: + items: + - const: watchdog + - const: watchdog_src + samsung,cluster-index: + enum: [0, 1] required: + - samsung,cluster-index - samsung,syscon-phandle + - if: properties: compatible: contains: enum: - - google,gs101-wdt - - samsung,exynos850-wdt - samsung,exynos990-wdt - - samsung,exynosautov9-wdt - - samsung,exynosautov920-wdt then: properties: clocks: @@ -104,11 +109,37 @@ allOf: items: - const: watchdog - const: watchdog_src - samsung,cluster-index: - enum: [0, 1, 2] required: - samsung,cluster-index - else: + - samsung,syscon-phandle + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos5250-wdt + - samsung,exynos5420-wdt + - samsung,exynos7-wdt + then: + properties: + clocks: + items: + - description: Bus clock, which is also a source clock + clock-names: + items: + - const: watchdog + samsung,cluster-index: false + required: + - samsung,syscon-phandle + + - if: + properties: + compatible: + contains: + enum: + - samsung,s3c6410-wdt + then: properties: clocks: items: @@ -117,6 +148,7 @@ allOf: items: - const: watchdog samsung,cluster-index: false + samsung,syscon-phandle: false unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml b/Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml index 14b069599740..fccfc785a077 100644 --- a/Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml @@ -32,6 +32,9 @@ properties: clocks: maxItems: 1 + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 05c34248e544..2ff5b0565a31 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -214,6 +214,10 @@ binding schema. All of the DT binding documents can be validated using the make dt_binding_check +Or to validate a single schema and its example:: + + make sram/sram.yaml + In order to perform validation of DT source files, use the ``dtbs_check`` target:: make dtbs_check @@ -226,10 +230,10 @@ It is possible to run both in a single command:: make dt_binding_check dtbs_check -It is also possible to run checks with a subset of matching schema files by -setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or -patterns (partial match of a fixed string). Each file or pattern should be -separated by ':'. +It is also possible to combine running the above commands with a subset of +matching schema files by setting the ``DT_SCHEMA_FILES`` variable to 1 or more +specific schema files or patterns (partial match of a fixed string). Each file +or pattern should be separated by ':'. :: diff --git a/Documentation/doc-guide/index.rst b/Documentation/doc-guide/index.rst index 24d058faa75c..f078baddf0b7 100644 --- a/Documentation/doc-guide/index.rst +++ b/Documentation/doc-guide/index.rst @@ -13,10 +13,3 @@ How to write kernel documentation contributing maintainer-profile checktransupdate - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/doc-guide/kernel-doc.rst b/Documentation/doc-guide/kernel-doc.rst index fd89a6d56ea9..8d2c09fb36e4 100644 --- a/Documentation/doc-guide/kernel-doc.rst +++ b/Documentation/doc-guide/kernel-doc.rst @@ -54,13 +54,16 @@ Running the ``kernel-doc`` tool with increased verbosity and without actual output generation may be used to verify proper formatting of the documentation comments. For example:: - scripts/kernel-doc -v -none drivers/foo/bar.c + tools/docs/kernel-doc -v -none drivers/foo/bar.c -The documentation format is verified by the kernel build when it is -requested to perform extra gcc checks:: +The documentation format of ``.c`` files is also verified by the kernel build +when it is requested to perform extra gcc checks:: make W=n +However, the above command does not verify header files. These should be checked +separately using ``kernel-doc``. + Function documentation ---------------------- @@ -174,7 +177,8 @@ named ``Return`` (or ``Returns``). Structure, union, and enumeration documentation ----------------------------------------------- -The general format of a struct, union, and enum kernel-doc comment is:: +The general format of a ``struct``, ``union``, and ``enum`` kernel-doc +comment is:: /** * struct struct_name - Brief description. @@ -187,8 +191,8 @@ The general format of a struct, union, and enum kernel-doc comment is:: */ You can replace the ``struct`` in the above example with ``union`` or -``enum`` to describe unions or enums. ``member`` is used to mean struct -and union member names as well as enumerations in an enum. +``enum`` to describe unions or enums. ``member`` is used to mean ``struct`` +and ``union`` member names as well as enumerations in an ``enum``. The brief description following the structure name may span multiple lines, and ends with a member description, a blank comment line, or the @@ -201,7 +205,7 @@ Members of structs, unions and enums should be documented the same way as function parameters; they immediately succeed the short description and may be multi-line. -Inside a struct or union description, you can use the ``private:`` and +Inside a ``struct`` or ``union`` description, you can use the ``private:`` and ``public:`` comment tags. Structure fields that are inside a ``private:`` area are not listed in the generated output documentation. @@ -273,11 +277,11 @@ It is possible to document nested structs and unions, like:: .. note:: - #) When documenting nested structs or unions, if the struct/union ``foo`` - is named, the member ``bar`` inside it should be documented as + #) When documenting nested structs or unions, if the ``struct``/``union`` + ``foo`` is named, the member ``bar`` inside it should be documented as ``@foo.bar:`` - #) When the nested struct/union is anonymous, the member ``bar`` in it - should be documented as ``@bar:`` + #) When the nested ``struct``/``union`` is anonymous, the member ``bar`` in + it should be documented as ``@bar:`` In-line member documentation comments ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -319,7 +323,7 @@ on a line of their own, like all other kernel-doc comments:: Typedef documentation --------------------- -The general format of a typedef kernel-doc comment is:: +The general format of a ``typedef`` kernel-doc comment is:: /** * typedef type_name - Brief description. @@ -341,6 +345,18 @@ Typedefs with function prototypes can also be documented:: */ typedef void (*type_name)(struct v4l2_ctrl *arg1, void *arg2); +Variables documentation +----------------------- + +The general format of a kernel-doc variable comment is:: + + /** + * var var_name - Brief description. + * + * Description of the var_name variable. + */ + extern int var_name; + Object-like macro documentation ------------------------------- @@ -349,7 +365,7 @@ differentiated by whether the macro name is immediately followed by a left parenthesis ('(') for function-like macros or not followed by one for object-like macros. -Function-like macros are handled like functions by ``scripts/kernel-doc``. +Function-like macros are handled like functions by ``tools/docs/kernel-doc``. They may have a parameter list. Object-like macros have do not have a parameter list. @@ -432,8 +448,8 @@ Domain`_ references. Typedef reference. ``&struct_name->member`` or ``&struct_name.member`` - Structure or union member reference. The cross-reference will be to the struct - or union definition, not the member directly. + ``struct`` or ``union`` member reference. The cross-reference will be to the + ``struct`` or ``union`` definition, not the member directly. ``&name`` A generic type reference. Prefer using the full reference described above @@ -462,14 +478,18 @@ through the following syntax:: For further details, please refer to the `Sphinx C Domain`_ documentation. +.. note:: + Variables aren't automatically cross referenced. For those, you need to + explicitly add a C domain cross-reference. + Overview documentation comments ------------------------------- To facilitate having source code and comments close together, you can include kernel-doc documentation blocks that are free-form comments instead of being -kernel-doc for functions, structures, unions, enums, or typedefs. This could be -used for something like a theory of operation for a driver or library code, for -example. +kernel-doc for functions, structures, unions, enums, typedefs or variables. +This could be used for something like a theory of operation for a driver or +library code, for example. This is done by using a ``DOC:`` section keyword with a section title. @@ -537,7 +557,8 @@ identifiers: *[ function/type ...]* Include documentation for each *function* and *type* in *source*. If no *function* is specified, the documentation for all functions and types in the *source* will be included. - *type* can be a struct, union, enum, or typedef identifier. + *type* can be a ``struct``, ``union``, ``enum``, ``typedef`` or ``var`` + identifier. Examples:: @@ -575,8 +596,8 @@ from the source file. The kernel-doc extension is included in the kernel source tree, at ``Documentation/sphinx/kerneldoc.py``. Internally, it uses the -``scripts/kernel-doc`` script to extract the documentation comments from the -source. +``tools/docs/kernel-doc`` script to extract the documentation comments from +the source. .. _kernel_doc: diff --git a/Documentation/driver-api/80211/index.rst b/Documentation/driver-api/80211/index.rst index af210859d3e1..62305e9c3113 100644 --- a/Documentation/driver-api/80211/index.rst +++ b/Documentation/driver-api/80211/index.rst @@ -8,10 +8,3 @@ Linux 802.11 Driver Developer's Guide cfg80211 mac80211 mac80211-advanced - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/acpi/acpi-drivers.rst b/Documentation/driver-api/acpi/acpi-drivers.rst new file mode 100644 index 000000000000..b1fbbddb8b4f --- /dev/null +++ b/Documentation/driver-api/acpi/acpi-drivers.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +========================================= +Why using ACPI drivers is not a good idea +========================================= + +:Copyright: |copy| 2026, Intel Corporation + +:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com> + +Even though binding drivers directly to struct acpi_device objects, also +referred to as "ACPI device nodes", allows basic functionality to be provided +at least in some cases, there are problems with it, related to general +consistency, sysfs layout, power management operation ordering, and code +cleanliness. + +First of all, ACPI device nodes represent firmware entities rather than +hardware and in many cases they provide auxiliary information on devices +enumerated independently (like PCI devices or CPUs). It is therefore generally +questionable to assign resources to them because the entities represented by +them do not decode addresses in the memory or I/O address spaces and do not +generate interrupts or similar (all of that is done by hardware). + +Second, as a general rule, a struct acpi_device can only be a parent of another +struct acpi_device. If that is not the case, the location of the child device +in the device hierarchy is at least confusing and it may not be straightforward +to identify the piece of hardware providing functionality represented by it. +However, binding a driver directly to an ACPI device node may cause that to +happen if the given driver registers input devices or wakeup sources under it, +for example. + +Next, using system suspend and resume callbacks directly on ACPI device nodes +is also questionable because it may cause ordering problems to appear. Namely, +ACPI device nodes are registered before enumerating hardware corresponding to +them and they land on the PM list in front of the majority of other device +objects. Consequently, the execution ordering of their PM callbacks may be +different from what is generally expected. Also, in general, dependencies +returned by _DEP objects do not affect ACPI device nodes themselves, but the +"physical" devices associated with them, which potentially is one more source +of inconsistency related to treating ACPI device nodes as "real" device +representation. + +All of the above means that binding drivers to ACPI device nodes should +generally be avoided and so struct acpi_driver objects should not be used. + +Moreover, a device ID is necessary to bind a driver directly to an ACPI device +node, but device IDs are not generally associated with all of them. Some of +them contain alternative information allowing the corresponding pieces of +hardware to be identified, for example represeted by an _ADR object return +value, and device IDs are not used in those cases. In consequence, confusingly +enough, binding an ACPI driver to an ACPI device node may even be impossible. + +When that happens, the piece of hardware corresponding to the given ACPI device +node is represented by another device object, like a struct pci_dev, and the +ACPI device node is the "ACPI companion" of that device, accessible through its +fwnode pointer used by the ACPI_COMPANION() macro. The ACPI companion holds +additional information on the device configuration and possibly some "recipes" +on device manipulation in the form of AML (ACPI Machine Language) bytecode +provided by the platform firmware. Thus the role of the ACPI device node is +similar to the role of a struct device_node on a system where Device Tree is +used for platform description. + +For consistency, this approach has been extended to the cases in which ACPI +device IDs are used. Namely, in those cases, an additional device object is +created to represent the piece of hardware corresponding to a given ACPI device +node. By default, it is a platform device, but it may also be a PNP device, a +CPU device, or another type of device, depending on what the given piece of +hardware actually is. There are even cases in which multiple devices are +"backed" or "accompanied" by one ACPI device node (e.g. ACPI device nodes +corresponding to GPUs that may provide firmware interfaces for backlight +brightness control in addition to GPU configuration information). + +This means that it really should never be necessary to bind a driver directly to +an ACPI device node because there is a "proper" device object representing the +corresponding piece of hardware that can be bound to by a "proper" driver using +the given ACPI device node as the device's ACPI companion. Thus, in principle, +there is no reason to use ACPI drivers and if they all were replaced with other +driver types (for example, platform drivers), some code could be dropped and +some complexity would go away. diff --git a/Documentation/driver-api/acpi/index.rst b/Documentation/driver-api/acpi/index.rst index ace0008e54c2..2b10d83f9994 100644 --- a/Documentation/driver-api/acpi/index.rst +++ b/Documentation/driver-api/acpi/index.rst @@ -7,3 +7,4 @@ ACPI Support linuxized-acpica scan_handlers + acpi-drivers diff --git a/Documentation/driver-api/basics.rst b/Documentation/driver-api/basics.rst index 5e9f7aee71a7..8b6a5888cb11 100644 --- a/Documentation/driver-api/basics.rst +++ b/Documentation/driver-api/basics.rst @@ -114,10 +114,25 @@ Kernel objects manipulation Kernel utility functions ------------------------ -.. kernel-doc:: include/linux/kernel.h +.. kernel-doc:: include/linux/array_size.h + :internal: + +.. kernel-doc:: include/linux/container_of.h + :internal: + +.. kernel-doc:: include/linux/kstrtox.h :internal: :no-identifiers: kstrtol kstrtoul +.. kernel-doc:: include/linux/stddef.h + :internal: + +.. kernel-doc:: include/linux/util_macros.h + :internal: + +.. kernel-doc:: include/linux/wordpart.h + :internal: + .. kernel-doc:: kernel/printk/printk.c :export: :no-identifiers: printk diff --git a/Documentation/driver-api/coco/index.rst b/Documentation/driver-api/coco/index.rst index af9f08ca0cfd..783c8b033547 100644 --- a/Documentation/driver-api/coco/index.rst +++ b/Documentation/driver-api/coco/index.rst @@ -8,5 +8,3 @@ Confidential Computing :maxdepth: 1 measurement-registers - -.. only:: subproject and html diff --git a/Documentation/driver-api/crypto/iaa/index.rst b/Documentation/driver-api/crypto/iaa/index.rst index aa6837e27264..463f7da569c5 100644 --- a/Documentation/driver-api/crypto/iaa/index.rst +++ b/Documentation/driver-api/crypto/iaa/index.rst @@ -11,10 +11,3 @@ API. :maxdepth: 1 iaa-crypto - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/crypto/index.rst b/Documentation/driver-api/crypto/index.rst index fb9709b98bea..bba669014cb2 100644 --- a/Documentation/driver-api/crypto/index.rst +++ b/Documentation/driver-api/crypto/index.rst @@ -11,10 +11,3 @@ configuration. :maxdepth: 1 iaa/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/cxl/conventions.rst b/Documentation/driver-api/cxl/conventions.rst index e37336d7b116..0d2e07279ad9 100644 --- a/Documentation/driver-api/cxl/conventions.rst +++ b/Documentation/driver-api/cxl/conventions.rst @@ -1,9 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 -.. include:: <isonum.txt> -======================================= Compute Express Link: Linux Conventions -======================================= +####################################### There exists shipping platforms that bend or break CXL specification expectations. Record the details and the rationale for those deviations. @@ -11,172 +9,10 @@ Borrow the ACPI Code First template format to capture the assumptions and tradeoffs such that multiple platform implementations can follow the same convention. -<(template) Title> -================== +.. toctree:: + :maxdepth: 1 + :caption: Contents -Document --------- -CXL Revision <rev>, Version <ver> - -License -------- -SPDX-License Identifier: CC-BY-4.0 - -Creator/Contributors --------------------- - -Summary of the Change ---------------------- - -<Detail the conflict with the specification and where available the -assumptions and tradeoffs taken by the hardware platform.> - - -Benefits of the Change ----------------------- - -<Detail what happens if platforms and Linux do not adopt this -convention.> - -References ----------- - -Detailed Description of the Change ----------------------------------- - -<Propose spec language that corrects the conflict.> - - -Resolve conflict between CFMWS, Platform Memory Holes, and Endpoint Decoders -============================================================================ - -Document --------- - -CXL Revision 3.2, Version 1.0 - -License -------- - -SPDX-License Identifier: CC-BY-4.0 - -Creator/Contributors --------------------- - -- Fabio M. De Francesco, Intel -- Dan J. Williams, Intel -- Mahesh Natu, Intel - -Summary of the Change ---------------------- - -According to the current Compute Express Link (CXL) Specifications (Revision -3.2, Version 1.0), the CXL Fixed Memory Window Structure (CFMWS) describes zero -or more Host Physical Address (HPA) windows associated with each CXL Host -Bridge. Each window represents a contiguous HPA range that may be interleaved -across one or more targets, including CXL Host Bridges. Each window has a set -of restrictions that govern its usage. It is the Operating System-directed -configuration and Power Management (OSPM) responsibility to utilize each window -for the specified use. - -Table 9-22 of the current CXL Specifications states that the Window Size field -contains the total number of consecutive bytes of HPA this window describes. -This value must be a multiple of the Number of Interleave Ways (NIW) * 256 MB. - -Platform Firmware (BIOS) might reserve physical addresses below 4 GB where a -memory gap such as the Low Memory Hole for PCIe MMIO may exist. In such cases, -the CFMWS Range Size may not adhere to the NIW * 256 MB rule. - -The HPA represents the actual physical memory address space that the CXL devices -can decode and respond to, while the System Physical Address (SPA), a related -but distinct concept, represents the system-visible address space that users can -direct transaction to and so it excludes reserved regions. - -BIOS publishes CFMWS to communicate the active SPA ranges that, on platforms -with LMH's, map to a strict subset of the HPA. The SPA range trims out the hole, -resulting in lost capacity in the Endpoints with no SPA to map to that part of -the HPA range that intersects the hole. - -E.g, an x86 platform with two CFMWS and an LMH starting at 2 GB: - - +--------+------------+-------------------+------------------+-------------------+------+ - | Window | CFMWS Base | CFMWS Size | HDM Decoder Base | HDM Decoder Size | Ways | - +========+============+===================+==================+===================+======+ - | â€0 | 0 GB | 2 GB | 0 GB | 3 GB | 12 | - +--------+------------+-------------------+------------------+-------------------+------+ - | â€1 | 4 GB | NIW*256MB Aligned | 4 GB | NIW*256MB Aligned | 12 | - +--------+------------+-------------------+------------------+-------------------+------+ - -HDM decoder base and HDM decoder size represent all the 12 Endpoint Decoders of -a 12 ways region and all the intermediate Switch Decoders. They are configured -by the BIOS according to the NIW * 256MB rule, resulting in a HPA range size of -3GB. Instead, the CFMWS Base and CFMWS Size are used to configure the Root -Decoder HPA range that results smaller (2GB) than that of the Switch and -Endpoint Decoders in the hierarchy (3GB). - -This creates 2 issues which lead to a failure to construct a region: - -1) A mismatch in region size between root and any HDM decoder. The root decoders - will always be smaller due to the trim. - -2) The trim causes the root decoder to violate the (NIW * 256MB) rule. - -This change allows a region with a base address of 0GB to bypass these checks to -allow for region creation with the trimmed root decoder address range. - -This change does not allow for any other arbitrary region to violate these -checks - it is intended exclusively to enable x86 platforms which map CXL memory -under 4GB. - -Despite the HDM decoders covering the PCIE hole HPA region, it is expected that -the platform will never route address accesses to the CXL complex because the -root decoder only covers the trimmed region (which excludes this). This is -outside the ability of Linux to enforce. - -On the example platform, only the first 2GB will be potentially usable, but -Linux, aiming to adhere to the current specifications, fails to construct -Regions and attach Endpoint and intermediate Switch Decoders to them. - -There are several points of failure that due to the expectation that the Root -Decoder HPA size, that is equal to the CFMWS from which it is configured, has -to be greater or equal to the matching Switch and Endpoint HDM Decoders. - -In order to succeed with construction and attachment, Linux must construct a -Region with Root Decoder HPA range size, and then attach to that all the -intermediate Switch Decoders and Endpoint Decoders that belong to the hierarchy -regardless of their range sizes. - -Benefits of the Change ----------------------- - -Without the change, the OSPM wouldn't match intermediate Switch and Endpoint -Decoders with Root Decoders configured with CFMWS HPA sizes that don't align -with the NIW * 256MB constraint, and so it leads to lost memdev capacity. - -This change allows the OSPM to construct Regions and attach intermediate Switch -and Endpoint Decoders to them, so that the addressable part of the memory -devices total capacity is made available to the users. - -References ----------- - -Compute Express Link Specification Revision 3.2, Version 1.0 -<https://www.computeexpresslink.org/> - -Detailed Description of the Change ----------------------------------- - -The description of the Window Size field in table 9-22 needs to account for -platforms with Low Memory Holes, where SPA ranges might be subsets of the -endpoints HPA. Therefore, it has to be changed to the following: - -"The total number of consecutive bytes of HPA this window represents. This value -shall be a multiple of NIW * 256 MB. - -On platforms that reserve physical addresses below 4 GB, such as the Low Memory -Hole for PCIe MMIO on x86, an instance of CFMWS whose Base HPA range is 0 might -have a size that doesn't align with the NIW * 256 MB constraint. - -Note that the matching intermediate Switch Decoders and the Endpoint Decoders -HPA range sizes must still align to the above-mentioned rule, but the memory -capacity that exceeds the CFMWS window size won't be accessible.". + conventions/cxl-lmh.rst + conventions/cxl-atl.rst + conventions/template.rst diff --git a/Documentation/driver-api/cxl/conventions/cxl-atl.rst b/Documentation/driver-api/cxl/conventions/cxl-atl.rst new file mode 100644 index 000000000000..3a36a84743d0 --- /dev/null +++ b/Documentation/driver-api/cxl/conventions/cxl-atl.rst @@ -0,0 +1,304 @@ +.. SPDX-License-Identifier: GPL-2.0 + +ACPI PRM CXL Address Translation +================================ + +Document +-------- + +CXL Revision 3.2, Version 1.0 + +License +------- + +SPDX-License Identifier: CC-BY-4.0 + +Creator/Contributors +-------------------- + +- Robert Richter, AMD et al. + +Summary of the Change +--------------------- + +The CXL Fixed Memory Window Structures (CFMWS) describe zero or more Host +Physical Address (HPA) windows associated with one or more CXL Host Bridges. +Each HPA range of a CXL Host Bridge is represented by a CFMWS entry. An HPA +range may include addresses currently assigned to CXL.mem devices, or an OS may +assign ranges from an address window to a device. + +Host-managed Device Memory is Device-attached memory that is mapped to system +coherent address space and accessible to the Host using standard write-back +semantics. The managed address range is configured in the CXL HDM Decoder +registers of the device. An HDM Decoder in a device is responsible for +converting HPA into DPA by stripping off specific address bits. + +CXL devices and CXL bridges use the same HPA space. It is common across all +components that belong to the same host domain. The view of the address region +must be consistent on the CXL.mem path between the Host and the Device. + +This is described in the *CXL 3.2 specification* (Table 1-1, 3.3.1, +8.2.4.20, 9.13.1, 9.18.1.3). [#cxl-spec-3.2]_ + +Depending on the interconnect architecture of the platform, components attached +to a host may not share the same host physical address space. Those platforms +need address translation to convert an HPA between the host and the attached +component, such as a CXL device. The translation mechanism is host-specific and +implementation dependent. + +For example, x86 AMD platforms use a Data Fabric that manages access to physical +memory. Devices have their own memory space and can be configured to use +'Normalized addresses' different from System Physical Addresses (SPA). Address +translation is then needed. For details, see +:doc:`x86 AMD Address Translation </admin-guide/RAS/address-translation>`. + +Those AMD platforms provide PRM [#prm-spec]_ handlers in firmware to perform +various types of address translation, including for CXL endpoints. AMD Zen5 +systems implement the ACPI PRM CXL Address Translation firmware call. The ACPI +PRM handler has a specific GUID to uniquely identify platforms with support for +Normalized addressing. This is documented in the *ACPI v6.5 Porting Guide* +(Address Translation - CXL DPA to System Physical Address). [#amd-ppr-58088]_ + +When in Normalized address mode, HDM decoder address ranges must be configured +and handled differently. Hardware addresses used in the HDM decoder +configurations of an endpoint are not SPA and need to be translated from the +address range of the endpoint to that of the CXL host bridge. This is especially +important for finding an endpoint's associated CXL Host Bridge and HPA window +described in the CFMWS. Additionally, the interleave decoding is done by the +Data Fabric and the endpoint does not perform decoding when converting HPA to +DPA. Instead, interleaving is switched off for the endpoint (1-way). Finally, +address translation might also be needed to inspect the endpoint's hardware +addresses, such as during profiling, tracing, or error handling. + +For example, with Normalized addressing the HDM decoders could look as follows:: + + ------------------------------- + | Root Decoder (CFMWS) | + | SPA Range: 0x850000000 | + | Size: 0x8000000000 (512 GB) | + | Interleave Ways: 1 | + ------------------------------- + | + v + ------------------------------- + | Host Bridge Decoder (HDM) | + | SPA Range: 0x850000000 | + | Size: 0x8000000000 (512 GB) | + | Interleave Ways: 4 | + | Targets: endpoint5,8,11,13 | + | Granularity: 256 | + ------------------------------- + | + -----------------------------+------------------------------ + | | | | + v v v v + ------------------- ------------------- ------------------- ------------------- + | endpoint5 | | endpoint8 | | endpoint11 | | endpoint13 | + | decoder5.0 | | decoder8.0 | | decoder11.0 | | decoder13.0 | + | PCIe: | | PCIe: | | PCIe: | | PCIe: | + | 0000:e2:00.0 | | 0000:e3:00.0 | | 0000:e4:00.0 | | 0000:e1:00.0 | + | DPA: | | DPA: | | DPA: | | DPA: | + | Start: 0x0 | | Start: 0x0 | | Start: 0x0 | | Start: 0x0 | + | Size: | | Size: | | Size: | | Size: | + | 0x2000000000 | | 0x2000000000 | | 0x2000000000 | | 0x2000000000 | + | (128 GB) | | (128 GB) | | (128 GB) | | (128 GB) | + | Interleaving: | | Interleaving: | | Interleaving: | | Interleaving: | + | Ways: 1 | | Ways: 1 | | Ways: 1 | | Ways: 1 | + | Gran: 256 | | Gran: 256 | | Gran: 256 | | Gran: 256 | + ------------------- ------------------- ------------------- ------------------- + | | | | + v v v v + DPA DPA DPA DPA + +This shows the representation in sysfs: + +.. code-block:: none + + /sys/bus/cxl/devices/endpoint5/decoder5.0/interleave_granularity:256 + /sys/bus/cxl/devices/endpoint5/decoder5.0/interleave_ways:1 + /sys/bus/cxl/devices/endpoint5/decoder5.0/size:0x2000000000 + /sys/bus/cxl/devices/endpoint5/decoder5.0/start:0x0 + /sys/bus/cxl/devices/endpoint8/decoder8.0/interleave_granularity:256 + /sys/bus/cxl/devices/endpoint8/decoder8.0/interleave_ways:1 + /sys/bus/cxl/devices/endpoint8/decoder8.0/size:0x2000000000 + /sys/bus/cxl/devices/endpoint8/decoder8.0/start:0x0 + /sys/bus/cxl/devices/endpoint11/decoder11.0/interleave_granularity:256 + /sys/bus/cxl/devices/endpoint11/decoder11.0/interleave_ways:1 + /sys/bus/cxl/devices/endpoint11/decoder11.0/size:0x2000000000 + /sys/bus/cxl/devices/endpoint11/decoder11.0/start:0x0 + /sys/bus/cxl/devices/endpoint13/decoder13.0/interleave_granularity:256 + /sys/bus/cxl/devices/endpoint13/decoder13.0/interleave_ways:1 + /sys/bus/cxl/devices/endpoint13/decoder13.0/size:0x2000000000 + /sys/bus/cxl/devices/endpoint13/decoder13.0/start:0x0 + +Note that the endpoint interleaving configurations use direct mapping (1-way). + +With PRM calls, the kernel can determine the following mappings: + +.. code-block:: none + + cxl decoder5.0: address mapping found for 0000:e2:00.0 (hpa -> spa): + 0x0+0x2000000000 -> 0x850000000+0x8000000000 ways:4 granularity:256 + cxl decoder8.0: address mapping found for 0000:e3:00.0 (hpa -> spa): + 0x0+0x2000000000 -> 0x850000000+0x8000000000 ways:4 granularity:256 + cxl decoder11.0: address mapping found for 0000:e4:00.0 (hpa -> spa): + 0x0+0x2000000000 -> 0x850000000+0x8000000000 ways:4 granularity:256 + cxl decoder13.0: address mapping found for 0000:e1:00.0 (hpa -> spa): + 0x0+0x2000000000 -> 0x850000000+0x8000000000 ways:4 granularity:256 + +The corresponding CXL host bridge (HDM) decoders and root decoder (CFMWS) match +the calculated endpoint mappings shown: + +.. code-block:: none + + /sys/bus/cxl/devices/port1/decoder1.0/interleave_granularity:256 + /sys/bus/cxl/devices/port1/decoder1.0/interleave_ways:4 + /sys/bus/cxl/devices/port1/decoder1.0/size:0x8000000000 + /sys/bus/cxl/devices/port1/decoder1.0/start:0x850000000 + /sys/bus/cxl/devices/port1/decoder1.0/target_list:0,1,2,3 + /sys/bus/cxl/devices/port1/decoder1.0/target_type:expander + /sys/bus/cxl/devices/root0/decoder0.0/interleave_granularity:256 + /sys/bus/cxl/devices/root0/decoder0.0/interleave_ways:1 + /sys/bus/cxl/devices/root0/decoder0.0/size:0x8000000000 + /sys/bus/cxl/devices/root0/decoder0.0/start:0x850000000 + /sys/bus/cxl/devices/root0/decoder0.0/target_list:7 + +The following changes to the specification are needed: + +* Allow a CXL device to be in an HPA space other than the host's address space. + +* Allow the platform to use implementation-specific address translation when + crossing memory domains on the CXL.mem path between the host and the device. + +* Define a PRM handler method for converting device addresses to SPAs. + +* Specify that the platform shall provide the PRM handler method to the + Operating System to detect Normalized addressing and for determining Endpoint + SPA ranges and interleaving configurations. + +* Add reference to: + + | Platform Runtime Mechanism Specification, Version 1.1 – November 2020 + | https://uefi.org/sites/default/files/resources/PRM_Platform_Runtime_Mechanism_1_1_release_candidate.pdf + +Benefits of the Change +---------------------- + +Without the change, the Operating System may be unable to determine the memory +region and Root Decoder for an Endpoint and its corresponding HDM decoder. +Region creation would fail. Platforms with a different interconnect architecture +would fail to set up and use CXL. + +References +---------- + +.. [#cxl-spec-3.2] Compute Express Link Specification, Revision 3.2, Version 1.0, + https://www.computeexpresslink.org/ + +.. [#amd-ppr-58088] AMD Family 1Ah Models 00h–0Fh and Models 10h–1Fh, + ACPI v6.5 Porting Guide, Publication # 58088, + https://www.amd.com/en/search/documentation/hub.html + +.. [#prm-spec] Platform Runtime Mechanism, Version: 1.1, + https://uefi.org/sites/default/files/resources/PRM_Platform_Runtime_Mechanism_1_1_release_candidate.pdf + +Detailed Description of the Change +---------------------------------- + +The following describes the necessary changes to the *CXL 3.2 specification* +[#cxl-spec-3.2]_: + +Add the following reference to the table: + +Table 1-2. Reference Documents + ++----------------------------+-------------------+---------------------------+ +| Document | Chapter Reference | Document No./Location | ++============================+===================+===========================+ +| Platform Runtime Mechanism | Chapter 8, 9 | https://www.uefi.org/acpi | +| Version: 1.1 | | | ++----------------------------+-------------------+---------------------------+ + +Add the following paragraphs to the end of the section: + +**8.2.4.20 CXL HDM Decoder Capability Structure** + +"A device may use an HPA space that is not common to other components of the +host domain. The platform is responsible for address translation when crossing +HPA spaces. The Operating System must determine the interleaving configuration +and perform address translation to the HPA ranges of the HDM decoders as needed. +The translation mechanism is host-specific and implementation dependent. + +The platform indicates support of independent HPA spaces and the need for +address translation by providing a Platform Runtime Mechanism (PRM) handler. The +OS shall use that handler to perform the necessary translations from the DPA +space to the HPA space. The handler is defined in Section 9.18.4 *PRM Handler +for CXL DPA to System Physical Address Translation*." + +Add the following section and sub-section including tables: + +**9.18.4 PRM Handler for CXL DPA to System Physical Address Translation** + +"A platform may be configured to use 'Normalized addresses'. Host physical +address (HPA) spaces are component-specific and differ from system physical +addresses (SPAs). The endpoint has its own physical address space. All requests +presented to the device already use Device Physical Addresses (DPAs). The CXL +endpoint decoders have interleaving disabled (1-way interleaving) and the device +does not perform HPA decoding to determine a DPA. + +The platform provides a PRM handler for CXL DPA to System Physical Address +Translation. The PRM handler translates a Device Physical Address (DPA) to a +System Physical Address (SPA) for a specified CXL endpoint. In the address space +of the host, SPA and HPA are equivalent, and the OS shall use this handler to +determine the HPA that corresponds to a device address, for example when +configuring HDM decoders on platforms with Normalized addressing. The GUID and +the parameter buffer format of the handler are specified in section 9.18.4.1. If +the OS identifies the PRM handler, the platform supports Normalized addressing +and the OS must perform DPA address translation as needed." + +**9.18.4.1 PRM Handler Invocation** + +"The OS calls the PRM handler for CXL DPA to System Physical Address Translation +using the direct invocation mechanism. Details of calling a PRM handler are +described in the Platform Runtime Mechanism (PRM) specification. + +The PRM handler is identified by the following GUID: + + EE41B397-25D4-452C-AD54-48C6E3480B94 + +The caller allocates and prepares a Parameter Buffer, then passes the PRM +handler GUID and a pointer to the Parameter Buffer to invoke the handler. The +Parameter Buffer is described in Table 9-32." + +**Table 9-32. PRM Parameter Buffer used for CXL DPA to System Physical Address Translation** + ++-------------+-----------+------------------------------------------------------------------------+ +| Byte Offset | Length in | Description | +| | Bytes | | ++=============+===========+========================================================================+ +| 00h | 8 | **CXL Device Physical Address (DPA)**: CXL DPA (e.g., from | +| | | CXL Component Event Log) | ++-------------+-----------+------------------------------------------------------------------------+ +| 08h | 4 | **CXL Endpoint SBDF**: | +| | | | +| | | - Byte 3 - PCIe Segment | +| | | - Byte 2 - Bus Number | +| | | - Byte 1: | +| | | - Device Number Bits[7:3] | +| | | - Function Number Bits[2:0] | +| | | - Byte 0 - RESERVED (MBZ) | +| | | | ++-------------+-----------+------------------------------------------------------------------------+ +| 0Ch | 8 | **Output Buffer**: Virtual Address Pointer to the buffer, | +| | | as defined in Table 9-33. | ++-------------+-----------+------------------------------------------------------------------------+ + +**Table 9-33. PRM Output Buffer used for CXL DPA to System Physical Address Translation** + ++-------------+-----------+------------------------------------------------------------------------+ +| Byte Offset | Length in | Description | +| | Bytes | | ++=============+===========+========================================================================+ +| 00h | 8 | **System Physical Address (SPA)**: The SPA converted | +| | | from the CXL DPA. | ++-------------+-----------+------------------------------------------------------------------------+ diff --git a/Documentation/driver-api/cxl/conventions/cxl-lmh.rst b/Documentation/driver-api/cxl/conventions/cxl-lmh.rst new file mode 100644 index 000000000000..baece5c35345 --- /dev/null +++ b/Documentation/driver-api/cxl/conventions/cxl-lmh.rst @@ -0,0 +1,135 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Resolve conflict between CFMWS, Platform Memory Holes, and Endpoint Decoders +============================================================================ + +Document +-------- + +CXL Revision 3.2, Version 1.0 + +License +------- + +SPDX-License Identifier: CC-BY-4.0 + +Creator/Contributors +-------------------- + +- Fabio M. De Francesco, Intel +- Dan J. Williams, Intel +- Mahesh Natu, Intel + +Summary of the Change +--------------------- + +According to the current Compute Express Link (CXL) Specifications (Revision +3.2, Version 1.0), the CXL Fixed Memory Window Structure (CFMWS) describes zero +or more Host Physical Address (HPA) windows associated with each CXL Host +Bridge. Each window represents a contiguous HPA range that may be interleaved +across one or more targets, including CXL Host Bridges. Each window has a set +of restrictions that govern its usage. It is the Operating System-directed +configuration and Power Management (OSPM) responsibility to utilize each window +for the specified use. + +Table 9-22 of the current CXL Specifications states that the Window Size field +contains the total number of consecutive bytes of HPA this window describes. +This value must be a multiple of the Number of Interleave Ways (NIW) * 256 MB. + +Platform Firmware (BIOS) might reserve physical addresses below 4 GB where a +memory gap such as the Low Memory Hole for PCIe MMIO may exist. In such cases, +the CFMWS Range Size may not adhere to the NIW * 256 MB rule. + +The HPA represents the actual physical memory address space that the CXL devices +can decode and respond to, while the System Physical Address (SPA), a related +but distinct concept, represents the system-visible address space that users can +direct transaction to and so it excludes reserved regions. + +BIOS publishes CFMWS to communicate the active SPA ranges that, on platforms +with LMH's, map to a strict subset of the HPA. The SPA range trims out the hole, +resulting in lost capacity in the Endpoints with no SPA to map to that part of +the HPA range that intersects the hole. + +E.g, an x86 platform with two CFMWS and an LMH starting at 2 GB: + + +--------+------------+-------------------+------------------+-------------------+------+ + | Window | CFMWS Base | CFMWS Size | HDM Decoder Base | HDM Decoder Size | Ways | + +========+============+===================+==================+===================+======+ + | â€0 | 0 GB | 2 GB | 0 GB | 3 GB | 12 | + +--------+------------+-------------------+------------------+-------------------+------+ + | â€1 | 4 GB | NIW*256MB Aligned | 4 GB | NIW*256MB Aligned | 12 | + +--------+------------+-------------------+------------------+-------------------+------+ + +HDM decoder base and HDM decoder size represent all the 12 Endpoint Decoders of +a 12 ways region and all the intermediate Switch Decoders. They are configured +by the BIOS according to the NIW * 256MB rule, resulting in a HPA range size of +3GB. Instead, the CFMWS Base and CFMWS Size are used to configure the Root +Decoder HPA range that results smaller (2GB) than that of the Switch and +Endpoint Decoders in the hierarchy (3GB). + +This creates 2 issues which lead to a failure to construct a region: + +1) A mismatch in region size between root and any HDM decoder. The root decoders + will always be smaller due to the trim. + +2) The trim causes the root decoder to violate the (NIW * 256MB) rule. + +This change allows a region with a base address of 0GB to bypass these checks to +allow for region creation with the trimmed root decoder address range. + +This change does not allow for any other arbitrary region to violate these +checks - it is intended exclusively to enable x86 platforms which map CXL memory +under 4GB. + +Despite the HDM decoders covering the PCIE hole HPA region, it is expected that +the platform will never route address accesses to the CXL complex because the +root decoder only covers the trimmed region (which excludes this). This is +outside the ability of Linux to enforce. + +On the example platform, only the first 2GB will be potentially usable, but +Linux, aiming to adhere to the current specifications, fails to construct +Regions and attach Endpoint and intermediate Switch Decoders to them. + +There are several points of failure that due to the expectation that the Root +Decoder HPA size, that is equal to the CFMWS from which it is configured, has +to be greater or equal to the matching Switch and Endpoint HDM Decoders. + +In order to succeed with construction and attachment, Linux must construct a +Region with Root Decoder HPA range size, and then attach to that all the +intermediate Switch Decoders and Endpoint Decoders that belong to the hierarchy +regardless of their range sizes. + +Benefits of the Change +---------------------- + +Without the change, the OSPM wouldn't match intermediate Switch and Endpoint +Decoders with Root Decoders configured with CFMWS HPA sizes that don't align +with the NIW * 256MB constraint, and so it leads to lost memdev capacity. + +This change allows the OSPM to construct Regions and attach intermediate Switch +and Endpoint Decoders to them, so that the addressable part of the memory +devices total capacity is made available to the users. + +References +---------- + +Compute Express Link Specification Revision 3.2, Version 1.0 +<https://www.computeexpresslink.org/> + +Detailed Description of the Change +---------------------------------- + +The description of the Window Size field in table 9-22 needs to account for +platforms with Low Memory Holes, where SPA ranges might be subsets of the +endpoints HPA. Therefore, it has to be changed to the following: + +"The total number of consecutive bytes of HPA this window represents. This value +shall be a multiple of NIW * 256 MB. + +On platforms that reserve physical addresses below 4 GB, such as the Low Memory +Hole for PCIe MMIO on x86, an instance of CFMWS whose Base HPA range is 0 might +have a size that doesn't align with the NIW * 256 MB constraint. + +Note that the matching intermediate Switch Decoders and the Endpoint Decoders +HPA range sizes must still align to the above-mentioned rule, but the memory +capacity that exceeds the CFMWS window size won't be accessible.". diff --git a/Documentation/driver-api/cxl/conventions/template.rst b/Documentation/driver-api/cxl/conventions/template.rst new file mode 100644 index 000000000000..ff2fcf1b5e24 --- /dev/null +++ b/Documentation/driver-api/cxl/conventions/template.rst @@ -0,0 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. :: Template Title here: + +Template File +============= + +Document +-------- +CXL Revision <rev>, Version <ver> + +License +------- +SPDX-License Identifier: CC-BY-4.0 + +Creator/Contributors +-------------------- + +Summary of the Change +--------------------- + +<Detail the conflict with the specification and where available the +assumptions and tradeoffs taken by the hardware platform.> + +Benefits of the Change +---------------------- + +<Detail what happens if platforms and Linux do not adopt this +convention.> + +References +---------- + +Detailed Description of the Change +---------------------------------- + +<Propose spec language that corrects the conflict.> diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index c1106a68b67c..3dfae1d310ca 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -30,6 +30,7 @@ that have impacts on each other. The docs here break up configurations steps. platform/acpi platform/cdat platform/example-configs + platform/device-hotplug .. toctree:: :maxdepth: 2 @@ -50,5 +51,3 @@ that have impacts on each other. The docs here break up configurations steps. allocation/page-allocator allocation/reclaim allocation/hugepages.rst - -.. only:: subproject and html diff --git a/Documentation/driver-api/cxl/linux/early-boot.rst b/Documentation/driver-api/cxl/linux/early-boot.rst index a7fc6fc85fbe..414481f33819 100644 --- a/Documentation/driver-api/cxl/linux/early-boot.rst +++ b/Documentation/driver-api/cxl/linux/early-boot.rst @@ -125,7 +125,7 @@ The contiguous memory allocator (CMA) enables reservation of contiguous memory regions on NUMA nodes during early boot. However, CMA cannot reserve memory on NUMA nodes that are not online during early boot. :: - void __init hugetlb_cma_reserve(int order) { + void __init hugetlb_cma_reserve(void) { if (!node_online(nid)) /* do not allow reservations */ } diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst index a9aa0ccd92af..a4b44c018f09 100644 --- a/Documentation/driver-api/cxl/platform/bios-and-efi.rst +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst @@ -29,6 +29,29 @@ at :doc:`ACPI Tables <acpi>`. on physical memory region size and alignment, memory holes, HDM interleave, and what linux expects of HDM decoders trying to work with these features. + +Linux Expectations of BIOS/EFI Software +======================================= +Linux expects BIOS/EFI software to construct sufficient ACPI tables (such as +CEDT, SRAT, HMAT, etc) and platform-specific configurations (such as HPA spaces +and host-bridge interleave configurations) to allow the Linux driver to +subsequently configure the devices in the CXL fabric at runtime. + +Programming of HDM decoders and switch ports is not required, and may be +deferred to the CXL driver based on admin policy (e.g. udev rules). + +Some platforms may require pre-programming HDM decoders and locking them +due to quirks (see: Zen5 address translation), but this is not the normal, +"expected" configuration path. This should be avoided if possible. + +Some platforms may wish to pre-configure these resources to bring memory +up without requiring CXL driver support. These platform vendors should +test their configurations with the existing CXL driver and provide driver +support for their auto-configurations if features like RAS are required. + +Platforms requiring boot-time programming and/or locking of CXL fabric +components may prevent features, such as device hot-plug, from working. + UEFI Settings ============= If your platform supports it, the :code:`uefisettings` command can be used to diff --git a/Documentation/driver-api/cxl/platform/device-hotplug.rst b/Documentation/driver-api/cxl/platform/device-hotplug.rst new file mode 100644 index 000000000000..e4a065fdd3ec --- /dev/null +++ b/Documentation/driver-api/cxl/platform/device-hotplug.rst @@ -0,0 +1,130 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== +CXL Device Hotplug +================== + +Device hotplug refers to *physical* hotplug of a device (addition or removal +of a physical device from the machine). + +BIOS/EFI software is expected to configure sufficient resources **at boot +time** to allow hotplugged devices to be configured by software (such as +proximity domains, HPA regions, and host-bridge configurations). + +BIOS/EFI is not expected (**nor suggested**) to configure hotplugged +devices at hotplug time (i.e. HDM decoders should be left unprogrammed). + +This document covers some examples of those resources, but should not +be considered exhaustive. + +Hot-Remove +========== +Hot removal of a device typically requires careful removal of software +constructs (memory regions, associated drivers) which manage these devices. + +Hard-removing a CXL.mem device without carefully tearing down driver stacks +is likely to cause the system to machine-check (or at least SIGBUS if memory +access is limited to user space). + +Memory Device Hot-Add +===================== +A device present at boot may be associated with a CXL Fixed Memory Window +reported in :doc:`CEDT<acpi/cedt>`. That CFMWS may match the size of the +device, but the construction of the CEDT CFMWS is platform-defined. + +Hot-adding a memory device requires this pre-defined, **static** CFMWS to +have sufficient HPA space to describe that device. + +There are a few common scenarios to consider. + +Single-Endpoint Memory Device Present at Boot +--------------------------------------------- +A device present at boot likely had its capacity reported in the +:doc:`CEDT<acpi/cedt>`. If a device is removed and a new device hotplugged, +the capacity of the new device will be limited to the original CFMWS capacity. + +Adding capacity larger than the original device will cause memory region +creation to fail if the region size is greater than the CFMWS size. + +The CFMWS is **static** and cannot be adjusted. Platforms which may expect +different sized devices to be hotplugged must allocate sufficient CFMWS space +**at boot time** to cover all future expected devices. + +Multi-Endpoint Memory Device Present at Boot +-------------------------------------------- +Non-switch-based Multi-Endpoint devices are outside the scope of what the +CXL specification describes, but they are technically possible. We describe +them here for instructive reasons only - this does not imply Linux support. + +A hot-plug capable CXL memory device, such as one which presents multiple +expanders as a single large-capacity device, should report the **maximum +possible capacity** for the device at boot. :: + + HB0 + RP0 + | + [Multi-Endpoint Memory Device] + _____|_____ + | | + [Endpoint0] [Empty] + + +Limiting the size to the capacity preset at boot will limit hot-add support +to replacing capacity that was present at boot. + +No CXL Device Present at Boot +----------------------------- +When no CXL memory device is present on boot, some platforms omit the CFMWS +in the :doc:`CEDT<acpi/cedt>`. When this occurs, hot-add is not possible. + +This describes the base case for any given device not being present at boot. +If a future possible device is not described in the CEDT at boot, hot-add +of that device is either limited or not possible. + +For a platform to support hot-add of a full memory device, it must allocate +a CEDT CFMWS region with sufficient memory capacity to cover all future +potentially added capacity (along with any relevant CEDT CHBS entry). + +To support memory hotplug directly on the host bridge/root port, or on a switch +downstream of the host bridge, a platform must construct a CEDT CFMWS at boot +with sufficient resources to support the max possible (or expected) hotplug +memory capacity. :: + + HB0 HB1 + RP0 RP1 RP2 + | | | + Empty Empty USP + ________|________ + | | | | + DSP DSP DSP DSP + | | | | + All Empty + +For example, a BIOS/EFI may expose an option to configure a CEDT CFMWS with +a pre-configured amount of memory capacity (per host bridge, or host bridge +interleave set), even if no device is attached to Root Ports or Downstream +Ports at boot (as depicted in the figure above). + + +Interleave Sets +=============== + +Host Bridge Interleave +---------------------- +Host-bridge interleaved memory regions are defined **statically** in the +:doc:`CEDT<acpi/cedt>`. To apply cross-host-bridge interleave, a CFMWS entry +describing that interleave must have been provided **at boot**. Hotplugged +devices cannot add host-bridge interleave capabilities at hotplug time. + +See the :doc:`Flexible CEDT Configuration<example-configurations/flexible>` +example to see how a platform can provide this kind of flexibility regarding +hotplugged memory devices. BIOS/EFI software should consider options to +present flexible CEDT configurations with hotplug support. + +HDM Interleave +-------------- +Decoder-applied interleave can flexibly handle hotplugged devices, as decoders +can be re-programmed after hotplug. + +To add or remove a device to/from an existing HDM-applied interleaved region, +that region must be torn down an re-created. diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst index 29abf1eebf9f..2f36c21d9948 100644 --- a/Documentation/driver-api/dma-buf.rst +++ b/Documentation/driver-api/dma-buf.rst @@ -125,11 +125,6 @@ Implicit Fence Poll Support .. kernel-doc:: drivers/dma-buf/dma-buf.c :doc: implicit fence polling -DMA-BUF statistics -~~~~~~~~~~~~~~~~~~ -.. kernel-doc:: drivers/dma-buf/dma-buf-sysfs-stats.c - :doc: overview - DMA Buffer ioctls ~~~~~~~~~~~~~~~~~ diff --git a/Documentation/driver-api/dmaengine/index.rst b/Documentation/driver-api/dmaengine/index.rst index bdc45d8b4cfb..e74677c664ac 100644 --- a/Documentation/driver-api/dmaengine/index.rst +++ b/Documentation/driver-api/dmaengine/index.rst @@ -46,10 +46,3 @@ This book adds some notes about PXA DMA :maxdepth: 1 pxa_dma - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 1594598b3317..f4ed98f701c9 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -411,7 +411,7 @@ supported. - This structure can be initialized using the function ``dma_async_tx_descriptor_init``. - - You'll also need to set two fields in this structure: + - You'll also need to set following fields in this structure: - flags: TODO: Can it be modified by the driver itself, or @@ -421,6 +421,9 @@ supported. that is supposed to push the current transaction descriptor to a pending queue, waiting for issue_pending to be called. + - phys: Physical address of the descriptor which is used later by + the dma engine to read the descriptor and initiate transfer. + - In this structure the function pointer callback_result can be initialized in order for the submitter to be notified that a transaction has completed. In the earlier code the function pointer diff --git a/Documentation/driver-api/driver-model/binding.rst b/Documentation/driver-api/driver-model/binding.rst index 7ea1d7a41e1d..d1d311a4011f 100644 --- a/Documentation/driver-api/driver-model/binding.rst +++ b/Documentation/driver-api/driver-model/binding.rst @@ -53,9 +53,12 @@ class's register_dev callback. Driver ~~~~~~ -When a driver is attached to a device, the device is inserted into the -driver's list of devices. - +When a driver is attached to a device, the driver's probe() function is +called. Within probe(), the driver initializes the device and allocates +and initializes per-device data structures. This per-device state is +associated with the device object for as long as the driver remains bound +to it. Conceptually, this per-device data together with the binding to +the device can be thought of as an instance of the driver. sysfs ~~~~~ diff --git a/Documentation/driver-api/driver-model/design-patterns.rst b/Documentation/driver-api/driver-model/design-patterns.rst index 41eb8f41f7dd..965b2b93be6f 100644 --- a/Documentation/driver-api/driver-model/design-patterns.rst +++ b/Documentation/driver-api/driver-model/design-patterns.rst @@ -103,7 +103,7 @@ The design pattern is the same for an hrtimer or something similar that will return a single argument which is a pointer to a struct member in the callback. -container_of() is a macro defined in <linux/kernel.h> +container_of() is a macro defined in <linux/container_of.h> What container_of() does is to obtain a pointer to the containing struct from a pointer to a member by a simple subtraction using the offsetof() macro from diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index 0198ac65e874..7d2b897d66fa 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -408,7 +408,6 @@ PINCTRL devm_pinctrl_get_select() devm_pinctrl_register() devm_pinctrl_register_and_init() - devm_pinctrl_unregister() POWER devm_reboot_mode_register() diff --git a/Documentation/driver-api/driver-model/index.rst b/Documentation/driver-api/driver-model/index.rst index 4831bdd92e5c..abeb4b36636b 100644 --- a/Documentation/driver-api/driver-model/index.rst +++ b/Documentation/driver-api/driver-model/index.rst @@ -14,10 +14,3 @@ Driver Model overview platform porting - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/early-userspace/index.rst b/Documentation/driver-api/early-userspace/index.rst index 149c1822f06d..ff459471258f 100644 --- a/Documentation/driver-api/early-userspace/index.rst +++ b/Documentation/driver-api/early-userspace/index.rst @@ -9,10 +9,3 @@ Early Userspace early_userspace_support buffer-format - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/firmware/index.rst b/Documentation/driver-api/firmware/index.rst index 9d2c19dc8e36..86a3dd4bc3f8 100644 --- a/Documentation/driver-api/firmware/index.rst +++ b/Documentation/driver-api/firmware/index.rst @@ -10,10 +10,3 @@ Linux Firmware API request_firmware fw_upload other_interfaces - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/gpio/pca953x.rst b/Documentation/driver-api/gpio/pca953x.rst index 4bd7cf1120cb..fa4a57aa82a7 100644 --- a/Documentation/driver-api/gpio/pca953x.rst +++ b/Documentation/driver-api/gpio/pca953x.rst @@ -178,6 +178,8 @@ pcal9554b 8 yes 00 01 02 03 pcal6416 16 yes 00 02 04 06 pcal9535 16 yes 00 02 04 06 pcal9555a 16 yes 00 02 04 06 +tcal6408 8 yes 00 01 02 03 +tcal6416 16 yes 00 02 04 06 ========== ===== ========= ===== ====== ====== ========= These chips have several additional features: @@ -196,6 +198,8 @@ pcal9554b 40 42 43 44 45 46 4F pcal6416 40 44 46 48 4A 4C 4F pcal9535 40 44 46 48 4A 4C 4F pcal9555a 40 44 46 48 4A 4C 4F +tcal6408 40 42 43 44 45 46 4F +tcal6416 40 44 46 48 4A 4C 4F ========== ============ ======== ======= ======== ======== ========== ======== Currently the driver has support for the input latch, pull-up/pull-down @@ -332,6 +336,8 @@ Layouts: - pcal9554b - pcal9555a - pcal6524 + - tcal6408 + - tcal6416 2. base offset 0x30, bank 5 and 6, closely packed banks - pcal6534 @@ -383,6 +389,13 @@ disabled. Currently the driver enables the latch for each line with interrupt enabled. +An interrupt status register records which pins triggered an interrupt. +However, the status register and the input port register must be read +separately; there is no atomic mechanism to read both simultaneously, so races +are possible. Refer to the chapter `Interrupt source detection`_ to understand +the implications of this and how the driver still makes use of the latching +feature. + 1. base offset 0x40, bank 2, bank offsets of 2^n - pcal6408 - pcal6416 @@ -390,6 +403,8 @@ enabled. - pcal9554b - pcal9555a - pcal6524 + - tcal6408 + - tcal6416 2. base offset 0x30, bank 2, closely packed banks - pcal6534 @@ -462,6 +477,8 @@ Layout: - pcal9535 - pcal9554b - pcal9555a + - tcal6408 + - tcal6416 `PCAL chips with extended interrupt and output configuration functions`_ can set this for each line individually. They have the same per-port out_conf @@ -505,12 +522,82 @@ bits drive strength - pcal9554b - pcal9555a - pcal6524 + - tcal6408 + - tcal6416 2. base offset 0x30, bank 0 and 1, closely packed banks - pcal6534 Currently not supported by the driver. +Interrupt source detection +========================== + +When triggered by the GPIO expander's interrupt, the driver determines which +IRQs are pending by reading the input port register. + +To be able to filter on specific interrupt events for all compatible devices, +the driver keeps track of the previous input state of the lines, and emits an +IRQ only for the correct edge or level. This system works irrespective of the +number of enabled interrupts. Events will not be missed even if they occur +between the GPIO expander's interrupt and the actual I2C read. Edges could of +course be missed if the related signal level changes back to the value +previously saved by the driver before the I2C read. PCAL variants offer input +latching for that reason. + +PCAL input latching +------------------- + +The PCAL variants have an input latch and the driver enables this for all +interrupt-enabled lines. The interrupt is then only cleared when the input port +is read out. These variants provide an interrupt status register that records +which pins triggered an interrupt, but the status and input registers cannot be +read atomically. If another interrupt occurs on a different line after the +status register has been read but before the input port register is sampled, +that event will not be reflected in the earlier status snapshot, so relying +solely on the interrupt status register is insufficient. + +Thus, the PCAL variants also have to use the existing level-change logic. + +For short pulses, the first edge is captured when the input register is read, +but if the signal returns to its previous level before this read, the second +edge is not observed. As a result, successive pulses can produce identical +input values at read time and no level change is detected, causing interrupts +to be missed. Below timing diagram shows this situation where the top signal is +the input pin level and the bottom signal indicates the latched value:: + + ─────┠┌──*───────────────┠┌──*─────────────────┠┌──*─── + │ │ . │ │ . │ │ . + │ │ │ │ │ │ │ │ │ + └──*──┘ │ └──*──┘ │ └──*──┘ │ + Input │ │ │ │ │ │ + â–¼ │ â–¼ │ â–¼ │ + IRQ │ IRQ │ IRQ │ + . . . + ─────┠.┌──────────────┠.┌────────────────┠.┌── + │ │ │ │ │ │ + │ │ │ │ │ │ + └────────*┘ └────────*┘ └────────*┘ + Latched │ │ │ + â–¼ â–¼ â–¼ + READ 0 READ 0 READ 0 + NO CHANGE NO CHANGE + +To deal with this, events indicated by the interrupt status register are merged +with events detected through the existing level-change logic. As a result: + +- short pulses, whose second edges are invisible, are detected via the + interrupt status register, and +- interrupts that occur between the status and input reads are still + caught by the generic level-change logic. + +Note that this is still best-effort: the status and input registers are read +separately, and short pulses on other lines may occur in between those reads. +Such pulses can still be latched as an interrupt without leaving an observable +level change at read time, and may not be attributable to a specific edge. This +does not reduce detection compared to the generic path, but reflects inherent +atomicity limitations. + Datasheets ========== diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index 1833e6a0687e..eaf7161ff957 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -149,10 +149,3 @@ Subsystem-specific APIs wmi xilinx/index zorro - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/mailbox.rst b/Documentation/driver-api/mailbox.rst index 0ed95009cc30..463dd032b96c 100644 --- a/Documentation/driver-api/mailbox.rst +++ b/Documentation/driver-api/mailbox.rst @@ -27,7 +27,7 @@ Controller Driver (See include/linux/mailbox_controller.h) Allocate mbox_controller and the array of mbox_chan. -Populate mbox_chan_ops, except peek_data() all are mandatory. +Populate mbox_chan_ops, except flush() and peek_data() all are mandatory. The controller driver might know a message has been consumed by the remote by getting an IRQ or polling some hardware flag or it can never know (the client knows by way of the protocol). diff --git a/Documentation/driver-api/media/v4l2-dev.rst b/Documentation/driver-api/media/v4l2-dev.rst index d5cb19b21a9f..dd239ad42051 100644 --- a/Documentation/driver-api/media/v4l2-dev.rst +++ b/Documentation/driver-api/media/v4l2-dev.rst @@ -157,10 +157,10 @@ changing the e.g. exposure of the webcam. Of course, you can always do all the locking yourself by leaving both lock pointers at ``NULL``. -In the case of :ref:`videobuf2 <vb2_framework>` you will need to implement the -``wait_prepare()`` and ``wait_finish()`` callbacks to unlock/lock if applicable. -If you use the ``queue->lock`` pointer, then you can use the helper functions -:c:func:`vb2_ops_wait_prepare` and :c:func:`vb2_ops_wait_finish`. +In the case of :ref:`videobuf2 <vb2_framework>` you must set the ``queue->lock`` +pointer to the lock you use to serialize the queuing ioctls. This ensures that +that lock is released while waiting in ``VIDIOC_DQBUF`` for a buffer to arrive, +and it is retaken afterwards. The implementation of a hotplug disconnect should also take the lock from :c:type:`video_device` before calling v4l2_device_disconnect. If you are also diff --git a/Documentation/driver-api/memory-devices/index.rst b/Documentation/driver-api/memory-devices/index.rst index 28101458cda5..3b6308113611 100644 --- a/Documentation/driver-api/memory-devices/index.rst +++ b/Documentation/driver-api/memory-devices/index.rst @@ -9,10 +9,3 @@ Memory Controller drivers ti-emif ti-gpmc - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/mtdnand.rst b/Documentation/driver-api/mtdnand.rst index ce77e024c4f1..adf03983f1ba 100644 --- a/Documentation/driver-api/mtdnand.rst +++ b/Documentation/driver-api/mtdnand.rst @@ -996,11 +996,11 @@ The following people have contributed to the NAND driver: 2. David Woodhouse\ dwmw2@infradead.org -3. Thomas Gleixner\ tglx@linutronix.de +3. Thomas Gleixner\ tglx@kernel.org A lot of users have provided bugfixes, improvements and helping hands for testing. Thanks a lot. The following people have contributed to this document: -1. Thomas Gleixner\ tglx@linutronix.de +1. Thomas Gleixner\ tglx@kernel.org diff --git a/Documentation/driver-api/pci/index.rst b/Documentation/driver-api/pci/index.rst index 9e1b801d0f74..1abfbecf6ce6 100644 --- a/Documentation/driver-api/pci/index.rst +++ b/Documentation/driver-api/pci/index.rst @@ -11,10 +11,3 @@ The Linux PCI driver implementer's API guide pci p2pdma tsm - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/phy/index.rst b/Documentation/driver-api/phy/index.rst index 69ba1216de72..579cfe3b7b82 100644 --- a/Documentation/driver-api/phy/index.rst +++ b/Documentation/driver-api/phy/index.rst @@ -8,11 +8,3 @@ Generic PHY Framework phy samsung-usb2 - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` - diff --git a/Documentation/driver-api/phy/phy.rst b/Documentation/driver-api/phy/phy.rst index 719a2b3fd2ab..0865c2e94eec 100644 --- a/Documentation/driver-api/phy/phy.rst +++ b/Documentation/driver-api/phy/phy.rst @@ -19,7 +19,7 @@ PHY. Other peripherals that use PHY include Wireless LAN, Ethernet, SATA etc. The intention of creating this framework is to bring the PHY drivers spread -all over the Linux kernel to drivers/phy to increase code re-use and for +all over the Linux kernel to drivers/phy to increase code reuse and for better code maintainability. This framework will be of use only to devices that use external PHY (PHY diff --git a/Documentation/driver-api/pm/index.rst b/Documentation/driver-api/pm/index.rst index c2a9ef8d115c..4d6c32e32a72 100644 --- a/Documentation/driver-api/pm/index.rst +++ b/Documentation/driver-api/pm/index.rst @@ -10,10 +10,3 @@ CPU and Device Power Management devices notifiers types - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/serial/index.rst b/Documentation/driver-api/serial/index.rst index 03a55b987a1d..610744df5e8d 100644 --- a/Documentation/driver-api/serial/index.rst +++ b/Documentation/driver-api/serial/index.rst @@ -18,10 +18,3 @@ Serial drivers serial-iso7816 serial-rs485 - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/soundwire/index.rst b/Documentation/driver-api/soundwire/index.rst index ef8d90dfbdde..f7abf4a95be7 100644 --- a/Documentation/driver-api/soundwire/index.rst +++ b/Documentation/driver-api/soundwire/index.rst @@ -11,10 +11,3 @@ SoundWire Documentation locking bra bra_cadence - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/surface_aggregator/clients/index.rst b/Documentation/driver-api/surface_aggregator/clients/index.rst index 30160513afa5..c32313b8f3b7 100644 --- a/Documentation/driver-api/surface_aggregator/clients/index.rst +++ b/Documentation/driver-api/surface_aggregator/clients/index.rst @@ -14,10 +14,3 @@ on how to write client drivers. cdev dtx san - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/surface_aggregator/index.rst b/Documentation/driver-api/surface_aggregator/index.rst index 6f3e1094904d..f0128fe59a32 100644 --- a/Documentation/driver-api/surface_aggregator/index.rst +++ b/Documentation/driver-api/surface_aggregator/index.rst @@ -12,10 +12,3 @@ Surface System Aggregator Module (SSAM) clients/index ssh internal - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/tee.rst b/Documentation/driver-api/tee.rst index 5eaeb8103988..4d58ac0712c1 100644 --- a/Documentation/driver-api/tee.rst +++ b/Documentation/driver-api/tee.rst @@ -43,24 +43,12 @@ snippet would look like:: MODULE_DEVICE_TABLE(tee, client_id_table); static struct tee_client_driver client_driver = { + .probe = client_probe, + .remove = client_remove, .id_table = client_id_table, .driver = { .name = DRIVER_NAME, - .bus = &tee_bus_type, - .probe = client_probe, - .remove = client_remove, }, }; - static int __init client_init(void) - { - return driver_register(&client_driver.driver); - } - - static void __exit client_exit(void) - { - driver_unregister(&client_driver.driver); - } - - module_init(client_init); - module_exit(client_exit); + module_tee_client_driver(client_driver); diff --git a/Documentation/driver-api/thermal/intel_dptf.rst b/Documentation/driver-api/thermal/intel_dptf.rst index 916bf0f36a03..4adfa1eb74db 100644 --- a/Documentation/driver-api/thermal/intel_dptf.rst +++ b/Documentation/driver-api/thermal/intel_dptf.rst @@ -375,6 +375,9 @@ based on the processor generation. ``workload_hint_enable`` (RW) Enable firmware to send workload type hints to user space. +``workload_slow_hint_enable`` (RW) + Enable firmware to send slow workload type hints to user space. + ``notification_delay_ms`` (RW) Minimum delay in milliseconds before firmware will notify OS. This is for the rate control of notifications. This delay is between changing diff --git a/Documentation/driver-api/tty/tty_ldisc.rst b/Documentation/driver-api/tty/tty_ldisc.rst index 5144751be804..d034e117c232 100644 --- a/Documentation/driver-api/tty/tty_ldisc.rst +++ b/Documentation/driver-api/tty/tty_ldisc.rst @@ -18,7 +18,7 @@ Registration Line disciplines are registered with tty_register_ldisc() passing the ldisc structure. At the point of registration the discipline must be ready to use and it is possible it will get used before the call returns success. If the call -returns an error then it won’t get called. Do not re-use ldisc numbers as they +returns an error then it won’t get called. Do not reuse ldisc numbers as they are part of the userspace ABI and writing over an existing ldisc will cause demons to eat your computer. You must not re-register over the top of the line discipline even with the same data or your computer again will be eaten by diff --git a/Documentation/driver-api/usb/gadget.rst b/Documentation/driver-api/usb/gadget.rst index 09396edd6131..6f0c67885392 100644 --- a/Documentation/driver-api/usb/gadget.rst +++ b/Documentation/driver-api/usb/gadget.rst @@ -459,7 +459,7 @@ Linux-USB host side driver stack, or as a peripheral, using this ``gadget`` framework. To do that, the system software relies on small additions to those programming interfaces, and on a new internal component (here called an "OTG Controller") affecting which driver stack -connects to the OTG port. In each role, the system can re-use the +connects to the OTG port. In each role, the system can reuse the existing pool of hardware-neutral drivers, layered on top of the controller driver interfaces (:c:type:`usb_bus` or :c:type:`usb_gadget`). Such drivers need at most minor changes, and most of the calls added to diff --git a/Documentation/driver-api/usb/index.rst b/Documentation/driver-api/usb/index.rst index fcb24d0500d9..a32819963b99 100644 --- a/Documentation/driver-api/usb/index.rst +++ b/Documentation/driver-api/usb/index.rst @@ -22,10 +22,3 @@ Linux USB API typec typec_bus usb3-debug-port - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/driver-api/wmi.rst b/Documentation/driver-api/wmi.rst index db835b43c937..b847bcdcbb09 100644 --- a/Documentation/driver-api/wmi.rst +++ b/Documentation/driver-api/wmi.rst @@ -16,5 +16,8 @@ which will be bound to compatible WMI devices by the driver core. .. kernel-doc:: include/linux/wmi.h :internal: +.. kernel-doc:: drivers/platform/wmi/string.c + :export: + .. kernel-doc:: drivers/platform/wmi/core.c :export: diff --git a/Documentation/driver-api/xilinx/index.rst b/Documentation/driver-api/xilinx/index.rst index 13f7589ed442..c95bda55da6f 100644 --- a/Documentation/driver-api/xilinx/index.rst +++ b/Documentation/driver-api/xilinx/index.rst @@ -7,10 +7,3 @@ Xilinx FPGA :maxdepth: 1 eemi - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/fault-injection/index.rst b/Documentation/fault-injection/index.rst index a6ea1d190222..2a9e30b4202c 100644 --- a/Documentation/fault-injection/index.rst +++ b/Documentation/fault-injection/index.rst @@ -11,10 +11,3 @@ Fault-injection notifier-error-inject nvme-fault-injection provoke-crashes - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/fb/index.rst b/Documentation/fb/index.rst index e2f7488b6e2e..fe9ca3570941 100644 --- a/Documentation/fb/index.rst +++ b/Documentation/fb/index.rst @@ -50,10 +50,3 @@ Driver documentation vesafb viafb vt8623fb - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/features/debug/stackprotector/arch-support.txt b/Documentation/features/debug/stackprotector/arch-support.txt index de8f43f2e5d6..43e49c71612e 100644 --- a/Documentation/features/debug/stackprotector/arch-support.txt +++ b/Documentation/features/debug/stackprotector/arch-support.txt @@ -21,7 +21,7 @@ | parisc: | TODO | | powerpc: | ok | | riscv: | ok | - | s390: | TODO | + | s390: | ok | | sh: | ok | | sparc: | TODO | | um: | TODO | diff --git a/Documentation/filesystems/api-summary.rst b/Documentation/filesystems/api-summary.rst index cc5cc7f3fbd8..bd7e3d5db581 100644 --- a/Documentation/filesystems/api-summary.rst +++ b/Documentation/filesystems/api-summary.rst @@ -56,6 +56,9 @@ Other Functions .. kernel-doc:: fs/namei.c :export: +.. kernel-doc:: fs/open.c + :export: + .. kernel-doc:: block/bio.c :export: diff --git a/Documentation/filesystems/erofs.rst b/Documentation/filesystems/erofs.rst index 08194f194b94..fe06308e546c 100644 --- a/Documentation/filesystems/erofs.rst +++ b/Documentation/filesystems/erofs.rst @@ -63,9 +63,9 @@ Here are the main features of EROFS: - Support POSIX.1e ACLs by using extended attributes; - Support transparent data compression as an option: - LZ4, MicroLZMA and DEFLATE algorithms can be used on a per-file basis; In - addition, inplace decompression is also supported to avoid bounce compressed - buffers and unnecessary page cache thrashing. + LZ4, MicroLZMA, DEFLATE and Zstandard algorithms can be used on a per-file + basis; In addition, inplace decompression is also supported to avoid bounce + compressed buffers and unnecessary page cache thrashing. - Support chunk-based data deduplication and rolling-hash compressed data deduplication; @@ -125,10 +125,18 @@ dax={always,never} Use direct access (no page cache). See Documentation/filesystems/dax.rst. dax A legacy option which is an alias for ``dax=always``. device=%s Specify a path to an extra device to be used together. +directio (For file-backed mounts) Use direct I/O to access backing + files, and asynchronous I/O will be enabled if supported. fsid=%s Specify a filesystem image ID for Fscache back-end. -domain_id=%s Specify a domain ID in fscache mode so that different images - with the same blobs under a given domain ID can share storage. +domain_id=%s Specify a trusted domain ID for fscache mode so that + different images with the same blobs, identified by blob IDs, + can share storage within the same trusted domain. + Also used for different filesystems with inode page sharing + enabled to share page cache within the trusted domain. fsoffset=%llu Specify block-aligned filesystem offset for the primary device. +inode_share Enable inode page sharing for this filesystem. Inodes with + identical content within the same domain ID can share the + page cache. =================== ========================================================= Sysfs Entries @@ -154,7 +162,7 @@ to be as simple as possible:: 0 +1K All data areas should be aligned with the block size, but metadata areas -may not. All metadatas can be now observed in two different spaces (views): +may not. All metadata can be now observed in two different spaces (views): 1. Inode metadata space diff --git a/Documentation/filesystems/ext2.rst b/Documentation/filesystems/ext2.rst index 92aae683e16a..95f48c1fc6fb 100644 --- a/Documentation/filesystems/ext2.rst +++ b/Documentation/filesystems/ext2.rst @@ -388,7 +388,7 @@ Implementations for: ======================= =========================================================== Windows 95/98/NT/2000 http://www.chrysocome.net/explore2fs -Windows 95 [1]_ http://www.yipton.net/content.html#FSDEXT2 +Windows 95 [1]_ http://www.yipton.net/content/fsdext2/ DOS client [1]_ ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ OS/2 [2]_ ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/ RISC OS client http://www.esw-heim.tu-clausthal.de/~marco/smorbrod/IscaFS/ diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index cb90d1ae82d0..7e4031631286 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -206,7 +206,7 @@ fault_type=%d Support configuring fault injection type, should be FAULT_TRUNCATE 0x00000400 FAULT_READ_IO 0x00000800 FAULT_CHECKPOINT 0x00001000 - FAULT_DISCARD 0x00002000 + FAULT_DISCARD 0x00002000 (obsolete) FAULT_WRITE_IO 0x00004000 FAULT_SLAB_ALLOC 0x00008000 FAULT_DQUOT_INIT 0x00010000 @@ -215,8 +215,10 @@ fault_type=%d Support configuring fault injection type, should be FAULT_BLKADDR_CONSISTENCE 0x00080000 FAULT_NO_SEGMENT 0x00100000 FAULT_INCONSISTENT_FOOTER 0x00200000 - FAULT_TIMEOUT 0x00400000 (1000ms) + FAULT_ATOMIC_TIMEOUT 0x00400000 (1000ms) FAULT_VMALLOC 0x00800000 + FAULT_LOCK_TIMEOUT 0x01000000 (1000ms) + FAULT_SKIP_WRITE 0x02000000 =========================== ========== mode=%s Control block allocation mode which supports "adaptive" and "lfs". In "lfs" mode, there should be no random @@ -1033,3 +1035,46 @@ the reserved space back to F2FS for its own use. So, the key idea is, user can do any file operations on /dev/vdc, and reclaim the space after the use, while the space is counted as /data. That doesn't require modifying partition size and filesystem format. + +Per-file Read-Only Large Folio Support +-------------------------------------- + +F2FS implements large folio support on the read path to leverage high-order +page allocation for significant performance gains. To minimize code complexity, +this support is currently excluded from the write path, which requires handling +complex optimizations such as compression and block allocation modes. + +This optional feature is triggered only when a file's immutable bit is set. +Consequently, F2FS will return EOPNOTSUPP if a user attempts to open a cached +file with write permissions, even immediately after clearing the bit. Write +access is only restored once the cached inode is dropped. The usage flow is +demonstrated below: + +.. code-block:: + + # f2fs_io setflags immutable /data/testfile_read_seq + + /* flush and reload the inode to enable the large folio */ + # sync && echo 3 > /proc/sys/vm/drop_caches + + /* mmap(MAP_POPULATE) + mlock() */ + # f2fs_io read 128 0 1024 mmap 1 0 /data/testfile_read_seq + + /* mmap() + fadvise(POSIX_FADV_WILLNEED) + mlock() */ + # f2fs_io read 128 0 1024 fadvise 1 0 /data/testfile_read_seq + + /* mmap() + mlock2(MLOCK_ONFAULT) + madvise(MADV_POPULATE_READ) */ + # f2fs_io read 128 0 1024 madvise 1 0 /data/testfile_read_seq + + # f2fs_io clearflags immutable /data/testfile_read_seq + + # f2fs_io write 1 0 1 zero buffered /data/testfile_read_seq + Failed to open /mnt/test/test: Operation not supported + + /* flush and reload the inode to disable the large folio */ + # sync && echo 3 > /proc/sys/vm/drop_caches + + # f2fs_io write 1 0 1 zero buffered /data/testfile_read_seq + Written 4096 bytes with pattern = zero, total_time = 29 us, max_latency = 28 us + + # rm /data/testfile_read_seq diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst index 70af896822e1..c0dd35f1af12 100644 --- a/Documentation/filesystems/fscrypt.rst +++ b/Documentation/filesystems/fscrypt.rst @@ -455,11 +455,6 @@ API, but the filenames mode still does. - Adiantum - Mandatory: - CONFIG_CRYPTO_ADIANTUM - - Recommended: - - arm32: CONFIG_CRYPTO_NHPOLY1305_NEON - - arm64: CONFIG_CRYPTO_NHPOLY1305_NEON - - x86: CONFIG_CRYPTO_NHPOLY1305_SSE2 - - x86: CONFIG_CRYPTO_NHPOLY1305_AVX2 - AES-128-CBC-ESSIV and AES-128-CBC-CTS: - Mandatory: diff --git a/Documentation/filesystems/fsverity.rst b/Documentation/filesystems/fsverity.rst index 412cf11e3298..22b49b295d1f 100644 --- a/Documentation/filesystems/fsverity.rst +++ b/Documentation/filesystems/fsverity.rst @@ -341,6 +341,22 @@ the file has fs-verity enabled. This can perform better than FS_IOC_GETFLAGS and FS_IOC_MEASURE_VERITY because it doesn't require opening the file, and opening verity files can be expensive. +FS_IOC_FSGETXATTR +----------------- + +Since Linux v7.0, the FS_IOC_FSGETXATTR ioctl sets FS_XFLAG_VERITY (0x00020000) +in the returned flags when the file has verity enabled. Note that this attribute +cannot be set with FS_IOC_FSSETXATTR as enabling verity requires input +parameters. See FS_IOC_ENABLE_VERITY. + +file_getattr +------------ + +Since Linux v7.0, the file_getattr() syscall sets FS_XFLAG_VERITY (0x00020000) +in the returned flags when the file has verity enabled. Note that this attribute +cannot be set with file_setattr() as enabling verity requires input parameters. +See FS_IOC_ENABLE_VERITY. + .. _accessing_verity_files: Accessing verity files diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst index 77704fde9845..8025df6e6499 100644 --- a/Documentation/filesystems/locking.rst +++ b/Documentation/filesystems/locking.rst @@ -80,7 +80,9 @@ prototypes:: int (*getattr) (struct mnt_idmap *, const struct path *, struct kstat *, u32, unsigned int); ssize_t (*listxattr) (struct dentry *, char *, size_t); int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len); - void (*update_time)(struct inode *, struct timespec *, int); + void (*update_time)(struct inode *inode, enum fs_update_time type, + int flags); + void (*sync_lazytime)(struct inode *inode); int (*atomic_open)(struct inode *, struct dentry *, struct file *, unsigned open_flag, umode_t create_mode); @@ -117,6 +119,7 @@ getattr: no listxattr: no fiemap: no update_time: no +sync_lazytime: no atomic_open: shared (exclusive if O_CREAT is set in open flags) tmpfile: no fileattr_get: no or exclusive @@ -177,7 +180,6 @@ prototypes:: int (*freeze_fs) (struct super_block *); int (*unfreeze_fs) (struct super_block *); int (*statfs) (struct dentry *, struct kstatfs *); - int (*remount_fs) (struct super_block *, int *, char *); void (*umount_begin) (struct super_block *); int (*show_options)(struct seq_file *, struct dentry *); ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t); @@ -201,7 +203,6 @@ sync_fs: read freeze_fs: write unfreeze_fs: write statfs: maybe(read) (see below) -remount_fs: write umount_begin: no show_options: no (namespace_sem) quota_read: no (see below) @@ -226,8 +227,6 @@ file_system_type prototypes:: - struct dentry *(*mount) (struct file_system_type *, int, - const char *, void *); void (*kill_sb) (struct super_block *); locking rules: @@ -235,13 +234,9 @@ locking rules: ======= ========= ops may block ======= ========= -mount yes kill_sb yes ======= ========= -->mount() returns ERR_PTR or the root dentry; its superblock should be locked -on return. - ->kill_sb() takes a write-locked superblock, does all shutdown work on it, unlocks and drops the reference. @@ -416,6 +411,7 @@ lm_change yes no no lm_breaker_owns_lease: yes no no lm_lock_expirable yes no no lm_expire_lock no no yes +lm_open_conflict yes no no ====================== ============= ================= ========= buffer_head diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst index c99ab1f7fea4..a064234fed5b 100644 --- a/Documentation/filesystems/mount_api.rst +++ b/Documentation/filesystems/mount_api.rst @@ -299,8 +299,6 @@ manage the filesystem context. They are as follows: On success it should return 0. In the case of an error, it should return a negative error code. - .. Note:: reconfigure is intended as a replacement for remount_fs. - Filesystem context Security =========================== diff --git a/Documentation/filesystems/nfs/exporting.rst b/Documentation/filesystems/nfs/exporting.rst index de64d2d002a2..a01d9b9b5bc3 100644 --- a/Documentation/filesystems/nfs/exporting.rst +++ b/Documentation/filesystems/nfs/exporting.rst @@ -119,43 +119,11 @@ For a filesystem to be exportable it must: A file system implementation declares that instances of the filesystem are exportable by setting the s_export_op field in the struct -super_block. This field must point to a "struct export_operations" -struct which has the following members: - - encode_fh (mandatory) - Takes a dentry and creates a filehandle fragment which may later be used - to find or create a dentry for the same object. - - fh_to_dentry (mandatory) - Given a filehandle fragment, this should find the implied object and - create a dentry for it (possibly with d_obtain_alias). - - fh_to_parent (optional but strongly recommended) - Given a filehandle fragment, this should find the parent of the - implied object and create a dentry for it (possibly with - d_obtain_alias). May fail if the filehandle fragment is too small. - - get_parent (optional but strongly recommended) - When given a dentry for a directory, this should return a dentry for - the parent. Quite possibly the parent dentry will have been allocated - by d_alloc_anon. The default get_parent function just returns an error - so any filehandle lookup that requires finding a parent will fail. - ->lookup("..") is *not* used as a default as it can leave ".." entries - in the dcache which are too messy to work with. - - get_name (optional) - When given a parent dentry and a child dentry, this should find a name - in the directory identified by the parent dentry, which leads to the - object identified by the child dentry. If no get_name function is - supplied, a default implementation is provided which uses vfs_readdir - to find potential names, and matches inode numbers to find the correct - match. - - flags - Some filesystems may need to be handled differently than others. The - export_operations struct also includes a flags field that allows the - filesystem to communicate such information to nfsd. See the Export - Operations Flags section below for more explanation. +super_block. This field must point to a struct export_operations +which has the following members: + +.. kernel-doc:: include/linux/exportfs.h + :identifiers: struct export_operations A filehandle fragment consists of an array of 1 or more 4byte words, together with a one byte "type". diff --git a/Documentation/filesystems/overlayfs.rst b/Documentation/filesystems/overlayfs.rst index ab989807a2cb..af5a69f87da4 100644 --- a/Documentation/filesystems/overlayfs.rst +++ b/Documentation/filesystems/overlayfs.rst @@ -753,9 +753,9 @@ Note: the mount options index=off,nfs_export=on are conflicting for a read-write mount and will result in an error. Note: the mount option uuid=off can be used to replace UUID of the underlying -filesystem in file handles with null, and effectively disable UUID checks. This +filesystem in file handles with null, in order to relax the UUID checks. This can be useful in case the underlying disk is copied and the UUID of this copy -is changed. This is only applicable if all lower/upper/work directories are on +is changed. This is only applicable if all lower directories are on the same filesystem, otherwise it will fallback to normal behaviour. @@ -769,7 +769,7 @@ controlled by the "uuid" mount option, which supports these values: UUID of overlayfs is null. fsid is taken from upper most filesystem. - "off": UUID of overlayfs is null. fsid is taken from upper most filesystem. - UUID of underlying layers is ignored. + UUID of underlying layers is ignored and null used instead. - "on": UUID of overlayfs is generated and used to report a unique fsid. UUID is stored in xattr "trusted.overlay.uuid", making overlayfs fsid diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 3397937ed838..52ff1d19405b 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -448,11 +448,8 @@ a file off. **mandatory** -->get_sb() is gone. Switch to use of ->mount(). Typically it's just -a matter of switching from calling ``get_sb_``... to ``mount_``... and changing -the function type. If you were doing it manually, just switch from setting -->mnt_root to some pointer to returning that pointer. On errors return -ERR_PTR(...). +->get_sb() and ->mount() are gone. Switch to using the new mount API. See +Documentation/filesystems/mount_api.rst for more details. --- @@ -1334,3 +1331,33 @@ end_creating() and the parent will be unlocked precisely when necessary. kill_litter_super() is gone; convert to DCACHE_PERSISTENT use (as all in-tree filesystems have done). + +--- + +**mandatory** + +The ->setlease() file_operation must now be explicitly set in order to provide +support for leases. When set to NULL, the kernel will now return -EINVAL to +attempts to set a lease. Filesystems that wish to use the kernel-internal lease +implementation should set it to generic_setlease(). + +--- + +**mandatory** + +fs/namei.c primitives that consume filesystem references (do_renameat2(), +do_linkat(), do_symlinkat(), do_mkdirat(), do_mknodat(), do_unlinkat() +and do_rmdir()) are gone; they are replaced with non-consuming analogues +(filename_renameat2(), etc.) +Callers are adjusted - responsibility for dropping the filenames belongs +to them now. + +--- + +**mandatory** + +readlink_copy() now requires link length as the 4th argument. Said length needs +to match what strlen() would return if it was ran on the string. + +However, if the string is freely accessible for the duration of inode's +lifetime, consider using inode_set_cached_link() instead. diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 8256e857e2d7..b0c0d1b45b99 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -48,7 +48,7 @@ fixes/update part 1.1 Stefani Seibold <stefani@seibold.net> June 9 2009 3.11 /proc/<pid>/patch_state - Livepatch patch operation state 3.12 /proc/<pid>/arch_status - Task architecture specific information 3.13 /proc/<pid>/fd - List of symlinks to open files - 3.14 /proc/<pid/ksm_stat - Information about the process's ksm status. + 3.14 /proc/<pid>/ksm_stat - Information about the process's ksm status. 4 Configuring procfs 4.1 Mount options @@ -2289,8 +2289,8 @@ The number of open files for the process is stored in 'size' member of stat() output for /proc/<pid>/fd for fast access. ------------------------------------------------------- -3.14 /proc/<pid/ksm_stat - Information about the process's ksm status ---------------------------------------------------------------------- +3.14 /proc/<pid>/ksm_stat - Information about the process's ksm status +---------------------------------------------------------------------- When CONFIG_KSM is enabled, each process has this file which displays the information of ksm merging status. diff --git a/Documentation/filesystems/ramfs-rootfs-initramfs.rst b/Documentation/filesystems/ramfs-rootfs-initramfs.rst index a9d271e171c3..165117a721ce 100644 --- a/Documentation/filesystems/ramfs-rootfs-initramfs.rst +++ b/Documentation/filesystems/ramfs-rootfs-initramfs.rst @@ -76,10 +76,10 @@ What is rootfs? --------------- Rootfs is a special instance of ramfs (or tmpfs, if that's enabled), which is -always present in 2.6 systems. You can't unmount rootfs for approximately the -same reason you can't kill the init process; rather than having special code -to check for and handle an empty list, it's smaller and simpler for the kernel -to just make sure certain lists can't become empty. +always present in Linux systems. The kernel uses an immutable empty filesystem +called nullfs as the true root of the VFS hierarchy, with the mutable rootfs +(tmpfs/ramfs) mounted on top of it. This allows pivot_root() and unmounting +of the initramfs to work normally. Most systems just mount another filesystem over rootfs and ignore it. The amount of space an empty instance of ramfs takes up is tiny. @@ -121,16 +121,14 @@ All this differs from the old initrd in several ways: program. See the switch_root utility, below.) - When switching another root device, initrd would pivot_root and then - umount the ramdisk. But initramfs is rootfs: you can neither pivot_root - rootfs, nor unmount it. Instead delete everything out of rootfs to - free up the space (find -xdev / -exec rm '{}' ';'), overmount rootfs - with the new root (cd /newmount; mount --move . /; chroot .), attach - stdin/stdout/stderr to the new /dev/console, and exec the new init. - - Since this is a remarkably persnickety process (and involves deleting - commands before you can run them), the klibc package introduced a helper - program (utils/run_init.c) to do all this for you. Most other packages - (such as busybox) have named this command "switch_root". + umount the ramdisk. With nullfs as the true root, pivot_root() works + normally from the initramfs. Userspace can simply do:: + + chdir(new_root); + pivot_root(".", "."); + umount2(".", MNT_DETACH); + + This is the preferred method for switching root filesystems. Populating initramfs: --------------------- diff --git a/Documentation/filesystems/relay.rst b/Documentation/filesystems/relay.rst index 301ff4c6e6c6..dd6b52612b1d 100644 --- a/Documentation/filesystems/relay.rst +++ b/Documentation/filesystems/relay.rst @@ -452,7 +452,7 @@ closed. Misc ---- -Some applications may want to keep a channel around and re-use it +Some applications may want to keep a channel around and reuse it rather than open and close a new channel for each use. relay_reset() can be used for this purpose - it resets a channel to its initial state without reallocating channel buffer memory or destroying diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 8c8ce678148a..ba609f8d4de5 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -252,13 +252,12 @@ with respect to allocation: bandwidth percentages are directly applied to the threads running on the core -If RDT monitoring is available there will be an "L3_MON" directory +If L3 monitoring is available there will be an "L3_MON" directory with the following files: "num_rmids": - The number of RMIDs available. This is the - upper bound for how many "CTRL_MON" + "MON" - groups can be created. + The number of RMIDs supported by hardware for + L3 monitoring events. "mon_features": Lists the monitoring events if @@ -482,7 +481,25 @@ with the following files: "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy - counter can be considered for re-use. + counter can be considered for reuse. + +If telemetry monitoring is available there will be a "PERF_PKG_MON" directory +with the following files: + +"num_rmids": + The number of RMIDs for telemetry monitoring events. + + On Intel resctrl will not enable telemetry events if the number of + RMIDs that can be tracked concurrently is lower than the total number + of RMIDs supported. Telemetry events can be force-enabled with the + "rdt=" kernel parameter, but this may reduce the number of + monitoring groups that can be created. + +"mon_features": + Lists the telemetry monitoring events that are enabled on this system. + +The upper bound for how many "CTRL_MON" + "MON" can be created +is the smaller of the L3_MON and PERF_PKG_MON "num_rmids" values. Finally, in the top level of the "info" directory there is a file named "last_cmd_status". This is reset with every "command" issued @@ -589,15 +606,40 @@ When control is enabled all CTRL_MON groups will also contain: When monitoring is enabled all MON groups will also contain: "mon_data": - This contains a set of files organized by L3 domain and by - RDT event. E.g. on a system with two L3 domains there will - be subdirectories "mon_L3_00" and "mon_L3_01". Each of these - directories have one file per event (e.g. "llc_occupancy", - "mbm_total_bytes", and "mbm_local_bytes"). In a MON group these - files provide a read out of the current value of the event for - all tasks in the group. In CTRL_MON groups these files provide - the sum for all tasks in the CTRL_MON group and all tasks in + This contains directories for each monitor domain. + + If L3 monitoring is enabled, there will be a "mon_L3_XX" directory for + each instance of an L3 cache. Each directory contains files for the enabled + L3 events (e.g. "llc_occupancy", "mbm_total_bytes", and "mbm_local_bytes"). + + If telemetry monitoring is enabled, there will be a "mon_PERF_PKG_YY" + directory for each physical processor package. Each directory contains + files for the enabled telemetry events (e.g. "core_energy". "activity", + "uops_retired", etc.) + + The info/`*`/mon_features files provide the full list of enabled + event/file names. + + "core energy" reports a floating point number for the energy (in Joules) + consumed by cores (registers, arithmetic units, TLB and L1/L2 caches) + during execution of instructions summed across all logical CPUs on a + package for the current monitoring group. + + "activity" also reports a floating point value (in Farads). This provides + an estimate of work done independent of the frequency that the CPUs used + for execution. + + Note that "core energy" and "activity" only measure energy/activity in the + "core" of the CPU (arithmetic units, TLB, L1 and L2 caches, etc.). They + do not include L3 cache, memory, I/O devices etc. + + All other events report decimal integer values. + + In a MON group these files provide a read out of the current value of + the event for all tasks in the group. In CTRL_MON groups these files + provide the sum for all tasks in the CTRL_MON group and all tasks in MON groups. Please see example section for more details on usage. + On systems with Sub-NUMA Cluster (SNC) enabled there are extra directories for each node (located within the "mon_L3_XX" directory for the L3 cache they occupy). These are named "mon_sub_L3_YY" diff --git a/Documentation/filesystems/spufs/spu_create.rst b/Documentation/filesystems/spufs/spu_create.rst index 83108c099696..c1f1d857f911 100644 --- a/Documentation/filesystems/spufs/spu_create.rst +++ b/Documentation/filesystems/spufs/spu_create.rst @@ -113,8 +113,8 @@ Files Conforming to ============= - This call is Linux specific and only implemented by the ppc64 architec- - ture. Programs using this system call are not portable. + This call is Linux specific and only implemented by the ppc64 + architecture. Programs using this system call are not portable. Bugs diff --git a/Documentation/filesystems/spufs/spu_run.rst b/Documentation/filesystems/spufs/spu_run.rst index 7fdb1c31cb91..c5fb416296a9 100644 --- a/Documentation/filesystems/spufs/spu_run.rst +++ b/Documentation/filesystems/spufs/spu_run.rst @@ -120,8 +120,8 @@ Notes Conforming to ============= - This call is Linux specific and only implemented by the ppc64 architec- - ture. Programs using this system call are not portable. + This call is Linux specific and only implemented by the ppc64 + architecture. Programs using this system call are not portable. Bugs diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index 2703c04af7d0..ffcef4d6bc8d 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -120,7 +120,7 @@ is equivalent to doing:: .store = store_foo, }; -Note as stated in include/linux/kernel.h "OTHER_WRITABLE? Generally +Note as stated in include/linux/sysfs.h "OTHER_WRITABLE? Generally considered a bad idea." so trying to set a sysfs file writable for everyone will fail reverting to RO mode for "Others". diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index 670ba66b60e4..7c753148af88 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -94,11 +94,9 @@ functions: The passed struct file_system_type describes your filesystem. When a request is made to mount a filesystem onto a directory in your -namespace, the VFS will call the appropriate mount() method for the -specific filesystem. New vfsmount referring to the tree returned by -->mount() will be attached to the mountpoint, so that when pathname -resolution reaches the mountpoint it will jump into the root of that -vfsmount. +namespace, the VFS will call the appropriate get_tree() method for the +specific filesystem. See Documentation/filesystems/mount_api.rst +for more details. You can see all filesystems that are registered to the kernel in the file /proc/filesystems. @@ -117,8 +115,6 @@ members are defined: int fs_flags; int (*init_fs_context)(struct fs_context *); const struct fs_parameter_spec *parameters; - struct dentry *(*mount) (struct file_system_type *, int, - const char *, void *); void (*kill_sb) (struct super_block *); struct module *owner; struct file_system_type * next; @@ -151,10 +147,6 @@ members are defined: 'struct fs_parameter_spec'. More info in Documentation/filesystems/mount_api.rst. -``mount`` - the method to call when a new instance of this filesystem should - be mounted - ``kill_sb`` the method to call when an instance of this filesystem should be shut down @@ -173,45 +165,6 @@ members are defined: s_lock_key, s_umount_key, s_vfs_rename_key, s_writers_key, i_lock_key, i_mutex_key, invalidate_lock_key, i_mutex_dir_key: lockdep-specific -The mount() method has the following arguments: - -``struct file_system_type *fs_type`` - describes the filesystem, partly initialized by the specific - filesystem code - -``int flags`` - mount flags - -``const char *dev_name`` - the device name we are mounting. - -``void *data`` - arbitrary mount options, usually comes as an ASCII string (see - "Mount Options" section) - -The mount() method must return the root dentry of the tree requested by -caller. An active reference to its superblock must be grabbed and the -superblock must be locked. On failure it should return ERR_PTR(error). - -The arguments match those of mount(2) and their interpretation depends -on filesystem type. E.g. for block filesystems, dev_name is interpreted -as block device name, that device is opened and if it contains a -suitable filesystem image the method creates and initializes struct -super_block accordingly, returning its root dentry to caller. - -->mount() may choose to return a subtree of existing filesystem - it -doesn't have to create a new one. The main result from the caller's -point of view is a reference to dentry at the root of (sub)tree to be -attached; creation of new superblock is a common side effect. - -The most interesting member of the superblock structure that the mount() -method fills in is the "s_op" field. This is a pointer to a "struct -super_operations" which describes the next level of the filesystem -implementation. - -For more information on mounting (and the new mount API), see -Documentation/filesystems/mount_api.rst. - The Superblock Object ===================== @@ -244,7 +197,6 @@ filesystem. The following members are defined: enum freeze_wholder who); int (*unfreeze_fs) (struct super_block *); int (*statfs) (struct dentry *, struct kstatfs *); - int (*remount_fs) (struct super_block *, int *, char *); void (*umount_begin) (struct super_block *); int (*show_options)(struct seq_file *, struct dentry *); @@ -351,10 +303,6 @@ or bottom half). ``statfs`` called when the VFS needs to get filesystem statistics. -``remount_fs`` - called when the filesystem is remounted. This is called with - the kernel lock held - ``umount_begin`` called when the VFS is unmounting a filesystem. @@ -485,7 +433,9 @@ As of kernel 2.6.22, the following members are defined: int (*setattr) (struct mnt_idmap *, struct dentry *, struct iattr *); int (*getattr) (struct mnt_idmap *, const struct path *, struct kstat *, u32, unsigned int); ssize_t (*listxattr) (struct dentry *, char *, size_t); - void (*update_time)(struct inode *, struct timespec *, int); + void (*update_time)(struct inode *inode, enum fs_update_time type, + int flags); + void (*sync_lazytime)(struct inode *inode); int (*atomic_open)(struct inode *, struct dentry *, struct file *, unsigned open_flag, umode_t create_mode); int (*tmpfile) (struct mnt_idmap *, struct inode *, struct file *, umode_t); @@ -642,6 +592,11 @@ otherwise noted. an inode. If this is not defined the VFS will update the inode itself and call mark_inode_dirty_sync. +``sync_lazytime``: + called by the writeback code to update the lazy time stamps to + regular time stamp updates that get syncing into the on-disk + inode. + ``atomic_open`` called on the last component of an open. Using this optional method the filesystem can look up, possibly create and open the @@ -1180,9 +1135,12 @@ otherwise noted. method is used by the splice(2) system call ``setlease`` - called by the VFS to set or release a file lock lease. setlease - implementations should call generic_setlease to record or remove - the lease in the inode after setting it. + called by the VFS to set or release a file lock lease. Local + filesystems that wish to use the kernel-internal lease implementation + should set this to generic_setlease(). Other setlease implementations + should call generic_setlease() to record or remove the lease in the inode + after setting it. When set to NULL, attempts to set or remove a lease will + return -EINVAL. ``fallocate`` called by the VFS to preallocate blocks or punch a hole. diff --git a/Documentation/firmware-guide/acpi/DSD-properties-rules.rst b/Documentation/firmware-guide/acpi/DSD-properties-rules.rst index 70442bc2521e..98a350250df9 100644 --- a/Documentation/firmware-guide/acpi/DSD-properties-rules.rst +++ b/Documentation/firmware-guide/acpi/DSD-properties-rules.rst @@ -89,7 +89,7 @@ In those cases, however, the above validity considerations must be taken into account in the first place and returning invalid property sets from _DSD must be avoided. For this reason, it may not be possible to make _DSD return a property set following the given DT binding literally and completely. Still, for the -sake of code re-use, it may make sense to provide as much of the configuration +sake of code reuse, it may make sense to provide as much of the configuration data as possible in the form of device properties and complement that with an ACPI-specific mechanism suitable for the use case at hand. diff --git a/Documentation/firmware-guide/acpi/enumeration.rst b/Documentation/firmware-guide/acpi/enumeration.rst index 0165b09c0957..168c43012fb1 100644 --- a/Documentation/firmware-guide/acpi/enumeration.rst +++ b/Documentation/firmware-guide/acpi/enumeration.rst @@ -12,7 +12,7 @@ In addition we are starting to see peripherals integrated in the SoC/Chipset to appear only in ACPI namespace. These are typically devices that are accessed through memory-mapped registers. -In order to support this and re-use the existing drivers as much as +In order to support this and reuse the existing drivers as much as possible we decided to do following: - Devices that have no bus connector resource are represented as diff --git a/Documentation/fpga/index.rst b/Documentation/fpga/index.rst index 43c968871d99..c5a876165dab 100644 --- a/Documentation/fpga/index.rst +++ b/Documentation/fpga/index.rst @@ -8,10 +8,3 @@ FPGA :maxdepth: 1 dfl - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/gpu/amdgpu/amd_overview_block.svg b/Documentation/gpu/amdgpu/amd_overview_block.svg new file mode 100644 index 000000000000..cbd705afc9e2 --- /dev/null +++ b/Documentation/gpu/amdgpu/amd_overview_block.svg @@ -0,0 +1,687 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- Created with Inkscape (http://www.inkscape.org/) --> + +<svg + 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Bold';text-align:center;text-anchor:middle;fill:#1c241c;stroke-width:0.0690111" + id="tspan14">DCN</tspan></text> + </g> + </g> +</svg> diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 30812d9d53c6..033167025fcc 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -30,6 +30,15 @@ we have a dedicated glossary for Display Core at CP Command Processor + CPC + Command Processor Compute + + CPF + Command Processor Fetch + + CPG + Command Processor Graphics + CPLIB Content Protection Library @@ -78,6 +87,9 @@ we have a dedicated glossary for Display Core at GMC Graphic Memory Controller + GPR + General Purpose Register + GPUVM GPU Virtual Memory. This is the GPU's MMU. The GPU supports multiple virtual address spaces that can be in flight at any given time. These @@ -92,9 +104,15 @@ we have a dedicated glossary for Display Core at table for use by the kernel driver or into per process GPUVM page tables for application usage. + GWS + Global Wave Sync + IH Interrupt Handler + IV + Interrupt Vector + HQD Hardware Queue Descriptor @@ -143,15 +161,24 @@ we have a dedicated glossary for Display Core at PA Primitive Assembler / Physical Address + PDE + Page Directory Entry + PFP Pre-Fetch Parser (Graphics) PPLib PowerPlay Library - PowerPlay is the power management component. + PRT + Partially Resident Texture (also known as sparse residency) + PSP Platform Security Processor + PTE + Page Table Entry + RB Render Backends. Some people called it ROPs. @@ -206,12 +233,33 @@ we have a dedicated glossary for Display Core at TC Texture Cache + TCP (AMDGPU) + Texture Cache per Pipe. Even though the name "Texture" is part of this + acronym, the TCP represents the path to memory shaders; i.e., it is not + related to texture. The name is a leftover from older designs where shader + stages had different cache designs; it refers to the L1 cache in older + architectures. + + TMR + Trusted Memory Region + + TMZ + Trusted Memory Zone + TOC Table of Contents + UMC + Unified Memory Controller + UMSCH User Mode Scheduler + UTC (AMDGPU) + Unified Translation Cache. UTC is equivalent to TLB. You might see a + variation of this acronym with L at the end, i.e., UTCL followed by a + number; L means the cache level (e.g., UTCL1 and UTCL2). + UVD Unified Video Decoder diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv index dee5f663a47f..f4c0f93c0582 100644 --- a/Documentation/gpu/amdgpu/apu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -16,3 +16,6 @@ Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0, 14.0.0 Ryzen AI 330 series, Krackan Point, 3.6.0, 11.5.3, 4.0.5, 6.1.3, 14.0.5, 14.0.5 Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4, 14.0.4 Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1, 14.0.1 +Ryzen AI 9 475 / 470 / 465, Gorgon Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0, 14.0.0 +Ryzen AI 7 450, Gorgon Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4, 14.0.4 +Ryzen AI 5 440 / 435, Gorgon Point, 3.6.0, 11.5.3, 4.0.5, 6.1.3, 14.0.5, 14.0.5 diff --git a/Documentation/gpu/amdgpu/display/dc-glossary.rst b/Documentation/gpu/amdgpu/display/dc-glossary.rst index cbe737d1fcea..accb7c05308c 100644 --- a/Documentation/gpu/amdgpu/display/dc-glossary.rst +++ b/Documentation/gpu/amdgpu/display/dc-glossary.rst @@ -221,9 +221,6 @@ consider asking on the amd-gfx mailing list and update this page. TMDS Transition-Minimized Differential Signaling - TMZ - Trusted Memory Zone - TTU Time to Underflow diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index 3ce276272171..2c2bbf7caf1a 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -77,6 +77,37 @@ VCN (Video Core Next) decode. It's exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.) +It is important to note that these blocks can interact with each other. The +picture below illustrates some of the components and their interconnection: + +.. kernel-figure:: amd_overview_block.svg + +In the diagram, memory-related blocks are shown in green. Notice that specific +IPs have a green square that represents a small hardware block named 'hub', +which is responsible for interfacing with memory. All memory hubs are connected +in the UMCs, which in turn are connected to memory blocks. As a note, +pre-vega devices have a dedicated block for the Graphic Memory Controller +(GMC), which was replaced by UMC and hubs in new architectures. In the driver +code, you can identify this component by looking for the suffix hub, for +example: gfxhub, dchub, mmhub, vmhub, etc. Keep in mind that the component's +interaction with the memory block may vary across architectures. For example, +on Navi and newer, GC and SDMA are both attached to GCHUB; on pre-Navi, SDMA +goes through MMHUB; VCN, JPEG, and VPE go through MMHUB; DCN goes through +DCHUB. + +There is some protection for certain memory elements, and the PSP plays an +essential role in this area. When a specific firmware is loaded into memory, +the PSP takes steps to ensure it has a valid signature. It also stores firmware +images in a protected memory area named Trusted Memory Area (TMR), so the OS or +driver can't corrupt them at runtime. Another use of PSP is to support Trusted +Applications (TA), which are basically small applications that run on the +trusted processor and handles a trusted operation (e.g., HDCP). PSP is also +used for encrypted memory for content protection via Trusted Memory Zone (TMZ). + +Another critical IP is the SMU. It handles reset distribution, as well as +clock, thermal, and power management for all IPs on the SoC. SMU also helps to +balance performance and power consumption. + .. _pipes-and-queues-description: GFX, Compute, and SDMA Overall Behavior diff --git a/Documentation/gpu/amdgpu/driver-misc.rst b/Documentation/gpu/amdgpu/driver-misc.rst index 25b0c857816e..e1a964c3add2 100644 --- a/Documentation/gpu/amdgpu/driver-misc.rst +++ b/Documentation/gpu/amdgpu/driver-misc.rst @@ -128,3 +128,29 @@ smartshift_bias .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c :doc: smartshift_bias + +UMA Carveout +============ + +Some versions of Atom ROM expose available options for the VRAM carveout sizes, +and allow changes to the carveout size via the ATCS function code 0xA on supported +BIOS implementations. + +For those platforms, users can use the following files under uma/ to set the +carveout size, in a way similar to what Windows users can do in the "Tuning" +tab in AMD Adrenalin. + +Note that for BIOS implementations that don't support this, these files will not +be created at all. + +uma/carveout_options +-------------------- + +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c + :doc: uma/carveout_options + +uma/carveout +-------------------- + +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c + :doc: uma/carveout diff --git a/Documentation/gpu/amdgpu/enforce_isolation.svg b/Documentation/gpu/amdgpu/enforce_isolation.svg new file mode 100644 index 000000000000..2630681f1cb9 --- /dev/null +++ b/Documentation/gpu/amdgpu/enforce_isolation.svg @@ -0,0 +1,654 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- Created with Inkscape (http://www.inkscape.org/) --> + +<svg + width="67.794067mm" + height="88.643349mm" + viewBox="0 0 67.794066 88.643348" + version="1.1" + id="svg1" + inkscape:version="1.4.2 (ebf0e940d0, 2025-05-08)" + sodipodi:docname="enforce_isolation.svg" + xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" + xmlns="http://www.w3.org/2000/svg" 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The requested operations in -the buffer are called Command Packets, which can be summarized as a compressed -way of transmitting command information to the graphics controller. +the buffer are called **Command Packets**, which can be summarized as a +compressed way of transmitting command information to the graphics controller. The component that acts as the front end between the CPU and the GPU is called -the Command Processor (CP). This component is responsible for providing greater -flexibility to the GC since CP makes it possible to program various aspects of -the GPU pipeline. CP also coordinates the communication between the CPU and GPU -via a mechanism named **Ring Buffers**, where the CPU appends information to -the buffer while the GPU removes operations. It is relevant to highlight that a -CPU can add a pointer to the Ring Buffer that points to another region of -memory outside the Ring Buffer, and CP can handle it; this mechanism is called -**Indirect Buffer (IB)**. CP receives and parses the Command Streams (CS), and -writes the operations to the correct hardware blocks. +**Command Processor (CP)**. This component is responsible for providing greater +flexibility to the **Graphics and Compute (GC)** since CP makes it possible to +program various aspects of the GPU pipeline. CP also coordinates the +communication between the CPU and GPU via a mechanism named **Ring Buffers**, +where the CPU appends information to the buffer while the GPU removes +operations. CP is also responsible for handling **Indirect Buffers (IB)**. + +For reference, internally the CP consists of several sub-blocks (CPC - CP +compute, CPG - CP graphics, and CPF - CP fetcher). Some of these acronyms +appear in register names, but this is more of an implementation detail and not +something that directly impacts driver programming or debugging. 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a/Documentation/gpu/amdgpu/process-isolation.rst b/Documentation/gpu/amdgpu/process-isolation.rst index 25b06ffefc33..03c4288aa8b1 100644 --- a/Documentation/gpu/amdgpu/process-isolation.rst +++ b/Documentation/gpu/amdgpu/process-isolation.rst @@ -1,3 +1,4 @@ +.. _amdgpu-process-isolation: .. SPDX-License-Identifier: GPL-2.0 ========================= diff --git a/Documentation/gpu/amdgpu/ring-buffer.rst b/Documentation/gpu/amdgpu/ring-buffer.rst new file mode 100644 index 000000000000..cc642c21316b --- /dev/null +++ b/Documentation/gpu/amdgpu/ring-buffer.rst @@ -0,0 +1,95 @@ +============= + Ring Buffer +============= + +To handle communication between user space and kernel space, AMD GPUs use a +ring buffer design to feed the engines (GFX, Compute, SDMA, UVD, VCE, VCN, VPE, +etc.). See the figure below that illustrates how this communication works: + +.. kernel-figure:: ring_buffers.svg + +Ring buffers in the amdgpu work as a producer-consumer model, where userspace +acts as the producer, constantly filling the ring buffer with GPU commands to +be executed. Meanwhile, the GPU retrieves the information from the ring, parses +it, and distributes the specific set of instructions between the different +amdgpu blocks. + +Notice from the diagram that the ring has a Read Pointer (rptr), which +indicates where the engine is currently reading packets from the ring, and a +Write Pointer (wptr), which indicates how many packets software has added to +the ring. When the rptr and wptr are equal, the ring is idle. When software +adds packets to the ring, it updates the wptr, this causes the engine to start +fetching and processing packets. As the engine processes packets, the rptr gets +updates until the rptr catches up to the wptr and they are equal again. + +Usually, ring buffers in the driver have a limited size (search for occurrences +of `amdgpu_ring_init()`). One of the reasons for the small ring buffer size is +that CP (Command Processor) is capable of following addresses inserted into the +ring; this is illustrated in the image by the reference to the IB (Indirect +Buffer). The IB gives userspace the possibility to have an area in memory that +CP can read and feed the hardware with extra instructions. + +All ASICs pre-GFX11 use what is called a kernel queue, which means +the ring is allocated in kernel space and has some restrictions, such as not +being able to be :ref:`preempted directly by the scheduler<amdgpu-mes>`. GFX11 +and newer support kernel queues, but also provide a new mechanism named +:ref:`user queues<amdgpu-userq>`, where the queue is moved to the user space +and can be mapped and unmapped via the scheduler. In practice, both queues +insert user-space-generated GPU commands from different jobs into the requested +component ring. + +Enforce Isolation +================= + +.. note:: After reading this section, you might want to check the + :ref:`Process Isolation<amdgpu-process-isolation>` page for more details. + +Before examining the Enforce Isolation mechanism in the ring buffer context, it +is helpful to briefly discuss how instructions from the ring buffer are +processed in the graphics pipeline. Let’s expand on this topic by checking the +diagram below that illustrates the graphics pipeline: + +.. kernel-figure:: gfx_pipeline_seq.svg + +In terms of executing instructions, the GFX pipeline follows the sequence: +Shader Export (SX), Geometry Engine (GE), Shader Process or Input (SPI), Scan +Converter (SC), Primitive Assembler (PA), and cache manipulation (which may +vary across ASICs). Another common way to describe the pipeline is to use Pixel +Shader (PS), raster, and Vertex Shader (VS) to symbolize the two shader stages. +Now, with this pipeline in mind, let's assume that Job B causes a hang issue, +but Job C's instruction might already be executing, leading developers to +incorrectly identify Job C as the problematic one. This problem can be +mitigated on multiple levels; the diagram below illustrates how to minimize +part of this problem: + +.. kernel-figure:: no_enforce_isolation.svg + +Note from the diagram that there is no guarantee of order or a clear separation +between instructions, which is not a problem most of the time, and is also good +for performance. Furthermore, notice some circles between jobs in the diagram +that represent a **fence wait** used to avoid overlapping work in the ring. At +the end of the fence, a cache flush occurs, ensuring that when the next job +starts, it begins in a clean state and, if issues arise, the developer can +pinpoint the problematic process more precisely. + +To increase the level of isolation between jobs, there is the "Enforce +Isolation" method described in the picture below: + +.. kernel-figure:: enforce_isolation.svg + +As shown in the diagram, enforcing isolation introduces ordering between +submissions, since the access to GFX/Compute is serialized, think about it as +single process at a time mode for gfx/compute. Notice that this approach has a +significant performance impact, as it allows only one job to submit commands at +a time. However, this option can help pinpoint the job that caused the problem. +Although enforcing isolation improves the situation, it does not fully resolve +the issue of precisely pinpointing bad jobs, since isolation might mask the +problem. In summary, identifying which job caused the issue may not be precise, +but enforcing isolation might help with the debugging. + +Ring Operations +=============== + +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c + :internal: + diff --git a/Documentation/gpu/amdgpu/ring_buffers.svg b/Documentation/gpu/amdgpu/ring_buffers.svg new file mode 100644 index 000000000000..7a6fcb19e151 --- /dev/null +++ b/Documentation/gpu/amdgpu/ring_buffers.svg @@ -0,0 +1,1633 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- Created with Inkscape (http://www.inkscape.org/) --> + +<svg + width="588.32483mm" + height="341.81656mm" + viewBox="0 0 588.32483 341.81656" + version="1.1" + id="svg1" + inkscape:version="1.4 (e7c3feb100, 2024-10-09)" + sodipodi:docname="RING_BUFFER.svg" + xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" + xmlns="http://www.w3.org/2000/svg" + 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a/Documentation/gpu/amdgpu/userq.rst +++ b/Documentation/gpu/amdgpu/userq.rst @@ -1,3 +1,5 @@ +.. _amdgpu-userq: + ================== User Mode Queues ================== diff --git a/Documentation/gpu/drivers.rst b/Documentation/gpu/drivers.rst index 78b80be17f21..2e13e0ad7e88 100644 --- a/Documentation/gpu/drivers.rst +++ b/Documentation/gpu/drivers.rst @@ -26,10 +26,3 @@ GPU Driver Documentation panthor zynqmp nova/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst index f22433470c76..32fb506db05b 100644 --- a/Documentation/gpu/drm-mm.rst +++ b/Documentation/gpu/drm-mm.rst @@ -526,8 +526,14 @@ DRM GPUVM Function References DRM Buddy Allocator =================== -DRM Buddy Function References ------------------------------ +Buddy Allocator Function References (GPU buddy) +----------------------------------------------- + +.. kernel-doc:: drivers/gpu/buddy.c + :export: + +DRM Buddy Specific Logging Function References +---------------------------------------------- .. kernel-doc:: drivers/gpu/drm/drm_buddy.c :export: diff --git a/Documentation/gpu/index.rst b/Documentation/gpu/index.rst index 60c73fdcfeed..5d708a106b3f 100644 --- a/Documentation/gpu/index.rst +++ b/Documentation/gpu/index.rst @@ -23,10 +23,3 @@ GPU Driver Developer's Guide implementation_guidelines todo rfc/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index 35cc7c31d423..d1964eb645e2 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -41,8 +41,15 @@ trait [1] from the num crate. Having this generalization also helps with implementing a generic macro that automatically generates the corresponding mappings between a value and a number. +FromPrimitive support has been worked on in the past, but hasn't been followed +since then [1]. + +There also have been considerations of ToPrimitive [2]. + | Complexity: Beginner | Link: https://docs.rs/num/latest/num/trait.FromPrimitive.html +| Link: https://lore.kernel.org/all/cover.1750689857.git.y.j3ms.n@gmail.com/ [1] +| Link: https://rust-for-linux.zulipchat.com/#narrow/channel/288089-General/topic/Implement.20.60FromPrimitive.60.20trait.20.2B.20derive.20macro.20for.20nova-core/with/541971854 [2] Generic register abstraction [REGA] ----------------------------------- @@ -134,21 +141,6 @@ A `num` core kernel module is being designed to provide these operations. | Complexity: Intermediate | Contact: Alexandre Courbot -IRQ abstractions ----------------- - -Rust abstractions for IRQ handling. - -There is active ongoing work from Daniel Almeida [1] for the "core" abstractions -to request IRQs. - -Besides optional review and testing work, the required ``pci::Device`` code -around those core abstractions needs to be worked out. - -| Complexity: Intermediate -| Link: https://lore.kernel.org/lkml/20250122163932.46697-1-daniel.almeida@collabora.com/ [1] -| Contact: Daniel Almeida - Page abstraction for foreign pages ---------------------------------- @@ -161,40 +153,16 @@ There is active onging work from Abdiel Janulgue [1] and Lina [2]. | Link: https://lore.kernel.org/linux-mm/20241119112408.779243-1-abdiel.janulgue@gmail.com/ [1] | Link: https://lore.kernel.org/rust-for-linux/20250202-rust-page-v1-0-e3170d7fe55e@asahilina.net/ [2] -Scatterlist / sg_table abstractions ------------------------------------ - -Rust abstractions for scatterlist / sg_table. - -There is preceding work from Abdiel Janulgue, which hasn't made it to the -mailing list yet. - -| Complexity: Intermediate -| Contact: Abdiel Janulgue - PCI MISC APIs ------------- -Extend the existing PCI device / driver abstractions by SR-IOV, config space, -capability, MSI API abstractions. - -| Complexity: Beginner +Extend the existing PCI device / driver abstractions by SR-IOV, capability, MSI +API abstractions. -XArray bindings [XARR] ----------------------- - -We need bindings for `xa_alloc`/`xa_alloc_cyclic` in order to generate the -auxiliary device IDs. - -| Complexity: Intermediate +SR-IOV [1] is work in progress. -Debugfs abstractions --------------------- - -Rust abstraction for debugfs APIs. - -| Reference: Export GSP log buffers -| Complexity: Intermediate +| Complexity: Beginner +| Link: https://lore.kernel.org/all/20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com/ [1] GPU (general) ============= @@ -233,7 +201,10 @@ Some possible options: - maple_tree - native Rust collections +There is work in progress for using drm_buddy [1]. + | Complexity: Advanced +| Link: https://lore.kernel.org/all/20251219203805.1246586-4-joelagnelf@nvidia.com/ [1] Instance Memory --------------- diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index 22487ac1b011..520da44a04a6 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -506,6 +506,22 @@ Contact: Maxime Ripard <mripard@kernel.org>, Level: Intermediate +Convert users of of_drm_find_bridge() to of_drm_find_and_get_bridge() +--------------------------------------------------------------------- + +Taking a struct drm_bridge pointer requires getting a reference and putting +it after disposing of the pointer. Most functions returning a struct +drm_bridge pointer already call drm_bridge_get() to increment the refcount +and their users have been updated to call drm_bridge_put() when +appropriate. of_drm_find_bridge() does not get a reference and it has been +deprecated in favor of of_drm_find_and_get_bridge() which does, but some +users still need to be converted. + +Contact: Maxime Ripard <mripard@kernel.org>, + Luca Ceresoli <luca.ceresoli@bootlin.com> + +Level: Intermediate + Core refactorings ================= diff --git a/Documentation/hid/intel-ish-hid.rst b/Documentation/hid/intel-ish-hid.rst index 2adc174fb576..068a5906b177 100644 --- a/Documentation/hid/intel-ish-hid.rst +++ b/Documentation/hid/intel-ish-hid.rst @@ -413,6 +413,10 @@ Vendors who wish to upstream their custom firmware should follow these guideline - The firmware filename should use one of the following patterns: + - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` + - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin`` + - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin`` + - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin`` @@ -420,16 +424,21 @@ Vendors who wish to upstream their custom firmware should follow these guideline - ``${intel_plat_gen}`` indicates the Intel platform generation (e.g., ``lnlm`` for Lunar Lake) and must not exceed 8 characters in length. - ``${SYS_VENDOR_CRC32}`` is the CRC32 checksum of the ``sys_vendor`` value from the DMI field ``DMI_SYS_VENDOR``. +- ``${PRODUCT_FAMILY_CRC32}`` is the CRC32 checksum of the ``product_family`` value from the DMI field ``DMI_PRODUCT_FAMILY``. - ``${PRODUCT_NAME_CRC32}`` is the CRC32 checksum of the ``product_name`` value from the DMI field ``DMI_PRODUCT_NAME``. - ``${PRODUCT_SKU_CRC32}`` is the CRC32 checksum of the ``product_sku`` value from the DMI field ``DMI_PRODUCT_SKU``. During system boot, the ISH Linux driver will attempt to load the firmware in the following order, prioritizing custom firmware with more precise matching patterns: -1. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` -2. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin`` -3. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin`` -4. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` -5. ``intel/ish/ish_${intel_plat_gen}.bin`` +1. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` +2. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin`` +3. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin`` +4. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin`` +5. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` +6. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin`` +7. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin`` +8. ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` +9. ``intel/ish/ish_${intel_plat_gen}.bin`` The driver will load the first matching firmware and skip the rest. If no matching firmware is found, it will proceed to the next pattern in the specified order. If all searches fail, the default Intel firmware, listed last in the order above, will be loaded. diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 232885f24430..58986546c723 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -10,6 +10,7 @@ Supported boards: * PRIME X670E-PRO WIFI * PRIME Z270-A * Pro WS TRX50-SAGE WIFI + * Pro WS TRX50-SAGE WIFI A * Pro WS X570-ACE * Pro WS WRX90E-SAGE SE * ProArt X570-CREATOR WIFI @@ -23,6 +24,7 @@ Supported boards: * ROG CROSSHAIR VIII IMPACT * ROG CROSSHAIR X670E HERO * ROG CROSSHAIR X670E GENE + * ROG MAXIMUS X HERO * ROG MAXIMUS XI HERO * ROG MAXIMUS XI HERO (WI-FI) * ROG MAXIMUS Z690 FORMULA diff --git a/Documentation/hwmon/coretemp.rst b/Documentation/hwmon/coretemp.rst index c609329e3bc4..7a5fbb37b0f3 100644 --- a/Documentation/hwmon/coretemp.rst +++ b/Documentation/hwmon/coretemp.rst @@ -2,17 +2,21 @@ Kernel driver coretemp ====================== Supported chips: - * All Intel Core family + * All Intel Core family and Atom processors with Digital Thermal Sensor (DTS) Prefix: 'coretemp' - CPUID: family 0x6, models + CPUID: family 0x6, models with X86_FEATURE_DTHERM, including: - 0xe (Pentium M DC), 0xf (Core 2 DC 65nm), - 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm), - 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield), - 0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom), - - 0x36 (Cedar Trail Atom) + - 0x36 (Cedar Trail Atom), 0x37 (Bay Trail Atom), + - 0x4a (Merrifield Atom), 0x4c (Cherry Trail Atom), + - 0x5a (Moorefield Atom), 0x5c (Apollo Lake Atom), + - 0x7a (Gemini Lake Atom), + - 0x96 (Elkhart Lake Atom), 0x9c (Jasper Lake Atom) Datasheet: @@ -28,9 +32,9 @@ Description This driver permits reading the DTS (Digital Temperature Sensor) embedded inside Intel CPUs. This driver can read both the per-core and per-package -temperature using the appropriate sensors. The per-package sensor is new; -as of now, it is present only in the SandyBridge platform. The driver will -show the temperature of all cores inside a package under a single device +temperature using the appropriate sensors. The per-package sensor is +available on Sandy Bridge and all newer processors. The driver will show +the temperature of all cores inside a package under a single device directory inside hwmon. Temperature is measured in degrees Celsius and measurement resolution is @@ -56,10 +60,11 @@ tempX_label Contains string "Core X", where X is processor where Y is the package number. ================= ======================================================== -On CPU models which support it, TjMax is read from a model-specific register. -On other models, it is set to an arbitrary value based on weak heuristics. -If these heuristics don't work for you, you can pass the correct TjMax value -as a module parameter (tjmax). +On modern CPUs (Nehalem and newer), TjMax is read from the +MSR_IA32_TEMPERATURE_TARGET register. On older models without this MSR, +TjMax is determined using lookup tables or heuristics. If these don't work +for your CPU, you can pass the correct TjMax value as a module parameter +(tjmax). Appendix A. Known TjMax lists (TBD): Some information comes from ark.intel.com @@ -100,6 +105,40 @@ Process Processor TjMax(C) D2700/2550/2500 100 N2850/2800/2650/2600 100 +22nm Atom Processors (Silvermont/Bay Trail) + E3845/3827/3826/3825/3815/3805 110 + Z3795/3775/3770/3740/3736/3735/3680 90 + +22nm Atom Processors (Silvermont/Moorefield) + Z3580/3570/3560/3530 90 + +14nm Atom Processors (Airmont/Cherry Trail) + x5-Z8550/Z8500/Z8350/Z8330/Z8300 90 + x7-Z8750/Z8700 90 + +14nm Atom Processors (Goldmont/Apollo Lake) + x5-E3940/E3930 105 + x7-E3950 105 + +14nm Celeron/Pentium Processors + (Goldmont/Apollo Lake) + J3455/J3355 105 + N3450/N3350 105 + N4200 105 + +14nm Celeron/Pentium Processors + (Goldmont Plus/Gemini Lake) + J4105/J4005 105 + N4100/N4000 105 + N5000 105 + +10nm Atom Processors (Tremont/Elkhart Lake) + x6000E 105 + +10nm Celeron/Pentium Processors + (Tremont/Jasper Lake) + N4500/N5100/N6000 series 105 + 45nm Xeon Processors 5400 Quad-Core X5492, X5482, X5472, X5470, X5460, X5450 85 E5472, E5462, E5450/40/30/20/10/05 85 diff --git a/Documentation/hwmon/cros_ec_hwmon.rst b/Documentation/hwmon/cros_ec_hwmon.rst index 6db812708325..9ccab721e7c2 100644 --- a/Documentation/hwmon/cros_ec_hwmon.rst +++ b/Documentation/hwmon/cros_ec_hwmon.rst @@ -23,9 +23,26 @@ ChromeOS embedded controller used in Chromebooks and other devices. The channel labels exposed via hwmon are retrieved from the EC itself. -Fan and temperature readings are supported. PWM fan control is also supported if -the EC also supports setting fan PWM values and fan mode. Note that EC will -switch fan control mode back to auto when suspended. This driver will restore -the fan state to what they were before suspended when resumed. -If a fan is controllable, this driver will register that fan as a cooling device -in the thermal framework as well. +Supported features +------------------ + +Fan readings + Always supported. + +Fan target speed + If supported by the EC. + +Temperature readings + Always supported. + +Temperature thresholds + If supported by the EC. + +PWM fan control + If the EC also supports setting fan PWM values and fan mode. + + Note that EC will switch fan control mode back to auto when suspended. + This driver will restore the fan state to what they were before suspended when resumed. + + If a fan is controllable, this driver will register that fan as a cooling device + in the thermal framework as well. diff --git a/Documentation/hwmon/emc1403.rst b/Documentation/hwmon/emc1403.rst index 57f833b1a800..77060d515323 100644 --- a/Documentation/hwmon/emc1403.rst +++ b/Documentation/hwmon/emc1403.rst @@ -57,7 +57,7 @@ Supported chips: - https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf Author: - Kalhan Trisal <kalhan.trisal@intel.com + Kalhan Trisal <kalhan.trisal@intel.com> Description diff --git a/Documentation/hwmon/gpd-fan.rst b/Documentation/hwmon/gpd-fan.rst index 0b56b70e6264..29527a77fe88 100644 --- a/Documentation/hwmon/gpd-fan.rst +++ b/Documentation/hwmon/gpd-fan.rst @@ -28,6 +28,7 @@ Currently the driver supports the following handhelds: - GPD Win Max 2 2025 (HX370) - GPD Win 4 (6800U) - GPD Win 4 (7840U) + - GPD Micro PC 2 Module parameters ----------------- @@ -50,6 +51,8 @@ gpd_fan_board - GPD Win Mini (HX370) - GPD Pocket 4 - GPD Duo + - mpc2 + - GPD Micro PC 2 Sysfs entries ------------- diff --git a/Documentation/hwmon/hac300s.rst b/Documentation/hwmon/hac300s.rst new file mode 100644 index 000000000000..8b11d3e72295 --- /dev/null +++ b/Documentation/hwmon/hac300s.rst @@ -0,0 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver hac300s +===================== + +Supported chips: + + * HiTRON HAC300S + + Prefix: 'hac300s' + + Datasheet: Publicly available at HiTRON website. + +Author: + + - Vasileios Amoiridis <vasileios.amoiridis@cern.ch> + +Description +----------- + +This driver supports the HiTRON HAC300S PSU. It is a Universal AC input +harmonic correction AC-DC hot-swappable CompactPCI Serial Dual output +(with 5V standby) 312 Watts active current sharing switching power supply. + +The device has an input of 90-264VAC and 2 nominal output voltaged at 12V and +5V which they can supplu up to 25A and 2.5A respectively. + +Sysfs entries +------------- + +======= ========================================== +curr1 Output current +in1 Output voltage +power1 Output power +temp1 Ambient temperature inside the module +temp2 Internal secondary component's temperature +======= ========================================== diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 85d7a686883e..b2ca8513cfcd 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -84,6 +84,7 @@ Hardware Monitoring Kernel Drivers gl518sm gpd-fan gxp-fan-ctrl + hac300s hih6130 hp-wmi-sensors hs3001 @@ -185,6 +186,7 @@ Hardware Monitoring Kernel Drivers mp2993 mp5023 mp5920 + mp5926 mp5990 mp9941 mp9945 @@ -218,7 +220,6 @@ Hardware Monitoring Kernel Drivers q54sj108a2 qnap-mcu-hwmon raspberrypi-hwmon - sa67 sbrmi sbtsi_temp sch5627 @@ -233,6 +234,7 @@ Hardware Monitoring Kernel Drivers shtc1 sis5595 sl28cpld + stef48h28 smpro-hwmon smsc47b397 smsc47m192 @@ -281,10 +283,3 @@ Hardware Monitoring Kernel Drivers xdpe12284 xdpe152c4 zl6100 - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/hwmon/mp5926.rst b/Documentation/hwmon/mp5926.rst new file mode 100644 index 000000000000..4b64a7e24ae6 --- /dev/null +++ b/Documentation/hwmon/mp5926.rst @@ -0,0 +1,92 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver mp5926 +==================== + +Supported chips: + + * MPS mp5926 + + Prefix: 'mp5926' + + * Datasheet + https://www.monolithicpower.com/en/ + +Author: + + Yuxi Wang <Yuxi.Wang@monolithicpower.com> + +Description +----------- + +This driver implements support for Monolithic Power Systems, Inc. (MPS) +MP5926 Hot-Swap Controller. + +Device compliant with: + +- PMBus rev 1.3 interface. + +The driver exports the following attributes via the 'sysfs' files +for input voltage: + +**in1_input** + +**in1_label** + +**in1_crit** + +**in1_crit_alarm** + +The driver provides the following attributes for output voltage: + +**in2_input** + +**in2_label** + +**in2_lcrit** + +**in2_lcrit_alarm** + +**in2_rated_max** + +**in2_rated_min** + +The driver provides the following attributes for input current: + +**curr1_input** + +**curr1_label** + +**curr1_max** + +**curr1_max_alarm** + +The driver provides the following attributes for output current: + +**curr2_input** + +**curr2_label** + +The driver provides the following attributes for input power: + +**power1_input** + +**power1_label** + +The driver provides the following attributes for output power: + +**power2_input** + +**power2_label** + +The driver provides the following attributes for temperature: + +**temp1_input** + +**temp1_crit** + +**temp1_crit_alarm** + +**temp1_max** + +**temp1_max_alarm** diff --git a/Documentation/hwmon/nct6683.rst b/Documentation/hwmon/nct6683.rst index 3e549ba95a15..45eec9dd349a 100644 --- a/Documentation/hwmon/nct6683.rst +++ b/Documentation/hwmon/nct6683.rst @@ -65,6 +65,7 @@ AMD BC-250 NCT6686D EC firmware version 1.0 build 07/28/21 ASRock X570 NCT6683D EC firmware version 1.0 build 06/28/19 ASRock X670E NCT6686D EC firmware version 1.0 build 05/19/22 ASRock B650 Steel Legend WiFi NCT6686D EC firmware version 1.0 build 11/09/23 +ASRock Z590 Taichi NCT6686D EC firmware version 1.0 build 01/25/21 MSI B550 NCT6687D EC firmware version 1.0 build 05/07/20 MSI X670-P NCT6687D EC firmware version 0.0 build 09/27/22 MSI X870E NCT6687D EC firmware version 0.0 build 11/13/24 diff --git a/Documentation/hwmon/sa67.rst b/Documentation/hwmon/sa67.rst deleted file mode 100644 index 029c7c169b7f..000000000000 --- a/Documentation/hwmon/sa67.rst +++ /dev/null @@ -1,41 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0-only - -Kernel driver sa67mcu -===================== - -Supported chips: - - * Kontron sa67mcu - - Prefix: 'sa67mcu' - - Datasheet: not available - -Authors: Michael Walle <mwalle@kernel.org> - -Description ------------ - -The sa67mcu is a board management controller which also exposes a hardware -monitoring controller. - -The controller has two voltage and one temperature sensor. The values are -hold in two 8 bit registers to form one 16 bit value. Reading the lower byte -will also capture the high byte to make the access atomic. The unit of the -volatge sensors are 1mV and the unit of the temperature sensor is 0.1degC. - -Sysfs entries -------------- - -The following attributes are supported. - -======================= ======================================================== -in0_label "VDDIN" -in0_input Measured VDDIN voltage. - -in1_label "VDD_RTC" -in1_input Measured VDD_RTC voltage. - -temp1_input MCU temperature. Roughly the board temperature. -======================= ======================================================== - diff --git a/Documentation/hwmon/sht3x.rst b/Documentation/hwmon/sht3x.rst index 9585fa7c5a5d..ea1642920295 100644 --- a/Documentation/hwmon/sht3x.rst +++ b/Documentation/hwmon/sht3x.rst @@ -23,6 +23,14 @@ Supported chips: - https://sensirion.com/media/documents/1DA31AFD/61641F76/Sensirion_Temperature_Sensors_STS3x_Datasheet.pdf - https://sensirion.com/media/documents/292A335C/65537BAF/Sensirion_Datasheet_STS32_STS33.pdf + * Sensirion SHT85 + + Prefix: 'sht85' + + Addresses scanned: none + + Datasheet: https://sensirion.com/media/documents/4B40CEF3/640B2346/Sensirion_Humidity_Sensors_SHT85_Datasheet.pdf + Author: - David Frey <david.frey@sensirion.com> @@ -31,15 +39,15 @@ Author: Description ----------- -This driver implements support for the Sensirion SHT3x-DIS and STS3x-DIS +This driver implements support for the Sensirion SHT3x-DIS, STS3x-DIS and SHT85 series of humidity and temperature sensors. Temperature is measured in degrees celsius, relative humidity is expressed as a percentage. In the sysfs interface, all values are scaled by 1000, i.e. the value for 31.5 degrees celsius is 31500. -The device communicates with the I2C protocol. Sensors can have the I2C -addresses 0x44 or 0x45 (0x4a or 0x4b for sts3x), depending on the wiring. See -Documentation/i2c/instantiating-devices.rst for methods to instantiate the -device. +The device communicates with the I2C protocol. SHT3x sensors can have the I2C +addresses 0x44 or 0x45 (0x4a or 0x4b for sts3x), depending on the wiring. SHT85 +address is 0x44 and is fixed. See Documentation/i2c/instantiating-devices.rst for +methods to instantiate the device. Even if sht3x sensor supports clock-stretch (blocking mode) and non-stretch (non-blocking mode) in single-shot mode, this driver only supports the latter. diff --git a/Documentation/hwmon/stef48h28.rst b/Documentation/hwmon/stef48h28.rst new file mode 100644 index 000000000000..63d75e9affd8 --- /dev/null +++ b/Documentation/hwmon/stef48h28.rst @@ -0,0 +1,71 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver stef48h28 +======================= + +Supported chips: + + * Analog Devices STEF48H28 + + Prefix: 'stef48h28' + + Addresses scanned: - + + Datasheet: https://www.st.com/resource/en/data_brief/stef48h28.pdf + +Author: + + - Charles Hsu <hsu.yungteng@gmail.com> + + +Description +----------- + +The STEF48H28 is a 30 A integrated e-fuse for 9-80 V DC power rails. +It provides inrush control, undervoltage/overvoltage lockout and +overcurrent protection using an adaptive (I x t) scheme that permits +short high-current pulses typical of CPU/GPU loads. + +The device offers an analog current-monitor output and an on-chip +temperature-monitor signal for system supervision. Startup behavior is +programmable through insertion-delay and soft-start settings. + +Additional features include power-good indication, self-diagnostics, +thermal shutdown and a PMBus interface for telemetry and status +reporting. + +Platform data support +--------------------- + +The driver supports standard PMBus driver platform data. + +Sysfs entries +------------- + +====================== ======================================================== +in1_label "vin". +in1_input Measured voltage. From READ_VIN register. +in1_min Minimum Voltage. From VIN_UV_WARN_LIMIT register. +in1_max Maximum voltage. From VIN_OV_WARN_LIMIT register. + +in2_label "vout1". +in2_input Measured voltage. From READ_VOUT register. +in2_min Minimum Voltage. From VOUT_UV_WARN_LIMIT register. +in2_max Maximum voltage. From VOUT_OV_WARN_LIMIT register. + +curr1_label "iin". curr1_input Measured current. From READ_IIN register. + +curr2_label "iout1". curr2_input Measured current. From READ_IOUT register. + +power1_label "pin" +power1_input Measured input power. From READ_PIN register. + +power2_label "pout1" +power2_input Measured output power. From READ_POUT register. + +temp1_input Measured temperature. From READ_TEMPERATURE_1 register. +temp1_max Maximum temperature. From OT_WARN_LIMIT register. +temp1_crit Critical high temperature. From OT_FAULT_LIMIT register. + +temp2_input Measured temperature. From READ_TEMPERATURE_2 register. +====================== ======================================================== diff --git a/Documentation/hwmon/submitting-patches.rst b/Documentation/hwmon/submitting-patches.rst index 6482c4f137dc..7f7095951750 100644 --- a/Documentation/hwmon/submitting-patches.rst +++ b/Documentation/hwmon/submitting-patches.rst @@ -82,7 +82,10 @@ increase the chances of your change being accepted. * Avoid calculations in macros and macro-generated functions. While such macros may save a line or so in the source, it obfuscates the code and makes code review more difficult. It may also result in code which is more complicated - than necessary. Use inline functions or just regular functions instead. + than necessary. Such macros may also evaluate their arguments multiple times. + This leads to Time-of-Check to Time-of-Use (TOCTOU) race conditions when + accessing shared data without locking, for example when calculating values in + sysfs show functions. Use inline functions or just regular functions instead. * Limit the number of kernel log messages. In general, your driver should not generate an error message just because a runtime operation failed. Report diff --git a/Documentation/hwmon/tmp108.rst b/Documentation/hwmon/tmp108.rst index bc4941d98268..c218ea333dd6 100644 --- a/Documentation/hwmon/tmp108.rst +++ b/Documentation/hwmon/tmp108.rst @@ -3,6 +3,15 @@ Kernel driver tmp108 Supported chips: + * NXP P3T1035 + + Prefix: 'p3t1035' + + Addresses scanned: none + + Datasheet: https://www.nxp.com/docs/en/data-sheet/P3T1035XUK_P3T2030XUK.pdf + + * NXP P3T1085 Prefix: 'p3t1085' @@ -11,6 +20,14 @@ Supported chips: Datasheet: https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf + * NXP P3T2030 + + Prefix: 'p3t2030' + + Addresses scanned: none + + Datasheet: https://www.nxp.com/docs/en/data-sheet/P3T1035XUK_P3T2030XUK.pdf + * Texas Instruments TMP108 Prefix: 'tmp108' diff --git a/Documentation/i2c/index.rst b/Documentation/i2c/index.rst index 2b213d4ce89c..ccf13718ce70 100644 --- a/Documentation/i2c/index.rst +++ b/Documentation/i2c/index.rst @@ -66,10 +66,3 @@ Legacy documentation :maxdepth: 1 old-module-parameters - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/iio/ad4062.rst b/Documentation/iio/ad4062.rst new file mode 100644 index 000000000000..d77287836430 --- /dev/null +++ b/Documentation/iio/ad4062.rst @@ -0,0 +1,148 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +============= +AD4062 driver +============= + +ADC driver for Analog Devices Inc. AD4060/AD4062 devices. The module name is +``ad4062``. + +Supported devices +================= + +The following chips are supported by this driver: + +* `AD4060 <https://www.analog.com/AD4060>`_ +* `AD4062 <https://www.analog.com/AD4062>`_ + +Wiring modes +============ + +The ADC is interfaced through an I3C bus, and contains two programmable GPIOs. + +The ADC convert-start happens on the SDA rising edge of the I3C stop (P) bit +at the end of the read command. + +The two programmable GPIOS are optional and have a role assigned if present in +the devicetree ``interrupt-names`` property: + +- GP0: Is assigned the role of Threshold Either signal. +- GP1: Is assigned the role of Data Ready signal. + +If the property ``gpio-controller`` is present in the devicetree, then the GPO +not present in the ``interrupt-names`` is exposed as a GPO. + +Device attributes +================= + +The ADC contains only one channel with following attributes: + +.. list-table:: Channel attributes + :header-rows: 1 + + * - Attribute + - Description + * - ``in_voltage_calibscale`` + - Sets the gain scaling factor that the hardware applies to the sample, + to compensate for system gain error. + * - ``in_voltage_oversampling_ratio`` + - Sets device's burst averaging mode to over sample using the + internal sample rate. Value 1 disable the burst averaging mode. + * - ``in_voltage_oversampling_ratio_available`` + - List of available oversampling values. + * - ``in_voltage_raw`` + - Returns the raw ADC voltage value. + * - ``in_voltage_scale`` + - Returns the channel scale in reference to the reference voltage + ``ref-supply`` or ``vdd-supply`` if the former not present. + +Also contain the following device attributes: + +.. list-table:: Device attributes + :header-rows: 1 + + * - Attribute + - Description + * - ``sampling_frequency`` + - Sets the duration of a single scan, used in the burst averaging mode. + The duration is described by ``(n_avg - 1) / fosc + tconv``, where + ``n_avg`` is the oversampling ratio, ``fosc`` is the internal sample + rate and ``tconv`` is the ADC conversion time. + * - ``sampling_frequency_available`` + - Lists the available sampling frequencies, computed on the current + oversampling ratio. If the ratio is 1, the frequency is ``1/tconv``. + +Interrupts +========== + +The interrupts are mapped through the ``interrupt-names`` and ``interrupts`` +properties. + +The ``interrupt-names`` ``gp0`` entry sets the role of Threshold signal, and +entry ``gp1`` the role of Data Ready signal. + +If each is not present, the driver fallback to enabling the same role as an +I3C IBI. + +Low-power mode +============== + +The device enters low-power mode on idle to save power. Enabling an event puts +the device out of the low-power since the ADC autonomously samples to assert +the event condition. + +IIO trigger support +=================== + +An IIO trigger ``ad4062-devX`` is registered by the driver to be used by the +same device, to capture samples to a software buffer. It is required to attach +the trigger to the device by setting the ``current_trigger`` before enabling +and reading the buffer. + +The acquisition is sequential and bounded by the protocol timings, software +latency and internal timings, the sample rate is not configurable. The burst +averaging mode does impact the effective sample rate, since it increases the +internal timing to output a single sample. + +Threshold events +================ + +The ADC supports a monitoring mode to raise threshold events. The driver +supports a single interrupt for both rising and falling readings. + +The feature is enabled/disabled by setting ``thresh_either_en``. During monitor +mode, the device continuously operates in autonomous mode. Any register access +puts the device back in configuration mode, due to this, any access disables +monitor mode. + +The following event attributes are available: + +.. list-table:: Event attributes + :header-rows: 1 + + * - Attribute + - Description + * - ``sampling_frequency`` + - Frequency used in the monitoring mode, sets the device internal sample + rate when the mode is activated. + * - ``sampling_frequency_available`` + - List of available sample rates. + * - ``thresh_either_en`` + - Enable monitoring mode. + * - ``thresh_falling_hysteresis`` + - Set the hysteresis value for the minimum threshold. + * - ``thresh_falling_value`` + - Set the minimum threshold value. + * - ``thresh_rising_hysteresis`` + - Set the hysteresis value for the maximum threshold. + * - ``thresh_rising_value`` + - Set the maximum threshold value. + +GPO controller support +====================== + +The device supports using GP0 and GP1 as GPOs. If the devicetree contains the +node ``gpio-controller```, the device is marked as a GPIO controller and the +GPs not listed in ``interrupt-names`` are exposed as a GPO. The GPIO index +matches the pin name, so if GP0 is not exposed but GP1 is, index 0 is masked +out and only index 1 can be set. diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index 315ae37d6fd4..ba3e609c6a13 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -22,6 +22,7 @@ Industrial I/O Kernel Drivers ad3552r ad4000 ad4030 + ad4062 ad4695 ad7191 ad7380 diff --git a/Documentation/infiniband/index.rst b/Documentation/infiniband/index.rst index 5b4c24125f66..c11049d25703 100644 --- a/Documentation/infiniband/index.rst +++ b/Documentation/infiniband/index.rst @@ -15,10 +15,3 @@ InfiniBand ucaps user_mad user_verbs - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/input/devices/index.rst b/Documentation/input/devices/index.rst index 95a453782bad..6de4365ad288 100644 --- a/Documentation/input/devices/index.rst +++ b/Documentation/input/devices/index.rst @@ -10,10 +10,3 @@ Linux kernel, their protocols, and driver details. :glob: * - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/input/gamepad.rst b/Documentation/input/gamepad.rst index 0c918b6f288b..ddc65fa36f11 100644 --- a/Documentation/input/gamepad.rst +++ b/Documentation/input/gamepad.rst @@ -79,7 +79,7 @@ change the mappings so you can advise users to set these. All new gamepads are supposed to comply with this mapping. Please report any bugs, if they don't. -There are a lot of less-featured/less-powerful devices out there, which re-use +There are a lot of less-featured/less-powerful devices out there, which reuse the buttons from this protocol. However, they try to do this in a compatible fashion. For example, the "Nintendo Wii Nunchuk" provides two trigger buttons and one analog stick. It reports them as if it were a gamepad with only one diff --git a/Documentation/input/index.rst b/Documentation/input/index.rst index 35581cd18e91..fbde5bc9f641 100644 --- a/Documentation/input/index.rst +++ b/Documentation/input/index.rst @@ -10,10 +10,3 @@ Contents: input_uapi input_kapi devices/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/input/input.rst b/Documentation/input/input.rst index d9a6de87d02d..7bbda39d8ac2 100644 --- a/Documentation/input/input.rst +++ b/Documentation/input/input.rst @@ -278,4 +278,4 @@ list is in include/uapi/linux/input-event-codes.h. EV_REL, absolute new value for EV_ABS (joysticks ...), or 0 for EV_KEY for release, 1 for keypress and 2 for autorepeat. -See :ref:`input-event-codes` for more information about various even codes. +See :ref:`input-event-codes` for more information about various event codes. diff --git a/Documentation/isdn/index.rst b/Documentation/isdn/index.rst index 9622939fa526..d1125a16a746 100644 --- a/Documentation/isdn/index.rst +++ b/Documentation/isdn/index.rst @@ -12,10 +12,3 @@ ISDN m_isdn credits - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/kbuild/gendwarfksyms.rst b/Documentation/kbuild/gendwarfksyms.rst index ed366250a54e..f1573dcc63ac 100644 --- a/Documentation/kbuild/gendwarfksyms.rst +++ b/Documentation/kbuild/gendwarfksyms.rst @@ -14,23 +14,46 @@ selected, **gendwarfksyms** is used instead to calculate symbol versions from the DWARF debugging information, which contains the necessary details about the final module ABI. +Dependencies +------------ + +gendwarfksyms depends on the libelf, libdw, and zlib libraries. + +Here are a few examples of how to install these dependencies: + +* Arch Linux and derivatives:: + + sudo pacman --needed -S libelf zlib + +* Debian, Ubuntu, and derivatives:: + + sudo apt install libelf-dev libdw-dev zlib1g-dev + +* Fedora and derivatives:: + + sudo dnf install elfutils-libelf-devel elfutils-devel zlib-devel + +* openSUSE and derivatives:: + + sudo zypper install libelf-devel libdw-devel zlib-devel + Usage ----- gendwarfksyms accepts a list of object files on the command line, and a list of symbol names (one per line) in standard input:: - Usage: gendwarfksyms [options] elf-object-file ... < symbol-list + Usage: gendwarfksyms [options] elf-object-file ... < symbol-list - Options: - -d, --debug Print debugging information - --dump-dies Dump DWARF DIE contents - --dump-die-map Print debugging information about die_map changes - --dump-types Dump type strings - --dump-versions Dump expanded type strings used for symbol versions - -s, --stable Support kABI stability features - -T, --symtypes file Write a symtypes file - -h, --help Print this message + Options: + -d, --debug Print debugging information + --dump-dies Dump DWARF DIE contents + --dump-die-map Print debugging information about die_map changes + --dump-types Dump type strings + --dump-versions Dump expanded type strings used for symbol versions + -s, --stable Support kABI stability features + -T, --symtypes file Write a symtypes file + -h, --help Print this message Type information availability @@ -46,9 +69,9 @@ TU where symbols are actually exported, gendwarfksyms adds a pointer to exported symbols in the `EXPORT_SYMBOL()` macro using the following macro:: - #define __GENDWARFKSYMS_EXPORT(sym) \ - static typeof(sym) *__gendwarfksyms_ptr_##sym __used \ - __section(".discard.gendwarfksyms") = &sym; + #define __GENDWARFKSYMS_EXPORT(sym) \ + static typeof(sym) *__gendwarfksyms_ptr_##sym __used \ + __section(".discard.gendwarfksyms") = &sym; When a symbol pointer is found in DWARF, gendwarfksyms can use its @@ -71,14 +94,14 @@ either a type reference or a symbol name. Type references have a one-letter prefix followed by "#" and the name of the type. Four reference types are supported:: - e#<type> = enum - s#<type> = struct - t#<type> = typedef - u#<type> = union + e#<type> = enum + s#<type> = struct + t#<type> = typedef + u#<type> = union Type names with spaces in them are wrapped in single quotes, e.g.:: - s#'core::result::Result<u8, core::num::error::ParseIntError>' + s#'core::result::Result<u8, core::num::error::ParseIntError>' The rest of the line contains a type string. Unlike with genksyms that produces C-style type strings, gendwarfksyms uses the same simple parsed @@ -128,8 +151,8 @@ the rules. The fields are as follows: The following helper macros, for example, can be used to specify rules in the source code:: - #define ___KABI_RULE(hint, target, value) \ - static const char __PASTE(__gendwarfksyms_rule_, \ + #define ___KABI_RULE(hint, target, value) \ + static const char __PASTE(__gendwarfksyms_rule_, \ __COUNTER__)[] __used __aligned(1) \ __section(".discard.gendwarfksyms.kabi_rules") = \ "1\0" #hint "\0" target "\0" value @@ -250,18 +273,18 @@ The rule fields are expected to be as follows: Using the `__KABI_RULE` macro, this rule can be defined as:: - #define KABI_BYTE_SIZE(fqn, value) \ - __KABI_RULE(byte_size, fqn, value) + #define KABI_BYTE_SIZE(fqn, value) \ + __KABI_RULE(byte_size, fqn, value) Example usage:: struct s { - /* Unchanged original members */ + /* Unchanged original members */ unsigned long a; - void *p; + void *p; - /* Appended new members */ - KABI_IGNORE(0, unsigned long n); + /* Appended new members */ + KABI_IGNORE(0, unsigned long n); }; KABI_BYTE_SIZE(s, 16); @@ -330,21 +353,21 @@ reserved member needs a unique name, but as the actual purpose is usually not known at the time the space is reserved, for convenience, names that start with `__kabi_` are left out when calculating symbol versions:: - struct s { - long a; - long __kabi_reserved_0; /* reserved for future use */ - }; + struct s { + long a; + long __kabi_reserved_0; /* reserved for future use */ + }; The reserved space can be taken into use by wrapping the member in a union, which includes the original type and the replacement member:: - struct s { - long a; - union { - long __kabi_reserved_0; /* original type */ - struct b b; /* replaced field */ - }; - }; + struct s { + long a; + union { + long __kabi_reserved_0; /* original type */ + struct b b; /* replaced field */ + }; + }; If the `__kabi_` naming scheme was used when reserving space, the name of the first member of the union must start with `__kabi_reserved`. This @@ -369,11 +392,11 @@ Predicting which structures will require changes during the support timeframe isn't always possible, in which case one might have to resort to placing new members into existing alignment holes:: - struct s { - int a; - /* a 4-byte alignment hole */ - unsigned long b; - }; + struct s { + int a; + /* a 4-byte alignment hole */ + unsigned long b; + }; While this won't change the size of the data structure, one needs to @@ -382,14 +405,14 @@ to reserved fields, this can be accomplished by wrapping the added member to a union where one of the fields has a name starting with `__kabi_ignored`:: - struct s { - int a; - union { - char __kabi_ignored_0; - int n; - }; - unsigned long b; - }; + struct s { + int a; + union { + char __kabi_ignored_0; + int n; + }; + unsigned long b; + }; With **--stable**, both versions produce the same symbol version. The examples include a `KABI_IGNORE` macro to simplify the code. diff --git a/Documentation/kbuild/index.rst b/Documentation/kbuild/index.rst index 3731ab22bfe7..f46233be82b9 100644 --- a/Documentation/kbuild/index.rst +++ b/Documentation/kbuild/index.rst @@ -24,10 +24,3 @@ Kernel Build System gendwarfksyms bash-completion - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/kbuild/kbuild.rst b/Documentation/kbuild/kbuild.rst index 82826b0332df..5a9013bacfb7 100644 --- a/Documentation/kbuild/kbuild.rst +++ b/Documentation/kbuild/kbuild.rst @@ -180,7 +180,7 @@ architecture. KDOCFLAGS --------- Specify extra (warning/error) flags for kernel-doc checks during the build, -see scripts/kernel-doc for which flags are supported. Note that this doesn't +see tools/docs/kernel-doc for which flags are supported. Note that this doesn't (currently) apply to documentation builds. ARCH diff --git a/Documentation/kbuild/kconfig-language.rst b/Documentation/kbuild/kconfig-language.rst index abce88f15d7c..d9338407c1c6 100644 --- a/Documentation/kbuild/kconfig-language.rst +++ b/Documentation/kbuild/kconfig-language.rst @@ -118,7 +118,7 @@ applicable everywhere (see syntax). This is a shorthand notation for a type definition plus a value. Optionally dependencies for this default value can be added with "if". -- dependencies: "depends on" <expr> +- dependencies: "depends on" <expr> ["if" <expr>] This defines a dependency for this menu entry. If multiple dependencies are defined, they are connected with '&&'. Dependencies @@ -134,6 +134,16 @@ applicable everywhere (see syntax). bool "foo" default y + The dependency definition itself may be conditional by appending "if" + followed by an expression. For example:: + + config FOO + tristate + depends on BAR if BAZ + + meaning that FOO is constrained by the value of BAR only if BAZ is + also set. + - reverse dependencies: "select" <symbol> ["if" <expr>] While normal dependencies reduce the upper limit of a symbol (see @@ -216,7 +226,7 @@ applicable everywhere (see syntax). - numerical ranges: "range" <symbol> <symbol> ["if" <expr>] - This allows to limit the range of possible input values for int + This allows limiting the range of possible input values for int and hex symbols. The user can only input a value which is larger than or equal to the first symbol and smaller than or equal to the second symbol. @@ -602,8 +612,14 @@ Some drivers are able to optionally use a feature from another module or build cleanly with that module disabled, but cause a link failure when trying to use that loadable module from a built-in driver. -The most common way to express this optional dependency in Kconfig logic -uses the slightly counterintuitive:: +The recommended way to express this optional dependency in Kconfig logic +uses the conditional form:: + + config FOO + tristate "Support for foo hardware" + depends on BAR if BAR + +This slightly counterintuitive style is also widely used:: config FOO tristate "Support for foo hardware" diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst index 8aef3650c1f3..24a4708d26e8 100644 --- a/Documentation/kbuild/makefiles.rst +++ b/Documentation/kbuild/makefiles.rst @@ -1264,7 +1264,7 @@ Add prerequisites to archheaders -------------------------------- The archheaders: rule is used to generate header files that -may be installed into user space by ``make header_install``. +may be installed into user space by ``make headers_install``. It is run before ``make archprepare`` when run on the architecture itself. diff --git a/Documentation/kernel-hacking/hacking.rst b/Documentation/kernel-hacking/hacking.rst index 0042776a9e17..ef527bdc5f8d 100644 --- a/Documentation/kernel-hacking/hacking.rst +++ b/Documentation/kernel-hacking/hacking.rst @@ -49,7 +49,7 @@ User Context User context is when you are coming in from a system call or other trap: like userspace, you can be preempted by more important tasks and by -interrupts. You can sleep, by calling :c:func:`schedule()`. +interrupts. You can sleep by calling schedule(). .. note:: @@ -57,13 +57,13 @@ interrupts. You can sleep, by calling :c:func:`schedule()`. operations on the block device layer. In user context, the ``current`` pointer (indicating the task we are -currently executing) is valid, and :c:func:`in_interrupt()` +currently executing) is valid, and in_interrupt() (``include/linux/preempt.h``) is false. .. warning:: Beware that if you have preemption or softirqs disabled (see below), - :c:func:`in_interrupt()` will return a false positive. + in_interrupt() will return a false positive. Hardware Interrupts (Hard IRQs) ------------------------------- @@ -115,7 +115,7 @@ time, although different tasklets can run simultaneously. 'tasks'. You can tell you are in a softirq (or tasklet) using the -:c:func:`in_softirq()` macro (``include/linux/preempt.h``). +in_softirq() macro (``include/linux/preempt.h``). .. warning:: @@ -171,7 +171,7 @@ in every architecture's ``include/asm/unistd.h`` and Linus. If all your routine does is read or write some parameter, consider -implementing a :c:func:`sysfs()` interface instead. +implementing a sysfs() interface instead. Inside the ioctl you're in user context to a process. When a error occurs you return a negated errno (see @@ -230,12 +230,12 @@ Really. Common Routines =============== -:c:func:`printk()` ------------------- +printk() +-------- Defined in ``include/linux/printk.h`` -:c:func:`printk()` feeds kernel messages to the console, dmesg, and +printk() feeds kernel messages to the console, dmesg, and the syslog daemon. It is useful for debugging and reporting errors, and can be used inside interrupt context, but use with caution: a machine which has its console flooded with printk messages is unusable. It uses @@ -253,7 +253,7 @@ address use:: printk(KERN_INFO "my ip: %pI4\n", &ipaddress); -:c:func:`printk()` internally uses a 1K buffer and does not catch +printk() internally uses a 1K buffer and does not catch overruns. Make sure that will be enough. .. note:: @@ -267,26 +267,26 @@ overruns. Make sure that will be enough. on top of its printf function: "Printf should not be used for chit-chat". You should follow that advice. -:c:func:`copy_to_user()` / :c:func:`copy_from_user()` / :c:func:`get_user()` / :c:func:`put_user()` ---------------------------------------------------------------------------------------------------- +copy_to_user() / copy_from_user() / get_user() / put_user() +----------------------------------------------------------- Defined in ``include/linux/uaccess.h`` / ``asm/uaccess.h`` **[SLEEPS]** -:c:func:`put_user()` and :c:func:`get_user()` are used to get +put_user() and get_user() are used to get and put single values (such as an int, char, or long) from and to userspace. A pointer into userspace should never be simply dereferenced: data should be copied using these routines. Both return ``-EFAULT`` or 0. -:c:func:`copy_to_user()` and :c:func:`copy_from_user()` are +copy_to_user() and copy_from_user() are more general: they copy an arbitrary amount of data to and from userspace. .. warning:: - Unlike :c:func:`put_user()` and :c:func:`get_user()`, they + Unlike put_user() and get_user(), they return the amount of uncopied data (ie. 0 still means success). [Yes, this objectionable interface makes me cringe. The flamewar comes @@ -296,8 +296,8 @@ The functions may sleep implicitly. This should never be called outside user context (it makes no sense), with interrupts disabled, or a spinlock held. -:c:func:`kmalloc()`/:c:func:`kfree()` -------------------------------------- +kmalloc()/kfree() +----------------- Defined in ``include/linux/slab.h`` @@ -305,7 +305,7 @@ Defined in ``include/linux/slab.h`` These routines are used to dynamically request pointer-aligned chunks of memory, like malloc and free do in userspace, but -:c:func:`kmalloc()` takes an extra flag word. Important values: +kmalloc() takes an extra flag word. Important values: ``GFP_KERNEL`` May sleep and swap to free memory. Only allowed in user context, but @@ -326,27 +326,27 @@ interrupt context without ``GFP_ATOMIC``. You should really fix that. Run, don't walk. If you are allocating at least ``PAGE_SIZE`` (``asm/page.h`` or -``asm/page_types.h``) bytes, consider using :c:func:`__get_free_pages()` +``asm/page_types.h``) bytes, consider using __get_free_pages() (``include/linux/gfp.h``). It takes an order argument (0 for page sized, 1 for double page, 2 for four pages etc.) and the same memory priority flag word as above. If you are allocating more than a page worth of bytes you can use -:c:func:`vmalloc()`. It'll allocate virtual memory in the kernel +vmalloc(). It'll allocate virtual memory in the kernel map. This block is not contiguous in physical memory, but the MMU makes it look like it is for you (so it'll only look contiguous to the CPUs, not to external device drivers). If you really need large physically contiguous memory for some weird device, you have a problem: it is poorly supported in Linux because after some time memory fragmentation in a running kernel makes it hard. The best way is to allocate the block -early in the boot process via the :c:func:`alloc_bootmem()` +early in the boot process via the alloc_bootmem() routine. Before inventing your own cache of often-used objects consider using a slab cache in ``include/linux/slab.h`` -:c:macro:`current` ------------------- +current +------- Defined in ``include/asm/current.h`` @@ -355,48 +355,48 @@ task structure, so is only valid in user context. For example, when a process makes a system call, this will point to the task structure of the calling process. It is **not NULL** in interrupt context. -:c:func:`mdelay()`/:c:func:`udelay()` -------------------------------------- +mdelay()/udelay() +----------------- Defined in ``include/asm/delay.h`` / ``include/linux/delay.h`` -The :c:func:`udelay()` and :c:func:`ndelay()` functions can be +The udelay() and ndelay() functions can be used for small pauses. Do not use large values with them as you risk -overflow - the helper function :c:func:`mdelay()` is useful here, or -consider :c:func:`msleep()`. +overflow - the helper function mdelay() is useful here, or +consider msleep(). -:c:func:`cpu_to_be32()`/:c:func:`be32_to_cpu()`/:c:func:`cpu_to_le32()`/:c:func:`le32_to_cpu()` ------------------------------------------------------------------------------------------------ +cpu_to_be32()/be32_to_cpu()/cpu_to_le32()/le32_to_cpu() +------------------------------------------------------- Defined in ``include/asm/byteorder.h`` -The :c:func:`cpu_to_be32()` family (where the "32" can be replaced +The cpu_to_be32() family (where the "32" can be replaced by 64 or 16, and the "be" can be replaced by "le") are the general way to do endian conversions in the kernel: they return the converted value. All variations supply the reverse as well: -:c:func:`be32_to_cpu()`, etc. +be32_to_cpu(), etc. There are two major variations of these functions: the pointer -variation, such as :c:func:`cpu_to_be32p()`, which take a pointer +variation, such as cpu_to_be32p(), which take a pointer to the given type, and return the converted value. The other variation -is the "in-situ" family, such as :c:func:`cpu_to_be32s()`, which +is the "in-situ" family, such as cpu_to_be32s(), which convert value referred to by the pointer, and return void. -:c:func:`local_irq_save()`/:c:func:`local_irq_restore()` --------------------------------------------------------- +local_irq_save()/local_irq_restore() +------------------------------------ Defined in ``include/linux/irqflags.h`` These routines disable hard interrupts on the local CPU, and restore them. They are reentrant; saving the previous state in their one ``unsigned long flags`` argument. If you know that interrupts are -enabled, you can simply use :c:func:`local_irq_disable()` and -:c:func:`local_irq_enable()`. +enabled, you can simply use local_irq_disable() and +local_irq_enable(). .. _local_bh_disable: -:c:func:`local_bh_disable()`/:c:func:`local_bh_enable()` --------------------------------------------------------- +local_bh_disable()/local_bh_enable() +------------------------------------ Defined in ``include/linux/bottom_half.h`` @@ -406,15 +406,15 @@ them. They are reentrant; if soft interrupts were disabled before, they will still be disabled after this pair of functions has been called. They prevent softirqs and tasklets from running on the current CPU. -:c:func:`smp_processor_id()` ----------------------------- +smp_processor_id() +------------------ Defined in ``include/linux/smp.h`` -:c:func:`get_cpu()` disables preemption (so you won't suddenly get +get_cpu() disables preemption (so you won't suddenly get moved to another CPU) and returns the current processor number, between 0 and ``NR_CPUS``. Note that the CPU numbers are not necessarily -continuous. You return it again with :c:func:`put_cpu()` when you +continuous. You return it again with put_cpu() when you are done. If you know you cannot be preempted by another task (ie. you are in @@ -433,25 +433,25 @@ initialization. ``__exit`` is used to declare a function which is only required on exit: the function will be dropped if this file is not compiled as a module. See the header file for use. Note that it makes no sense for a function marked with ``__init`` to be exported to modules -with :c:func:`EXPORT_SYMBOL()` or :c:func:`EXPORT_SYMBOL_GPL()`- this +with EXPORT_SYMBOL() or EXPORT_SYMBOL_GPL()- this will break. -:c:func:`__initcall()`/:c:func:`module_init()` ----------------------------------------------- +__initcall()/module_init() +-------------------------- Defined in ``include/linux/init.h`` / ``include/linux/module.h`` Many parts of the kernel are well served as a module (dynamically-loadable parts of the kernel). Using the -:c:func:`module_init()` and :c:func:`module_exit()` macros it +module_init() and module_exit() macros it is easy to write code without #ifdefs which can operate both as a module or built into the kernel. -The :c:func:`module_init()` macro defines which function is to be +The module_init() macro defines which function is to be called at module insertion time (if the file is compiled as a module), or at boot time: if the file is not compiled as a module the -:c:func:`module_init()` macro becomes equivalent to -:c:func:`__initcall()`, which through linker magic ensures that +module_init() macro becomes equivalent to +__initcall(), which through linker magic ensures that the function is called on boot. The function can return a negative error number to cause module loading @@ -459,9 +459,8 @@ to fail (unfortunately, this has no effect if the module is compiled into the kernel). This function is called in user context with interrupts enabled, so it can sleep. -:c:func:`module_exit()` ------------------------ - +module_exit() +------------- Defined in ``include/linux/module.h`` @@ -474,18 +473,18 @@ it returns. Note that this macro is optional: if it is not present, your module will not be removable (except for 'rmmod -f'). -:c:func:`try_module_get()`/:c:func:`module_put()` -------------------------------------------------- +try_module_get()/module_put() +----------------------------- Defined in ``include/linux/module.h`` These manipulate the module usage count, to protect against removal (a module also can't be removed if another module uses one of its exported symbols: see below). Before calling into module code, you should call -:c:func:`try_module_get()` on that module: if it fails, then the +try_module_get() on that module: if it fails, then the module is being removed and you should act as if it wasn't there. Otherwise, you can safely enter the module, and call -:c:func:`module_put()` when you're finished. +module_put() when you're finished. Most registerable structures have an owner field, such as in the :c:type:`struct file_operations <file_operations>` structure. @@ -506,8 +505,8 @@ Declaring --------- You declare a ``wait_queue_head_t`` using the -:c:func:`DECLARE_WAIT_QUEUE_HEAD()` macro, or using the -:c:func:`init_waitqueue_head()` routine in your initialization +DECLARE_WAIT_QUEUE_HEAD() macro, or using the +init_waitqueue_head() routine in your initialization code. Queuing @@ -515,16 +514,16 @@ Queuing Placing yourself in the waitqueue is fairly complex, because you must put yourself in the queue before checking the condition. There is a -macro to do this: :c:func:`wait_event_interruptible()` +macro to do this: wait_event_interruptible() (``include/linux/wait.h``) The first argument is the wait queue head, and the second is an expression which is evaluated; the macro returns 0 when this expression is true, or ``-ERESTARTSYS`` if a signal is received. The -:c:func:`wait_event()` version ignores signals. +wait_event() version ignores signals. Waking Up Queued Tasks ---------------------- -Call :c:func:`wake_up()` (``include/linux/wait.h``), which will wake +Call wake_up() (``include/linux/wait.h``), which will wake up every process in the queue. The exception is if one has ``TASK_EXCLUSIVE`` set, in which case the remainder of the queue will not be woken. There are other variants of this basic function available @@ -537,10 +536,10 @@ Certain operations are guaranteed atomic on all platforms. The first class of operations work on :c:type:`atomic_t` (``include/asm/atomic.h``); this contains a signed integer (at least 32 bits long), and you must use these functions to manipulate or read :c:type:`atomic_t` variables. -:c:func:`atomic_read()` and :c:func:`atomic_set()` get and set -the counter, :c:func:`atomic_add()`, :c:func:`atomic_sub()`, -:c:func:`atomic_inc()`, :c:func:`atomic_dec()`, and -:c:func:`atomic_dec_and_test()` (returns true if it was +atomic_read() and atomic_set() get and set +the counter, atomic_add(), atomic_sub(), +atomic_inc(), atomic_dec(), and +atomic_dec_and_test() (returns true if it was decremented to zero). Yes. It returns true (i.e. != 0) if the atomic variable is zero. @@ -551,11 +550,11 @@ should not be used unnecessarily. The second class of atomic operations is atomic bit operations on an ``unsigned long``, defined in ``include/linux/bitops.h``. These operations generally take a pointer to the bit pattern, and a bit -number: 0 is the least significant bit. :c:func:`set_bit()`, -:c:func:`clear_bit()` and :c:func:`change_bit()` set, clear, -and flip the given bit. :c:func:`test_and_set_bit()`, -:c:func:`test_and_clear_bit()` and -:c:func:`test_and_change_bit()` do the same thing, except return +number: 0 is the least significant bit. set_bit(), +clear_bit() and change_bit() set, clear, +and flip the given bit. test_and_set_bit(), +test_and_clear_bit() and +test_and_change_bit() do the same thing, except return true if the bit was previously set; these are particularly useful for atomically setting flags. @@ -572,42 +571,42 @@ be used anywhere in the kernel). However, for modules, a special exported symbol table is kept which limits the entry points to the kernel proper. Modules can also export symbols. -:c:func:`EXPORT_SYMBOL()` -------------------------- +EXPORT_SYMBOL() +--------------- Defined in ``include/linux/export.h`` This is the classic method of exporting a symbol: dynamically loaded modules will be able to use the symbol as normal. -:c:func:`EXPORT_SYMBOL_GPL()` ------------------------------ +EXPORT_SYMBOL_GPL() +------------------- Defined in ``include/linux/export.h`` -Similar to :c:func:`EXPORT_SYMBOL()` except that the symbols -exported by :c:func:`EXPORT_SYMBOL_GPL()` can only be seen by -modules with a :c:func:`MODULE_LICENSE()` that specifies a GPLv2 +Similar to EXPORT_SYMBOL() except that the symbols +exported by EXPORT_SYMBOL_GPL() can only be seen by +modules with a MODULE_LICENSE() that specifies a GPLv2 compatible license. It implies that the function is considered an internal implementation issue, and not really an interface. Some maintainers and developers may however require EXPORT_SYMBOL_GPL() when adding any new APIs or functionality. -:c:func:`EXPORT_SYMBOL_NS()` ----------------------------- +EXPORT_SYMBOL_NS() +------------------ Defined in ``include/linux/export.h`` -This is the variant of `EXPORT_SYMBOL()` that allows specifying a symbol +This is the variant of EXPORT_SYMBOL() that allows specifying a symbol namespace. Symbol Namespaces are documented in Documentation/core-api/symbol-namespaces.rst -:c:func:`EXPORT_SYMBOL_NS_GPL()` --------------------------------- +EXPORT_SYMBOL_NS_GPL() +---------------------- Defined in ``include/linux/export.h`` -This is the variant of `EXPORT_SYMBOL_GPL()` that allows specifying a symbol +This is the variant of EXPORT_SYMBOL_GPL() that allows specifying a symbol namespace. Symbol Namespaces are documented in Documentation/core-api/symbol-namespaces.rst @@ -621,7 +620,7 @@ There used to be three sets of linked-list routines in the kernel headers, but this one is the winner. If you don't have some particular pressing need for a single list, it's a good choice. -In particular, :c:func:`list_for_each_entry()` is useful. +In particular, list_for_each_entry() is useful. Return Conventions ------------------ @@ -631,9 +630,9 @@ and return 0 for success, and a negative error number (eg. ``-EFAULT``) for failure. This can be unintuitive at first, but it's fairly widespread in the kernel. -Using :c:func:`ERR_PTR()` (``include/linux/err.h``) to encode a -negative error number into a pointer, and :c:func:`IS_ERR()` and -:c:func:`PTR_ERR()` to get it back out again: avoids a separate +Using ERR_PTR() (``include/linux/err.h``) to encode a +negative error number into a pointer, and IS_ERR() and +PTR_ERR() to get it back out again: avoids a separate pointer parameter for the error number. Icky, but in a good way. Breaking Compilation @@ -736,7 +735,7 @@ make a neat patch, there's administrative work to be done: - Usually you want a configuration option for your kernel hack. Edit ``Kconfig`` in the appropriate directory. The Config language is simple to use by cut and paste, and there's complete documentation in - ``Documentation/kbuild/kconfig-language.rst``. + Documentation/kbuild/kconfig-language.rst. In your description of the option, make sure you address both the expert user and the user who knows nothing about your feature. @@ -746,7 +745,7 @@ make a neat patch, there's administrative work to be done: - Edit the ``Makefile``: the CONFIG variables are exported here so you can usually just add a "obj-$(CONFIG_xxx) += xxx.o" line. The syntax - is documented in ``Documentation/kbuild/makefiles.rst``. + is documented in Documentation/kbuild/makefiles.rst. - Put yourself in ``CREDITS`` if you consider what you've done noteworthy, usually beyond a single file (your name should be at the @@ -755,7 +754,7 @@ make a neat patch, there's administrative work to be done: it implies a more-than-passing commitment to some part of the code. - Finally, don't forget to read - ``Documentation/process/submitting-patches.rst`` + Documentation/process/submitting-patches.rst. Kernel Cantrips =============== @@ -824,7 +823,7 @@ Thanks Thanks to Andi Kleen for the idea, answering my questions, fixing my mistakes, filling content, etc. Philipp Rumpf for more spelling and clarity fixes, and some excellent non-obvious points. Werner Almesberger -for giving me a great summary of :c:func:`disable_irq()`, and Jes +for giving me a great summary of disable_irq(), and Jes Sorensen and Andrea Arcangeli added caveats. Michael Elizabeth Chastain for checking and adding to the Configure section. Telsa Gwynne for teaching me DocBook. diff --git a/Documentation/leds/index.rst b/Documentation/leds/index.rst index 76fae171039c..bebf44004278 100644 --- a/Documentation/leds/index.rst +++ b/Documentation/leds/index.rst @@ -25,6 +25,7 @@ LEDs leds-lp5523 leds-lp5562 leds-lp55xx + leds-lp5812 leds-mlxcpld leds-mt6370-rgb leds-sc27xx diff --git a/Documentation/leds/leds-lp5812.rst b/Documentation/leds/leds-lp5812.rst new file mode 100644 index 000000000000..c2a6368d5149 --- /dev/null +++ b/Documentation/leds/leds-lp5812.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================== +Kernel driver for lp5812 +======================== + +* TI/National Semiconductor LP5812 LED Driver +* Datasheet: https://www.ti.com/product/LP5812#tech-docs + +Authors: Jared Zhou <jared-zhou@ti.com> + +Description +=========== + +The LP5812 is a 4x3 matrix LED driver with support for both manual and +autonomous animation control. This driver provides sysfs interfaces to +control and configure the LP5812 device and its LED channels. + +Sysfs Interface +=============== + +This driver uses the standard multicolor LED class interfaces defined +in Documentation/ABI/testing/sysfs-class-led-multicolor.rst. + +Each LP5812 LED output appears under ``/sys/class/leds/`` with its +assigned label (for example ``LED_A``). + +The following attributes are exposed: + - multi_intensity: Per-channel RGB intensity control + - brightness: Standard brightness control (0-255) + +Autonomous Control Modes +======================== + +The driver also supports autonomous control through pattern configuration +(e.g., direct, tcmscan, or mixscan modes) defined in the device tree. +When configured, the LP5812 can generate transitions and color effects +without CPU intervention. + +Refer to the device tree binding document for valid mode strings and +configuration examples. + +Example Usage +============= + +To control LED_A:: + # Set RGB intensity (R=50, G=50, B=50) + echo 50 50 50 > /sys/class/leds/LED_A/multi_intensity + # Set overall brightness to maximum + echo 255 > /sys/class/leds/LED_A/brightness diff --git a/Documentation/livepatch/index.rst b/Documentation/livepatch/index.rst index cebf1c71d4a5..d2e7aa0f7f89 100644 --- a/Documentation/livepatch/index.rst +++ b/Documentation/livepatch/index.rst @@ -15,10 +15,3 @@ Kernel Livepatching system-state reliable-stacktrace api - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/locking/index.rst b/Documentation/locking/index.rst index 6a9ea96c8bcb..9278d95b7dcb 100644 --- a/Documentation/locking/index.rst +++ b/Documentation/locking/index.rst @@ -24,10 +24,3 @@ Locking percpu-rw-semaphore robust-futexes robust-futex-ABI - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/mhi/index.rst b/Documentation/mhi/index.rst index 1d8dec302780..0aa00482aa2e 100644 --- a/Documentation/mhi/index.rst +++ b/Documentation/mhi/index.rst @@ -9,10 +9,3 @@ MHI mhi topology - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/misc-devices/amd-sbi.rst b/Documentation/misc-devices/amd-sbi.rst index 07ceb44fbe5e..f91ddadefe48 100644 --- a/Documentation/misc-devices/amd-sbi.rst +++ b/Documentation/misc-devices/amd-sbi.rst @@ -15,7 +15,7 @@ and SB Temperature Sensor Interface (SB-TSI)). More details on the interface can be found in chapter "5 Advanced Platform Management Link (APML)" of the family/model PPR [1]_. -.. [1] https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +.. [1] https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 SBRMI device diff --git a/Documentation/misc-devices/oxsemi-tornado.rst b/Documentation/misc-devices/oxsemi-tornado.rst index b33351bef6cf..fe2e5f726c2b 100644 --- a/Documentation/misc-devices/oxsemi-tornado.rst +++ b/Documentation/misc-devices/oxsemi-tornado.rst @@ -89,31 +89,7 @@ With the baud base set to 15625000 and the unsigned 16-bit UART_DIV_MAX limitation imposed by ``serial8250_get_baud_rate`` standard baud rates below 300bps become unavailable in the regular way, e.g. the rate of 200bps requires the baud base to be divided by 78125 and that is beyond -the unsigned 16-bit range. The historic spd_cust feature can still be -used by encoding the values for, the prescaler, the oversampling rate -and the clock divisor (DLM/DLL) as follows to obtain such rates if so -required: - -:: - - 31 29 28 20 19 16 15 0 - +-----+-----------------+-------+-------------------------------+ - |0 0 0| CPR2:CPR | TCR | DLM:DLL | - +-----+-----------------+-------+-------------------------------+ - -Use a value such encoded for the ``custom_divisor`` field along with the -ASYNC_SPD_CUST flag set in the ``flags`` field in ``struct serial_struct`` -passed with the TIOCSSERIAL ioctl(2), such as with the setserial(8) -utility and its ``divisor`` and ``spd_cust`` parameters, and then select -the baud rate of 38400bps. Note that the value of 0 in TCR sets the -oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are -clamped by the driver to 1. - -For example the value of 0x1f4004e2 will set CPR2/CPR, TCR and DLM/DLL -respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler value, -the oversampling rate and the clock divisor of 62.500, 16 and 1250 -respectively. These parameters will set the baud rate for the serial -port to 62500000 / 62.500 / 1250 / 16 = 50bps. +the unsigned 16-bit range. Maciej W. Rozycki <macro@orcam.me.uk> diff --git a/Documentation/mm/allocation-profiling.rst b/Documentation/mm/allocation-profiling.rst index 316311240e6a..5389d241176a 100644 --- a/Documentation/mm/allocation-profiling.rst +++ b/Documentation/mm/allocation-profiling.rst @@ -33,6 +33,16 @@ Boot parameter: sysctl: /proc/sys/vm/mem_profiling + 1: Enable memory profiling. + + 0: Disable memory profiling. + + The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT. + + When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid + warnings produced by allocations made while profiling is disabled and freed + when it's enabled. + Runtime info: /proc/allocinfo diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index 2d8d8ca1e0a3..dd64f5d7f319 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -585,6 +585,10 @@ mechanism tries to make ``current_value`` of ``target_metric`` be same to specific NUMA node, in bp (1/10,000). - ``node_memcg_free_bp``: Specific cgroup's node unused memory ratio for a specific NUMA node, in bp (1/10,000). +- ``active_mem_bp``: Active to active + inactive (LRU) memory size ratio in bp + (1/10,000). +- ``inactive_mem_bp``: Inactive to active + inactive (LRU) memory size ratio in + bp (1/10,000). ``nid`` is optionally required for only ``node_mem_used_bp``, ``node_mem_free_bp``, ``node_memcg_used_bp`` and ``node_memcg_free_bp`` to @@ -718,6 +722,9 @@ scheme's execution. - ``nr_applied``: Total number of regions that the scheme is applied. - ``sz_applied``: Total size of regions that the scheme is applied. - ``qt_exceeds``: Total number of times the quota of the scheme has exceeded. +- ``nr_snapshots``: Total number of DAMON snapshots that the scheme is tried to + be applied. +- ``max_nr_snapshots``: Upper limit of ``nr_snapshots``. "A scheme is tried to be applied to a region" means DAMOS core logic determined the region is eligible to apply the scheme's :ref:`action @@ -739,6 +746,10 @@ to exclude anonymous pages and the region has only anonymous pages, or if the action is ``pageout`` while all pages of the region are unreclaimable, applying the action to the region will fail. +Unlike normal stats, ``max_nr_snapshots`` is set by users. If it is set as +non-zero and ``nr_snapshots`` be same to or greater than ``nr_snapshots``, the +scheme is deactivated. + To know how user-space can read the stats via :ref:`DAMON sysfs interface <sysfs_interface>`, refer to :ref:s`stats <sysfs_stats>` part of the documentation. @@ -798,14 +809,16 @@ The ABIs are designed to be used for user space applications development, rather than human beings' fingers. Human users are recommended to use such user space tools. One such Python-written user space tool is available at Github (https://github.com/damonitor/damo), Pypi -(https://pypistats.org/packages/damo), and Fedora -(https://packages.fedoraproject.org/pkgs/python-damo/damo/). +(https://pypistats.org/packages/damo), and multiple distros +(https://repology.org/project/damo/versions). Currently, one module for this type, namely 'DAMON sysfs interface' is available. Please refer to the ABI :ref:`doc <sysfs_interface>` for details of the interfaces. +.. _damon_modules_special_purpose: + Special-Purpose Access-aware Kernel Modules ------------------------------------------- @@ -823,5 +836,18 @@ To support such cases, yet more DAMON API user kernel modules that provide more simple and optimized user space interfaces are available. Currently, two modules for proactive reclamation and LRU lists manipulation are provided. For more detail, please read the usage documents for those -(:doc:`/admin-guide/mm/damon/reclaim` and +(:doc:`/admin-guide/mm/damon/stat`, :doc:`/admin-guide/mm/damon/reclaim` and :doc:`/admin-guide/mm/damon/lru_sort`). + + +Sample DAMON Modules +-------------------- + +DAMON modules that provides example DAMON kernel API usages. + +kernel programmers can build their own special or general purpose DAMON modules +using DAMON kernel API. To help them easily understand how DAMON kernel API +can be used, a few sample modules are provided under ``samples/damon/`` of the +linux source tree. Please note that these modules are not developed for being +used on real products, but only for showing how DAMON kernel API can be used in +simple ways. diff --git a/Documentation/mm/damon/index.rst b/Documentation/mm/damon/index.rst index 31c1fa955b3d..82f6c5eea49a 100644 --- a/Documentation/mm/damon/index.rst +++ b/Documentation/mm/damon/index.rst @@ -4,28 +4,15 @@ DAMON: Data Access MONitoring and Access-aware System Operations ================================================================ -DAMON is a Linux kernel subsystem that provides a framework for data access -monitoring and the monitoring results based system operations. The core -monitoring :ref:`mechanisms <damon_design_monitoring>` of DAMON make it - - - *accurate* (the monitoring output is useful enough for DRAM level memory - management; It might not appropriate for CPU Cache levels, though), - - *light-weight* (the monitoring overhead is low enough to be applied online), - and - - *scalable* (the upper-bound of the overhead is in constant range regardless - of the size of target workloads). - -Using this framework, therefore, the kernel can operate system in an -access-aware fashion. Because the features are also exposed to the :doc:`user -space </admin-guide/mm/damon/index>`, users who have special information about -their workloads can write personalized applications for better understanding -and optimizations of their workloads and systems. - -For easier development of such systems, DAMON provides a feature called -:ref:`DAMOS <damon_design_damos>` (DAMon-based Operation Schemes) in addition -to the monitoring. Using the feature, DAMON users in both kernel and :doc:`user -spaces </admin-guide/mm/damon/index>` can do access-aware system operations -with no code but simple configurations. +DAMON is a Linux kernel subsystem for efficient :ref:`data access monitoring +<damon_design_monitoring>` and :ref:`access-aware system operations +<damon_design_damos>`. It is designed for being + + - *accurate* (for DRAM level memory management), + - *light-weight* (for production online usages), + - *scalable* (in terms of memory size), + - *tunable* (for flexible usages), and + - *autoamted* (for production operation without manual tunings). .. toctree:: :maxdepth: 2 diff --git a/Documentation/mm/damon/maintainer-profile.rst b/Documentation/mm/damon/maintainer-profile.rst index e761edada1e9..41b1d73b9bd7 100644 --- a/Documentation/mm/damon/maintainer-profile.rst +++ b/Documentation/mm/damon/maintainer-profile.rst @@ -3,8 +3,8 @@ DAMON Maintainer Entry Profile ============================== -The DAMON subsystem covers the files that are listed in 'DATA ACCESS MONITOR' -section of 'MAINTAINERS' file. +The DAMON subsystem covers the files that are listed in 'DAMON' section of +'MAINTAINERS' file. The mailing lists for the subsystem are damon@lists.linux.dev and linux-mm@kvack.org. Patches should be made against the `mm-new tree @@ -48,8 +48,7 @@ Further doing below and putting the results will be helpful. - Run `damon-tests/corr <https://github.com/damonitor/damon-tests/tree/master/corr>`_ for normal changes. -- Run `damon-tests/perf - <https://github.com/damonitor/damon-tests/tree/master/perf>`_ for performance +- Measure impacts on benchmarks or real world workloads for performance changes. Key cycle dates diff --git a/Documentation/mm/memfd_preservation.rst b/Documentation/mm/memfd_preservation.rst index 66e0fb6d5ef0..a8a5b476afd3 100644 --- a/Documentation/mm/memfd_preservation.rst +++ b/Documentation/mm/memfd_preservation.rst @@ -20,4 +20,4 @@ See Also ======== - :doc:`/core-api/liveupdate` -- :doc:`/core-api/kho/concepts` +- :doc:`/core-api/kho/index` diff --git a/Documentation/mm/memory-model.rst b/Documentation/mm/memory-model.rst index 7957122039e8..199b11328f4f 100644 --- a/Documentation/mm/memory-model.rst +++ b/Documentation/mm/memory-model.rst @@ -97,9 +97,6 @@ sections: `mem_section` objects and the number of rows is calculated to fit all the memory sections. -The architecture setup code should call sparse_init() to -initialize the memory sections and the memory maps. - With SPARSEMEM there are two possible ways to convert a PFN to the corresponding `struct page` - a "classic sparse" and "sparse vmemmap". The selection is made at build time and it is determined by diff --git a/Documentation/mm/page_tables.rst b/Documentation/mm/page_tables.rst index e7c69cc32493..126c87628250 100644 --- a/Documentation/mm/page_tables.rst +++ b/Documentation/mm/page_tables.rst @@ -26,9 +26,9 @@ Physical memory address 0 will be *pfn 0* and the highest pfn will be the last page of physical memory the external address bus of the CPU can address. -With a page granularity of 4KB and a address range of 32 bits, pfn 0 is at +With a page granularity of 4KB and an address range of 32 bits, pfn 0 is at address 0x00000000, pfn 1 is at address 0x00001000, pfn 2 is at 0x00002000 -and so on until we reach pfn 0xfffff at 0xfffff000. With 16KB pages pfs are +and so on until we reach pfn 0xfffff at 0xfffff000. With 16KB pages pfns are at 0x00004000, 0x00008000 ... 0xffffc000 and pfn goes from 0 to 0x3ffff. As you can see, with 4KB pages the page base address uses bits 12-31 of the @@ -38,8 +38,8 @@ address, and this is why `PAGE_SHIFT` in this case is defined as 12 and Over time a deeper hierarchy has been developed in response to increasing memory sizes. When Linux was created, 4KB pages and a single page table called `swapper_pg_dir` with 1024 entries was used, covering 4MB which coincided with -the fact that Torvald's first computer had 4MB of physical memory. Entries in -this single table were referred to as *PTE*:s - page table entries. +the fact that Torvalds's first computer had 4MB of physical memory. Entries in +this single table were referred to as *PTEs* - page table entries. The software page table hierarchy reflects the fact that page table hardware has become hierarchical and that in turn is done to save page table memory and @@ -212,7 +212,7 @@ threshold. Additionally, page faults may be also caused by code bugs or by maliciously crafted addresses that the CPU is instructed to access. A thread of a process could use instructions to address (non-shared) memory which does not belong to -its own address space, or could try to execute an instruction that want to write +its own address space, or could try to execute an instruction that wants to write to a read-only location. If the above-mentioned conditions happen in user-space, the kernel sends a @@ -277,5 +277,5 @@ To conclude this high altitude view of how Linux handles page faults, let's add that the page faults handler can be disabled and enabled respectively with `pagefault_disable()` and `pagefault_enable()`. -Several code path make use of the latter two functions because they need to +Several code paths make use of the latter two functions because they need to disable traps into the page faults handler, mostly to prevent deadlocks. diff --git a/Documentation/mm/process_addrs.rst b/Documentation/mm/process_addrs.rst index 7f2f3e87071d..851680ead45f 100644 --- a/Documentation/mm/process_addrs.rst +++ b/Documentation/mm/process_addrs.rst @@ -583,7 +583,7 @@ To access PTE-level page tables, a helper like :c:func:`!pte_offset_map_lock` or :c:func:`!pte_offset_map` can be used depending on stability requirements. These map the page table into kernel memory if required, take the RCU lock, and depending on variant, may also look up or acquire the PTE lock. -See the comment on :c:func:`!__pte_offset_map_lock`. +See the comment on :c:func:`!pte_offset_map_lock`. Atomicity ^^^^^^^^^ @@ -667,7 +667,7 @@ must be released via :c:func:`!pte_unmap_unlock`. .. note:: There are some variants on this, such as :c:func:`!pte_offset_map_rw_nolock` when we know we hold the PTE stable but for brevity we do not explore this. See the comment for - :c:func:`!__pte_offset_map_lock` for more details. + :c:func:`!pte_offset_map_lock` for more details. When modifying data in ranges we typically only wish to allocate higher page tables as necessary, using these locks to avoid races or overwriting anything, @@ -686,7 +686,7 @@ At the leaf page table, that is the PTE, we can't entirely rely on this pattern as we have separate PMD and PTE locks and a THP collapse for instance might have eliminated the PMD entry as well as the PTE from under us. -This is why :c:func:`!__pte_offset_map_lock` locklessly retrieves the PMD entry +This is why :c:func:`!pte_offset_map_lock` locklessly retrieves the PMD entry for the PTE, carefully checking it is as expected, before acquiring the PTE-specific lock, and then *again* checking that the PMD entry is as expected. diff --git a/Documentation/netlabel/index.rst b/Documentation/netlabel/index.rst index 984e1b191b12..bb6ba7d5c200 100644 --- a/Documentation/netlabel/index.rst +++ b/Documentation/netlabel/index.rst @@ -12,10 +12,3 @@ NetLabel lsm_interface draft_ietf - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/netlink/specs/dev-energymodel.yaml b/Documentation/netlink/specs/dev-energymodel.yaml new file mode 100644 index 000000000000..11faabfdfbe8 --- /dev/null +++ b/Documentation/netlink/specs/dev-energymodel.yaml @@ -0,0 +1,175 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) +# +# Copyright (c) 2025 Valve Corporation. +# +--- +name: dev-energymodel + +doc: | + Energy model netlink interface to notify its changes. + +protocol: genetlink + +uapi-header: linux/dev_energymodel.h + +definitions: + - + type: flags + name: perf-state-flags + entries: + - + name: perf-state-inefficient + doc: >- + The performance state is inefficient. There is in this perf-domain, + another performance state with a higher frequency but a lower or + equal power cost. + - + type: flags + name: perf-domain-flags + entries: + - + name: perf-domain-microwatts + doc: >- + The power values are in micro-Watts or some other scale. + - + name: perf-domain-skip-inefficiencies + doc: >- + Skip inefficient states when estimating energy consumption. + - + name: perf-domain-artificial + doc: >- + The power values are artificial and might be created by platform + missing real power information. + +attribute-sets: + - + name: perf-domain + doc: >- + Information on a single performance domains. + attributes: + - + name: pad + type: pad + - + name: perf-domain-id + type: u32 + doc: >- + A unique ID number for each performance domain. + - + name: flags + type: u64 + doc: >- + Bitmask of performance domain flags. + enum: perf-domain-flags + - + name: cpus + type: u64 + multi-attr: true + doc: >- + CPUs that belong to this performance domain. + - + name: perf-table + doc: >- + Performance states table. + attributes: + - + name: perf-domain-id + type: u32 + doc: >- + A unique ID number for each performance domain. + - + name: perf-state + type: nest + nested-attributes: perf-state + multi-attr: true + - + name: perf-state + doc: >- + Performance state of a performance domain. + attributes: + - + name: pad + type: pad + - + name: performance + type: u64 + doc: >- + CPU performance (capacity) at a given frequency. + - + name: frequency + type: u64 + doc: >- + The frequency in KHz, for consistency with CPUFreq. + - + name: power + type: u64 + doc: >- + The power consumed at this level (by 1 CPU or by a registered + device). It can be a total power: static and dynamic. + - + name: cost + type: u64 + doc: >- + The cost coefficient associated with this level, used during energy + calculation. Equal to: power * max_frequency / frequency. + - + name: flags + type: u64 + doc: >- + Bitmask of performance state flags. + enum: perf-state-flags + +operations: + list: + - + name: get-perf-domains + attribute-set: perf-domain + doc: Get the list of information for all performance domains. + do: + request: + attributes: + - perf-domain-id + reply: + attributes: &perf-domain-attrs + - pad + - perf-domain-id + - flags + - cpus + dump: + reply: + attributes: *perf-domain-attrs + - + name: get-perf-table + attribute-set: perf-table + doc: Get the energy model table of a performance domain. + do: + request: + attributes: + - perf-domain-id + reply: + attributes: + - perf-domain-id + - perf-state + - + name: perf-domain-created + doc: A performance domain is created. + notify: get-perf-table + mcgrp: event + - + name: perf-domain-updated + doc: A performance domain is updated. + notify: get-perf-table + mcgrp: event + - + name: perf-domain-deleted + doc: A performance domain is deleted. + attribute-set: perf-table + event: + attributes: + - perf-domain-id + mcgrp: event + +mcast-groups: + list: + - + name: event diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml index 78d0724d7e12..3dd48a32f783 100644 --- a/Documentation/netlink/specs/dpll.yaml +++ b/Documentation/netlink/specs/dpll.yaml @@ -446,6 +446,16 @@ attribute-sets: doc: | Granularity of phase adjustment, in picoseconds. The value of phase adjustment must be a multiple of this granularity. + - + name: fractional-frequency-offset-ppt + type: sint + doc: | + The FFO (Fractional Frequency Offset) of the pin with respect to + the nominal frequency. + Value = (frequency_measured - frequency_nominal) / frequency_nominal + Value is in PPT (parts per trillion, 10^-12). + Note: This attribute provides higher resolution than the standard + fractional-frequency-offset (which is in PPM). - name: pin-parent-device @@ -550,6 +560,7 @@ operations: request: attributes: - id + - mode - phase-offset-monitor - phase-offset-avg-factor - @@ -627,6 +638,7 @@ operations: - phase-adjust-max - phase-adjust - fractional-frequency-offset + - fractional-frequency-offset-ppt - esync-frequency - esync-frequency-supported - esync-pulse diff --git a/Documentation/netlink/specs/em.yaml b/Documentation/netlink/specs/em.yaml deleted file mode 100644 index 9905ca482325..000000000000 --- a/Documentation/netlink/specs/em.yaml +++ /dev/null @@ -1,113 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: em - -doc: | - Energy model netlink interface to notify its changes. - -protocol: genetlink - -uapi-header: linux/energy_model.h - -attribute-sets: - - - name: pds - attributes: - - - name: pd - type: nest - nested-attributes: pd - multi-attr: true - - - name: pd - attributes: - - - name: pad - type: pad - - - name: pd-id - type: u32 - - - name: flags - type: u64 - - - name: cpus - type: string - - - name: pd-table - attributes: - - - name: pd-id - type: u32 - - - name: ps - type: nest - nested-attributes: ps - multi-attr: true - - - name: ps - attributes: - - - name: pad - type: pad - - - name: performance - type: u64 - - - name: frequency - type: u64 - - - name: power - type: u64 - - - name: cost - type: u64 - - - name: flags - type: u64 - -operations: - list: - - - name: get-pds - attribute-set: pds - doc: Get the list of information for all performance domains. - do: - reply: - attributes: - - pd - - - name: get-pd-table - attribute-set: pd-table - doc: Get the energy model table of a performance domain. - do: - request: - attributes: - - pd-id - reply: - attributes: - - pd-id - - ps - - - name: pd-created - doc: A performance domain is created. - notify: get-pd-table - mcgrp: event - - - name: pd-updated - doc: A performance domain is updated. - notify: get-pd-table - mcgrp: event - - - name: pd-deleted - doc: A performance domain is deleted. - attribute-set: pd-table - event: - attributes: - - pd-id - mcgrp: event - -mcast-groups: - list: - - - name: event diff --git a/Documentation/netlink/specs/fou.yaml b/Documentation/netlink/specs/fou.yaml index 8e7974ec453f..331f1b342b3a 100644 --- a/Documentation/netlink/specs/fou.yaml +++ b/Documentation/netlink/specs/fou.yaml @@ -39,6 +39,8 @@ attribute-sets: - name: ipproto type: u8 + checks: + min: 1 - name: type type: u8 diff --git a/Documentation/netlink/specs/mptcp_pm.yaml b/Documentation/netlink/specs/mptcp_pm.yaml index ba30a40b9dbf..39f3facc38e5 100644 --- a/Documentation/netlink/specs/mptcp_pm.yaml +++ b/Documentation/netlink/specs/mptcp_pm.yaml @@ -15,6 +15,7 @@ definitions: type: enum name: event-type enum-name: mptcp-event-type + doc: Netlink MPTCP event types name-prefix: mptcp-event- entries: - diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml index 82bf5cb2617d..596c306ce52b 100644 --- a/Documentation/netlink/specs/netdev.yaml +++ b/Documentation/netlink/specs/netdev.yaml @@ -142,7 +142,7 @@ attribute-sets: name: ifindex doc: | ifindex of the netdev to which the pool belongs. - May be reported as 0 if the page pool was allocated for a netdev + May not be reported if the page pool was allocated for a netdev which got destroyed already (page pools may outlast their netdevs because they wait for all memory to be returned). type: u32 @@ -601,7 +601,9 @@ operations: name: page-pool-get doc: | Get / dump information about Page Pools. - (Only Page Pools associated with a net_device can be listed.) + Only Page Pools associated by the driver with a net_device + can be listed. ifindex will not be reported if the net_device + no longer exists. attribute-set: page-pool do: request: diff --git a/Documentation/netlink/specs/nfsd.yaml b/Documentation/netlink/specs/nfsd.yaml index 100363029e82..f87b5a05e5e9 100644 --- a/Documentation/netlink/specs/nfsd.yaml +++ b/Documentation/netlink/specs/nfsd.yaml @@ -78,6 +78,9 @@ attribute-sets: - name: scope type: string + - + name: min-threads + type: u32 - name: version attributes: @@ -149,7 +152,7 @@ operations: - compound-ops - name: threads-set - doc: set the number of running threads + doc: set the maximum number of running threads attribute-set: server flags: [admin-perm] do: @@ -159,9 +162,10 @@ operations: - gracetime - leasetime - scope + - min-threads - name: threads-get - doc: get the number of running threads + doc: get the maximum number of running threads attribute-set: server do: reply: @@ -170,6 +174,7 @@ operations: - gracetime - leasetime - scope + - min-threads - name: version-set doc: set nfs enabled versions diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 6beeb6ee5adf..df4b56beb818 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -1914,6 +1914,9 @@ attribute-sets: name: port-range type: binary struct: ifla-geneve-port-range + - + name: gro-hint + type: flag - name: linkinfo-hsr-attrs name-prefix: ifla-hsr- diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml index b398f7a46dae..2e663333a279 100644 --- a/Documentation/netlink/specs/tc.yaml +++ b/Documentation/netlink/specs/tc.yaml @@ -2207,6 +2207,9 @@ attribute-sets: - name: blue-timer-us type: s32 + - + name: active-queues + type: u32 - name: cake-tin-stats-attrs name-prefix: tca-cake-tin-stats- diff --git a/Documentation/networking/device_drivers/atm/index.rst b/Documentation/networking/device_drivers/atm/index.rst index 7b593f031a60..724552ca0be4 100644 --- a/Documentation/networking/device_drivers/atm/index.rst +++ b/Documentation/networking/device_drivers/atm/index.rst @@ -11,10 +11,3 @@ Contents: cxacru fore200e iphase - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/can/index.rst b/Documentation/networking/device_drivers/can/index.rst index 6a8a4f74fa26..af4369989522 100644 --- a/Documentation/networking/device_drivers/can/index.rst +++ b/Documentation/networking/device_drivers/can/index.rst @@ -13,10 +13,3 @@ Contents: can327 ctu/ctucanfd-driver freescale/flexcan - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/cellular/index.rst b/Documentation/networking/device_drivers/cellular/index.rst index fc1812d3fc70..9690c3ba08ef 100644 --- a/Documentation/networking/device_drivers/cellular/index.rst +++ b/Documentation/networking/device_drivers/cellular/index.rst @@ -9,10 +9,3 @@ Contents: :maxdepth: 2 qualcomm/rmnet - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index bcc02355f828..5f3f06111911 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -48,7 +48,6 @@ Contents: meta/fbnic microsoft/netvsc mucse/rnpgbe - neterion/s2io netronome/nfp pensando/ionic pensando/ionic_rdma @@ -64,10 +63,3 @@ Contents: wangxun/txgbevf wangxun/ngbe wangxun/ngbevf - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst index 581a91caa579..56f3966de3f0 100644 --- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst +++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst @@ -16,10 +16,3 @@ Contents: switchdev tracepoints counters - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/ethernet/neterion/s2io.rst b/Documentation/networking/device_drivers/ethernet/neterion/s2io.rst deleted file mode 100644 index d731b5a98561..000000000000 --- a/Documentation/networking/device_drivers/ethernet/neterion/s2io.rst +++ /dev/null @@ -1,196 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -========================================================= -Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver -========================================================= - -Release notes for Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver. - -.. Contents - - 1. Introduction - - 2. Identifying the adapter/interface - - 3. Features supported - - 4. Command line parameters - - 5. Performance suggestions - - 6. Available Downloads - - -1. Introduction -=============== -This Linux driver supports Neterion's Xframe I PCI-X 1.0 and -Xframe II PCI-X 2.0 adapters. It supports several features -such as jumbo frames, MSI/MSI-X, checksum offloads, TSO, UFO and so on. -See below for complete list of features. - -All features are supported for both IPv4 and IPv6. - -2. Identifying the adapter/interface -==================================== - -a. Insert the adapter(s) in your system. -b. Build and load driver:: - - # insmod s2io.ko - -c. View log messages:: - - # dmesg | tail -40 - -You will see messages similar to:: - - eth3: Neterion Xframe I 10GbE adapter (rev 3), Version 2.0.9.1, Intr type INTA - eth4: Neterion Xframe II 10GbE adapter (rev 2), Version 2.0.9.1, Intr type INTA - eth4: Device is on 64 bit 133MHz PCIX(M1) bus - -The above messages identify the adapter type(Xframe I/II), adapter revision, -driver version, interface name(eth3, eth4), Interrupt type(INTA, MSI, MSI-X). -In case of Xframe II, the PCI/PCI-X bus width and frequency are displayed -as well. - -To associate an interface with a physical adapter use "ethtool -p <ethX>". -The corresponding adapter's LED will blink multiple times. - -3. Features supported -===================== -a. Jumbo frames. Xframe I/II supports MTU up to 9600 bytes, - modifiable using ip command. - -b. Offloads. Supports checksum offload(TCP/UDP/IP) on transmit - and receive, TSO. - -c. Multi-buffer receive mode. Scattering of packet across multiple - buffers. Currently driver supports 2-buffer mode which yields - significant performance improvement on certain platforms(SGI Altix, - IBM xSeries). - -d. MSI/MSI-X. Can be enabled on platforms which support this feature - resulting in noticeable performance improvement (up to 7% on certain - platforms). - -e. Statistics. Comprehensive MAC-level and software statistics displayed - using "ethtool -S" option. - -f. Multi-FIFO/Ring. Supports up to 8 transmit queues and receive rings, - with multiple steering options. - -4. Command line parameters -========================== - -a. tx_fifo_num - Number of transmit queues - -Valid range: 1-8 - -Default: 1 - -b. rx_ring_num - Number of receive rings - -Valid range: 1-8 - -Default: 1 - -c. tx_fifo_len - Size of each transmit queue - -Valid range: Total length of all queues should not exceed 8192 - -Default: 4096 - -d. rx_ring_sz - Size of each receive ring(in 4K blocks) - -Valid range: Limited by memory on system - -Default: 30 - -e. intr_type - Specifies interrupt type. Possible values 0(INTA), 2(MSI-X) - -Valid values: 0, 2 - -Default: 2 - -5. Performance suggestions -========================== - -General: - -a. Set MTU to maximum(9000 for switch setup, 9600 in back-to-back configuration) -b. Set TCP windows size to optimal value. - -For instance, for MTU=1500 a value of 210K has been observed to result in -good performance:: - - # sysctl -w net.ipv4.tcp_rmem="210000 210000 210000" - # sysctl -w net.ipv4.tcp_wmem="210000 210000 210000" - -For MTU=9000, TCP window size of 10 MB is recommended:: - - # sysctl -w net.ipv4.tcp_rmem="10000000 10000000 10000000" - # sysctl -w net.ipv4.tcp_wmem="10000000 10000000 10000000" - -Transmit performance: - -a. By default, the driver respects BIOS settings for PCI bus parameters. - However, you may want to experiment with PCI bus parameters - max-split-transactions(MOST) and MMRBC (use setpci command). - - A MOST value of 2 has been found optimal for Opterons and 3 for Itanium. - - It could be different for your hardware. - - Set MMRBC to 4K**. - - For example you can set - - For opteron:: - - #setpci -d 17d5:* 62=1d - - For Itanium:: - - #setpci -d 17d5:* 62=3d - - For detailed description of the PCI registers, please see Xframe User Guide. - -b. Ensure Transmit Checksum offload is enabled. Use ethtool to set/verify this - parameter. - -c. Turn on TSO(using "ethtool -K"):: - - # ethtool -K <ethX> tso on - -Receive performance: - -a. By default, the driver respects BIOS settings for PCI bus parameters. - However, you may want to set PCI latency timer to 248:: - - #setpci -d 17d5:* LATENCY_TIMER=f8 - - For detailed description of the PCI registers, please see Xframe User Guide. - -b. Use 2-buffer mode. This results in large performance boost on - certain platforms(eg. SGI Altix, IBM xSeries). - -c. Ensure Receive Checksum offload is enabled. Use "ethtool -K ethX" command to - set/verify this option. - -d. Enable NAPI feature(in kernel configuration Device Drivers ---> Network - device support ---> Ethernet (10000 Mbit) ---> S2IO 10Gbe Xframe NIC) to - bring down CPU utilization. - -.. note:: - - For AMD opteron platforms with 8131 chipset, MMRBC=1 and MOST=1 are - recommended as safe parameters. - -For more information, please review the AMD8131 errata at -http://vip.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/ -26310_AMD-8131_HyperTransport_PCI-X_Tunnel_Revision_Guide_rev_3_18.pdf - -6. Support -========== - -For further support please contact either your 10GbE Xframe NIC vendor (IBM, -HP, SGI etc.) diff --git a/Documentation/networking/device_drivers/fddi/index.rst b/Documentation/networking/device_drivers/fddi/index.rst index 0b75294e6c8b..c7cf2347e215 100644 --- a/Documentation/networking/device_drivers/fddi/index.rst +++ b/Documentation/networking/device_drivers/fddi/index.rst @@ -10,10 +10,3 @@ Contents: defza skfp - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/hamradio/index.rst b/Documentation/networking/device_drivers/hamradio/index.rst index 7e731732057b..6af481c5b020 100644 --- a/Documentation/networking/device_drivers/hamradio/index.rst +++ b/Documentation/networking/device_drivers/hamradio/index.rst @@ -10,10 +10,3 @@ Contents: baycom z8530drv - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/index.rst b/Documentation/networking/device_drivers/index.rst index a254af25b7ef..1df51c9f7827 100644 --- a/Documentation/networking/device_drivers/index.rst +++ b/Documentation/networking/device_drivers/index.rst @@ -16,10 +16,3 @@ Contents: hamradio/index wifi/index wwan/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/wifi/index.rst b/Documentation/networking/device_drivers/wifi/index.rst index fb394f5de4a9..29ba9ea64b25 100644 --- a/Documentation/networking/device_drivers/wifi/index.rst +++ b/Documentation/networking/device_drivers/wifi/index.rst @@ -10,10 +10,3 @@ Contents: intel/ipw2100 intel/ipw2200 - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/device_drivers/wwan/index.rst b/Documentation/networking/device_drivers/wwan/index.rst index 370d8264d5dc..b768ae89f723 100644 --- a/Documentation/networking/device_drivers/wwan/index.rst +++ b/Documentation/networking/device_drivers/wwan/index.rst @@ -10,10 +10,3 @@ Contents: iosm t7xx - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/diagnostic/index.rst b/Documentation/networking/diagnostic/index.rst index 86488aa46b48..592263a2713a 100644 --- a/Documentation/networking/diagnostic/index.rst +++ b/Documentation/networking/diagnostic/index.rst @@ -8,10 +8,3 @@ Networking Diagnostics :maxdepth: 2 twisted_pair_layer1_diagnostics.rst - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index 75db2251649b..c2406bd8ae0b 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -96,6 +96,7 @@ Contents: packet_mmap phonet phy-link-topology + phy-port pktgen plip ppp_generic @@ -134,10 +135,3 @@ Contents: xfrm/index xdp-rx-metadata xsk-tx-metadata - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/networking/iou-zcrx.rst b/Documentation/networking/iou-zcrx.rst index 54a72e172bdc..7f3f4b2e6cf2 100644 --- a/Documentation/networking/iou-zcrx.rst +++ b/Documentation/networking/iou-zcrx.rst @@ -196,6 +196,26 @@ Return buffers back to the kernel to be used again:: rqe->len = cqe->res; IO_URING_WRITE_ONCE(*refill_ring.ktail, ++refill_ring.rq_tail); +Area chunking +------------- + +zcrx splits the memory area into fixed-length physically contiguous chunks. +This limits the maximum buffer size returned in a single io_uring CQE. Users +can provide a hint to the kernel to use larger chunks by setting the +``rx_buf_len`` field of ``struct io_uring_zcrx_ifq_reg`` to the desired length +during registration. If this field is set to zero, the kernel defaults to +the system page size. + +To use larger sizes, the memory area must be backed by physically contiguous +ranges whose sizes are multiples of ``rx_buf_len``. It also requires kernel +and hardware support. If registration fails, users are generally expected to +fall back to defaults by setting ``rx_buf_len`` to zero. + +Larger chunks don't give any additional guarantees about buffer sizes returned +in CQEs, and they can vary depending on many factors like traffic pattern, +hardware offload, etc. It doesn't require any application changes beyond zcrx +registration. + Testing ======= diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index bc9a01606daf..6921d8594b84 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -482,7 +482,9 @@ tcp_ecn_option - INTEGER 1 Send AccECN option sparingly according to the minimum option rules outlined in draft-ietf-tcpm-accurate-ecn. 2 Send AccECN option on every packet whenever it fits into TCP - option space. + option space except when AccECN fallback is triggered. + 3 Send AccECN option on every packet whenever it fits into TCP + option space even when AccECN fallback is triggered. = ============================================================ Default: 2 @@ -3232,12 +3234,13 @@ enhanced_dad - BOOLEAN =========== ratelimit - INTEGER - Limit the maximal rates for sending ICMPv6 messages. + Limit the maximal rates for sending ICMPv6 messages to a particular + peer. 0 to disable any limiting, - otherwise the minimal space between responses in milliseconds. + otherwise the space between responses in milliseconds. - Default: 1000 + Default: 100 ratemask - list of comma separated ranges For ICMPv6 message types matching the ranges in the ratemask, limit diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 26f32dbcf6ec..563daea10d6c 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -105,6 +105,7 @@ u32 received_ce read_mostly read_w u32[3] received_ecn_bytes read_mostly read_write u8:4 received_ce_pending read_mostly read_write u32[3] delivered_ecn_bytes read_write +u16 pkts_acked_ewma read_write u8:2 syn_ect_snt write_mostly read_write u8:2 syn_ect_rcv read_mostly read_write u8:2 accecn_minlen write_mostly read_write diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index 7ebb6c36482d..35704d115312 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -80,7 +80,7 @@ unregister_netdev() closes the device and waits for all users to be done with it. The memory of struct net_device itself may still be referenced by sysfs but all operations on that device will fail. -free_netdev() can be called after unregister_netdev() returns on when +free_netdev() can be called after unregister_netdev() returns or when register_netdev() failed. Device management under RTNL @@ -333,7 +333,7 @@ In the future, there will be an option for individual drivers to opt out of using ``rtnl_lock`` and instead perform their control operations directly under the netdev instance lock. -Devices drivers are encouraged to rely on the instance lock where possible. +Device drivers are encouraged to rely on the instance lock where possible. For the (mostly software) drivers that need to interact with the core stack, there are two sets of interfaces: ``dev_xxx``/``netdev_xxx`` and ``netif_xxx`` diff --git a/Documentation/networking/phy-port.rst b/Documentation/networking/phy-port.rst new file mode 100644 index 000000000000..6e28d9094bce --- /dev/null +++ b/Documentation/networking/phy-port.rst @@ -0,0 +1,111 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. _phy_port: + +================= +Ethernet ports +================= + +This document is a basic description of the phy_port infrastructure, +introduced to represent physical interfaces of Ethernet devices. + +Without phy_port, we already have quite a lot of information about what the +media-facing interface of a NIC can do and looks like, through the +:c:type:`struct ethtool_link_ksettings <ethtool_link_ksettings>` attributes, +which includes : + + - What the NIC can do through the :c:member:`supported` field + - What the Link Partner advertises through :c:member:`lp_advertising` + - Which features we're advertising through :c:member:`advertising` + +We also have info about the number of pairs and the PORT type. These settings +are built by aggregating together information reported by various devices that +are sitting on the link : + + - The NIC itself, through the :c:member:`get_link_ksettings` callback + - Precise information from the MAC and PCS by using phylink in the MAC driver + - Information reported by the PHY device + - Information reported by an SFP module (which can itself include a PHY) + +This model however starts showing its limitations when we consider devices that +have more than one media interface. In such a case, only information about the +actively used interface is reported, and it's not possible to know what the +other interfaces can do. In fact, we have very little information about whether +or not there are any other media interfaces. + +The goal of the phy_port representation is to provide a way of representing a +physical interface of a NIC, regardless of what is driving the port (NIC through +a firmware, SFP module, Ethernet PHY). + +Multi-port interfaces examples +============================== + +Several cases of multi-interface NICs have been observed so far : + +Internal MII Mux:: + + +------------------+ + | SoC | + | +-----+ | +-----+ + | +-----+ | |-------------| PHY | + | | MAC |--| Mux | | +-----+ +-----+ + | +-----+ | |-----| SFP | + | +-----+ | +-----+ + +------------------+ + +Internal Mux with internal PHY:: + + +------------------------+ + | SoC | + | +-----+ +-----+ + | +-----+ | |-| PHY | + | | MAC |--| Mux | +-----+ +-----+ + | +-----+ | |-----------| SFP | + | +-----+ | +-----+ + +------------------------+ + +External Mux:: + + +---------+ + | SoC | +-----+ +-----+ + | | | |--| PHY | + | +-----+ | | | +-----+ + | | MAC |----| Mux | +-----+ + | +-----+ | | |--| PHY | + | | +-----+ +-----+ + | | | + | GPIO-------+ + +---------+ + +Double-port PHY:: + + +---------+ + | SoC | +-----+ + | | | |--- RJ45 + | +-----+ | | | + | | MAC |---| PHY | +-----+ + | +-----+ | | |---| SFP | + +---------+ +-----+ +-----+ + +phy_port aims at providing a path to support all the above topologies, by +representing the media interfaces in a way that's agnostic to what's driving +the interface. the struct phy_port object has its own set of callback ops, and +will eventually be able to report its own ksettings:: + + _____ +------+ + ( )-----| Port | + +-----+ ( ) +------+ + | MAC |--( ??? ) + +-----+ ( ) +------+ + (_____)-----| Port | + +------+ + +Next steps +========== + +As of writing this documentation, only ports controlled by PHY devices are +supported. The next steps will be to add the Netlink API to expose these +to userspace and add support for raw ports (controlled by some firmware, and directly +managed by the NIC driver). + +Another parallel task is the introduction of a MII muxing framework to allow the +control of non-PHY driver multi-port setups. diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index b0f2ef83735d..0170c9d4dc5e 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -524,33 +524,13 @@ When a match is found, the PHY layer will invoke the run function associated with the fixup. This function is passed a pointer to the phy_device of interest. It should therefore only operate on that PHY. -The platform code can either register the fixup using phy_register_fixup():: - - int phy_register_fixup(const char *phy_id, - u32 phy_uid, u32 phy_uid_mask, - int (*run)(struct phy_device *)); - -Or using one of the two stubs, phy_register_fixup_for_uid() and -phy_register_fixup_for_id():: +The platform code can register the fixup using one of:: int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_register_fixup_for_id(const char *phy_id, int (*run)(struct phy_device *)); -The stubs set one of the two matching criteria, and set the other one to -match anything. - -When phy_register_fixup() or \*_for_uid()/\*_for_id() is called at module load -time, the module needs to unregister the fixup and free allocated memory when -it's unloaded. - -Call one of following function before unloading module:: - - int phy_unregister_fixup(const char *phy_id, u32 phy_uid, u32 phy_uid_mask); - int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); - int phy_register_fixup_for_id(const char *phy_id); - Standards ========= diff --git a/Documentation/networking/scaling.rst b/Documentation/networking/scaling.rst index 99b6a61e5e31..0023afa530ec 100644 --- a/Documentation/networking/scaling.rst +++ b/Documentation/networking/scaling.rst @@ -38,11 +38,15 @@ that is not the focus of these techniques. The filter used in RSS is typically a hash function over the network and/or transport layer headers-- for example, a 4-tuple hash over IP addresses and TCP ports of a packet. The most common hardware -implementation of RSS uses a 128-entry indirection table where each entry +implementation of RSS uses an indirection table where each entry stores a queue number. The receive queue for a packet is determined -by masking out the low order seven bits of the computed hash for the -packet (usually a Toeplitz hash), taking this number as a key into the -indirection table and reading the corresponding value. +by indexing the indirection table with the low order bits of the +computed hash for the packet (usually a Toeplitz hash). + +The indirection table helps even out the traffic distribution when queue +count is not a power of two. NICs should provide an indirection table +at least 4 times larger than the queue count. 4x table results in ~16% +imbalance between the queues, which is acceptable for most applications. Some NICs support symmetric RSS hashing where, if the IP (source address, destination address) and TCP/UDP (source port, destination port) tuples diff --git a/Documentation/networking/timestamping.rst b/Documentation/networking/timestamping.rst index 7aabead90648..2162c4f2b28a 100644 --- a/Documentation/networking/timestamping.rst +++ b/Documentation/networking/timestamping.rst @@ -627,10 +627,9 @@ ioctl(SIOCSHWTSTAMP). However, this has not been implemented in all drivers. -------------------------------------------------------- A driver which supports hardware time stamping must support the -ndo_hwtstamp_set NDO or the legacy SIOCSHWTSTAMP ioctl and update the -supplied struct hwtstamp_config with the actual values as described in -the section on SIOCSHWTSTAMP. It should also support ndo_hwtstamp_get or -the legacy SIOCGHWTSTAMP. +ndo_hwtstamp_set NDO and update the supplied struct hwtstamp_config with +the actual values as described in the section on SIOCSHWTSTAMP. It +should also support ndo_hwtstamp_get NDO to retrieve configuration. Time stamps for received packets must be stored in the skb. To get a pointer to the shared time stamp structure of the skb call skb_hwtstamps(). Then diff --git a/Documentation/networking/tls-offload.rst b/Documentation/networking/tls-offload.rst index 7354d48cdf92..c173f537bf4d 100644 --- a/Documentation/networking/tls-offload.rst +++ b/Documentation/networking/tls-offload.rst @@ -318,6 +318,36 @@ is restarted. When the header is matched the device sends a confirmation request to the kernel, asking if the guessed location is correct (if a TLS record really starts there), and which record sequence number the given header had. + +The asynchronous resync process is coordinated on the kernel side using +struct tls_offload_resync_async, which tracks and manages the resync request. + +Helper functions to manage struct tls_offload_resync_async: + +``tls_offload_rx_resync_async_request_start()`` +Initializes an asynchronous resync attempt by specifying the sequence range to +monitor and resetting internal state in the struct. + +``tls_offload_rx_resync_async_request_end()`` +Retains the device's guessed TCP sequence number for comparison with current or +future logged ones. It also clears the RESYNC_REQ_ASYNC flag from the resync +request, indicating that the device has submitted its guessed sequence number. + +``tls_offload_rx_resync_async_request_cancel()`` +Cancels any in-progress resync attempt, clearing the request state. + +When the kernel processes an RX segment that begins a new TLS record, it +examines the current status of the asynchronous resynchronization request. + +If the device is still waiting to provide its guessed TCP sequence number +(the async state), the kernel records the sequence number of this segment so +that it can later be compared once the device's guess becomes available. + +If the device has already submitted its guessed sequence number (the non-async +state), the kernel now tries to match that guess against the sequence numbers of +all TLS record headers that have been logged since the resync request +started. + The kernel confirms the guessed location was correct and tells the device the record sequence number. Meanwhile, the device had been parsing and counting all records since the just-confirmed one, it adds the number diff --git a/Documentation/pcmcia/index.rst b/Documentation/pcmcia/index.rst index 8067236c51ab..89c004816140 100644 --- a/Documentation/pcmcia/index.rst +++ b/Documentation/pcmcia/index.rst @@ -11,10 +11,3 @@ PCMCIA devicetable locking driver-changes - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/peci/index.rst b/Documentation/peci/index.rst index 930e75217c33..1443c31a0d18 100644 --- a/Documentation/peci/index.rst +++ b/Documentation/peci/index.rst @@ -7,10 +7,3 @@ PECI Subsystem .. toctree:: peci - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/power/charger-manager.rst b/Documentation/power/charger-manager.rst index 84fab9376792..b29c962cacdc 100644 --- a/Documentation/power/charger-manager.rst +++ b/Documentation/power/charger-manager.rst @@ -183,17 +183,7 @@ struct charger_desc elements: the value of measure_battery_temp. -5. Notify Charger-Manager of charger events: cm_notify_event() -============================================================== -If there is an charger event is required to notify -Charger Manager, a charger device driver that triggers the event can call -cm_notify_event(psy, type, msg) to notify the corresponding Charger Manager. -In the function, psy is the charger driver's power_supply pointer, which is -associated with Charger-Manager. The parameter "type" -is the same as irq's type (enum cm_event_types). The event message "msg" is -optional and is effective only if the event type is "UNDESCRIBED" or "OTHERS". - -6. Other Considerations +5. Other Considerations ======================= At the charger/battery-related events such as battery-pulled-out, diff --git a/Documentation/power/energy-model.rst b/Documentation/power/energy-model.rst index cbdf7520aaa6..0d4644d72767 100644 --- a/Documentation/power/energy-model.rst +++ b/Documentation/power/energy-model.rst @@ -14,8 +14,8 @@ subsystems willing to use that information to make energy-aware decisions. The source of the information about the power consumed by devices can vary greatly from one platform to another. These power costs can be estimated using devicetree data in some cases. In others, the firmware will know better. -Alternatively, userspace might be best positioned. And so on. In order to avoid -each and every client subsystem to re-implement support for each and every +Alternatively, userspace might be best positioned. In order to avoid +having each and every client subsystem re-implement support for each and every possible source of information on its own, the EM framework intervenes as an abstraction layer which standardizes the format of power cost tables in the kernel, hence enabling to avoid redundant work. @@ -32,7 +32,7 @@ be found in the Intelligent Power Allocation in Documentation/driver-api/thermal/power_allocator.rst. Kernel subsystems might implement automatic detection to check whether EM registered devices have inconsistent scale (based on EM internal flag). -Important thing to keep in mind is that when the power values are expressed in +An important thing to keep in mind is that when the power values are expressed in an 'abstract scale' deriving real energy in micro-Joules would not be possible. The figure below depicts an example of drivers (Arm-specific here, but the @@ -82,7 +82,7 @@ using kref mechanism. The device driver which provided the new EM at runtime, should call EM API to free it safely when it's no longer needed. The EM framework will handle the clean-up when it's possible. -The kernel code which want to modify the EM values is protected from concurrent +The kernel code which wants to modify the EM values is protected from concurrent access using a mutex. Therefore, the device driver code must run in sleeping context when it tries to modify the EM. @@ -113,7 +113,7 @@ Registration of 'advanced' EM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The 'advanced' EM gets its name due to the fact that the driver is allowed -to provide more precised power model. It's not limited to some implemented math +to provide a more precise power model. It's not limited to some implemented math formula in the framework (like it is in 'simple' EM case). It can better reflect the real power measurements performed for each performance state. Thus, this registration method should be preferred in case considering EM static power @@ -172,7 +172,7 @@ Registration of 'simple' EM ~~~~~~~~~~~~~~~~~~~~~~~~~~~ The 'simple' EM is registered using the framework helper function -cpufreq_register_em_with_opp(). It implements a power model which is tight to +cpufreq_register_em_with_opp(). It implements a power model which is tied to a math formula:: Power = C * V^2 * f @@ -251,7 +251,7 @@ It returns the 'struct em_perf_state' pointer which is an array of performance states in ascending order. This function must be called in the RCU read lock section (after the rcu_read_lock()). When the EM table is not needed anymore there is a need to -call rcu_real_unlock(). In this way the EM safely uses the RCU read section +call rcu_read_unlock(). In this way the EM safely uses the RCU read section and protects the users. It also allows the EM framework to manage the memory and free it. More details how to use it can be found in Section 3.2 in the example driver. @@ -308,12 +308,12 @@ EM framework:: 05 06 /* Use the 'foo' protocol to ceil the frequency */ 07 freq = foo_get_freq_ceil(dev, *KHz); - 08 if (freq < 0); + 08 if (freq < 0) 09 return freq; 10 11 /* Estimate the power cost for the dev at the relevant freq. */ 12 power = foo_estimate_power(dev, freq); - 13 if (power < 0); + 13 if (power < 0) 14 return power; 15 16 /* Return the values to the EM framework */ diff --git a/Documentation/power/index.rst b/Documentation/power/index.rst index ea70633d9ce6..b4581e4ae785 100644 --- a/Documentation/power/index.rst +++ b/Documentation/power/index.rst @@ -38,10 +38,3 @@ Power Management regulator/machine regulator/overview regulator/regulator - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/power/runtime_pm.rst b/Documentation/power/runtime_pm.rst index 455b9d135d85..a53ab09c37d5 100644 --- a/Documentation/power/runtime_pm.rst +++ b/Documentation/power/runtime_pm.rst @@ -712,10 +712,9 @@ out the following operations: * During system suspend pm_runtime_get_noresume() is called for every device right before executing the subsystem-level .prepare() callback for it and pm_runtime_barrier() is called for every device right before executing the - subsystem-level .suspend() callback for it. In addition to that the PM core - calls __pm_runtime_disable() with 'false' as the second argument for every - device right before executing the subsystem-level .suspend_late() callback - for it. + subsystem-level .suspend() callback for it. In addition to that, the PM + core disables runtime PM for every device right before executing the + subsystem-level .suspend_late() callback for it. * During system resume pm_runtime_enable() and pm_runtime_put() are called for every device right after executing the subsystem-level .resume_early() diff --git a/Documentation/process/1.Intro.rst b/Documentation/process/1.Intro.rst index 25ca49f7ae4d..2c93caea069f 100644 --- a/Documentation/process/1.Intro.rst +++ b/Documentation/process/1.Intro.rst @@ -194,7 +194,7 @@ include: are cloudy at best; quite a few kernel copyright holders believe that most binary-only modules are derived products of the kernel and that, as a result, their distribution is a violation of the GNU General Public - license (about which more will be said below). Your author is not a + License (about which more will be said below). Your author is not a lawyer, and nothing in this document can possibly be considered to be legal advice. The true legal status of closed-source modules can only be determined by the courts. But the uncertainty which haunts those modules diff --git a/Documentation/process/2.Process.rst b/Documentation/process/2.Process.rst index 7bd41838a546..57fa8cac58a6 100644 --- a/Documentation/process/2.Process.rst +++ b/Documentation/process/2.Process.rst @@ -3,7 +3,7 @@ How the development process works ================================= -Linux kernel development in the early 1990's was a pretty loose affair, +Linux kernel development in the early 1990s was a pretty loose affair, with relatively small numbers of users and developers involved. With a user base in the millions and with some 2,000 developers involved over the course of one year, the kernel has since had to evolve a number of diff --git a/Documentation/process/4.Coding.rst b/Documentation/process/4.Coding.rst index 80bcc1cabc23..c0f57d0c4f73 100644 --- a/Documentation/process/4.Coding.rst +++ b/Documentation/process/4.Coding.rst @@ -160,12 +160,12 @@ irrelevant. Locking ******* -In May, 2006, the "Devicescape" networking stack was, with great +In May 2006, the "Devicescape" networking stack was, with great fanfare, released under the GPL and made available for inclusion in the mainline kernel. This donation was welcome news; support for wireless networking in Linux was considered substandard at best, and the Devicescape stack offered the promise of fixing that situation. Yet, this code did not -actually make it into the mainline until June, 2007 (2.6.22). What +actually make it into the mainline until June 2007 (2.6.22). What happened? This code showed a number of signs of having been developed behind @@ -204,7 +204,7 @@ regression in the first place. It is often argued that a regression can be justified if it causes things to work for more people than it creates problems for. Why not make a change if it brings new functionality to ten systems for each one it -breaks? The best answer to this question was expressed by Linus in July, +breaks? The best answer to this question was expressed by Linus in July 2007: :: diff --git a/Documentation/process/5.Posting.rst b/Documentation/process/5.Posting.rst index 9999bcbdccc9..07d7dbed13ec 100644 --- a/Documentation/process/5.Posting.rst +++ b/Documentation/process/5.Posting.rst @@ -40,7 +40,12 @@ sending patches to the development community. These include: - Test the code to the extent that you can. Make use of the kernel's debugging tools, ensure that the kernel will build with all reasonable combinations of configuration options, use cross-compilers to build for - different architectures, etc. + different architectures, etc. Add tests, likely using an existing + testing framework like KUnit, and include them as a separate member + of your series (see the next section for more about patch series). + Note that this may be mandatory when affecting some subsystems. For + example, library functions (resides under lib/) are extensively used + almost everywhere and expected to be tested appropriately. - Make sure your code is compliant with the kernel coding style guidelines. diff --git a/Documentation/process/7.AdvancedTopics.rst b/Documentation/process/7.AdvancedTopics.rst index 43291704338e..185651d87f2a 100644 --- a/Documentation/process/7.AdvancedTopics.rst +++ b/Documentation/process/7.AdvancedTopics.rst @@ -53,7 +53,7 @@ When you are ready to start putting up git trees for others to look at, you will, of course, need a server that can be pulled from. Setting up such a server with git-daemon is relatively straightforward if you have a system which is accessible to the Internet. Otherwise, free, public hosting sites -(Github, for example) are starting to appear on the net. Established +(GitHub, for example) are starting to appear on the net. Established developers can get an account on kernel.org, but those are not easy to come by; see https://kernel.org/faq/ for more information. diff --git a/Documentation/process/adding-syscalls.rst b/Documentation/process/adding-syscalls.rst index fc0b0bbcd34d..91fc88681b1e 100644 --- a/Documentation/process/adding-syscalls.rst +++ b/Documentation/process/adding-syscalls.rst @@ -111,13 +111,13 @@ should use a file descriptor as the handle for that object -- don't invent a new type of userspace object handle when the kernel already has mechanisms and well-defined semantics for using file descriptors. -If your new :manpage:`xyzzy(2)` system call does return a new file descriptor, +If your new xyzzy(2) system call does return a new file descriptor, then the flags argument should include a value that is equivalent to setting ``O_CLOEXEC`` on the new FD. This makes it possible for userspace to close the timing window between ``xyzzy()`` and calling ``fcntl(fd, F_SETFD, FD_CLOEXEC)``, where an unexpected ``fork()`` and ``execve()`` in another thread could leak a descriptor to -the exec'ed program. (However, resist the temptation to re-use the actual value +the exec'ed program. (However, resist the temptation to reuse the actual value of the ``O_CLOEXEC`` constant, as it is architecture-specific and is part of a numbering space of ``O_*`` flags that is fairly full.) @@ -127,18 +127,18 @@ descriptor. Making a file descriptor ready for reading or writing is the normal way for the kernel to indicate to userspace that an event has occurred on the corresponding kernel object. -If your new :manpage:`xyzzy(2)` system call involves a filename argument:: +If your new xyzzy(2) system call involves a filename argument:: int sys_xyzzy(const char __user *path, ..., unsigned int flags); -you should also consider whether an :manpage:`xyzzyat(2)` version is more appropriate:: +you should also consider whether an xyzzyat(2) version is more appropriate:: int sys_xyzzyat(int dfd, const char __user *path, ..., unsigned int flags); This allows more flexibility for how userspace specifies the file in question; in particular it allows userspace to request the functionality for an already-opened file descriptor using the ``AT_EMPTY_PATH`` flag, effectively -giving an :manpage:`fxyzzy(3)` operation for free:: +giving an fxyzzy(3) operation for free:: - xyzzyat(AT_FDCWD, path, ..., 0) is equivalent to xyzzy(path,...) - xyzzyat(fd, "", ..., AT_EMPTY_PATH) is equivalent to fxyzzy(fd, ...) @@ -147,11 +147,11 @@ giving an :manpage:`fxyzzy(3)` operation for free:: :manpage:`openat(2)` man page; for an example of AT_EMPTY_PATH, see the :manpage:`fstatat(2)` man page.) -If your new :manpage:`xyzzy(2)` system call involves a parameter describing an +If your new xyzzy(2) system call involves a parameter describing an offset within a file, make its type ``loff_t`` so that 64-bit offsets can be supported even on 32-bit architectures. -If your new :manpage:`xyzzy(2)` system call involves privileged functionality, +If your new xyzzy(2) system call involves privileged functionality, it needs to be governed by the appropriate Linux capability bit (checked with a call to ``capable()``), as described in the :manpage:`capabilities(7)` man page. Choose an existing capability bit that governs related functionality, @@ -160,7 +160,7 @@ under the same bit, as this goes against capabilities' purpose of splitting the power of root. In particular, avoid adding new uses of the already overly-general ``CAP_SYS_ADMIN`` capability. -If your new :manpage:`xyzzy(2)` system call manipulates a process other than +If your new xyzzy(2) system call manipulates a process other than the calling process, it should be restricted (using a call to ``ptrace_may_access()``) so that only a calling process with the same permissions as the target process, or with the necessary capabilities, can @@ -196,7 +196,7 @@ be cc'ed to linux-api@vger.kernel.org. Generic System Call Implementation ---------------------------------- -The main entry point for your new :manpage:`xyzzy(2)` system call will be called +The main entry point for your new xyzzy(2) system call will be called ``sys_xyzzy()``, but you add this entry point with the appropriate ``SYSCALL_DEFINEn()`` macro rather than explicitly. The 'n' indicates the number of arguments to the system call, and the macro takes the system call name @@ -459,7 +459,7 @@ the compatibility wrapper:: ... 555 x32 xyzzy __x32_compat_sys_xyzzy -If no pointers are involved, then it is preferable to re-use the 64-bit system +If no pointers are involved, then it is preferable to reuse the 64-bit system call for the x32 ABI (and consequently the entry in arch/x86/entry/syscalls/syscall_64.tbl is unchanged). diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index 62951cdb13ad..6b373e193548 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -38,7 +38,7 @@ bash 4.2 bash --version binutils 2.30 ld -v flex 2.5.35 flex --version bison 2.0 bison --version -pahole 1.16 pahole --version +pahole 1.22 pahole --version util-linux 2.10o mount --version kmod 13 depmod -V e2fsprogs 1.41.4 e2fsck -V @@ -143,7 +143,7 @@ pahole Since Linux 5.2, if CONFIG_DEBUG_INFO_BTF is selected, the build system generates BTF (BPF Type Format) from DWARF in vmlinux, a bit later from kernel -modules as well. This requires pahole v1.16 or later. +modules as well. This requires pahole v1.22 or later. It is found in the 'dwarves' or 'pahole' distro packages or from https://fedorapeople.org/~acme/dwarves/. @@ -218,7 +218,7 @@ DevFS has been obsoleted in favour of udev Linux documentation for functions is transitioning to inline documentation via specially-formatted comments near their definitions in the source. These comments can be combined with ReST -files the Documentation/ directory to make enriched documentation, which can +files in the Documentation/ directory to make enriched documentation, which can then be converted to PostScript, HTML, LaTex, ePUB and PDF files. In order to convert from ReST format to a format of your choice, you'll need Sphinx. diff --git a/Documentation/process/coding-assistants.rst b/Documentation/process/coding-assistants.rst new file mode 100644 index 000000000000..899f4459c52d --- /dev/null +++ b/Documentation/process/coding-assistants.rst @@ -0,0 +1,59 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _coding_assistants: + +AI Coding Assistants +++++++++++++++++++++ + +This document provides guidance for AI tools and developers using AI +assistance when contributing to the Linux kernel. + +AI tools helping with Linux kernel development should follow the standard +kernel development process: + +* Documentation/process/development-process.rst +* Documentation/process/coding-style.rst +* Documentation/process/submitting-patches.rst + +Licensing and Legal Requirements +================================ + +All contributions must comply with the kernel's licensing requirements: + +* All code must be compatible with GPL-2.0-only +* Use appropriate SPDX license identifiers +* See Documentation/process/license-rules.rst for details + +Signed-off-by and Developer Certificate of Origin +================================================= + +AI agents MUST NOT add Signed-off-by tags. Only humans can legally +certify the Developer Certificate of Origin (DCO). The human submitter +is responsible for: + +* Reviewing all AI-generated code +* Ensuring compliance with licensing requirements +* Adding their own Signed-off-by tag to certify the DCO +* Taking full responsibility for the contribution + +Attribution +=========== + +When AI tools contribute to kernel development, proper attribution +helps track the evolving role of AI in the development process. +Contributions should include an Assisted-by tag in the following format:: + + Assisted-by: AGENT_NAME:MODEL_VERSION [TOOL1] [TOOL2] + +Where: + +* ``AGENT_NAME`` is the name of the AI tool or framework +* ``MODEL_VERSION`` is the specific model version used +* ``[TOOL1] [TOOL2]`` are optional specialized analysis tools used + (e.g., coccinelle, sparse, smatch, clang-tidy) + +Basic development tools (git, gcc, make, editors) should not be listed. + +Example:: + + Assisted-by: Claude:claude-3-opus coccinelle sparse diff --git a/Documentation/process/coding-style.rst b/Documentation/process/coding-style.rst index 2969ca378dbb..35b381230f6e 100644 --- a/Documentation/process/coding-style.rst +++ b/Documentation/process/coding-style.rst @@ -614,7 +614,7 @@ it. When commenting the kernel API functions, please use the kernel-doc format. See the files at :ref:`Documentation/doc-guide/ <doc_guide>` and -``scripts/kernel-doc`` for details. Note that the danger of over-commenting +``tools/docs/kernel-doc`` for details. Note that the danger of over-commenting applies to kernel-doc comments all the same. Do not add boilerplate kernel-doc which simply reiterates what's obvious from the signature of the function. @@ -1070,7 +1070,7 @@ readability. 18) Don't re-invent the kernel macros ------------------------------------- -The header file include/linux/kernel.h contains a number of macros that +There are many header files in include/linux/ that contain a number of macros that you should use, rather than explicitly coding some variant of them yourself. For example, if you need to calculate the length of an array, take advantage of the macro @@ -1079,14 +1079,18 @@ of the macro #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +which is defined in array_size.h. + Similarly, if you need to calculate the size of some structure member, use .. code-block:: c #define sizeof_field(t, f) (sizeof(((t*)0)->f)) -There are also min() and max() macros that do strict type checking if you -need them. Feel free to peruse that header file to see what else is already +which is defined in stddef.h. + +There are also min() and max() macros defined in minmax.h that do strict type checking +if you need them. Feel free to peruse the header files to see what else is already defined that you shouldn't reproduce in your code. diff --git a/Documentation/process/conclave.rst b/Documentation/process/conclave.rst new file mode 100644 index 000000000000..6a1234f54612 --- /dev/null +++ b/Documentation/process/conclave.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Linux kernel project continuity +=============================== + +The Linux kernel development project is widely distributed, with over +100 maintainers each working to keep changes moving through their own +repositories. The final step, though, is a centralized one where changes +are pulled into the mainline repository. That is normally done by Linus +Torvalds but, as was demonstrated by the 4.19 release in 2018, there are +others who can do that work when the need arises. + +Should the maintainers of that repository become unwilling or unable to +do that work going forward (including facilitating a transition), the +project will need to find one or more replacements without delay. The +process by which that will be done is listed below. $ORGANIZER is the +last Maintainer Summit organizer or the current Linux Foundation (LF) +Technical Advisory Board (TAB) Chair as a backup. + +- Within 72 hours, $ORGANIZER will open a discussion with the invitees + of the most recently concluded Maintainers Summit. A meeting of those + invitees and the TAB, either online or in-person, will be set as soon + as possible in a way that maximizes the number of people who can + participate. + +- If there has been no Maintainers Summit in the last 15 months, the set of + invitees for this meeting will be determined by the TAB. + +- The invitees to this meeting may bring in other maintainers as needed. + +- This meeting, chaired by $ORGANIZER, will consider options for the + ongoing management of the top-level kernel repository consistent with + the expectation that it maximizes the long term health of the project + and its community. + +- Within two weeks, a representative of this group will communicate to the + broader community, using the ksummit@lists.linux.dev mailing list, what + the next steps will be. + +The Linux Foundation, as guided by the TAB, will take the steps +necessary to support and implement this plan. diff --git a/Documentation/process/debugging/index.rst b/Documentation/process/debugging/index.rst index 387d33d16f5e..357243e184e1 100644 --- a/Documentation/process/debugging/index.rst +++ b/Documentation/process/debugging/index.rst @@ -15,8 +15,6 @@ general guides kgdb userspace_debugging_guide -.. only:: subproject and html - subsystem specific guides ------------------------- @@ -25,13 +23,6 @@ subsystem specific guides media_specific_debugging_guide -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` - General debugging advice ======================== diff --git a/Documentation/process/debugging/kgdb.rst b/Documentation/process/debugging/kgdb.rst index 773b19aa1382..dd6a103073fa 100644 --- a/Documentation/process/debugging/kgdb.rst +++ b/Documentation/process/debugging/kgdb.rst @@ -380,6 +380,13 @@ virtual address where the kernel image is mapped and confuses gdb which resolves addresses of kernel symbols from the symbol table of vmlinux. +Kernel parameter: ``rodata`` +---------------------------- + +``CONFIG_STRICT_KERNEL_RWX`` is turned on by default and is not +visible to menuconfig on some architectures (arm64 for example), +you can pass ``rodata=off`` to the kernel in this case. + Using kdb ========= diff --git a/Documentation/process/deprecated.rst b/Documentation/process/deprecated.rst index 1f7f3e6c9cda..fed56864d036 100644 --- a/Documentation/process/deprecated.rst +++ b/Documentation/process/deprecated.rst @@ -372,3 +372,34 @@ The helper must be used:: DECLARE_FLEX_ARRAY(struct type2, two); }; }; + +Open-coded kmalloc assignments for struct objects +------------------------------------------------- +Performing open-coded kmalloc()-family allocation assignments prevents +the kernel (and compiler) from being able to examine the type of the +variable being assigned, which limits any related introspection that +may help with alignment, wrap-around, or additional hardening. The +kmalloc_obj()-family of macros provide this introspection, which can be +used for the common code patterns for single, array, and flexible object +allocations. For example, these open coded assignments:: + + ptr = kmalloc(sizeof(*ptr), gfp); + ptr = kzalloc(sizeof(*ptr), gfp); + ptr = kmalloc_array(count, sizeof(*ptr), gfp); + ptr = kcalloc(count, sizeof(*ptr), gfp); + ptr = kmalloc(struct_size(ptr, flex_member, count), gfp); + ptr = kmalloc(sizeof(struct foo, gfp); + +become, respectively:: + + ptr = kmalloc_obj(*ptr, gfp); + ptr = kzalloc_obj(*ptr, gfp); + ptr = kmalloc_objs(*ptr, count, gfp); + ptr = kzalloc_objs(*ptr, count, gfp); + ptr = kmalloc_flex(*ptr, flex_member, count, gfp); + __auto_type ptr = kmalloc_obj(struct foo, gfp); + +If `ptr->flex_member` is annotated with __counted_by(), the allocation +will automatically fail if `count` is larger than the maximum +representable value that can be stored in the counter member associated +with `flex_member`. diff --git a/Documentation/process/email-clients.rst b/Documentation/process/email-clients.rst index 84a2450bb6ec..b5377630a648 100644 --- a/Documentation/process/email-clients.rst +++ b/Documentation/process/email-clients.rst @@ -324,7 +324,14 @@ To beat some sense out of the internal editor, do this: - Set ``mailnews.send_plaintext_flowed`` to ``false`` - - Set ``mailnews.wraplength`` from ``72`` to ``0`` + - Set ``mailnews.wraplength`` from ``72`` to ``0`` **or** install the + "Toggle Line Wrap" extension + + https://github.com/jan-kiszka/togglelinewrap + + https://addons.thunderbird.net/thunderbird/addon/toggle-line-wrap + + to control this registry on the fly. - Don't write HTML messages! Go to the main window :menuselection:`Main Menu-->Account Settings-->youracc@server.something-->Composition & Addressing`! diff --git a/Documentation/process/generated-content.rst b/Documentation/process/generated-content.rst new file mode 100644 index 000000000000..08621e50a462 --- /dev/null +++ b/Documentation/process/generated-content.rst @@ -0,0 +1,109 @@ +============================================ +Kernel Guidelines for Tool-Generated Content +============================================ + +Purpose +======= + +Kernel contributors have been using tooling to generate contributions +for a long time. These tools can increase the volume of contributions. +At the same time, reviewer and maintainer bandwidth is a scarce +resource. Understanding which portions of a contribution come from +humans versus tools is helpful to maintain those resources and keep +kernel development healthy. + +The goal here is to clarify community expectations around tools. This +lets everyone become more productive while also maintaining high +degrees of trust between submitters and reviewers. + +Out of Scope +============ + +These guidelines do not apply to tools that make trivial tweaks to +preexisting content. Nor do they pertain to tooling that helps with +menial tasks. Some examples: + + - Spelling and grammar fix ups, like rephrasing to imperative voice + - Typing aids like identifier completion, common boilerplate or + trivial pattern completion + - Purely mechanical transformations like variable renaming + - Reformatting, like running Lindent, ``clang-format`` or + ``rust-fmt`` + +Even whenever your tool use is out of scope, you should still always +consider if it would help reviewing your contribution if the reviewer +knows about the tool that you used. + +In Scope +======== + +These guidelines apply when a meaningful amount of content in a kernel +contribution was not written by a person in the Signed-off-by chain, +but was instead created by a tool. + +Detection of a problem and testing the fix for it is also part of the +development process; if a tool was used to find a problem addressed by +a change, that should be noted in the changelog. This not only gives +credit where it is due, it also helps fellow developers find out about +these tools. + +Some examples: + - Any tool-suggested fix such as ``checkpatch.pl --fix`` + - Coccinelle scripts + - A chatbot generated a new function in your patch to sort list entries. + - A .c file in the patch was originally generated by a coding + assistant but cleaned up by hand. + - The changelog was generated by handing the patch to a generative AI + tool and asking it to write the changelog. + - The changelog was translated from another language. + +If in doubt, choose transparency and assume these guidelines apply to +your contribution. + +Guidelines +========== + +First, read the Developer's Certificate of Origin: +Documentation/process/submitting-patches.rst. Its rules are simple +and have been in place for a long time. They have covered many +tool-generated contributions. Ensure that you understand your entire +submission and are prepared to respond to review comments. + +Second, when making a contribution, be transparent about the origin of +content in cover letters and changelogs. You can be more transparent +by adding information like this: + + - What tools were used? + - The input to the tools you used, like the Coccinelle source script. + - If code was largely generated from a single or short set of + prompts, include those prompts. For longer sessions, include a + summary of the prompts and the nature of resulting assistance. + - Which portions of the content were affected by that tool? + - How is the submission tested and what tools were used to test the + fix? + +As with all contributions, individual maintainers have discretion to +choose how they handle the contribution. For example, they might: + + - Treat it just like any other contribution. + - Reject it outright. + - Treat the contribution specially, for example, asking for extra + testing, reviewing with extra scrutiny, or reviewing at a lower + priority than human-generated content. + - Ask for some other special steps, like asking the contributor to + elaborate on how the tool or model was trained. + - Ask the submitter to explain in more detail about the contribution + so that the maintainer can be assured that the submitter fully + understands how the code works. + - Suggest a better prompt instead of suggesting specific code changes. + +If tools permit you to generate a contribution automatically, expect +additional scrutiny in proportion to how much of it was generated. + +As with the output of any tooling, the result may be incorrect or +inappropriate. You are expected to understand and to be able to defend +everything you submit. If you are unable to do so, then do not submit +the resulting changes. + +If you do so anyway, maintainers are entitled to reject your series +without detailed review. diff --git a/Documentation/process/index.rst b/Documentation/process/index.rst index aa12f2660194..dbd6ea16aca7 100644 --- a/Documentation/process/index.rst +++ b/Documentation/process/index.rst @@ -68,6 +68,9 @@ beyond). stable-kernel-rules management-style researcher-guidelines + generated-content + coding-assistants + conclave Dealing with bugs ----------------- @@ -108,10 +111,3 @@ developers: kernel-docs deprecated - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/process/maintainer-netdev.rst b/Documentation/process/maintainer-netdev.rst index 989192421cc9..6bce4507d5d3 100644 --- a/Documentation/process/maintainer-netdev.rst +++ b/Documentation/process/maintainer-netdev.rst @@ -363,6 +363,18 @@ just do it. As a result, a sequence of smaller series gets merged quicker and with better review coverage. Re-posting large series also increases the mailing list traffic. +Limit patches outstanding on mailing list +----------------------------------------- + +Avoid having more than 15 patches, across all series, outstanding for +review on the mailing list for a single tree. In other words, a maximum of +15 patches under review on net, and a maximum of 15 patches under review on +net-next. + +This limit is intended to focus developer effort on testing patches before +upstream review. Aiding the quality of upstream submissions, and easing the +load on reviewers. + .. _rcs: Local variable ordering ("reverse xmas tree", "RCS") diff --git a/Documentation/process/maintainer-pgp-guide.rst b/Documentation/process/maintainer-pgp-guide.rst index b6919bf606c3..bfe877a1a7e4 100644 --- a/Documentation/process/maintainer-pgp-guide.rst +++ b/Documentation/process/maintainer-pgp-guide.rst @@ -1,3 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + .. _pgpguide: =========================== @@ -405,8 +407,8 @@ geographical region, and open/proprietary hardware considerations. .. note:: - If you are listed in MAINTAINERS or have an account at kernel.org, - you `qualify for a free Nitrokey Start`_ courtesy of The Linux + If you are listed in an `M:` entry in MAINTAINERS or have an account at + kernel.org, you `qualify for a free Nitrokey Start`_ courtesy of The Linux Foundation. .. _`Nitrokey Start`: https://www.nitrokey.com/products/nitrokeys @@ -864,7 +866,7 @@ don't already have them):: If you have a kernel.org account, then you should `add the kernel.org UID to your key`_ to make WKD more useful to other kernel developers. -.. _`add the kernel.org UID to your key`: https://korg.wiki.kernel.org/userdoc/mail#adding_a_kernelorg_uid_to_your_pgp_key +.. _`add the kernel.org UID to your key`: https://korg.docs.kernel.org/mail.html#adding-a-kernel-org-uid-to-your-pgp-key Web of Trust (WOT) vs. Trust on First Use (TOFU) ------------------------------------------------ diff --git a/Documentation/process/maintainer-soc.rst b/Documentation/process/maintainer-soc.rst index 3ba886f52a51..7d6bad989ad8 100644 --- a/Documentation/process/maintainer-soc.rst +++ b/Documentation/process/maintainer-soc.rst @@ -57,8 +57,10 @@ Submitting Patches for Given SoC All typical platform related patches should be sent via SoC submaintainers (platform-specific maintainers). This includes also changes to per-platform or -shared defconfigs (scripts/get_maintainer.pl might not provide correct -addresses in such case). +shared defconfigs. Note that scripts/get_maintainer.pl might not provide +correct addresses for the shared defconfig, so ignore its output and manually +create CC-list based on MAINTAINERS file or use something like +``scripts/get_maintainer.pl -f drivers/soc/FOO/``). Submitting Patches to the Main SoC Maintainers ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -114,9 +116,9 @@ coordinating how the changes get merged through different maintainer trees. Usually the branch that includes a driver change will also include the corresponding change to the devicetree binding description, to ensure they are in fact compatible. This means that the devicetree branch can end up causing -warnings in the "make dtbs_check" step. If a devicetree change depends on +warnings in the ``make dtbs_check`` step. If a devicetree change depends on missing additions to a header file in include/dt-bindings/, it will fail the -"make dtbs" step and not get merged. +``make dtbs`` step and not get merged. There are multiple ways to deal with this: diff --git a/Documentation/process/programming-language.rst b/Documentation/process/programming-language.rst index bc56dee6d0bc..c18e307ccb56 100644 --- a/Documentation/process/programming-language.rst +++ b/Documentation/process/programming-language.rst @@ -3,10 +3,10 @@ Programming Language ==================== -The kernel is written in the C programming language [c-language]_. -More precisely, the kernel is typically compiled with ``gcc`` [gcc]_ +The Linux kernel is written in the C programming language [c-language]_. +More precisely, it is typically compiled with ``gcc`` [gcc]_ under ``-std=gnu11`` [gcc-c-dialect-options]_: the GNU dialect of ISO C11. -``clang`` [clang]_ is also supported, see docs on +``clang`` [clang]_ is also supported; see documentation on :ref:`Building Linux with Clang/LLVM <kbuild_llvm>`. This dialect contains many extensions to the language [gnu-extensions]_, @@ -34,7 +34,7 @@ Please refer to ``include/linux/compiler_attributes.h`` for more information. Rust ---- -The kernel has experimental support for the Rust programming language +The kernel has support for the Rust programming language [rust-language]_ under ``CONFIG_RUST``. It is compiled with ``rustc`` [rustc]_ under ``--edition=2021`` [rust-editions]_. Editions are a way to introduce small changes to the language that are not backwards compatible. diff --git a/Documentation/process/security-bugs.rst b/Documentation/process/security-bugs.rst index 84657e7d2e5b..c0cf93e11565 100644 --- a/Documentation/process/security-bugs.rst +++ b/Documentation/process/security-bugs.rst @@ -33,12 +33,16 @@ that can speed up the process considerably. It is possible that the security team will bring in extra help from area maintainers to understand and fix the security vulnerability. -Please send plain text emails without attachments where possible. +Please send **plain text** emails without attachments where possible. It is much harder to have a context-quoted discussion about a complex issue if all the details are hidden away in attachments. Think of it like a :doc:`regular patch submission <../process/submitting-patches>` (even if you don't have a patch yet): describe the problem and impact, list reproduction steps, and follow it with a proposed fix, all in plain text. +Markdown, HTML and RST formatted reports are particularly frowned upon since +they're quite hard to read for humans and encourage to use dedicated viewers, +sometimes online, which by definition is not acceptable for a confidential +security report. Disclosure and embargoed information ------------------------------------ diff --git a/Documentation/process/submitting-patches.rst b/Documentation/process/submitting-patches.rst index 9a509f1a6873..e69d19ad658f 100644 --- a/Documentation/process/submitting-patches.rst +++ b/Documentation/process/submitting-patches.rst @@ -805,7 +805,8 @@ not part of the changelog which gets committed to the git tree. It is additional information for the reviewers. If it's placed above the commit tags, it needs manual interaction to remove it. If it is below the separator line, it gets automatically stripped off when applying the -patch:: +patch. If available, adding links to previous versions of the patch (e.g., +lore.kernel.org archive link) is recommended to help reviewers:: <commit message> ... @@ -814,6 +815,9 @@ patch:: V2 -> V3: Removed redundant helper function V1 -> V2: Cleaned up coding style and addressed review comments + v2: https://lore.kernel.org/bar + v1: https://lore.kernel.org/foo + path/to/file | 5+++-- ... diff --git a/Documentation/rust/index.rst b/Documentation/rust/index.rst index ec62001c7d8c..b78ed0efa784 100644 --- a/Documentation/rust/index.rst +++ b/Documentation/rust/index.rst @@ -7,24 +7,6 @@ Documentation related to Rust within the kernel. To start using Rust in the kernel, please read the quick-start.rst guide. -The Rust experiment -------------------- - -The Rust support was merged in v6.1 into mainline in order to help in -determining whether Rust as a language was suitable for the kernel, i.e. worth -the tradeoffs. - -Currently, the Rust support is primarily intended for kernel developers and -maintainers interested in the Rust support, so that they can start working on -abstractions and drivers, as well as helping the development of infrastructure -and tools. - -If you are an end user, please note that there are currently no in-tree -drivers/modules suitable or intended for production use, and that the Rust -support is still in development/experimental, especially for certain kernel -configurations. - - Code documentation ------------------ @@ -58,10 +40,3 @@ more details. You can also find learning materials for Rust in its section in :doc:`../process/kernel-docs`. - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/scheduler/index.rst b/Documentation/scheduler/index.rst index 5dd53e47bc0c..17ce8d76befc 100644 --- a/Documentation/scheduler/index.rst +++ b/Documentation/scheduler/index.rst @@ -25,10 +25,3 @@ Scheduler sched-debug text_files - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/scheduler/sched-energy.rst b/Documentation/scheduler/sched-energy.rst index 70e2921ef725..4e47aaf103eb 100644 --- a/Documentation/scheduler/sched-energy.rst +++ b/Documentation/scheduler/sched-energy.rst @@ -244,7 +244,7 @@ Example 2. From these calculations, the Case 1 has the lowest total energy. So CPU 1 - is be the best candidate from an energy-efficiency standpoint. + is the best candidate from an energy-efficiency standpoint. Big CPUs are generally more power hungry than the little ones and are thus used mainly when a task doesn't fit the littles. However, little CPUs aren't always @@ -252,7 +252,7 @@ necessarily more energy-efficient than big CPUs. For some systems, the high OPPs of the little CPUs can be less energy-efficient than the lowest OPPs of the bigs, for example. So, if the little CPUs happen to have enough utilization at a specific point in time, a small task waking up at that moment could be better -of executing on the big side in order to save energy, even though it would fit +off executing on the big side in order to save energy, even though it would fit on the little side. And even in the case where all OPPs of the big CPUs are less energy-efficient @@ -285,7 +285,7 @@ much that can be done by the scheduler to save energy without severely harming throughput. In order to avoid hurting performance with EAS, CPUs are flagged as 'over-utilized' as soon as they are used at more than 80% of their compute capacity. As long as no CPUs are over-utilized in a root domain, load balancing -is disabled and EAS overridess the wake-up balancing code. EAS is likely to load +is disabled and EAS overrides the wake-up balancing code. EAS is likely to load the most energy efficient CPUs of the system more than the others if that can be done without harming throughput. So, the load-balancer is disabled to prevent it from breaking the energy-efficient task placement found by EAS. It is safe to @@ -385,7 +385,7 @@ Using EAS with any other governor than schedutil is not supported. 6.5 Scale-invariant utilization signals ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -In order to make accurate prediction across CPUs and for all performance +In order to make accurate predictions across CPUs and for all performance states, EAS needs frequency-invariant and CPU-invariant PELT signals. These can be obtained using the architecture-defined arch_scale{cpu,freq}_capacity() callbacks. diff --git a/Documentation/scheduler/sched-ext.rst b/Documentation/scheduler/sched-ext.rst index 404fe6126a76..9e2882d937b4 100644 --- a/Documentation/scheduler/sched-ext.rst +++ b/Documentation/scheduler/sched-ext.rst @@ -43,7 +43,6 @@ options should be enabled to use sched_ext: CONFIG_DEBUG_INFO_BTF=y CONFIG_BPF_JIT_ALWAYS_ON=y CONFIG_BPF_JIT_DEFAULT_ON=y - CONFIG_PAHOLE_HAS_SPLIT_BTF=y CONFIG_PAHOLE_HAS_BTF_TAG=y sched_ext is used only when the BPF scheduler is loaded and running. diff --git a/Documentation/scsi/ChangeLog.sym53c8xx b/Documentation/scsi/ChangeLog.sym53c8xx index 3435227a2bed..07bf2433d64f 100644 --- a/Documentation/scsi/ChangeLog.sym53c8xx +++ b/Documentation/scsi/ChangeLog.sym53c8xx @@ -2,9 +2,9 @@ Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr) * version sym53c8xx-1.7.3c - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM. Fix sent by Stig Telfer <stig@api-networks.com>. - - Backport from SYM-2 the work-around that allows to support - hardwares that fail PCI parity checking. - - Check that we received at least 8 bytes of INQUIRY response + - Backport from SYM-2 the work-around that allows to support + hardware that fails PCI parity checking. + - Check that we received at least 8 bytes of INQUIRY response for byte 7, that contains device capabilities, to be valid. - Define scsi_set_pci_device() as nil for kernel < 2.4.4. - + A couple of minor changes. diff --git a/Documentation/scsi/link_power_management_policy.rst b/Documentation/scsi/link_power_management_policy.rst index 64288dcf10f6..e350892cc2f3 100644 --- a/Documentation/scsi/link_power_management_policy.rst +++ b/Documentation/scsi/link_power_management_policy.rst @@ -5,13 +5,13 @@ Link Power Managent Policy ========================== This parameter allows the user to set the link (interface) power management. -There are 3 possible options: +There are 6 possible options: -===================== ===================================================== +====================== ===================================================== Value Effect -===================== ===================================================== -min_power Tell the controller to try to make the link use the - least possible power when possible. This may +====================== ===================================================== +min_power Enable slumber mode(no partial mode) for the link to + use the least possible power when possible. This may sacrifice some performance due to increased latency when coming out of lower power states. @@ -22,4 +22,15 @@ max_performance Generally, this means no power management. Tell medium_power Tell the controller to enter a lower power state when possible, but do not enter the lowest power state, thus improving latency over min_power setting. -===================== ===================================================== + +keep_firmware_settings Do not change the current firmware settings for + Power management. This is the default setting. + +med_power_with_dipm Same as medium_power, but additionally with + Device-initiated power management(DIPM) enabled, + as Intel Rapid Storage Technology(IRST) does. + +min_power_with_partial Same as min_power, but additionally with partial + power state enabled, which may improve performance + over min_power setting. +====================== ===================================================== diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst index 634f5c28a849..7f59dff43eb5 100644 --- a/Documentation/scsi/scsi_mid_low_api.rst +++ b/Documentation/scsi/scsi_mid_low_api.rst @@ -903,7 +903,8 @@ Details:: * * Defined in: LLD **/ - int queuecommand(struct Scsi_Host *shost, struct scsi_cmnd * scp) + enum scsi_qc_status queuecommand(struct Scsi_Host *shost, + struct scsi_cmnd *scp) /** diff --git a/Documentation/security/keys/trusted-encrypted.rst b/Documentation/security/keys/trusted-encrypted.rst index eae6a36b1c9a..ddff7c7c2582 100644 --- a/Documentation/security/keys/trusted-encrypted.rst +++ b/Documentation/security/keys/trusted-encrypted.rst @@ -81,6 +81,14 @@ safe. and the UNIQUE key. Default is to use the UNIQUE key, but selecting the OTP key can be done via a module parameter (dcp_use_otp_key). + (5) PKWM (PowerVM Key Wrapping Module: IBM PowerVM + Platform KeyStore) + + Rooted to a unique, per-LPAR key, which is derived from a system-wide, + randomly generated LPAR root key. Both the per-LPAR keys and the LPAR + root key are stored in hypervisor-owned secure memory at runtime, + and the LPAR root key is additionally persisted in secure locations + such as the processor SEEPROMs and encrypted NVRAM. + * Execution isolation (1) TPM @@ -102,6 +110,14 @@ safe. environment. Only basic blob key encryption is executed there. The actual key sealing/unsealing is done on main processor/kernel space. + (5) PKWM (PowerVM Key Wrapping Module: IBM PowerVM + Platform KeyStore) + + Fixed set of cryptographic operations done on on-chip hardware + cryptographic acceleration unit NX. Keys for wrapping and unwrapping + are managed by PowerVM Platform KeyStore, which stores keys in an + isolated in-memory copy in secure hypervisor memory, as well as in a + persistent copy in hypervisor-encrypted NVRAM. + * Optional binding to platform integrity state (1) TPM @@ -129,6 +145,11 @@ safe. Relies on Secure/Trusted boot process (called HAB by vendor) for platform integrity. + (5) PKWM (PowerVM Key Wrapping Module: IBM PowerVM + Platform KeyStore) + + Relies on secure and trusted boot process of IBM Power systems for + platform integrity. + * Interfaces and APIs (1) TPM @@ -149,6 +170,11 @@ safe. Vendor-specific API that is implemented as part of the DCP crypto driver in ``drivers/crypto/mxs-dcp.c``. + (5) PKWM (PowerVM Key Wrapping Module: IBM PowerVM + Platform KeyStore) + + Platform Keystore has well documented interfaces in PAPR document. + Refer to ``Documentation/arch/powerpc/papr_hcalls.rst`` + * Threat model The strength and appropriateness of a particular trust source for a given @@ -191,6 +217,10 @@ selected trust source: a dedicated hardware RNG that is independent from DCP which can be enabled to back the kernel RNG. + * PKWM (PowerVM Key Wrapping Module: IBM PowerVM + Platform KeyStore) + + The normal kernel random number generator is used to generate keys. + Users may override this by specifying ``trusted.rng=kernel`` on the kernel command-line to override the used RNG with the kernel's random number pool. @@ -321,6 +351,26 @@ Usage:: specific to this DCP key-blob implementation. The key length for new keys is always in bytes. Trusted Keys can be 32 - 128 bytes (256 - 1024 bits). +Trusted Keys usage: PKWM +------------------------ + +Usage:: + + keyctl add trusted name "new keylen [options]" ring + keyctl add trusted name "load hex_blob" ring + keyctl print keyid + + options: + wrap_flags= ascii hex value of security policy requirement + 0x00: no secure boot requirement (default) + 0x01: require secure boot to be in either audit or + enforced mode + 0x02: require secure boot to be in enforced mode + +"keyctl print" returns an ASCII hex copy of the sealed key, which is in format +specific to PKWM key-blob implementation. The key length for new keys is +always in bytes. Trusted Keys can be 32 - 128 bytes (256 - 1024 bits). + Encrypted Keys usage -------------------- diff --git a/Documentation/sound/alsa-configuration.rst b/Documentation/sound/alsa-configuration.rst index 0a4eaa7d66dd..55b845d38236 100644 --- a/Documentation/sound/alsa-configuration.rst +++ b/Documentation/sound/alsa-configuration.rst @@ -2372,6 +2372,10 @@ quirk_flags audible volume * bit 25: ``mixer_capture_min_mute`` Similar to bit 24 but for capture streams + * bit 26: ``skip_iface_setup`` + Skip the probe-time interface setup (usb_set_interface, + init_pitch, init_sample_rate); redundant with + snd_usb_endpoint_prepare() at stream-open time This module supports multiple devices, autoprobe and hotplugging. diff --git a/Documentation/sound/hd-audio/notes.rst b/Documentation/sound/hd-audio/notes.rst index f81e94d8f145..6993bfa159b4 100644 --- a/Documentation/sound/hd-audio/notes.rst +++ b/Documentation/sound/hd-audio/notes.rst @@ -191,7 +191,7 @@ model is found in the white-list, the driver assumes the static configuration of that preset with the correct pin setup, etc. Thus, if you have a newer machine with a slightly different PCI SSID (or codec SSID) from the existing one, you may have a good chance to -re-use the same model. You can pass the ``model`` option to specify the +reuse the same model. You can pass the ``model`` option to specify the preset model instead of PCI (and codec-) SSID look-up. What ``model`` option values are available depends on the codec chip. diff --git a/Documentation/sound/index.rst b/Documentation/sound/index.rst index 51cd736f65b5..c075ca6e11eb 100644 --- a/Documentation/sound/index.rst +++ b/Documentation/sound/index.rst @@ -15,10 +15,3 @@ Sound Subsystem Documentation cards/index codecs/index utimers - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/sphinx-includes/subproject-index.rst b/Documentation/sphinx-includes/subproject-index.rst new file mode 100644 index 000000000000..efffdb5fb017 --- /dev/null +++ b/Documentation/sphinx-includes/subproject-index.rst @@ -0,0 +1,7 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. This file is included in subproject root documents in conf.py + +Indices +======= + +* :ref:`genindex` diff --git a/Documentation/sphinx-static/custom.css b/Documentation/sphinx-static/custom.css index 06cedbae095c..db24f4344e6c 100644 --- a/Documentation/sphinx-static/custom.css +++ b/Documentation/sphinx-static/custom.css @@ -20,7 +20,7 @@ div.sphinxsidebar { font-size: inherit; overflow-y: auto; } /* Tweak document margins and don't force width */ div.document { - margin: 20px 10px 0 10px; + margin: 20px 10px 0 10px; width: auto; } @@ -30,6 +30,9 @@ img.logo { margin-bottom: 20px; } +/* The default is to use -1em, wich makes it override text */ +li { text-indent: 0em; } + /* * Parameters for the display of function prototypes and such included * from C source files. @@ -41,6 +44,15 @@ dt.sig-object { font-size: larger; } div.kernelindent { margin-left: 2em; margin-right: 4em; } /* + * Parameters for the display of function prototypes and such included + * from Python source files. + */ +dl.py { margin-top: 2em; background-color: #ecf0f3; } +dl.py.class { margin-left: 2em; text-indent: -2em; padding-left: 2em; } +dl.py.method, dl.py.attribute { margin-left: 2em; text-indent: -2em; } +dl.py li, pre { text-indent: 0em; padding-left: 0 !important; } + +/* * Tweaks for our local TOC */ div.kerneltoc li.toctree-l1 { font-size: smaller; @@ -151,3 +163,9 @@ div.sphinxsidebar a:hover { text-decoration: underline; text-underline-offset: 0.3em; } + +a.manpage { + font-style: normal; + font-weight: bold; + font-family: "Courier New", Courier, monospace; +} diff --git a/Documentation/sphinx/automarkup.py b/Documentation/sphinx/automarkup.py index 1d9dada40a74..c2227ab0a891 100644 --- a/Documentation/sphinx/automarkup.py +++ b/Documentation/sphinx/automarkup.py @@ -46,6 +46,12 @@ RE_namespace = re.compile(r'^\s*..\s*c:namespace::\s*(\S+)\s*$') # Skipnames = [ 'for', 'if', 'register', 'sizeof', 'struct', 'unsigned' ] +# +# Common English words that should not be recognized as C identifiers +# when following struct/union/enum/typedef keywords. +# Example: "a simple struct that" in workqueue.rst should not be marked as code. +# +Skipidentifiers = [ 'that', 'which', 'where', 'whose' ] # # Many places in the docs refer to common system calls. It is @@ -163,6 +169,10 @@ def markup_c_ref(docname, app, match): if c_namespace: possible_targets.insert(0, c_namespace + "." + base_target) + # Skip common English words that match identifier pattern but are not C code. + if base_target in Skipidentifiers: + return target_text + if base_target not in Skipnames: for target in possible_targets: if not (match.re == RE_function and target in Skipfuncs): diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py index d8cdf068ef35..c1cadb4eb099 100644 --- a/Documentation/sphinx/kerneldoc.py +++ b/Documentation/sphinx/kerneldoc.py @@ -47,6 +47,10 @@ sys.path.insert(0, os.path.join(srctree, "tools/lib/python")) from kdoc.kdoc_files import KernelFiles from kdoc.kdoc_output import RestFormat +# Used when verbose is active to show how to reproduce kernel-doc +# issues via command line +kerneldoc_bin = "tools/docs/kernel-doc" + __version__ = '1.0' kfiles = None logger = logging.getLogger(__name__) @@ -95,7 +99,7 @@ class KernelDocDirective(Directive): def handle_args(self): env = self.state.document.settings.env - cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno'] + cmd = [kerneldoc_bin, '-rst', '-enable-lineno'] filename = env.config.kerneldoc_srctree + '/' + self.arguments[0] @@ -190,35 +194,7 @@ class KernelDocDirective(Directive): return cmd - def run_cmd(self, cmd): - """ - Execute an external kernel-doc command. - """ - - env = self.state.document.settings.env - node = nodes.section() - - p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - out, err = p.communicate() - - out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8') - - if p.returncode != 0: - sys.stderr.write(err) - - logger.warning("kernel-doc '%s' failed with return code %d" - % (" ".join(cmd), p.returncode)) - return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] - elif env.config.kerneldoc_verbosity > 0: - sys.stderr.write(err) - - filenames = self.parse_args["file_list"] - for filename in filenames: - self.parse_msg(filename, node, out, cmd) - - return node.children - - def parse_msg(self, filename, node, out, cmd): + def parse_msg(self, filename, node, out): """ Handles a kernel-doc output for a given file """ @@ -244,7 +220,7 @@ class KernelDocDirective(Directive): self.do_parse(result, node) - def run_kdoc(self, cmd, kfiles): + def run_kdoc(self, kfiles): """ Execute kernel-doc classes directly instead of running as a separate command. @@ -258,23 +234,17 @@ class KernelDocDirective(Directive): filenames = self.parse_args["file_list"] for filename, out in kfiles.msg(**self.msg_args, filenames=filenames): - self.parse_msg(filename, node, out, cmd) + self.parse_msg(filename, node, out) return node.children def run(self): - global kfiles - cmd = self.handle_args() if self.verbose >= 1: logger.info(cmd_str(cmd)) try: - if kfiles: - return self.run_kdoc(cmd, kfiles) - else: - return self.run_cmd(cmd) - + return self.run_kdoc(kfiles) except Exception as e: # pylint: disable=W0703 logger.warning("kernel-doc '%s' processing failed with: %s" % (cmd_str(cmd), pformat(e))) @@ -286,19 +256,11 @@ class KernelDocDirective(Directive): def setup_kfiles(app): global kfiles - - kerneldoc_bin = app.env.config.kerneldoc_bin - - if kerneldoc_bin and kerneldoc_bin.endswith("kernel-doc.py"): - print("Using Python kernel-doc") - out_style = RestFormat() - kfiles = KernelFiles(out_style=out_style, logger=logger) - else: - print(f"Using {kerneldoc_bin}") + out_style = RestFormat() + kfiles = KernelFiles(out_style=out_style, logger=logger) def setup(app): - app.add_config_value('kerneldoc_bin', None, 'env') app.add_config_value('kerneldoc_srctree', None, 'env') app.add_config_value('kerneldoc_verbosity', 1, 'env') diff --git a/Documentation/spi/index.rst b/Documentation/spi/index.rst index 824ce42ed4f0..ac0c2233ce48 100644 --- a/Documentation/spi/index.rst +++ b/Documentation/spi/index.rst @@ -9,13 +9,7 @@ Serial Peripheral Interface (SPI) spi-summary spidev + multiple-data-lanes butterfly spi-lm70llp spi-sc18is602 - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/spi/multiple-data-lanes.rst b/Documentation/spi/multiple-data-lanes.rst new file mode 100644 index 000000000000..69cb532d052f --- /dev/null +++ b/Documentation/spi/multiple-data-lanes.rst @@ -0,0 +1,217 @@ +==================================== +SPI devices with multiple data lanes +==================================== + +Some specialized SPI controllers and peripherals support multiple data lanes +that allow reading more than one word at a time in parallel. This is different +from dual/quad/octal SPI where multiple bits of a single word are transferred +simultaneously. + +For example, controllers that support parallel flash memories have this feature +as do some simultaneous-sampling ADCs where each channel has its own data lane. + +--------------------- +Describing the wiring +--------------------- + +The ``spi-tx-bus-width`` and ``spi-rx-bus-width`` properties in the devicetree +are used to describe how many data lanes are connected between the controller +and how wide each lane is. The number of items in the array indicates how many +lanes there are, and the value of each item indicates how many bits wide that +lane is. + +For example, a dual-simultaneous-sampling ADC with two 4-bit lanes might be +wired up like this:: + + +--------------+ +----------+ + | SPI | | AD4630 | + | Controller | | ADC | + | | | | + | CS0 |--->| CS | + | SCK |--->| SCK | + | SDO |--->| SDI | + | | | | + | SDIA0 |<---| SDOA0 | + | SDIA1 |<---| SDOA1 | + | SDIA2 |<---| SDOA2 | + | SDIA3 |<---| SDOA3 | + | | | | + | SDIB0 |<---| SDOB0 | + | SDIB1 |<---| SDOB1 | + | SDIB2 |<---| SDOB2 | + | SDIB3 |<---| SDOB3 | + | | | | + +--------------+ +----------+ + +It is described in a devicetree like this:: + + spi { + compatible = "my,spi-controller"; + + ... + + adc@0 { + compatible = "adi,ad4630"; + reg = <0>; + ... + spi-rx-bus-width = <4>, <4>; /* 2 lanes of 4 bits each */ + ... + }; + }; + +In most cases, lanes will be wired up symmetrically (A to A, B to B, etc). If +this isn't the case, extra ``spi-rx-lane-map`` and ``spi-tx-lane-map`` +properties are needed to provide a mapping between controller lanes and the +physical lane wires. + +Here is an example where a multi-lane SPI controller has each lane wired to +separate single-lane peripherals:: + + +--------------+ +----------+ + | SPI | | Thing 1 | + | Controller | | | + | | | | + | CS0 |--->| CS | + | SDO0 |--->| SDI | + | SDI0 |<---| SDO | + | SCLK0 |--->| SCLK | + | | | | + | | +----------+ + | | + | | +----------+ + | | | Thing 2 | + | | | | + | CS1 |--->| CS | + | SDO1 |--->| SDI | + | SDI1 |<---| SDO | + | SCLK1 |--->| SCLK | + | | | | + +--------------+ +----------+ + +This is described in a devicetree like this:: + + spi { + compatible = "my,spi-controller"; + + ... + + thing1@0 { + compatible = "my,thing1"; + reg = <0>; + ... + }; + + thing2@1 { + compatible = "my,thing2"; + reg = <1>; + ... + spi-tx-lane-map = <1>; /* lane 0 is not used, lane 1 is used for tx wire */ + spi-rx-lane-map = <1>; /* lane 0 is not used, lane 1 is used for rx wire */ + ... + }; + }; + + +The default values of ``spi-rx-bus-width`` and ``spi-tx-bus-width`` are ``<1>``, +so these properties can still be omitted even when ``spi-rx-lane-map`` and +``spi-tx-lane-map`` are used. + +---------------------------- +Usage in a peripheral driver +---------------------------- + +These types of SPI controllers generally do not support arbitrary use of the +multiple lanes. Instead, they operate in one of a few defined modes. Peripheral +drivers should set the :c:type:`struct spi_transfer.multi_lane_mode <spi_transfer>` +field to indicate which mode they want to use for a given transfer. + +The possible values for this field have the following semantics: + +- :c:macro:`SPI_MULTI_BUS_MODE_SINGLE`: Only use the first lane. Other lanes are + ignored. This means that it is operating just like a conventional SPI + peripheral. This is the default, so it does not need to be explicitly set. + + Example:: + + tx_buf[0] = 0x88; + + struct spi_transfer xfer = { + .tx_buf = tx_buf, + .len = 1, + }; + + spi_sync_transfer(spi, &xfer, 1); + + Assuming the controller is sending the MSB first, the sequence of bits + sent over the tx wire would be (right-most bit is sent first):: + + controller > data bits > peripheral + ---------- ---------------- ---------- + SDO 0 0-0-0-1-0-0-0-1 SDI 0 + +- :c:macro:`SPI_MULTI_BUS_MODE_MIRROR`: Send a single data word over all of the + lanes at the same time. This only makes sense for writes and not + for reads. + + Example:: + + tx_buf[0] = 0x88; + + struct spi_transfer xfer = { + .tx_buf = tx_buf, + .len = 1, + .multi_lane_mode = SPI_MULTI_BUS_MODE_MIRROR, + }; + + spi_sync_transfer(spi, &xfer, 1); + + The data is mirrored on each tx wire:: + + controller > data bits > peripheral + ---------- ---------------- ---------- + SDO 0 0-0-0-1-0-0-0-1 SDI 0 + SDO 1 0-0-0-1-0-0-0-1 SDI 1 + +- :c:macro:`SPI_MULTI_BUS_MODE_STRIPE`: Send or receive two different data words + at the same time, one on each lane. This means that the buffer needs to be + sized to hold data for all lanes. Data is interleaved in the buffer, with + the first word corresponding to lane 0, the second to lane 1, and so on. + Once the last lane is used, the next word in the buffer corresponds to lane + 0 again. Accordingly, the buffer size must be a multiple of the number of + lanes. This mode works for both reads and writes. + + Example:: + + struct spi_transfer xfer = { + .rx_buf = rx_buf, + .len = 2, + .multi_lane_mode = SPI_MULTI_BUS_MODE_STRIPE, + }; + + spi_sync_transfer(spi, &xfer, 1); + + Each rx wire has a different data word sent simultaneously:: + + controller < data bits < peripheral + ---------- ---------------- ---------- + SDI 0 0-0-0-1-0-0-0-1 SDO 0 + SDI 1 1-0-0-0-1-0-0-0 SDO 1 + + After the transfer, ``rx_buf[0] == 0x11`` (word from SDO 0) and + ``rx_buf[1] == 0x88`` (word from SDO 1). + + +----------------------------- +SPI controller driver support +----------------------------- + +To support multiple data lanes, SPI controller drivers need to set +:c:type:`struct spi_controller.num_data_lanes <spi_controller>` to a value +greater than 1. + +Then the part of the driver that handles SPI transfers needs to check the +:c:type:`struct spi_transfer.multi_lane_mode <spi_transfer>` field and implement +the appropriate behavior for each supported mode and return an error for +unsupported modes. + +The core SPI code should handle the rest. diff --git a/Documentation/staging/rpmsg.rst b/Documentation/staging/rpmsg.rst index 40282cca86ca..42bac1149d9d 100644 --- a/Documentation/staging/rpmsg.rst +++ b/Documentation/staging/rpmsg.rst @@ -224,9 +224,12 @@ content to the console. :: - #include <linux/kernel.h> + #include <linux/dev_printk.h> + #include <linux/mod_devicetable.h> #include <linux/module.h> + #include <linux/printk.h> #include <linux/rpmsg.h> + #include <linux/types.h> static void rpmsg_sample_cb(struct rpmsg_channel *rpdev, void *data, int len, void *priv, u32 src) @@ -244,7 +247,7 @@ content to the console. /* send a message on our channel */ err = rpmsg_send(rpdev->ept, "hello!", 6); if (err) { - pr_err("rpmsg_send failed: %d\n", err); + dev_err(&rpdev->dev, "rpmsg_send failed: %d\n", err); return err; } diff --git a/Documentation/sunrpc/xdr/nfs4_1.x b/Documentation/sunrpc/xdr/nfs4_1.x index ca95150a3a29..5b45547b2ebc 100644 --- a/Documentation/sunrpc/xdr/nfs4_1.x +++ b/Documentation/sunrpc/xdr/nfs4_1.x @@ -53,6 +53,11 @@ typedef unsigned int uint32_t; */ typedef uint32_t bitmap4<>; +typedef opaque utf8string<>; +typedef utf8string utf8str_cis; +typedef utf8string utf8str_cs; +typedef utf8string utf8str_mixed; + /* * Timeval */ @@ -184,3 +189,59 @@ enum open_delegation_type4 { OPEN_DELEGATE_READ_ATTRS_DELEG = 4, OPEN_DELEGATE_WRITE_ATTRS_DELEG = 5 }; + + +/* + * The following content was extracted from draft-ietf-nfsv4-posix-acls + */ + +enum aclmodel4 { + ACL_MODEL_NFS4 = 1, + ACL_MODEL_POSIX_DRAFT = 2, + ACL_MODEL_NONE = 3 +}; +pragma public aclmodel4; + +enum aclscope4 { + ACL_SCOPE_FILE_OBJECT = 1, + ACL_SCOPE_FILE_SYSTEM = 2, + ACL_SCOPE_SERVER = 3 +}; +pragma public aclscope4; + +enum posixacetag4 { + POSIXACE4_TAG_USER_OBJ = 1, + POSIXACE4_TAG_USER = 2, + POSIXACE4_TAG_GROUP_OBJ = 3, + POSIXACE4_TAG_GROUP = 4, + POSIXACE4_TAG_MASK = 5, + POSIXACE4_TAG_OTHER = 6 +}; +pragma public posixacetag4; + +typedef uint32_t posixaceperm4; +pragma public posixaceperm4; + +/* Bit definitions for posixaceperm4. */ +const POSIXACE4_PERM_EXECUTE = 0x00000001; +const POSIXACE4_PERM_WRITE = 0x00000002; +const POSIXACE4_PERM_READ = 0x00000004; + +struct posixace4 { + posixacetag4 tag; + posixaceperm4 perm; + utf8str_mixed who; +}; + +typedef aclmodel4 fattr4_acl_trueform; +typedef aclscope4 fattr4_acl_trueform_scope; +typedef posixace4 fattr4_posix_default_acl<>; +typedef posixace4 fattr4_posix_access_acl<>; + +%/* +% * New for POSIX ACL extension +% */ +const FATTR4_ACL_TRUEFORM = 89; +const FATTR4_ACL_TRUEFORM_SCOPE = 90; +const FATTR4_POSIX_DEFAULT_ACL = 91; +const FATTR4_POSIX_ACCESS_ACL = 92; diff --git a/Documentation/target/index.rst b/Documentation/target/index.rst index 4b24f81f747e..51fa8ebc652e 100644 --- a/Documentation/target/index.rst +++ b/Documentation/target/index.rst @@ -10,10 +10,3 @@ TCM Virtual Device tcmu-design tcm_mod_builder scripts - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/tee/index.rst b/Documentation/tee/index.rst index 62afb7ee9b52..10c3cecde85d 100644 --- a/Documentation/tee/index.rst +++ b/Documentation/tee/index.rst @@ -12,10 +12,3 @@ TEE Subsystem amd-tee ts-tee qtee - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/timers/index.rst b/Documentation/timers/index.rst index 4e88116e4dcf..c8352756b480 100644 --- a/Documentation/timers/index.rst +++ b/Documentation/timers/index.rst @@ -13,10 +13,3 @@ Timers no_hz timekeeping delay_sleep_functions - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/tools/feat.rst b/Documentation/tools/feat.rst new file mode 100644 index 000000000000..021560eb6e6a --- /dev/null +++ b/Documentation/tools/feat.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================================== +Documentation features parser module +==================================== + +.. automodule:: lib.python.feat.parse_features + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/index.rst b/Documentation/tools/index.rst index 80488e290e10..5f2f63bcb284 100644 --- a/Documentation/tools/index.rst +++ b/Documentation/tools/index.rst @@ -12,10 +12,4 @@ more additions are needed here: rtla/index rv/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` + python diff --git a/Documentation/tools/jobserver.rst b/Documentation/tools/jobserver.rst new file mode 100644 index 000000000000..31eaf25a8481 --- /dev/null +++ b/Documentation/tools/jobserver.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================= +Job server module +================= + +.. automodule:: lib.python.jobserver + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kabi.rst b/Documentation/tools/kabi.rst new file mode 100644 index 000000000000..92812a20fcf7 --- /dev/null +++ b/Documentation/tools/kabi.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================================== +Kernel ABI documentation tool modules +===================================== + +.. toctree:: + :maxdepth: 2 + + kabi_parser + kabi_regex + kabi_symbols + kabi_helpers diff --git a/Documentation/tools/kabi_helpers.rst b/Documentation/tools/kabi_helpers.rst new file mode 100644 index 000000000000..5c6ec6081500 --- /dev/null +++ b/Documentation/tools/kabi_helpers.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================= +Ancillary classes +================= + +.. automodule:: lib.python.abi.helpers + :members: + :member-order: bysource + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kabi_parser.rst b/Documentation/tools/kabi_parser.rst new file mode 100644 index 000000000000..95826da21b3d --- /dev/null +++ b/Documentation/tools/kabi_parser.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================================== +Kernel ABI documentation parser class +===================================== + +.. automodule:: lib.python.abi.abi_parser + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kabi_regex.rst b/Documentation/tools/kabi_regex.rst new file mode 100644 index 000000000000..bfc3a0d91c47 --- /dev/null +++ b/Documentation/tools/kabi_regex.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================= +ABI regex search symbol class +============================= + +.. automodule:: lib.python.abi.abi_regex + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kabi_symbols.rst b/Documentation/tools/kabi_symbols.rst new file mode 100644 index 000000000000..c75a9380f89f --- /dev/null +++ b/Documentation/tools/kabi_symbols.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================= +System ABI documentation validation class +========================================= + +.. automodule:: lib.python.abi.system_symbols + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kdoc.rst b/Documentation/tools/kdoc.rst new file mode 100644 index 000000000000..e51ba159d8c4 --- /dev/null +++ b/Documentation/tools/kdoc.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== +Kernel-doc modules +================== + +.. toctree:: + :maxdepth: 2 + + kdoc_parser + kdoc_output + kdoc_ancillary diff --git a/Documentation/tools/kdoc_ancillary.rst b/Documentation/tools/kdoc_ancillary.rst new file mode 100644 index 000000000000..3950d0a3f104 --- /dev/null +++ b/Documentation/tools/kdoc_ancillary.rst @@ -0,0 +1,46 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================= +Ancillary classes +================= + +Argparse formatter class +======================== + +.. automodule:: lib.python.kdoc.enrich_formatter + :members: + :show-inheritance: + :undoc-members: + +Regular expression class handler +================================ + +.. automodule:: lib.python.kdoc.kdoc_re + :members: + :show-inheritance: + :undoc-members: + + +Chinese, Japanese and Korean variable fonts handler +=================================================== + +.. automodule:: lib.python.kdoc.latex_fonts + :members: + :show-inheritance: + :undoc-members: + +Kernel C file include logic +=========================== + +.. automodule:: lib.python.kdoc.parse_data_structs + :members: + :show-inheritance: + :undoc-members: + +Python version ancillary methods +================================ + +.. automodule:: lib.python.kdoc.python_version + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/kdoc_output.rst b/Documentation/tools/kdoc_output.rst new file mode 100644 index 000000000000..08fd271ec556 --- /dev/null +++ b/Documentation/tools/kdoc_output.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +Kernel-doc output stage +======================= + +Output handler for man pages and ReST +===================================== + +.. automodule:: lib.python.kdoc.kdoc_output + :members: + :show-inheritance: + :undoc-members: + diff --git a/Documentation/tools/kdoc_parser.rst b/Documentation/tools/kdoc_parser.rst new file mode 100644 index 000000000000..03ee54a1b1cc --- /dev/null +++ b/Documentation/tools/kdoc_parser.rst @@ -0,0 +1,29 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +Kernel-doc parser stage +======================= + +File handler classes +==================== + +.. automodule:: lib.python.kdoc.kdoc_files + :members: + :show-inheritance: + :undoc-members: + +Parsed item data class +====================== + +.. automodule:: lib.python.kdoc.kdoc_item + :members: + :show-inheritance: + :undoc-members: + +Parser classes and methods +========================== + +.. automodule:: lib.python.kdoc.kdoc_parser + :members: + :show-inheritance: + :undoc-members: diff --git a/Documentation/tools/python.rst b/Documentation/tools/python.rst new file mode 100644 index 000000000000..1444c1816735 --- /dev/null +++ b/Documentation/tools/python.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================ +Python libraries +================ + +.. toctree:: + :maxdepth: 4 + + jobserver + feat + kdoc + kabi diff --git a/Documentation/tools/rtla/common_timerlat_options.txt b/Documentation/tools/rtla/common_timerlat_options.txt index 33070b264cae..07a285fcf7cf 100644 --- a/Documentation/tools/rtla/common_timerlat_options.txt +++ b/Documentation/tools/rtla/common_timerlat_options.txt @@ -64,4 +64,22 @@ Set timerlat to run without workload, waiting for the user to dispatch a per-cpu task that waits for a new period on the tracing/osnoise/per_cpu/cpu$ID/timerlat_fd. - See linux/tools/rtla/sample/timerlat_load.py for an example of user-load code. + See linux/tools/rtla/example/timerlat_load.py for an example of user-load code. + +**--bpf-action** *bpf-program* + + Loads a BPF program from an ELF file and executes it when a latency threshold is exceeded. + + The BPF program must be a valid ELF file loadable with libbpf. The program must contain + a function named ``action_handler``, stored in an ELF section with the ``tp_`` prefix. + The prefix is used by libbpf to set BPF program type to BPF_PROG_TYPE_TRACEPOINT. + + The program receives a ``struct trace_event_raw_timerlat_sample`` parameter + containing timerlat sample data. + + An example is provided in ``tools/tracing/rtla/example/timerlat_bpf_action.c``. + This example demonstrates how to create a BPF program that prints latency information using + bpf_trace_printk() when a threshold is exceeded. + + **Note**: BPF actions require BPF support to be available. If BPF is not available + or disabled, the tool falls back to tracefs mode and BPF actions are not supported. diff --git a/Documentation/tools/rtla/index.rst b/Documentation/tools/rtla/index.rst index 05d2652e4072..7664d6d0cb27 100644 --- a/Documentation/tools/rtla/index.rst +++ b/Documentation/tools/rtla/index.rst @@ -18,10 +18,3 @@ behavior on specific hardware. rtla-timerlat-hist rtla-timerlat-top rtla-hwnoise - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/tools/rv/index.rst b/Documentation/tools/rv/index.rst index 64ba2efe2e85..fd42b0017d07 100644 --- a/Documentation/tools/rv/index.rst +++ b/Documentation/tools/rv/index.rst @@ -16,10 +16,3 @@ Runtime verification (rv) tool rv-mon-wip rv-mon-wwnr rv-mon-sched - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst index 806699871b80..d461de4e067e 100644 --- a/Documentation/trace/coresight/coresight.rst +++ b/Documentation/trace/coresight/coresight.rst @@ -613,8 +613,20 @@ They are also listed in the folder /sys/bus/event_source/devices/cs_etm/format/ - Session local version of the system wide setting: :ref:`ETM_MODE_RETURNSTACK <coresight-return-stack>` * - timestamp - - Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP - <coresight-timestamp>` + - Controls generation and interval of timestamps. + + 0 = off, 1 = minimum interval .. 15 = maximum interval. + + Values 1 - 14 use a counter that decrements every cycle to generate a + timestamp on underflow. The reload value for the counter is 2 ^ (interval + - 1). If the value is 1 then the reload value is 1, if the value is 11 + then the reload value is 1024 etc. + + Setting the maximum interval (15) will disable the counter generated + timestamps, freeing the counter resource, leaving only ones emitted when + a SYNC packet is generated. The sync interval is controlled with + TRCSYNCPR.PERIOD which is every 4096 bytes of trace by default. + * - cc_threshold - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the default value i.e 0x100 will be used. If provided value is less than minimum cycles threshold diff --git a/Documentation/trace/events-pci.rst b/Documentation/trace/events-pci.rst new file mode 100644 index 000000000000..03ff4ad30ddf --- /dev/null +++ b/Documentation/trace/events-pci.rst @@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================== +Subsystem Trace Points: PCI +=========================== + +Overview +======== +The PCI tracing system provides tracepoints to monitor critical hardware events +that can impact system performance and reliability. These events normally show +up here: + + /sys/kernel/tracing/events/pci + +Cf. include/trace/events/pci.h for the events definitions. + +Available Tracepoints +===================== + +pci_hp_event +------------ + +Monitors PCI hotplug events including card insertion/removal and link +state changes. +:: + + pci_hp_event "%s slot:%s, event:%s\n" + +**Event Types**: + +* ``LINK_UP`` - PCIe link established +* ``LINK_DOWN`` - PCIe link lost +* ``CARD_PRESENT`` - Card detected in slot +* ``CARD_NOT_PRESENT`` - Card removed from slot + +**Example Usage**:: + + # Enable the tracepoint + echo 1 > /sys/kernel/debug/tracing/events/pci/pci_hp_event/enable + + # Monitor events (the following output is generated when a device is hotplugged) + cat /sys/kernel/debug/tracing/trace_pipe + irq/51-pciehp-88 [001] ..... 1311.177459: pci_hp_event: 0000:00:02.0 slot:10, event:CARD_PRESENT + + irq/51-pciehp-88 [001] ..... 1311.177566: pci_hp_event: 0000:00:02.0 slot:10, event:LINK_UP + +pcie_link_event +--------------- + +Monitors PCIe link speed changes and provides detailed link status information. +:: + + pcie_link_event "%s type:%d, reason:%d, cur_bus_speed:%d, max_bus_speed:%d, width:%u, flit_mode:%u, status:%s\n" + +**Parameters**: + +* ``type`` - PCIe device type (4=Root Port, etc.) +* ``reason`` - Reason for link change: + + - ``0`` - Link retrain + - ``1`` - Bus enumeration + - ``2`` - Bandwidth notification enable + - ``3`` - Bandwidth notification IRQ + - ``4`` - Hotplug event + + +**Example Usage**:: + + # Enable the tracepoint + echo 1 > /sys/kernel/debug/tracing/events/pci/pcie_link_event/enable + + # Monitor events (the following output is generated when a device is hotplugged) + cat /sys/kernel/debug/tracing/trace_pipe + irq/51-pciehp-88 [001] ..... 381.545386: pcie_link_event: 0000:00:02.0 type:4, reason:4, cur_bus_speed:20, max_bus_speed:23, width:1, flit_mode:0, status:DLLLA diff --git a/Documentation/trace/fprobe.rst b/Documentation/trace/fprobe.rst index 06b0edad0179..95998b189ae3 100644 --- a/Documentation/trace/fprobe.rst +++ b/Documentation/trace/fprobe.rst @@ -79,7 +79,7 @@ The above is defined by including the header:: Same as ftrace, the registered callbacks will start being called some time after the register_fprobe() is called and before it returns. See -:file:`Documentation/trace/ftrace.rst`. +Documentation/trace/ftrace.rst. Also, the unregister_fprobe() will guarantee that both enter and exit handlers are no longer being called by functions after unregister_fprobe() diff --git a/Documentation/trace/ftrace-uses.rst b/Documentation/trace/ftrace-uses.rst index e225cc46b71e..a9701add27c5 100644 --- a/Documentation/trace/ftrace-uses.rst +++ b/Documentation/trace/ftrace-uses.rst @@ -253,7 +253,7 @@ If @buf is NULL and reset is set, all functions will be enabled for tracing. The @buf can also be a glob expression to enable all functions that match a specific pattern. -See Filter Commands in :file:`Documentation/trace/ftrace.rst`. +See Filter Commands in Documentation/trace/ftrace.rst. To just trace the schedule function: diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst index d1f313a5f4ad..b9efb148a5c2 100644 --- a/Documentation/trace/ftrace.rst +++ b/Documentation/trace/ftrace.rst @@ -684,6 +684,22 @@ of ftrace. Here is a list of some of the key files: See events.rst for more information. + show_event_filters: + + A list of events that have filters. This shows the + system/event pair along with the filter that is attached to + the event. + + See events.rst for more information. + + show_event_triggers: + + A list of events that have triggers. This shows the + system/event pair along with the trigger that is attached to + the event. + + See events.rst for more information. + available_events: A list of events that can be enabled in tracing. @@ -1290,6 +1306,15 @@ Here are the available options: This will be useful if you want to find out which hashed value is corresponding to the real value in trace log. + bitmask-list + When enabled, bitmasks are displayed as a human-readable list of + ranges (e.g., 0,2-5,7) using the printk "%*pbl" format specifier. + When disabled (the default), bitmasks are displayed in the + traditional hexadecimal bitmap representation. The list format is + particularly useful for tracing CPU masks and other large bitmasks + where individual bit positions are more meaningful than their + hexadecimal encoding. + record-cmd When any event or tracer is enabled, a hook is enabled in the sched_switch trace point to fill comm cache diff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst index b4a429dc4f7a..338bc4d7cfab 100644 --- a/Documentation/trace/index.rst +++ b/Documentation/trace/index.rst @@ -54,6 +54,7 @@ applications. events-power events-nmi events-msr + events-pci boottime-trace histogram histogram-design @@ -95,10 +96,3 @@ Additional Resources For more details, refer to the respective documentation of each tracing tool and framework. - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/trace/rv/da_monitor_instrumentation.rst b/Documentation/trace/rv/da_monitor_instrumentation.rst index 6c67c7b57811..9eff38a4ad1f 100644 --- a/Documentation/trace/rv/da_monitor_instrumentation.rst +++ b/Documentation/trace/rv/da_monitor_instrumentation.rst @@ -162,10 +162,10 @@ For example, from the wip sample model:: The probes then need to be detached at the disable phase. -[1] The wip model is presented in:: +[1] The wip model is presented in: Documentation/trace/rv/deterministic_automata.rst -The wip monitor is presented in:: +The wip monitor is presented in: - Documentation/trace/rv/da_monitor_synthesis.rst + Documentation/trace/rv/monitor_synthesis.rst diff --git a/Documentation/trace/rv/monitor_synthesis.rst b/Documentation/trace/rv/monitor_synthesis.rst index 3a7d7b2f6cb6..cc5f97977a29 100644 --- a/Documentation/trace/rv/monitor_synthesis.rst +++ b/Documentation/trace/rv/monitor_synthesis.rst @@ -100,54 +100,52 @@ rv/da_monitor.h This initial implementation presents three different types of monitor instances: -- ``#define DECLARE_DA_MON_GLOBAL(name, type)`` -- ``#define DECLARE_DA_MON_PER_CPU(name, type)`` -- ``#define DECLARE_DA_MON_PER_TASK(name, type)`` +- ``#define RV_MON_TYPE RV_MON_GLOBAL`` +- ``#define RV_MON_TYPE RV_MON_PER_CPU`` +- ``#define RV_MON_TYPE RV_MON_PER_TASK`` -The first declares the functions for a global deterministic automata monitor, -the second for monitors with per-cpu instances, and the third with per-task -instances. +The first sets up functions declaration for a global deterministic automata +monitor, the second for monitors with per-cpu instances, and the third with +per-task instances. -In all cases, the 'name' argument is a string that identifies the monitor, and -the 'type' argument is the data type used by rvgen on the representation of -the model in C. +In all cases, the C file must include the $(MODEL_NAME).h file (generated by +`rvgen`), for example, to define the per-cpu 'wip' monitor, the `wip.c` source +file must include:: -For example, the wip model with two states and three events can be -stored in an 'unsigned char' type. Considering that the preemption control -is a per-cpu behavior, the monitor declaration in the 'wip.c' file is:: - - DECLARE_DA_MON_PER_CPU(wip, unsigned char); + #define RV_MON_TYPE RV_MON_PER_CPU + #include "wip.h" + #include <rv/da_monitor.h> The monitor is executed by sending events to be processed via the functions presented below:: - da_handle_event_$(MONITOR_NAME)($(event from event enum)); - da_handle_start_event_$(MONITOR_NAME)($(event from event enum)); - da_handle_start_run_event_$(MONITOR_NAME)($(event from event enum)); + da_handle_event($(event from event enum)); + da_handle_start_event($(event from event enum)); + da_handle_start_run_event($(event from event enum)); -The function ``da_handle_event_$(MONITOR_NAME)()`` is the regular case where +The function ``da_handle_event()`` is the regular case where the event will be processed if the monitor is processing events. When a monitor is enabled, it is placed in the initial state of the automata. However, the monitor does not know if the system is in the *initial state*. -The ``da_handle_start_event_$(MONITOR_NAME)()`` function is used to notify the +The ``da_handle_start_event()`` function is used to notify the monitor that the system is returning to the initial state, so the monitor can start monitoring the next event. -The ``da_handle_start_run_event_$(MONITOR_NAME)()`` function is used to notify +The ``da_handle_start_run_event()`` function is used to notify the monitor that the system is known to be in the initial state, so the monitor can start monitoring and monitor the current event. Using the wip model as example, the events "preempt_disable" and "sched_waking" should be sent to monitor, respectively, via [2]:: - da_handle_event_wip(preempt_disable_wip); - da_handle_event_wip(sched_waking_wip); + da_handle_event(preempt_disable_wip); + da_handle_event(sched_waking_wip); While the event "preempt_enabled" will use:: - da_handle_start_event_wip(preempt_enable_wip); + da_handle_start_event(preempt_enable_wip); To notify the monitor that the system will be returning to the initial state, so the system and the monitor should be in sync. diff --git a/Documentation/translations/it_IT/doc-guide/kernel-doc.rst b/Documentation/translations/it_IT/doc-guide/kernel-doc.rst index aa0e31d353d6..bac959b8b7b9 100644 --- a/Documentation/translations/it_IT/doc-guide/kernel-doc.rst +++ b/Documentation/translations/it_IT/doc-guide/kernel-doc.rst @@ -80,7 +80,7 @@ Al fine di verificare che i commenti siano formattati correttamente, potete eseguire il programma ``kernel-doc`` con un livello di verbosità alto e senza che questo produca alcuna documentazione. Per esempio:: - scripts/kernel-doc -v -none drivers/foo/bar.c + tools/docs/kernel-doc -v -none drivers/foo/bar.c Il formato della documentazione è verificato della procedura di generazione del kernel quando viene richiesto di effettuare dei controlli extra con GCC:: @@ -378,7 +378,7 @@ distinguono in base al fatto che il nome della macro simile a funzione sia immediatamente seguito da una parentesi sinistra ('(') mentre in quelle simili a oggetti no. -Le macro simili a funzioni sono gestite come funzioni da ``scripts/kernel-doc``. +Le macro simili a funzioni sono gestite come funzioni da ``tools/docs/kernel-doc``. Possono avere un elenco di parametri. Le macro simili a oggetti non hanno un elenco di parametri. @@ -595,7 +595,7 @@ documentazione presenti nel file sorgente (*source*). L'estensione kernel-doc fa parte dei sorgenti del kernel, la si può trovare in ``Documentation/sphinx/kerneldoc.py``. Internamente, viene utilizzato -lo script ``scripts/kernel-doc`` per estrarre i commenti di documentazione +lo script ``tools/docs/kernel-doc`` per estrarre i commenti di documentazione dai file sorgenti. Come utilizzare kernel-doc per generare pagine man @@ -604,4 +604,4 @@ Come utilizzare kernel-doc per generare pagine man Se volete utilizzare kernel-doc solo per generare delle pagine man, potete farlo direttamente dai sorgenti del kernel:: - $ scripts/kernel-doc -man $(git grep -l '/\*\*' -- :^Documentation :^tools) | scripts/split-man.pl /tmp/man + $ tools/docs/kernel-doc -man $(git grep -l '/\*\*' -- :^Documentation :^tools) | scripts/split-man.pl /tmp/man diff --git a/Documentation/translations/it_IT/process/adding-syscalls.rst b/Documentation/translations/it_IT/process/adding-syscalls.rst index df8c652d004b..c4ed6dbf5f05 100644 --- a/Documentation/translations/it_IT/process/adding-syscalls.rst +++ b/Documentation/translations/it_IT/process/adding-syscalls.rst @@ -124,7 +124,7 @@ descrittore di file per accesso all'oggetto - non inventatevi nuovi tipi di accesso da spazio utente quando il kernel ha già dei meccanismi e una semantica ben definita per utilizzare i descrittori di file. -Se la vostra nuova chiamata di sistema :manpage:`xyzzy(2)` ritorna un nuovo +Se la vostra nuova chiamata di sistema xyzzy(2) ritorna un nuovo descrittore di file, allora l'argomento *flags* dovrebbe includere un valore equivalente a ``O_CLOEXEC`` per i nuovi descrittori. Questo rende possibile, nello spazio utente, la chiusura della finestra temporale fra le chiamate a @@ -140,13 +140,13 @@ della famiglia di :manpage:`poll(2)`. Rendere un descrittore di file pronto per la lettura o la scrittura è il tipico modo del kernel per notificare lo spazio utente circa un evento associato all'oggetto del kernel. -Se la vostra nuova chiamata di sistema :manpage:`xyzzy(2)` ha un argomento +Se la vostra nuova chiamata di sistema xyzzy(2) ha un argomento che è il percorso ad un file:: int sys_xyzzy(const char __user *path, ..., unsigned int flags); dovreste anche considerare se non sia più appropriata una versione -:manpage:`xyzzyat(2)`:: +`xyzzyat(2)`:: int sys_xyzzyat(int dfd, const char __user *path, ..., unsigned int flags); @@ -154,7 +154,7 @@ Questo permette più flessibilità su come lo spazio utente specificherà il fil in questione; in particolare, permette allo spazio utente di richiedere la funzionalità su un descrittore di file già aperto utilizzando il *flag* ``AT_EMPTY_PATH``, in pratica otterremmo gratuitamente l'operazione -:manpage:`fxyzzy(3)`:: +fxyzzy(3):: - xyzzyat(AT_FDCWD, path, ..., 0) is equivalent to xyzzy(path,...) - xyzzyat(fd, "", ..., AT_EMPTY_PATH) is equivalent to fxyzzy(fd, ...) @@ -163,12 +163,12 @@ funzionalità su un descrittore di file già aperto utilizzando il *flag* man :manpage:`openat(2)`; per un esempio di AT_EMPTY_PATH, leggere la pagina man :manpage:`fstatat(2)`). -Se la vostra nuova chiamata di sistema :manpage:`xyzzy(2)` prevede un parametro +Se la vostra nuova chiamata di sistema xyzzy(2) prevede un parametro per descrivere uno scostamento all'interno di un file, usate ``loff_t`` come tipo cosicché scostamenti a 64-bit potranno essere supportati anche su architetture a 32-bit. -Se la vostra nuova chiamata di sistema :manpage:`xyzzy(2)` prevede l'uso di +Se la vostra nuova chiamata di sistema xyzzy(2) prevede l'uso di funzioni riservate, allora dev'essere gestita da un opportuno bit di privilegio (verificato con una chiamata a ``capable()``), come descritto nella pagina man :manpage:`capabilities(7)`. Scegliete un bit di privilegio già esistente per @@ -178,7 +178,7 @@ principio di *capabilities* di separare i poteri di root. In particolare, evitate di aggiungere nuovi usi al fin-troppo-generico privilegio ``CAP_SYS_ADMIN``. -Se la vostra nuova chiamata di sistema :manpage:`xyzzy(2)` manipola altri +Se la vostra nuova chiamata di sistema xyzzy(2) manipola altri processi oltre a quello chiamato, allora dovrebbe essere limitata (usando la chiamata ``ptrace_may_access()``) di modo che solo un processo chiamante con gli stessi permessi del processo in oggetto, o con i necessari privilegi, @@ -219,7 +219,7 @@ Implementazione di chiamate di sistema generiche ------------------------------------------------ Il principale punto d'accesso alla vostra nuova chiamata di sistema -:manpage:`xyzzy(2)` verrà chiamato ``sys_xyzzy()``; ma, piuttosto che in modo +`xyzzy(2)` verrà chiamato ``sys_xyzzy()``; ma, piuttosto che in modo esplicito, lo aggiungerete tramite la macro ``SYSCALL_DEFINEn``. La 'n' indica il numero di argomenti della chiamata di sistema; la macro ha come argomento il nome della chiamata di sistema, seguito dalle coppie (tipo, nome) diff --git a/Documentation/translations/ja_JP/index.rst b/Documentation/translations/ja_JP/index.rst index 4159b417bfdd..5d47d588e368 100644 --- a/Documentation/translations/ja_JP/index.rst +++ b/Documentation/translations/ja_JP/index.rst @@ -13,6 +13,7 @@ disclaimer-ja_JP process/howto + process/submitting-patches process/submit-checklist .. raw:: latex diff --git a/Documentation/translations/ja_JP/process/howto.rst b/Documentation/translations/ja_JP/process/howto.rst index 5e307f90982c..8ab47fc710fc 100644 --- a/Documentation/translations/ja_JP/process/howto.rst +++ b/Documentation/translations/ja_JP/process/howto.rst @@ -49,7 +49,7 @@ Linux カーãƒãƒ«é–‹ç™ºã®ã‚„ã‚Šæ–¹ カーãƒãƒ«ã¯ GNU C 㨠GNU ツールãƒã‚§ã‚¤ãƒ³ã‚’使ã£ã¦æ›¸ã‹ã‚Œã¦ã„ã¾ã™ã€‚カーãƒãƒ« 㯠ISO C11 仕様ã«æº–æ‹ ã—ã¦æ›¸ã一方ã§ã€æ¨™æº–ã«ã¯ç„¡ã„言語拡張を多ã使ã£ã¦ -ã„ã¾ã™ã€‚カーãƒãƒ«ã¯æ¨™æº– C ライブラリã«ä¾å˜ã—ãªã„ã€C 言語éžä¾å˜ç’°å¢ƒã§ã™ã€‚ +ã„ã¾ã™ã€‚カーãƒãƒ«ã¯æ¨™æº– C ライブラリã«ä¾å˜ã—ãªã„ã€è‡ªç«‹ã—㟠C 環境ã§ã™ã€‚ ãã®ãŸã‚ã€C ã®æ¨™æº–ã®ä¸ã§ä½¿ãˆãªã„ã‚‚ã®ã‚‚ã‚ã‚Šã¾ã™ã€‚特ã«ä»»æ„ã® long long ã®é™¤ç®—や浮動å°æ•°ç‚¹ã¯ä½¿ãˆã¾ã›ã‚“。カーãƒãƒ«ãŒãƒ„ールãƒã‚§ã‚¤ãƒ³ã‚„ C 言語拡張 ã«ç½®ã„ã¦ã„ã‚‹å‰æãŒã©ã†ãªã£ã¦ã„ã‚‹ã®ã‹ã‚ã‹ã‚Šã«ãã„ã“ã¨ãŒæ™‚々ã‚ã‚Šã€ã¾ãŸã€ @@ -61,7 +61,7 @@ info ページ( info gcc )を見ã¦ãã ã•ã„。 ç™ºæ‰‹é †ã«ã¤ã„ã¦é«˜åº¦ãªæ¨™æº–ã‚’æŒã¤ã€å¤šæ§˜ãªäººã®é›†ã¾ã‚Šã§ã™ã€‚地ç†çš„ã«åˆ†æ•£ã—㟠大è¦æ¨¡ãªãƒãƒ¼ãƒ ã«å¯¾ã—ã¦ã‚‚ã£ã¨ã‚‚ã†ã¾ãã„ãã¨ã‚ã‹ã£ãŸã“ã¨ã‚’ベースã«ã—ãªãŒ らã€ã“れらã®æ¨™æº–ã¯é•·ã„時間をã‹ã‘ã¦ç¯‰ã‹ã‚Œã¦ãã¾ã—ãŸã€‚ã“れらã¯ãã¡ã‚“ã¨æ–‡ -書化ã•ã‚Œã¦ã„ã¾ã™ã‹ã‚‰ã€äº‹å‰ã«ã“れらã®æ¨™æº–ã«ã¤ã„ã¦äº‹å‰ã«ã§ãã‚‹ã ã‘ãŸãã• +書化ã•ã‚Œã¦ã„ã¾ã™ã‹ã‚‰ã€ã“れらã®æ¨™æº–ã«ã¤ã„ã¦äº‹å‰ã«ã§ãã‚‹ã ã‘ãŸãã• ã‚“å¦ã‚“ã§ãã ã•ã„。ã¾ãŸçš†ãŒã‚ãªãŸã‚„ã‚ãªãŸã®ä¼šç¤¾ã®ã‚„ã‚Šæ–¹ã«åˆã‚ã›ã¦ãれる ã¨æ€ã‚ãªã„ã§ãã ã•ã„。 @@ -363,7 +363,7 @@ linux-next ã®å®Ÿè¡Œãƒ†ã‚¹ãƒˆã‚’è¡Œã†å†’険好ããªãƒ†ã‚¹ã‚¿ãƒ¼ã¯å¤§ã„ã«æ“ ã‚ãªãŸã®ãƒãƒƒã‚ングã®ã‚¹ã‚ルを訓練ã™ã‚‹æœ€é«˜ã®æ–¹æ³•ã®ã²ã¨ã¤ã«ã€ä»–人ãŒãƒ¬ãƒãƒ¼ トã—ãŸãƒã‚°ã‚’ä¿®æ£ã™ã‚‹ã“ã¨ãŒã‚ã‚Šã¾ã™ã€‚ã‚ãªãŸãŒã‚«ãƒ¼ãƒãƒ«ã‚’より安定化ã•ã›ã‚‹ -ã“ã«å¯„与ã™ã‚‹ã¨ã„ã†ã“ã¨ã ã‘ã§ãªãã€ã‚ãªãŸã¯ ç¾å®Ÿã®å•é¡Œã‚’ä¿®æ£ã™ã‚‹ã“ã¨ã‚’ +ã“ã¨ã«å¯„与ã™ã‚‹ã¨ã„ã†ã“ã¨ã ã‘ã§ãªãã€ã‚ãªãŸã¯ ç¾å®Ÿã®å•é¡Œã‚’ä¿®æ£ã™ã‚‹ã“ã¨ã‚’ å¦ã³ã€è‡ªåˆ†ã®ã‚¹ã‚ルも強化ã§ãã€ã¾ãŸä»–ã®é–‹ç™ºè€…ãŒã‚ãªãŸã®å˜åœ¨ã«æ°—ãŒã¤ãã¾ ã™ã€‚ãƒã‚°ã‚’ä¿®æ£ã™ã‚‹ã“ã¨ã¯ã€å¤šãã®é–‹ç™ºè€…ã®ä¸ã‹ã‚‰è‡ªåˆ†ãŒåŠŸç¸¾ã‚’ã‚ã’る最善㮠é“ã§ã™ã€ãªãœãªã‚‰å¤šãã®äººã¯ä»–人ã®ãƒã‚°ã®ä¿®æ£ã«æ™‚間を浪費ã™ã‚‹ã“ã¨ã‚’好ã¾ãª diff --git a/Documentation/translations/ja_JP/process/submit-checklist.rst b/Documentation/translations/ja_JP/process/submit-checklist.rst index fb3b9e3bd8ee..c118b853c44a 100644 --- a/Documentation/translations/ja_JP/process/submit-checklist.rst +++ b/Documentation/translations/ja_JP/process/submit-checklist.rst @@ -52,7 +52,7 @@ Kconfig 変更ã®ãƒ¬ãƒ“ュー 1) æ–°è¦ã®ã€ã‚‚ã—ãã¯å¤‰æ›´ã•ã‚ŒãŸ ``CONFIG`` オプションã«ã¤ã„ã¦ã€ãã‚ŒãŒé–¢ä¿‚ã™ã‚‹ コンフィグメニューã¸ã®æ‚ªå½±éŸ¿ãŒãªã„。ã¾ãŸã€ Documentation/kbuild/kconfig-language.rst ã® - "Menu attibutes: default value" ã«è¨˜è¼‰ã®ä¾‹å¤–æ¡ä»¶ã‚’満ãŸã™å ´åˆã‚’除ã〠+ "Menu attributes: default value" ã«è¨˜è¼‰ã®ä¾‹å¤–æ¡ä»¶ã‚’満ãŸã™å ´åˆã‚’除ã〠ãã®ãƒ‡ãƒ•ã‚©ãƒ«ãƒˆãŒç„¡åŠ¹ã«ãªã£ã¦ã„る。 2) æ–°è¦ã® ``Kconfig`` オプションã«ãƒ˜ãƒ«ãƒ—テã‚ストãŒã‚る。 @@ -75,7 +75,7 @@ Kconfig 変更ã®ãƒ¬ãƒ“ュー 4) æ–°è¦ãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ãƒ»ãƒ‘ラメータãŒã€ã™ã¹ã¦ ``MODULE_PARM_DESC()`` ã«ã‚ˆã£ã¦è¨˜è¿° ã•ã‚Œã¦ã„る。 -5) æ–°è¦ãƒ¦ãƒ¼ã‚¶ãƒ¼ã‚¹ãƒšãƒ¼ã‚¹ãƒ»ã‚¤ãƒ³ã‚¿ãƒ¼ãƒ•ã‚§ãƒ¼ã‚¹ãŒã€ã™ã¹ã¦ ``Documentaion/ABI/`` +5) æ–°è¦ãƒ¦ãƒ¼ã‚¶ãƒ¼ã‚¹ãƒšãƒ¼ã‚¹ãƒ»ã‚¤ãƒ³ã‚¿ãƒ¼ãƒ•ã‚§ãƒ¼ã‚¹ãŒã€ã™ã¹ã¦ ``Documentation/ABI/`` 以下ã«è¨˜è¼‰ã•ã‚Œã¦ã„る。詳ã—ãã¯ã€ Documentation/admin-guide/abi.rst (ã‚‚ã—ã㯠``Documentation/ABI/README``) ã‚’å‚照。 ユーザースペース・インターフェースを変更ã™ã‚‹ãƒ‘ッãƒã¯ã€ diff --git a/Documentation/translations/ja_JP/process/submitting-patches.rst b/Documentation/translations/ja_JP/process/submitting-patches.rst new file mode 100644 index 000000000000..d61583399ef4 --- /dev/null +++ b/Documentation/translations/ja_JP/process/submitting-patches.rst @@ -0,0 +1,56 @@ +.. _jp_process_submitting_patches: + +パッãƒã®æŠ•ç¨¿: カーãƒãƒ«ã«ã‚³ãƒ¼ãƒ‰ã‚’入れるãŸã‚ã®å¿…é ˆã‚¬ã‚¤ãƒ‰ +====================================================== + +.. note:: + + ã“ã®ãƒ‰ã‚ュメント㯠:ref:`Documentation/process/submitting-patches.rst <submittingpatches>` ã®æ—¥æœ¬èªžè¨³ã§ã™ã€‚ + + å…è²¬äº‹é …: :ref:`translations_ja_JP_disclaimer` + +.. warning:: + + **UNDER CONSTRUCTION!!** + + ã“ã®æ–‡æ›¸ã¯ç¿»è¨³æ›´æ–°ã®ä½œæ¥ä¸ã§ã™ã€‚最新ã®å†…容ã¯åŽŸæ–‡ã‚’å‚ç…§ã—ã¦ãã ã•ã„。 + +Linux カーãƒãƒ«ã¸å¤‰æ›´ã‚’投稿ã—ãŸã„個人やä¼æ¥ã«ã¨ã£ã¦ã€ã‚‚ã—「仕組ã¿ã€ã« +慣れã¦ã„ãªã‘ã‚Œã°ã€ãã®ãƒ—ãƒã‚»ã‚¹ã¯æ™‚ã«æ°—後れã™ã‚‹ã‚‚ã®ã§ã—ょã†ã€‚ +ã“ã®ãƒ†ã‚ストã¯ã€ã‚ãªãŸã®å¤‰æ›´ãŒå—ã‘入れられるå¯èƒ½æ€§ã‚’大ãã高ã‚ã‚‹ãŸã‚ã® +æ案を集ã‚ãŸã‚‚ã®ã§ã™ã€‚ + +ã“ã®æ–‡æ›¸ã«ã¯ã€æ¯”較的簡潔ãªå½¢å¼ã§å¤šæ•°ã®æ案ãŒå«ã¾ã‚Œã¦ã„ã¾ã™ã€‚ +カーãƒãƒ«é–‹ç™ºãƒ—ãƒã‚»ã‚¹ã®ä»•çµ„ã¿ã«é–¢ã™ã‚‹è©³ç´°ã¯ +Documentation/process/development-process.rst ã‚’å‚ç…§ã—ã¦ãã ã•ã„。 +ã¾ãŸã€ã‚³ãƒ¼ãƒ‰ã‚’投稿ã™ã‚‹å‰ã«ç¢ºèªã™ã¹ãé …ç›®ã®ä¸€è¦§ã¨ã—㦠+Documentation/process/submit-checklist.rst ã‚’èªã‚“ã§ãã ã•ã„。 +デãƒã‚¤ã‚¹ãƒ„リーãƒã‚¤ãƒ³ãƒ‡ã‚£ãƒ³ã‚°ã®ãƒ‘ッãƒã«ã¤ã„ã¦ã¯ã€ +Documentation/devicetree/bindings/submitting-patches.rst ã‚’èªã‚“ã§ãã ã•ã„。 + +ã“ã®æ–‡æ›¸ã¯ã€ãƒ‘ッãƒä½œæˆã« ``git`` を使ã†å‰æã§æ›¸ã‹ã‚Œã¦ã„ã¾ã™ã€‚ +ã‚‚ã— ``git`` ã«ä¸æ…£ã‚Œã§ã‚ã‚Œã°ã€ä½¿ã„方をå¦ã¶ã“ã¨ã‚’å¼·ã勧ã‚ã¾ã™ã€‚ +ãã‚Œã«ã‚ˆã‚Šã€ã‚«ãƒ¼ãƒãƒ«é–‹ç™ºè€…ã¨ã—ã¦ã€ã¾ãŸä¸€èˆ¬çš„ã«ã‚‚ã€ã‚ãªãŸã®ä½œæ¥ã¯ +ãšã£ã¨æ¥½ã«ãªã‚‹ã§ã—ょã†ã€‚ + +ã„ãã¤ã‹ã®ã‚µãƒ–システムやメンテナツリーã«ã¯ã€å„々ã®ãƒ¯ãƒ¼ã‚¯ãƒ•ãƒãƒ¼ã‚„ +æœŸå¾…äº‹é …ã«é–¢ã™ã‚‹è¿½åŠ æƒ…å ±ãŒã‚ã‚Šã¾ã™ã€‚次をå‚ç…§ã—ã¦ãã ã•ã„: +:ref:`Documentation/process/maintainer-handbooks.rst <maintainer_handbooks_main>`. + +ç¾åœ¨ã®ã‚½ãƒ¼ã‚¹ãƒ„リーを入手ã™ã‚‹ +---------------------------- + +ã‚‚ã—手元ã«æœ€æ–°ã®ã‚«ãƒ¼ãƒãƒ«ã‚½ãƒ¼ã‚¹ã®ãƒªãƒã‚¸ãƒˆãƒªãŒãªã‘ã‚Œã°ã€``git`` を使ã£ã¦å–å¾—ã—㦠+ãã ã•ã„。ã¾ãšã¯ mainline ã®ãƒªãƒã‚¸ãƒˆãƒªã‹ã‚‰å§‹ã‚ã‚‹ã®ãŒã‚ˆã„ã§ã—ょã†ã€‚ã“れ㯠+次ã®ã‚ˆã†ã«ã—ã¦å–å¾—ã§ãã¾ã™:: + + git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git + +ãŸã ã—ã€ç›´æŽ¥ mainline ã®ãƒ„リーを対象ã«ä½œæ¥ã™ã‚Œã°ã‚ˆã„ã¨ã¯é™ã‚‰ãªã„ã“ã¨ã«æ³¨æ„ +ã—ã¦ãã ã•ã„。多ãã®ã‚µãƒ–システムã®ãƒ¡ãƒ³ãƒ†ãƒŠã¯ãã‚Œãžã‚Œç‹¬è‡ªã®ãƒ„リーをé‹ç”¨ã—ã¦ãŠã‚Šã€ +ãã®ãƒ„リーã«å¯¾ã—ã¦ä½œæˆã•ã‚ŒãŸãƒ‘ッãƒã‚’見ãŸã„ã¨è€ƒãˆã¦ã„ã¾ã™ã€‚該当サブシステム㮠+ツリー㯠MAINTAINERS ファイル内㮠**T:** エントリをå‚ç…§ã—ã¦è¦‹ã¤ã‘ã¦ãã ã•ã„。 +ãã“ã«æŽ²è¼‰ã•ã‚Œã¦ã„ãªã„å ´åˆã¯ã€ãƒ¡ãƒ³ãƒ†ãƒŠã«å•ã„åˆã‚ã›ã¦ãã ã•ã„。 + +変更内容を説明ã™ã‚‹ +------------------ diff --git a/Documentation/translations/ko_KR/core-api/wrappers/memory-barriers.rst b/Documentation/translations/ko_KR/core-api/wrappers/memory-barriers.rst deleted file mode 100644 index 526ae534dd86..000000000000 --- a/Documentation/translations/ko_KR/core-api/wrappers/memory-barriers.rst +++ /dev/null @@ -1,18 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - This is a simple wrapper to bring memory-barriers.txt into the RST world - until such a time as that file can be converted directly. - -========================= -리눅스 ì»¤ë„ ë©”ëª¨ë¦¬ 배리어 -========================= - -.. raw:: latex - - \footnotesize - -.. include:: ../../memory-barriers.txt - :literal: - -.. raw:: latex - - \normalsize diff --git a/Documentation/translations/ko_KR/index.rst b/Documentation/translations/ko_KR/index.rst index a20772f9d61c..b788462d08e4 100644 --- a/Documentation/translations/ko_KR/index.rst +++ b/Documentation/translations/ko_KR/index.rst @@ -12,7 +12,6 @@ :maxdepth: 1 process/howto - core-api/wrappers/memory-barriers.rst .. raw:: latex diff --git a/Documentation/translations/ko_KR/memory-barriers.txt b/Documentation/translations/ko_KR/memory-barriers.txt deleted file mode 100644 index 7165927a708e..000000000000 --- a/Documentation/translations/ko_KR/memory-barriers.txt +++ /dev/null @@ -1,2952 +0,0 @@ -NOTE: -This is a version of Documentation/memory-barriers.txt translated into Korean. -This document is maintained by SeongJae Park <sj@kernel.org>. -If you find any difference between this document and the original file or -a problem with the translation, please contact the maintainer of this file. - -Please also note that the purpose of this file is to be easier to -read for non English (read: Korean) speakers and is not intended as -a fork. So if you have any comments or updates for this file please -update the original English file first. The English version is -definitive, and readers should look there if they have any doubt. - -================================= -ì´ ë¬¸ì„œëŠ” -Documentation/memory-barriers.txt -ì˜ í•œê¸€ 번ì—입니다. - -ì—ìžï¼š 박성재 <sj@kernel.org> -================================= - - - ========================= - 리눅스 ì»¤ë„ ë©”ëª¨ë¦¬ 배리어 - ========================= - -ì €ìž: David Howells <dhowells@redhat.com> - Paul E. McKenney <paulmck@linux.ibm.com> - Will Deacon <will.deacon@arm.com> - Peter Zijlstra <peterz@infradead.org> - -======== -ë©´ì±…ì¡°í• -======== - -ì´ ë¬¸ì„œëŠ” 명세서가 아닙니다; ì´ ë¬¸ì„œëŠ” 완벽하지 ì•Šì€ë°, ê°„ê²°ì„±ì„ ìœ„í•´ ì˜ë„ëœ -ë¶€ë¶„ë„ ìžˆê³ , ì˜ë„하진 않았지만 ì‚¬ëžŒì— ì˜í•´ 쓰였다보니 ë¶ˆì™„ì „í•œ ë¶€ë¶„ë„ ìžˆìŠµë‹ˆë‹¤. -ì´ ë¬¸ì„œëŠ” 리눅스ì—ì„œ ì œê³µí•˜ëŠ” 다양한 메모리 ë°°ë¦¬ì–´ë“¤ì„ ì‚¬ìš©í•˜ê¸° 위한 -안내서입니다만, ë”ê°€ ì´ìƒí•˜ë‹¤ 싶으면 (그런게 ë§Žì„ ê²ë‹ˆë‹¤) ì§ˆë¬¸ì„ ë¶€íƒë“œë¦½ë‹ˆë‹¤. -ì¼ë¶€ ì´ìƒí•œ ì ë“¤ì€ ê³µì‹ì ì¸ ë©”ëª¨ë¦¬ ì¼ê´€ì„± 모ë¸ê³¼ tools/memory-model/ ì— ìžˆëŠ” -ê´€ë ¨ 문서를 ì°¸ê³ í•´ì„œ í•´ê²°ë 수 ìžˆì„ ê²ë‹ˆë‹¤. 그러나, ì´ ë©”ëª¨ë¦¬ 모ë¸ì¡°ì°¨ë„ ê·¸ -관리ìžë“¤ì˜ ì˜ê²¬ì˜ 집합으로 ë´ì•¼ì§€, ì ˆëŒ€ ì˜³ì€ ì˜ˆì–¸ìžë¡œ ì‹ ë´‰í•´ì„ ì•ˆë ê²ë‹ˆë‹¤. - -다시 ë§í•˜ì§€ë§Œ, ì´ ë¬¸ì„œëŠ” 리눅스가 í•˜ë“œì›¨ì–´ì— ê¸°ëŒ€í•˜ëŠ” 사í•ì— 대한 명세서가 -아닙니다. - -ì´ ë¬¸ì„œì˜ ëª©ì ì€ ë‘가지입니다: - - (1) ì–´ë–¤ íŠ¹ì • ë°°ë¦¬ì–´ì— ëŒ€í•´ ê¸°ëŒ€í• ìˆ˜ 있는 ìµœì†Œí•œì˜ ê¸°ëŠ¥ì„ ëª…ì„¸í•˜ê¸° 위해서, - ê·¸ë¦¬ê³ - - (2) 사용 가능한 ë°°ë¦¬ì–´ë“¤ì— ëŒ€í•´ 어떻게 사용해야 í•˜ëŠ”ì§€ì— ëŒ€í•œ 안내를 ì œê³µí•˜ê¸° - 위해서. - -ì–´ë–¤ 아키í…ì³ëŠ” íŠ¹ì •í•œ ë°°ë¦¬ì–´ë“¤ì— ëŒ€í•´ì„œëŠ” 여기서 ì´ì•¼ê¸°í•˜ëŠ” ìµœì†Œí•œì˜ -요구사í•ë“¤ë³´ë‹¤ ë§Žì€ ê¸°ëŠ¥ì„ ì œê³µí• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤ë§Œ, 여기서 ì´ì•¼ê¸°í•˜ëŠ” -요구사í•ë“¤ì„ 충족하지 않는 아키í…ì³ê°€ 있다면 ê·¸ 아키í…ì³ê°€ ìž˜ëª»ëœ ê²ƒì´ëž€ ì ì„ -알아ë‘시기 ë°”ëžë‹ˆë‹¤. - -ë˜í•œ, íŠ¹ì • 아키í…ì³ì—ì„œ ì¼ë¶€ 배리어는 해당 아키í…ì³ì˜ 특수한 ë™ìž‘ ë°©ì‹ìœ¼ë¡œ ì¸í•´ -해당 ë°°ë¦¬ì–´ì˜ ëª…ì‹œì ì‚¬ìš©ì´ ë¶ˆí•„ìš”í•´ì„œ no-op ì´ ë ìˆ˜ë„ ìžˆìŒì„ 알아ë‘시기 -ë°”ëžë‹ˆë‹¤. - -ì—ìž: 본 ë²ˆì— ì—ì‹œ 완벽하지 ì•Šì€ë°, ì´ ì—ì‹œ 부분ì 으로는 ì˜ë„ëœ ê²ƒì´ê¸°ë„ -합니다. 여타 ê¸°ìˆ ë¬¸ì„œë“¤ì´ ê·¸ë ‡ë“¯ 완벽한 ì´í•´ë¥¼ 위해서는 번ì—문과 ì›ë¬¸ì„ 함께 -ì½ìœ¼ì‹œë˜ 번ì—ë¬¸ì„ í•˜ë‚˜ì˜ ê°€ì´ë“œë¡œ 활용하시길 추천드리며, 발견ë˜ëŠ” ì˜¤ì— ë“±ì— -대해서는 ì–¸ì œë“ ì˜ê²¬ì„ 부íƒë“œë¦½ë‹ˆë‹¤. 과한 번ì—으로 ì¸í•œ 오해를 최소화하기 위해 -ì• ë§¤í•œ ë¶€ë¶„ì´ ìžˆì„ ê²½ìš°ì—는 ì–´ìƒ‰í•¨ì´ ìžˆë”ë¼ë„ ì›ëž˜ì˜ 용어를 차용합니다. - - -===== -목차: -===== - - (*) ì¶”ìƒ ë©”ëª¨ë¦¬ 액세스 모ë¸. - - - 디바ì´ìŠ¤ 오í¼ë ˆì´ì…˜. - - 보장사í•. - - (*) 메모리 배리어란 무엇ì¸ê°€? - - - 메모리 ë°°ë¦¬ì–´ì˜ ì¢…ë¥˜. - - 메모리 ë°°ë¦¬ì–´ì— ëŒ€í•´ ê°€ì •í•´ì„ ì•ˆë 것. - - 주소 ë°ì´í„° ì˜ì¡´ì„± 배리어 (ì—사ì ). - - 컨트롤 ì˜ì¡´ì„±. - - SMP 배리어 ì§ë§žì¶”기. - - 메모리 배리어 ì‹œí€€ìŠ¤ì˜ ì˜ˆ. - - ì½ê¸° 메모리 배리어 vs 로드 예측. - - Multicopy ì›ìžì„±. - - (*) 명시ì ì»¤ë„ ë°°ë¦¬ì–´. - - - 컴파ì¼ëŸ¬ 배리어. - - CPU 메모리 배리어. - - (*) 암묵ì ì»¤ë„ ë©”ëª¨ë¦¬ 배리어. - - - ë½ Acquisition 함수. - - ì¸í„°ëŸ½íŠ¸ 비활성화 함수. - - 슬립과 웨ì´í¬ì—… 함수. - - ê·¸ì™¸ì˜ í•¨ìˆ˜ë“¤. - - (*) CPU ê°„ ACQUIRING ë°°ë¦¬ì–´ì˜ íš¨ê³¼. - - - Acquire vs 메모리 액세스. - - (*) 메모리 배리어가 필요한 ê³³ - - - 프로세서간 ìƒí˜¸ ìž‘ìš©. - - ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜. - - 디바ì´ìŠ¤ 액세스. - - ì¸í„°ëŸ½íŠ¸. - - (*) ì»¤ë„ I/O ë°°ë¦¬ì–´ì˜ íš¨ê³¼. - - (*) ê°€ì •ë˜ëŠ” 가장 ì™„í™”ëœ ì‹¤í–‰ 순서 모ë¸. - - (*) CPU ìºì‹œì˜ ì˜í–¥. - - - ìºì‹œ ì¼ê´€ì„±. - - ìºì‹œ ì¼ê´€ì„± vs DMA. - - ìºì‹œ ì¼ê´€ì„± vs MMIO. - - (*) CPU ë“¤ì´ ì €ì§€ë¥´ëŠ” ì¼ë“¤. - - - ê·¸ë¦¬ê³ , Alpha ê°€ 있다. - - ê°€ìƒ ë¨¸ì‹ ê²ŒìŠ¤íŠ¸. - - (*) 사용 예. - - - ìˆœí™˜ì‹ ë²„í¼. - - (*) ì°¸ê³ ë¬¸í—Œ. - - -======================= -ì¶”ìƒ ë©”ëª¨ë¦¬ 액세스 ëª¨ë¸ -======================= - -다ìŒê³¼ ê°™ì´ ì¶”ìƒí™”ëœ ì‹œìŠ¤í…œ 모ë¸ì„ ìƒê°í•´ 봅시다: - - : : - : : - : : - +-------+ : +--------+ : +-------+ - | | : | | : | | - | | : | | : | | - | CPU 1 |<----->| Memory |<----->| CPU 2 | - | | : | | : | | - | | : | | : | | - +-------+ : +--------+ : +-------+ - ^ : ^ : ^ - | : | : | - | : | : | - | : v : | - | : +--------+ : | - | : | | : | - | : | | : | - +---------->| Device |<----------+ - : | | : - : | | : - : +--------+ : - : : - -í”„ë¡œê·¸ëž¨ì€ ì—¬ëŸ¬ 메모리 액세스 오í¼ë ˆì´ì…˜ì„ ë°œìƒì‹œí‚¤ê³ , ê°ê°ì˜ CPU 는 그런 -í”„ë¡œê·¸ëž¨ë“¤ì„ ì‹¤í–‰í•©ë‹ˆë‹¤. 추ìƒí™”ëœ CPU 모ë¸ì—ì„œ 메모리 오í¼ë ˆì´ì…˜ë“¤ì˜ 순서는 -매우 완화ë˜ì–´ ìžˆê³ , CPU 는 í”„ë¡œê·¸ëž¨ì´ ì¸ê³¼ê´€ê³„를 어기지 않는 ìƒíƒœë¡œ 관리ëœë‹¤ê³ -ë³´ì¼ ìˆ˜ë§Œ 있다면 메모리 오í¼ë ˆì´ì…˜ì„ ìžì‹ ì´ ì›í•˜ëŠ” ì–´ë–¤ ìˆœì„œëŒ€ë¡œë“ ìž¬ë°°ì¹˜í•´ -ë™ìž‘시킬 수 있습니다. 비슷하게, 컴파ì¼ëŸ¬ ë˜í•œ í”„ë¡œê·¸ëž¨ì˜ ì •ìƒì ë™ìž‘ì„ í•´ì¹˜ì§€ -않는 í•œë„ ë‚´ì—서는 ì–´ë–¤ ìˆœì„œë¡œë“ ìžì‹ ì´ ì›í•˜ëŠ” 대로 ì¸ìŠ¤íŠ¸ëŸì…˜ì„ 재배치 í• ìˆ˜ -있습니다. - -ë”°ë¼ì„œ ìœ„ì˜ ë‹¤ì´ì–´ê·¸ëž¨ì—ì„œ í•œ CPUê°€ ë™ìž‘시키는 메모리 오í¼ë ˆì´ì…˜ì´ 만들어내는 -변화는 해당 오í¼ë ˆì´ì…˜ì´ CPU 와 ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ 부분들 사ì´ì˜ ì¸í„°íŽ˜ì´ìŠ¤(ì ì„ )를 -지나가면서 ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ ë¶€ë¶„ë“¤ì— ì¸ì§€ë©ë‹ˆë‹¤. - - -예를 들어, 다ìŒì˜ ì¼ë ¨ì˜ ì´ë²¤íŠ¸ë“¤ì„ ìƒê°í•´ 봅시다: - - CPU 1 CPU 2 - =============== =============== - { A == 1; B == 2 } - A = 3; x = B; - B = 4; y = A; - -다ì´ì–´ê·¸ëž¨ì˜ 가운ë°ì— 위치한 메모리 ì‹œìŠ¤í…œì— ë³´ì—¬ì§€ê²Œ ë˜ëŠ” ì•¡ì„¸ìŠ¤ë“¤ì€ ë‹¤ìŒì˜ ì´ -24ê°œì˜ ì¡°í•©ìœ¼ë¡œ 재구성ë 수 있습니다: - - STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4 - STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3 - STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4 - STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4 - STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3 - STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4 - STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4 - STORE B=4, ... - ... - -ë”°ë¼ì„œ 다ìŒì˜ 네가지 ì¡°í•©ì˜ ê°’ë“¤ì´ ë‚˜ì˜¬ 수 있습니다: - - x == 2, y == 1 - x == 2, y == 3 - x == 4, y == 1 - x == 4, y == 3 - - -한발 ë” ë‚˜ì•„ê°€ì„œ, í•œ CPU ê°€ 메모리 ì‹œìŠ¤í…œì— ë°˜ì˜í•œ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì˜ 결과는 -다른 CPU ì—ì„œì˜ ë¡œë“œ 오í¼ë ˆì´ì…˜ì„ 통해 ì¸ì§€ë˜ëŠ”ë°, ì´ ë•Œ ìŠ¤í† ì–´ê°€ ë°˜ì˜ëœ 순서와 -다른 순서로 ì¸ì§€ë ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. - - -예로, ì•„ëž˜ì˜ ì¼ë ¨ì˜ ì´ë²¤íŠ¸ë“¤ì„ ìƒê°í•´ 봅시다: - - CPU 1 CPU 2 - =============== =============== - { A == 1, B == 2, C == 3, P == &A, Q == &C } - B = 4; Q = P; - P = &B D = *Q; - -D ë¡œ ì½í˜€ì§€ëŠ” ê°’ì€ CPU 2 ì—ì„œ P 로부터 ì½í˜€ì§„ ì£¼ì†Œê°’ì— ì˜ì¡´ì ì´ê¸° ë•Œë¬¸ì— ì—¬ê¸°ì—” -분명한 주소 ì˜ì¡´ì„±ì´ 있습니다. 하지만 ì´ ì´ë²¤íŠ¸ë“¤ì˜ 실행 결과로는 ì•„ëž˜ì˜ -ê²°ê³¼ë“¤ì´ ëª¨ë‘ ë‚˜íƒ€ë‚ ìˆ˜ 있습니다: - - (Q == &A) and (D == 1) - (Q == &B) and (D == 2) - (Q == &B) and (D == 4) - -CPU 2 는 *Q ì˜ ë¡œë“œë¥¼ ìš”ì²í•˜ê¸° ì „ì— P 를 Q ì— ë„£ê¸° ë•Œë¬¸ì— D ì— C 를 집어넣는 -ì¼ì€ ì—†ìŒì„ 알아ë‘세요. - - -디바ì´ìŠ¤ 오í¼ë ˆì´ì…˜ -------------------- - -ì¼ë¶€ 디바ì´ìŠ¤ëŠ” ìžì‹ ì˜ ì»¨íŠ¸ë¡¤ ì¸í„°íŽ˜ì´ìŠ¤ë¥¼ ë©”ëª¨ë¦¬ì˜ íŠ¹ì • ì˜ì—으로 매핑해서 -ì œê³µí•˜ëŠ”ë°(Memory mapped I/O), 해당 컨트롤 ë ˆì§€ìŠ¤í„°ì— ì ‘ê·¼í•˜ëŠ” 순서는 매우 -중요합니다. 예를 들어, ì–´ë“œë ˆìŠ¤ í¬íŠ¸ ë ˆì§€ìŠ¤í„° (A) 와 ë°ì´í„° í¬íŠ¸ ë ˆì§€ìŠ¤í„° (D) -를 통해 ì ‘ê·¼ë˜ëŠ” 내부 ë ˆì§€ìŠ¤í„° ì§‘í•©ì„ ê°–ëŠ” ì´ë”ë„· 카드를 ìƒê°í•´ 봅시다. ë‚´ë¶€ì˜ -5번 ë ˆì§€ìŠ¤í„°ë¥¼ ì½ê¸° 위해 다ìŒì˜ 코드가 사용ë 수 있습니다: - - *A = 5; - x = *D; - -하지만, ì´ê±´ 다ìŒì˜ ë‘ ì¡°í•© 중 하나로 만들어질 수 있습니다: - - STORE *A = 5, x = LOAD *D - x = LOAD *D, STORE *A = 5 - -ë‘번째 ì¡°í•©ì€ ë°ì´í„°ë¥¼ ì½ì–´ì˜¨ _후ì—_ 주소를 ì„¤ì •í•˜ë¯€ë¡œ, 오ë™ìž‘ì„ ì¼ìœ¼í‚¬ ê²ë‹ˆë‹¤. - - -ë³´ìž¥ì‚¬í• --------- - -CPU ì—게 ê¸°ëŒ€í• ìˆ˜ 있는 ìµœì†Œí•œì˜ ë³´ìž¥ì‚¬í• ëª‡ê°€ì§€ê°€ 있습니다: - - (*) ì–´ë–¤ CPU ë“ , ì˜ì¡´ì„±ì´ 존재하는 메모리 ì•¡ì„¸ìŠ¤ë“¤ì€ í•´ë‹¹ CPU ìžì‹ ì—게 - 있어서는 순서대로 메모리 ì‹œìŠ¤í…œì— ìˆ˜í–‰ ìš”ì²ë©ë‹ˆë‹¤. 즉, 다ìŒì— 대해서: - - Q = READ_ONCE(P); D = READ_ONCE(*Q); - - CPU 는 다ìŒê³¼ ê°™ì€ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ 시퀀스를 수행 ìš”ì²í•©ë‹ˆë‹¤: - - Q = LOAD P, D = LOAD *Q - - ê·¸ë¦¬ê³ ê·¸ 시퀀스 ë‚´ì—ì„œì˜ ìˆœì„œëŠ” í•ìƒ 지켜집니다. 하지만, DEC Alpha ì—ì„œ - READ_ONCE() 는 메모리 배리어 ëª…ë ¹ë„ ë‚´ê²Œ ë˜ì–´ 있어서, DEC Alpha CPU 는 - 다ìŒê³¼ ê°™ì€ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì„ 내놓게 ë©ë‹ˆë‹¤: - - Q = LOAD P, MEMORY_BARRIER, D = LOAD *Q, MEMORY_BARRIER - - DEC Alpha ì—ì„œ 수행ë˜ë“ ì•„ë‹ˆë“ , READ_ONCE() 는 컴파ì¼ëŸ¬ë¡œë¶€í„°ì˜ ì•…ì˜í–¥ - ë˜í•œ ì œê±°í•©ë‹ˆë‹¤. - - (*) íŠ¹ì • CPU ë‚´ì—ì„œ 겹치는 ì˜ì—ì˜ ë©”ëª¨ë¦¬ì— í–‰í•´ì§€ëŠ” 로드와 ìŠ¤í† ì–´ ë“¤ì€ í•´ë‹¹ - CPU 안ì—서는 순서가 바뀌지 ì•Šì€ ê²ƒìœ¼ë¡œ 보여집니다. 즉, 다ìŒì— 대해서: - - a = READ_ONCE(*X); WRITE_ONCE(*X, b); - - CPU 는 다ìŒì˜ 메모리 오í¼ë ˆì´ì…˜ ì‹œí€€ìŠ¤ë§Œì„ ë©”ëª¨ë¦¬ì— ìš”ì²í• ê²ë‹ˆë‹¤: - - a = LOAD *X, STORE *X = b - - ê·¸ë¦¬ê³ ë‹¤ìŒì— 대해서는: - - WRITE_ONCE(*X, c); d = READ_ONCE(*X); - - CPU 는 다ìŒì˜ 수행 ìš”ì²ë§Œì„ 만들어 냅니다: - - STORE *X = c, d = LOAD *X - - (로드 오í¼ë ˆì´ì…˜ê³¼ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ì´ 겹치는 메모리 ì˜ì—ì— ëŒ€í•´ - 수행ëœë‹¤ë©´ 해당 오í¼ë ˆì´ì…˜ë“¤ì€ ê²¹ì¹œë‹¤ê³ í‘œí˜„ë©ë‹ˆë‹¤). - -ê·¸ë¦¬ê³ _반드시_ ë˜ëŠ” _ì ˆëŒ€ë¡œ_ ê°€ì •í•˜ê±°ë‚˜ ê°€ì •í•˜ì§€ ë§ì•„야 하는 ê²ƒë“¤ì´ ìžˆìŠµë‹ˆë‹¤: - - (*) 컴파ì¼ëŸ¬ê°€ READ_ONCE() 나 WRITE_ONCE() ë¡œ 보호ë˜ì§€ ì•Šì€ ë©”ëª¨ë¦¬ 액세스를 - ë‹¹ì‹ ì´ ì›í•˜ëŠ” 대로 í• ê²ƒì´ë¼ëŠ” ê°€ì •ì€ _ì ˆëŒ€ë¡œ_ í•´ì„ ì•ˆë©ë‹ˆë‹¤. ê·¸ê²ƒë“¤ì´ - 없다면, 컴파ì¼ëŸ¬ëŠ” 컴파ì¼ëŸ¬ 배리어 섹션ì—ì„œ 다루게 ë , ëª¨ë“ "ì°½ì˜ì ì¸" - ë³€ê²½ë“¤ì„ ë§Œë“¤ì–´ë‚¼ ê¶Œí•œì„ ê°–ê²Œ ë©ë‹ˆë‹¤. - - (*) 개별ì ì¸ ë¡œë“œì™€ ìŠ¤í† ì–´ë“¤ì´ ì£¼ì–´ì§„ 순서대로 ìš”ì²ë 것ì´ë¼ëŠ” ê°€ì •ì€ _ì ˆëŒ€ë¡œ_ - 하지 ë§ì•„야 합니다. ì´ ë§ì€ 곧: - - X = *A; Y = *B; *D = Z; - - 는 다ìŒì˜ 것들 중 ì–´ëŠ ê²ƒìœ¼ë¡œë“ ë§Œë“¤ì–´ì§ˆ 수 있다는 ì˜ë¯¸ìž…니다: - - X = LOAD *A, Y = LOAD *B, STORE *D = Z - X = LOAD *A, STORE *D = Z, Y = LOAD *B - Y = LOAD *B, X = LOAD *A, STORE *D = Z - Y = LOAD *B, STORE *D = Z, X = LOAD *A - STORE *D = Z, X = LOAD *A, Y = LOAD *B - STORE *D = Z, Y = LOAD *B, X = LOAD *A - - (*) 겹치는 메모리 ì•¡ì„¸ìŠ¤ë“¤ì€ í•©ì³ì§€ê±°ë‚˜ ë²„ë ¤ì§ˆ 수 있ìŒì„ _반드시_ ê°€ì •í•´ì•¼ - 합니다. 다ìŒì˜ 코드는: - - X = *A; Y = *(A + 4); - - 다ìŒì˜ 것들 중 ëë“ ë 수 있습니다: - - X = LOAD *A; Y = LOAD *(A + 4); - Y = LOAD *(A + 4); X = LOAD *A; - {X, Y} = LOAD {*A, *(A + 4) }; - - ê·¸ë¦¬ê³ : - - *A = X; *(A + 4) = Y; - - 는 ë‹¤ìŒ ì¤‘ ëë“ ë 수 있습니다: - - STORE *A = X; STORE *(A + 4) = Y; - STORE *(A + 4) = Y; STORE *A = X; - STORE {*A, *(A + 4) } = {X, Y}; - -ê·¸ë¦¬ê³ ë³´ìž¥ì‚¬í•ì— 반대ë˜ëŠ” 것들(anti-guarantees)ì´ ìžˆìŠµë‹ˆë‹¤: - - (*) ì´ ë³´ìž¥ì‚¬í•ë“¤ì€ bitfield ì—는 ì ìš©ë˜ì§€ 않는ë°, 컴파ì¼ëŸ¬ë“¤ì€ bitfield 를 - ìˆ˜ì •í•˜ëŠ” 코드를 ìƒì„±í• ë•Œ ì›ìžì„± 없는(non-atomic) ì½ê³ -ìˆ˜ì •í•˜ê³ -쓰는 - ì¸ìŠ¤íŠ¸ëŸì…˜ë“¤ì˜ ì¡°í•©ì„ ë§Œë“œëŠ” 경우가 많기 때문입니다. ë³‘ë ¬ ì•Œê³ ë¦¬ì¦˜ì˜ - ë™ê¸°í™”ì— bitfield 를 ì‚¬ìš©í•˜ë ¤ 하지 마ì‹ì‹œì˜¤. - - (*) bitfield ë“¤ì´ ì—¬ëŸ¬ ë½ìœ¼ë¡œ 보호ë˜ëŠ” ê²½ìš°ë¼ í•˜ë”ë¼ë„, í•˜ë‚˜ì˜ bitfield ì˜ - ëª¨ë“ í•„ë“œë“¤ì€ í•˜ë‚˜ì˜ ë½ìœ¼ë¡œ 보호ë˜ì–´ì•¼ 합니다. 만약 í•œ bitfield ì˜ ë‘ - 필드가 서로 다른 ë½ìœ¼ë¡œ 보호ëœë‹¤ë©´, 컴파ì¼ëŸ¬ì˜ ì›ìžì„± 없는 - ì½ê³ -ìˆ˜ì •í•˜ê³ -쓰는 ì¸ìŠ¤íŠ¸ëŸì…˜ ì¡°í•©ì€ í•œ í•„ë“œì—ì˜ ì—…ë°ì´íŠ¸ê°€ ê·¼ì²˜ì˜ - í•„ë“œì—ë„ ì˜í–¥ì„ ë¼ì¹˜ê²Œ í• ìˆ˜ 있습니다. - - (*) ì´ ë³´ìž¥ì‚¬í•ë“¤ì€ ì ì ˆí•˜ê²Œ ì •ë ¬ë˜ê³ í¬ê¸°ê°€ 잡힌 ìŠ¤ì¹¼ë¼ ë³€ìˆ˜ë“¤ì— ëŒ€í•´ì„œë§Œ - ì ìš©ë©ë‹ˆë‹¤. "ì ì ˆí•˜ê²Œ í¬ê¸°ê°€ 잡힌" ì´ë¼í•¨ì€ 현재로ì¨ëŠ” "char", "short", - "int" ê·¸ë¦¬ê³ "long" ê³¼ ê°™ì€ í¬ê¸°ì˜ ë³€ìˆ˜ë“¤ì„ ì˜ë¯¸í•©ë‹ˆë‹¤. "ì ì ˆí•˜ê²Œ ì •ë ¬ëœ" - ì€ ìžì—°ìŠ¤ëŸ° ì •ë ¬ì„ ì˜ë¯¸í•˜ëŠ”ë°, ë”°ë¼ì„œ "char" ì— ëŒ€í•´ì„œëŠ” 아무 ì œì•½ì´ ì—†ê³ , - "short" ì— ëŒ€í•´ì„œëŠ” 2ë°”ì´íŠ¸ ì •ë ¬ì„, "int" ì—는 4ë°”ì´íŠ¸ ì •ë ¬ì„, ê·¸ë¦¬ê³ - "long" ì— ëŒ€í•´ì„œëŠ” 32-bit 시스템ì¸ì§€ 64-bit 시스템ì¸ì§€ì— ë”°ë¼ 4ë°”ì´íŠ¸ ë˜ëŠ” - 8ë°”ì´íŠ¸ ì •ë ¬ì„ ì˜ë¯¸í•©ë‹ˆë‹¤. ì´ ë³´ìž¥ì‚¬í•ë“¤ì€ C11 표준ì—ì„œ 소개ë˜ì—ˆìœ¼ë¯€ë¡œ, - C11 ì „ì˜ ì˜¤ëž˜ëœ ì»´íŒŒì¼ëŸ¬(예를 들어, gcc 4.6) 를 ì‚¬ìš©í• ë•Œì—” 주ì˜í•˜ì‹œê¸° - ë°”ëžë‹ˆë‹¤. í‘œì¤€ì— ì´ ë³´ìž¥ì‚¬í•ë“¤ì€ "memory location" ì„ ì •ì˜í•˜ëŠ” 3.14 - ì„¹ì…˜ì— ë‹¤ìŒê³¼ ê°™ì´ ì„¤ëª…ë˜ì–´ 있습니다: - (ì—ìž: ì¸ìš©ë¬¸ì´ë¯€ë¡œ 번ì—하지 않습니다) - - memory location - either an object of scalar type, or a maximal sequence - of adjacent bit-fields all having nonzero width - - NOTE 1: Two threads of execution can update and access - separate memory locations without interfering with - each other. - - NOTE 2: A bit-field and an adjacent non-bit-field member - are in separate memory locations. The same applies - to two bit-fields, if one is declared inside a nested - structure declaration and the other is not, or if the two - are separated by a zero-length bit-field declaration, - or if they are separated by a non-bit-field member - declaration. It is not safe to concurrently update two - bit-fields in the same structure if all members declared - between them are also bit-fields, no matter what the - sizes of those intervening bit-fields happen to be. - - -========================= -메모리 배리어란 무엇ì¸ê°€? -========================= - -ì•žì—ì„œ 봤듯ì´, ìƒí˜¸ê°„ ì˜ì¡´ì„±ì´ 없는 메모리 오í¼ë ˆì´ì…˜ë“¤ì€ ì‹¤ì œë¡œëŠ” 무작위ì -순서로 수행ë 수 있으며, ì´ëŠ” CPU 와 CPU ê°„ì˜ ìƒí˜¸ìž‘ìš©ì´ë‚˜ I/O ì— ë¬¸ì œê°€ ë 수 -있습니다. ë”°ë¼ì„œ 컴파ì¼ëŸ¬ì™€ CPU ê°€ 순서를 ë°”ê¾¸ëŠ”ë° ì œì•½ì„ ê±¸ 수 있ë„ë¡ ê°œìž…í• -수 있는 ì–´ë–¤ ë°©ë²•ì´ í•„ìš”í•©ë‹ˆë‹¤. - -메모리 배리어는 그런 개입 수단입니다. 메모리 배리어는 배리어를 사ì´ì— ë‘” ì•žê³¼ -ë’¤ ì–‘ì¸¡ì˜ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ ê°„ì— ë¶€ë¶„ì 순서가 존재하ë„ë¡ í•˜ëŠ” 효과를 ì¤ë‹ˆë‹¤. - -ì‹œìŠ¤í…œì˜ CPU 들과 여러 디바ì´ìŠ¤ë“¤ì€ ì„±ëŠ¥ì„ ì˜¬ë¦¬ê¸° 위해 ëª…ë ¹ì–´ 재배치, 실행 -ìœ ì˜ˆ, 메모리 오í¼ë ˆì´ì…˜ë“¤ì˜ ì¡°í•©, 예측ì 로드(speculative load), 브랜치 -예측(speculative branch prediction), 다양한 ì¢…ë¥˜ì˜ ìºì‹±(caching) ë“±ì˜ ë‹¤ì–‘í•œ -트ë¦ì„ ì‚¬ìš©í• ìˆ˜ 있기 ë•Œë¬¸ì— ì´ëŸ° ê°•ì œë ¥ì€ ì¤‘ìš”í•©ë‹ˆë‹¤. 메모리 ë°°ë¦¬ì–´ë“¤ì€ ì´ëŸ° -트ë¦ë“¤ì„ 무효로 하거나 ì–µì œí•˜ëŠ” 목ì 으로 사용ë˜ì–´ì ¸ì„œ 코드가 여러 CPU 와 -디바ì´ìŠ¤ë“¤ ê°„ì˜ ìƒí˜¸ìž‘ìš©ì„ ì •ìƒì 으로 ì œì–´í• ìˆ˜ 있게 í•´ì¤ë‹ˆë‹¤. - - -메모리 ë°°ë¦¬ì–´ì˜ ì¢…ë¥˜ --------------------- - -메모리 배리어는 ë„¤ê°œì˜ ê¸°ë³¸ 타입으로 분류ë©ë‹ˆë‹¤: - - (1) 쓰기 (ë˜ëŠ” ìŠ¤í† ì–´) 메모리 배리어. - - 쓰기 메모리 배리어는 ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ ì»´í¬ë„ŒíŠ¸ë“¤ì— 해당 배리어보다 ì•žì„œ - ëª…ì‹œëœ ëª¨ë“ STORE 오í¼ë ˆì´ì…˜ë“¤ì´ 해당 배리어 ë’¤ì— ëª…ì‹œëœ ëª¨ë“ STORE - 오í¼ë ˆì´ì…˜ë“¤ë³´ë‹¤ ë¨¼ì € ìˆ˜í–‰ëœ ê²ƒìœ¼ë¡œ ë³´ì¼ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 쓰기 배리어는 ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì— 대한 부분ì 순서 세우기입니다; 로드 - 오í¼ë ˆì´ì…˜ë“¤ì— 대해서는 ì–´ë–¤ ì˜í–¥ë„ ë¼ì¹˜ì§€ 않습니다. - - CPU 는 ì‹œê°„ì˜ íë¦„ì— ë”°ë¼ ë©”ëª¨ë¦¬ ì‹œìŠ¤í…œì— ì¼ë ¨ì˜ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì„ - 하나씩 ìš”ì²í•´ 집어넣습니다. 쓰기 배리어 ì•žì˜ ëª¨ë“ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì€ - 쓰기 배리어 ë’¤ì˜ ëª¨ë“ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ë³´ë‹¤ _ì•žì„œ_ 수행ë ê²ë‹ˆë‹¤. - - [!] 쓰기 ë°°ë¦¬ì–´ë“¤ì€ ì½ê¸° ë˜ëŠ” 주소 ì˜ì¡´ì„± 배리어와 함께 ì§ì„ 맞춰 - 사용ë˜ì–´ì•¼ë§Œ í•¨ì„ ì•Œì•„ë‘세요; "SMP 배리어 ì§ë§žì¶”기" ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - - (2) 주소 ì˜ì¡´ì„± 배리어 (ì—사ì ). - - 주소 ì˜ì¡´ì„± 배리어는 ì½ê¸° ë°°ë¦¬ì–´ì˜ ë³´ë‹¤ ì™„í™”ëœ í˜•íƒœìž…ë‹ˆë‹¤. ë‘ê°œì˜ ë¡œë“œ - 오í¼ë ˆì´ì…˜ì´ ìžˆê³ ë‘번째 ê²ƒì´ ì²«ë²ˆì§¸ ê²ƒì˜ ê²°ê³¼ì— ì˜ì¡´í•˜ê³ ìžˆì„ ë•Œ(예: - ë‘번째 로드가 ì°¸ì¡°í• ì£¼ì†Œë¥¼ 첫번째 로드가 ì½ëŠ” 경우), ë‘번째 로드가 ì½ì–´ì˜¬ - ë°ì´í„°ëŠ” 첫번째 ë¡œë“œì— ì˜í•´ ê·¸ 주소가 얻어진 ë’¤ì— ì—…ë°ì´íŠ¸ ë¨ì„ 보장하기 - 위해서 주소 ì˜ì¡´ì„± 배리어가 í•„ìš”í• ìˆ˜ 있습니다. - - 주소 ì˜ì¡´ì„± 배리어는 ìƒí˜¸ ì˜ì¡´ì ì¸ ë¡œë“œ 오í¼ë ˆì´ì…˜ë“¤ 사ì´ì˜ 부분ì 순서 - 세우기입니다; ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì´ë‚˜ ë…립ì ì¸ ë¡œë“œë“¤, ë˜ëŠ” 중복ë˜ëŠ” - ë¡œë“œë“¤ì— ëŒ€í•´ì„œëŠ” ì–´ë–¤ ì˜í–¥ë„ ë¼ì¹˜ì§€ 않습니다. - - (1) ì—ì„œ 언급했듯ì´, ì‹œìŠ¤í…œì˜ CPU ë“¤ì€ ë©”ëª¨ë¦¬ ì‹œìŠ¤í…œì— ì¼ë ¨ì˜ ìŠ¤í† ì–´ - 오í¼ë ˆì´ì…˜ë“¤ì„ ë˜ì ¸ ë„£ê³ ìžˆìœ¼ë©°, ê±°ê¸°ì— ê´€ì‹¬ì´ ìžˆëŠ” 다른 CPU 는 ê·¸ - 오í¼ë ˆì´ì…˜ë“¤ì„ 메모리 ì‹œìŠ¤í…œì´ ì‹¤í–‰í•œ 결과를 ì¸ì§€í• 수 있습니다. ì´ì²˜ëŸ¼ - 다른 CPU ì˜ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ì˜ ê²°ê³¼ì— ê´€ì‹¬ì„ ë‘ê³ ìžˆëŠ” CPU ê°€ 수행 ìš”ì²í•œ - 주소 ì˜ì¡´ì„± 배리어는, 배리어 ì•žì˜ ì–´ë–¤ 로드 오í¼ë ˆì´ì…˜ì´ 다른 CPU ì—ì„œ - ë˜ì ¸ ë„£ì€ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ê³¼ ê°™ì€ ì˜ì—ì„ í–¥í–ˆë‹¤ë©´, 그런 ìŠ¤í† ì–´ - 오í¼ë ˆì´ì…˜ë“¤ì´ 만들어내는 결과가 주소 ì˜ì¡´ì„± 배리어 ë’¤ì˜ ë¡œë“œ - 오í¼ë ˆì´ì…˜ë“¤ì—게는 ë³´ì¼ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - ì´ ìˆœì„œ 세우기 ì œì•½ì— ëŒ€í•œ ê·¸ë¦¼ì„ ë³´ê¸° ìœ„í•´ì„ "메모리 배리어 ì‹œí€€ìŠ¤ì˜ ì˜ˆ" - ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤. - - [!] 첫번째 로드는 반드시 _주소_ ì˜ì¡´ì„±ì„ ê°€ì ¸ì•¼ì§€ 컨트롤 ì˜ì¡´ì„±ì„ ê°€ì ¸ì•¼ - 하는게 ì•„ë‹˜ì„ ì•Œì•„ë‘ì‹ì‹œì˜¤. 만약 ë‘번째 로드를 위한 주소가 첫번째 ë¡œë“œì— - ì˜ì¡´ì ì´ì§€ë§Œ ê·¸ ì˜ì¡´ì„±ì€ ì¡°ê±´ì ì´ì§€ ê·¸ 주소 ìžì²´ë¥¼ ê°€ì ¸ì˜¤ëŠ”ê²Œ 아니ë¼ë©´, - ê·¸ê²ƒì€ _컨트롤_ ì˜ì¡´ì„±ì´ê³ , ì´ ê²½ìš°ì—는 ì½ê¸° 배리어나 그보다 ê°•ë ¥í•œ - 무언가가 필요합니다. ë” ìžì„¸í•œ ë‚´ìš©ì„ ìœ„í•´ì„œëŠ” "컨트롤 ì˜ì¡´ì„±" ì„œë¸Œì„¹ì…˜ì„ - ì°¸ê³ í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤. - - [!] 주소 ì˜ì¡´ì„± 배리어는 보통 쓰기 배리어들과 함께 ì§ì„ 맞춰 사용ë˜ì–´ì•¼ - 합니다; "SMP 배리어 ì§ë§žì¶”기" ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - [!] ì»¤ë„ v5.9 릴리즈ì—ì„œ 명시ì 주소 ì˜ì¡´ì„± 배리어를 위한 ì»¤ë„ API ë“¤ì´ - ì‚ì œë˜ì—ˆìŠµë‹ˆë‹¤. ì˜¤ëŠ˜ë‚ ì—는 ê³µìœ ëœ ë³€ìˆ˜ë“¤ì˜ ë¡œë“œë¥¼ 표시하는 READ_ONCE() 나 - rcu_dereference() 와 ê°™ì€ API ë“¤ì€ ë¬µì‹œì 으로 주소 ì˜ì¡´ì„± 배리어를 ì œê³µí•©ë‹ˆë‹¤. - - - (3) ì½ê¸° (ë˜ëŠ” 로드) 메모리 배리어. - - ì½ê¸° 배리어는 주소 ì˜ì¡´ì„± 배리어 ê¸°ëŠ¥ì˜ ë³´ìž¥ì‚¬í•ì— ë”í•´ì„œ 배리어보다 ì•žì„œ - ëª…ì‹œëœ ëª¨ë“ LOAD 오í¼ë ˆì´ì…˜ë“¤ì´ 배리어 ë’¤ì— ëª…ì‹œë˜ëŠ” ëª¨ë“ LOAD - 오í¼ë ˆì´ì…˜ë“¤ë³´ë‹¤ ë¨¼ì € 행해진 것으로 ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ ì»´í¬ë„ŒíŠ¸ë“¤ì— 보여질 ê²ƒì„ - 보장합니다. - - ì½ê¸° 배리어는 로드 오í¼ë ˆì´ì…˜ì— 행해지는 부분ì 순서 세우기입니다; ìŠ¤í† ì–´ - 오í¼ë ˆì´ì…˜ì— 대해서는 ì–´ë–¤ ì˜í–¥ë„ ë¼ì¹˜ì§€ 않습니다. - - ì½ê¸° 메모리 배리어는 주소 ì˜ì¡´ì„± 배리어를 내장하므로 주소 ì˜ì¡´ì„± 배리어를 - ëŒ€ì‹ í• ìˆ˜ 있습니다. - - [!] ì½ê¸° 배리어는 ì¼ë°˜ì 으로 쓰기 배리어들과 함께 ì§ì„ 맞춰 사용ë˜ì–´ì•¼ - 합니다; "SMP 배리어 ì§ë§žì¶”기" ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - - (4) 범용 메모리 배리어. - - 범용(general) 메모리 배리어는 배리어보다 ì•žì„œ ëª…ì‹œëœ ëª¨ë“ LOAD 와 STORE - 오í¼ë ˆì´ì…˜ë“¤ì´ 배리어 ë’¤ì— ëª…ì‹œëœ ëª¨ë“ LOAD 와 STORE 오í¼ë ˆì´ì…˜ë“¤ë³´ë‹¤ - ë¨¼ì € ìˆ˜í–‰ëœ ê²ƒìœ¼ë¡œ ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ ì»´í¬ë„ŒíŠ¸ë“¤ì— ë³´ì´ê²Œ ë¨ì„ 보장합니다. - - 범용 메모리 배리어는 로드와 ìŠ¤í† ì–´ 모ë‘ì— ëŒ€í•œ 부분ì 순서 세우기입니다. - - 범용 메모리 배리어는 ì½ê¸° 메모리 배리어, 쓰기 메모리 배리어 모ë‘를 - 내장하므로, ë‘ ë°°ë¦¬ì–´ë¥¼ ëª¨ë‘ ëŒ€ì‹ í• ìˆ˜ 있습니다. - - -ê·¸ë¦¬ê³ ë‘ê°œì˜ ëª…ì‹œì ì´ì§€ ì•Šì€ íƒ€ìž…ì´ ìžˆìŠµë‹ˆë‹¤: - - (5) ACQUIRE 오í¼ë ˆì´ì…˜. - - ì´ íƒ€ìž…ì˜ ì˜¤í¼ë ˆì´ì…˜ì€ ë‹¨ë°©í–¥ì˜ íˆ¬ê³¼ì„± 배리어처럼 ë™ìž‘합니다. ACQUIRE - 오í¼ë ˆì´ì…˜ ë’¤ì˜ ëª¨ë“ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì´ ACQUIRE 오í¼ë ˆì´ì…˜ í›„ì— - ì¼ì–´ë‚œ 것으로 ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ ì»´í¬ë„ŒíŠ¸ë“¤ì— ë³´ì´ê²Œ ë ê²ƒì´ ë³´ìž¥ë©ë‹ˆë‹¤. - LOCK 오í¼ë ˆì´ì…˜ê³¼ smp_load_acquire(), smp_cond_load_acquire() 오í¼ë ˆì´ì…˜ë„ - ACQUIRE 오í¼ë ˆì´ì…˜ì— í¬í•¨ë©ë‹ˆë‹¤. - - ACQUIRE 오í¼ë ˆì´ì…˜ ì•žì˜ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì€ ACQUIRE 오í¼ë ˆì´ì…˜ 완료 í›„ì— - ìˆ˜í–‰ëœ ê²ƒì²˜ëŸ¼ ë³´ì¼ ìˆ˜ 있습니다. - - ACQUIRE 오í¼ë ˆì´ì…˜ì€ ê±°ì˜ í•ìƒ RELEASE 오í¼ë ˆì´ì…˜ê³¼ ì§ì„ 지어 사용ë˜ì–´ì•¼ - 합니다. - - - (6) RELEASE 오í¼ë ˆì´ì…˜. - - ì´ íƒ€ìž…ì˜ ì˜¤í¼ë ˆì´ì…˜ë“¤ë„ 단방향 투과성 배리어처럼 ë™ìž‘합니다. RELEASE - 오í¼ë ˆì´ì…˜ ì•žì˜ ëª¨ë“ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì€ RELEASE 오í¼ë ˆì´ì…˜ ì „ì— ì™„ë£Œëœ - 것으로 ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ ì»´í¬ë„ŒíŠ¸ë“¤ì— 보여질 ê²ƒì´ ë³´ìž¥ë©ë‹ˆë‹¤. UNLOCK ë¥˜ì˜ - 오í¼ë ˆì´ì…˜ë“¤ê³¼ smp_store_release() 오í¼ë ˆì´ì…˜ë„ RELEASE 오í¼ë ˆì´ì…˜ì˜ - ì¼ì¢…입니다. - - RELEASE 오í¼ë ˆì´ì…˜ ë’¤ì˜ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì€ RELEASE 오í¼ë ˆì´ì…˜ì´ - 완료ë˜ê¸° ì „ì— í–‰í•´ì§„ 것처럼 ë³´ì¼ ìˆ˜ 있습니다. - - ACQUIRE 와 RELEASE 오í¼ë ˆì´ì…˜ì˜ ì‚¬ìš©ì€ ì¼ë°˜ì 으로 다른 메모리 ë°°ë¦¬ì–´ì˜ - í•„ìš”ì„±ì„ ì—†ì•±ë‹ˆë‹¤. ë˜í•œ, RELEASE+ACQUIRE ì¡°í•©ì€ ë²”ìš© 메모리 배리어처럼 - ë™ìž‘í• ê²ƒì„ ë³´ìž¥í•˜ì§€ -않습니다-. 하지만, ì–´ë–¤ ë³€ìˆ˜ì— ëŒ€í•œ RELEASE - 오í¼ë ˆì´ì…˜ì„ 앞서는 메모리 ì•¡ì„¸ìŠ¤ë“¤ì˜ ìˆ˜í–‰ 결과는 ì´ RELEASE 오í¼ë ˆì´ì…˜ì„ - ë’¤ì´ì–´ ê°™ì€ ë³€ìˆ˜ì— ëŒ€í•´ ìˆ˜í–‰ëœ ACQUIRE 오í¼ë ˆì´ì…˜ì„ 뒤따르는 메모리 - 액세스ì—는 보여질 ê²ƒì´ ë³´ìž¥ë©ë‹ˆë‹¤. 다르게 ë§í•˜ìžë©´, 주어진 ë³€ìˆ˜ì˜ - í¬ë¦¬í‹°ì»¬ 섹션ì—서는, 해당 ë³€ìˆ˜ì— ëŒ€í•œ ì•žì˜ í¬ë¦¬í‹°ì»¬ 섹션ì—ì„œì˜ ëª¨ë“ - ì•¡ì„¸ìŠ¤ë“¤ì´ ì™„ë£Œë˜ì—ˆì„ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 즉, ACQUIRE 는 ìµœì†Œí•œì˜ "ì·¨ë“" ë™ìž‘처럼, ê·¸ë¦¬ê³ RELEASE 는 ìµœì†Œí•œì˜ "공개" - 처럼 ë™ìž‘한다는 ì˜ë¯¸ìž…니다. - -atomic_t.txt ì— ì„¤ëª…ëœ ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜ë“¤ 중 ì¼ë¶€ëŠ” ì™„ì „ížˆ 순서잡힌 것들과 -(배리어를 사용하지 않는) ì™„í™”ëœ ìˆœì„œì˜ ê²ƒë“¤ ì™¸ì— ACQUIRE 와 RELEASE ë¶€ë¥˜ì˜ -ê²ƒë“¤ë„ ì¡´ìž¬í•©ë‹ˆë‹¤. 로드와 ìŠ¤í† ì–´ë¥¼ ëª¨ë‘ ìˆ˜í–‰í•˜ëŠ” ì¡°í•©ëœ ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜ì—ì„œ, -ACQUIRE 는 해당 오í¼ë ˆì´ì…˜ì˜ 로드 부분ì—만 ì ìš©ë˜ê³ RELEASE 는 해당 -오í¼ë ˆì´ì…˜ì˜ ìŠ¤í† ì–´ 부분ì—만 ì ìš©ë©ë‹ˆë‹¤. - -메모리 ë°°ë¦¬ì–´ë“¤ì€ ë‘ CPU ê°„, ë˜ëŠ” CPU 와 디바ì´ìŠ¤ ê°„ì— ìƒí˜¸ìž‘ìš©ì˜ ê°€ëŠ¥ì„±ì´ ìžˆì„ -ë•Œì—만 필요합니다. 만약 ì–´ë–¤ ì½”ë“œì— ê·¸ëŸ° ìƒí˜¸ìž‘ìš©ì´ ì—†ì„ ê²ƒì´ ë³´ìž¥ëœë‹¤ë©´, 해당 -코드ì—서는 메모리 배리어를 ì‚¬ìš©í• í•„ìš”ê°€ 없습니다. - - -ì´ê²ƒë“¤ì€ _최소한ì˜_ 보장사í•ë“¤ìž„ì„ ì•Œì•„ë‘세요. 다른 아키í…ì³ì—서는 ë” ê°•ë ¥í•œ -보장사í•ì„ ì œê³µí• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤ë§Œ, 그런 보장사í•ì€ 아키í…ì³ ì¢…ì†ì 코드 ì´ì™¸ì˜ -부분ì—서는 ì‹ ë¢°ë˜ì§€ _ì•Šì„_ ê²ë‹ˆë‹¤. - - -메모리 ë°°ë¦¬ì–´ì— ëŒ€í•´ ê°€ì •í•´ì„ ì•ˆë 것 -------------------------------------- - -리눅스 ì»¤ë„ ë©”ëª¨ë¦¬ ë°°ë¦¬ì–´ë“¤ì´ ë³´ìž¥í•˜ì§€ 않는 ê²ƒë“¤ì´ ìžˆìŠµë‹ˆë‹¤: - - (*) 메모리 배리어 ì•žì—ì„œ ëª…ì‹œëœ ì–´ë–¤ 메모리 ì•¡ì„¸ìŠ¤ë„ ë©”ëª¨ë¦¬ 배리어 ëª…ë ¹ì˜ ìˆ˜í–‰ - 완료 ì‹œì 까지 _완료_ ë 것ì´ëž€ ë³´ìž¥ì€ ì—†ìŠµë‹ˆë‹¤; 배리어가 하는 ì¼ì€ CPU ì˜ - 액세스 íì— íŠ¹ì • íƒ€ìž…ì˜ ì•¡ì„¸ìŠ¤ë“¤ì€ ë„˜ì„ ìˆ˜ 없는 ì„ ì„ ê¸‹ëŠ” 것으로 ìƒê°ë 수 - 있습니다. - - (*) í•œ CPU ì—ì„œ 메모리 배리어를 수행하는게 ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ CPU 나 í•˜ë“œì›¨ì–´ì— - ì–´ë–¤ ì§ì ‘ì ì¸ ì˜í–¥ì„ ë¼ì¹œë‹¤ëŠ” ë³´ìž¥ì€ ì¡´ìž¬í•˜ì§€ 않습니다. 배리어 ìˆ˜í–‰ì´ - 만드는 ê°„ì ‘ì ì˜í–¥ì€ ë‘번째 CPU ê°€ 첫번째 CPU ì˜ ì•¡ì„¸ìŠ¤ë“¤ì˜ ê²°ê³¼ë¥¼ - ë°”ë¼ë³´ëŠ” 순서가 ë©ë‹ˆë‹¤ë§Œ, ë‹¤ìŒ í•ëª©ì„ 보세요: - - (*) 첫번째 CPU ê°€ ë‘번째 CPU ì˜ ë©”ëª¨ë¦¬ ì•¡ì„¸ìŠ¤ë“¤ì˜ ê²°ê³¼ë¥¼ ë°”ë¼ë³¼ ë•Œ, _ì„¤ë ¹_ - ë‘번째 CPU ê°€ 메모리 배리어를 사용한다 í•´ë„, 첫번째 CPU _ë˜í•œ_ ê·¸ì— ë§žëŠ” - 메모리 배리어를 사용하지 않는다면 ("SMP 배리어 ì§ë§žì¶”기" ì„œë¸Œì„¹ì…˜ì„ - ì°¸ê³ í•˜ì„¸ìš”) ê·¸ 결과가 올바른 순서로 보여진다는 ë³´ìž¥ì€ ì—†ìŠµë‹ˆë‹¤. - - (*) CPU ë°”ê¹¥ì˜ í•˜ë“œì›¨ì–´[*] ê°€ 메모리 ì•¡ì„¸ìŠ¤ë“¤ì˜ ìˆœì„œë¥¼ 바꾸지 않는다는 ë³´ìž¥ì€ - 존재하지 않습니다. CPU ìºì‹œ ì¼ê´€ì„± ë©”ì»¤ë‹ˆì¦˜ì€ ë©”ëª¨ë¦¬ ë°°ë¦¬ì–´ì˜ ê°„ì ‘ì - ì˜í–¥ì„ CPU 사ì´ì— ì „íŒŒí•˜ê¸´ 하지만, 순서대로 ì „íŒŒí•˜ì§€ëŠ” ì•Šì„ ìˆ˜ 있습니다. - - [*] 버스 ë§ˆìŠ¤í„°ë§ DMA 와 ì¼ê´€ì„±ì— 대해서는 다ìŒì„ ì°¸ê³ í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤: - - Documentation/driver-api/pci/pci.rst - Documentation/core-api/dma-api-howto.rst - Documentation/core-api/dma-api.rst - - -주소 ì˜ì¡´ì„± 배리어 (ì—사ì ) ---------------------------- - -리눅스 ì»¤ë„ v4.15 기준으로, smp_mb() ê°€ DEC Alpha ìš© READ_ONCE() ì½”ë“œì— -추가ë˜ì—ˆëŠ”ë°, ì´ëŠ” ì´ ì„¹ì…˜ì— ì£¼ì˜ë¥¼ 기울여야 하는 ì‚¬ëžŒë“¤ì€ DEC Alpha 아키í…ì³ -ì „ìš© 코드를 만드는 사람들과 READ_ONCE() ìžì²´ë¥¼ 만드는 사람들 ë¿ìž„ì„ ì˜ë¯¸í•©ë‹ˆë‹¤. -그런 ë¶„ë“¤ì„ ìœ„í•´, ê·¸ë¦¬ê³ ì—ì‚¬ì— ê´€ì‹¬ 있는 ë¶„ë“¤ì„ ìœ„í•´, 여기 주소 ì˜ì¡´ì„± -ë°°ë¦¬ì–´ì— ëŒ€í•œ ì´ì•¼ê¸°ë¥¼ ì 습니다. - -[!] 주소 ì˜ì¡´ì„±ì€ 로드ì—ì„œ 로드로와 로드ì—ì„œ ìŠ¤í† ì–´ë¡œì˜ ê´€ê³„ë“¤ 모ë‘ì—ì„œ -나타나지만, 주소 ì˜ì¡´ì„± 배리어는 로드ì—ì„œ ìŠ¤í† ì–´ë¡œì˜ ìƒí™©ì—서는 필요하지 -않습니다. - -주소 ì˜ì¡´ì„± ë°°ë¦¬ì–´ì˜ ì‚¬ìš©ì— ìžˆì–´ 지켜야 하는 사í•ë“¤ì€ 약간 ë¯¸ë¬˜í•˜ê³ , ë°ì´í„° -ì˜ì¡´ì„± 배리어가 사용ë˜ì–´ì•¼ 하는 ìƒí™©ë„ í•ìƒ 명백하지는 않습니다. ì„¤ëª…ì„ ìœ„í•´ -다ìŒì˜ ì´ë²¤íŠ¸ 시퀀스를 ìƒê°í•´ 봅시다: - - CPU 1 CPU 2 - =============== =============== - { A == 1, B == 2, C == 3, P == &A, Q == &C } - B = 4; - <쓰기 배리어> - WRITE_ONCE(P, &B) - Q = READ_ONCE_OLD(P); - D = *Q; - -[!] READ_ONCE_OLD() 는 4.15 ì»¤ë„ ì „ì˜ ë²„ì „ì—ì„œì˜, 주소 ì˜ì¡´ì„± 배리어를 ë‚´í¬í•˜ì§€ -않는 READ_ONCE() ì— í•´ë‹¹í•©ë‹ˆë‹¤. - -여기엔 분명한 주소 ì˜ì¡´ì„±ì´ 존재하므로, ì´ ì‹œí€€ìŠ¤ê°€ ëë‚¬ì„ ë•Œ Q 는 &A ë˜ëŠ” &B -ì¼ ê²ƒì´ê³ , ë”°ë¼ì„œ: - - (Q == &A) 는 (D == 1) 를, - (Q == &B) 는 (D == 4) 를 ì˜ë¯¸í•©ë‹ˆë‹¤. - -하지만! CPU 2 는 B ì˜ ì—…ë°ì´íŠ¸ë¥¼ ì¸ì‹í•˜ê¸° ì „ì— P ì˜ ì—…ë°ì´íŠ¸ë¥¼ ì¸ì‹í• 수 ìžˆê³ , -ë”°ë¼ì„œ 다ìŒì˜ 결과가 가능합니다: - - (Q == &B) and (D == 2) ???? - -ì´ëŸ° 결과는 ì¼ê´€ì„±ì´ë‚˜ ì¸ê³¼ 관계 ìœ ì§€ê°€ 실패한 것처럼 ë³´ì¼ ìˆ˜ë„ ìžˆê² ì§€ë§Œ, -ê·¸ë ‡ì§€ 않습니다, ê·¸ë¦¬ê³ ì´ í˜„ìƒì€ (DEC Alpha 와 ê°™ì€) 여러 CPU ì—ì„œ ì‹¤ì œë¡œ -발견ë 수 있습니다. - -ì´ ë¬¸ì œ ìƒí™©ì„ ì œëŒ€ë¡œ 해결하기 위해, READ_ONCE() 는 ì»¤ë„ v4.15 릴리즈 부터 -묵시ì 주소 ì˜ì¡´ì„± 배리어를 ì œê³µí•©ë‹ˆë‹¤: - - CPU 1 CPU 2 - =============== =============== - { A == 1, B == 2, C == 3, P == &A, Q == &C } - B = 4; - <쓰기 배리어> - WRITE_ONCE(P, &B); - Q = READ_ONCE(P); - <묵시ì 주소 ì˜ì¡´ì„± 배리어> - D = *Q; - -ì´ ë³€ê²½ì€ ì•žì˜ ì²˜ìŒ ë‘가지 ê²°ê³¼ 중 í•˜ë‚˜ë§Œì´ ë°œìƒí• 수 ìžˆê³ , ì„¸ë²ˆì§¸ì˜ ê²°ê³¼ëŠ” -ë°œìƒí• 수 ì—†ë„ë¡ í•©ë‹ˆë‹¤. - - -[!] ì´ ìƒë‹¹ížˆ ë°˜ì§ê´€ì ì¸ ìƒí™©ì€ ë¶„ë¦¬ëœ ìºì‹œë¥¼ 가지는 기계들ì—ì„œ 가장 잘 -ë°œìƒí•˜ëŠ”ë°, 예를 들면 í•œ ìºì‹œ ë±…í¬ëŠ” ì§ìˆ˜ ë²ˆí˜¸ì˜ ìºì‹œ ë¼ì¸ë“¤ì„ ì²˜ë¦¬í•˜ê³ , 다른 -ë±…í¬ëŠ” 홀수 ë²ˆí˜¸ì˜ ìºì‹œ ë¼ì¸ë“¤ì„ 처리하는 ê²½ìš°ìž„ì„ ì•Œì•„ë‘시기 ë°”ëžë‹ˆë‹¤. í¬ì¸í„° -P 는 ì§ìˆ˜ 번호 ìºì‹œ ë¼ì¸ì— ì €ìž¥ë˜ì–´ ìžˆê³ , 변수 B 는 홀수 번호 ìºì‹œ ë¼ì¸ì— -ì €ìž¥ë˜ì–´ ìžˆì„ ìˆ˜ 있습니다. 여기서 ê°’ì„ ì½ì–´ì˜¤ëŠ” CPU ì˜ ìºì‹œì˜ 홀수 번호 처리 -ë±…í¬ëŠ” 열심히 ì¼ê°ì„ ì²˜ë¦¬ì¤‘ì¸ ë°˜ë©´ 홀수 번호 처리 ë±…í¬ëŠ” í• ì¼ ì—†ì´ í•œê°€í•œ -중ì´ë¼ë©´ í¬ì¸í„° P (&B) ì˜ ìƒˆë¡œìš´ ê°’ê³¼ 변수 B ì˜ ê¸°ì¡´ ê°’ (2) 를 ë³¼ 수 있습니다. - - -ì˜ì¡´ì ì“°ê¸°ë“¤ì˜ ìˆœì„œë¥¼ 맞추는ë°ì—는 주소 ì˜ì¡´ì„± 배리어가 필요치 ì•Šì€ë°, ì´ëŠ” -리눅스 커ë„ì´ ì§€ì›í•˜ëŠ” CPU ë“¤ì€ (1) 쓰기가 ì •ë§ë¡œ ì¼ì–´ë‚ 지, (2) 쓰기가 ì–´ë””ì— -ì´ë£¨ì–´ì§ˆì§€, ê·¸ë¦¬ê³ (3) 쓰여질 ê°’ì„ í™•ì‹¤ížˆ 알기 ì „ê¹Œì§€ëŠ” 쓰기를 수행하지 않기 -때문입니다. 하지만 "컨트롤 ì˜ì¡´ì„±" 섹션과 -Documentation/RCU/rcu_dereference.rst 파ì¼ì„ ì£¼ì˜ ê¹Šê²Œ ì½ì–´ 주시기 ë°”ëžë‹ˆë‹¤: -컴파ì¼ëŸ¬ëŠ” 매우 ì°½ì˜ì ì¸ ë§Žì€ ë°©ë²•ìœ¼ë¡œ 종ì†ì„±ì„ ê¹° 수 있습니다. - - CPU 1 CPU 2 - =============== =============== - { A == 1, B == 2, C = 3, P == &A, Q == &C } - B = 4; - <쓰기 배리어> - WRITE_ONCE(P, &B); - Q = READ_ONCE_OLD(P); - WRITE_ONCE(*Q, 5); - -ë”°ë¼ì„œ, Q ë¡œì˜ ì½ê¸°ì™€ *Q ë¡œì˜ ì“°ê¸° 사ì´ì—는 주소 ì˜ì¡´ì„± 배리어가 필요치 -않습니다. 달리 ë§í•˜ë©´, ì˜¤ëŠ˜ë‚ ì˜ READ_ONCE() ì˜ ë¬µì‹œì 주소 ì˜ì¡´ì„± 배리어가 -ì—†ë”ë¼ë„ ë‹¤ìŒ ê²°ê³¼ëŠ” ìƒê¸°ì§€ 않습니다: - - (Q == &B) && (B == 4) - -ì´ëŸ° íŒ¨í„´ì€ ë“œë¬¼ê²Œ 사용ë˜ì–´ì•¼ í•¨ì„ ì•Œì•„ ë‘시기 ë°”ëžë‹ˆë‹¤. 무엇보다ë„, ì˜ì¡´ì„± -순서 ê·œì¹™ì˜ ì˜ë„는 쓰기 ìž‘ì—…ì„ -예방- í•´ì„œ 그로 ì¸í•´ ë°œìƒí•˜ëŠ” 비싼 ìºì‹œ ë¯¸ìŠ¤ë„ -ì—†ì• ë ¤ëŠ” 것입니다. ì´ íŒ¨í„´ì€ ë“œë¬¼ê²Œ ë°œìƒí•˜ëŠ” ì—러 ì¡°ê±´ ê°™ì€ê²ƒë“¤ì„ 기ë¡í•˜ëŠ”ë° -사용ë 수 있으며, CPUì˜ ìžì—°ì ì¸ ìˆœì„œ ë³´ìž¥ì´ ê·¸ëŸ° 기ë¡ë“¤ì„ 사ë¼ì§€ì§€ 않게 -í•´ì¤ë‹ˆë‹¤. - - -주소 ì˜ì¡´ì„±ì— ì˜í•´ ì œê³µë˜ëŠ” ì´ ìˆœì„œê·œì¹™ì€ ì´ë¥¼ í¬í•¨í•˜ê³ 있는 CPU ì— -지ì—ì ìž„ì„ ì•Œì•„ë‘시기 ë°”ëžë‹ˆë‹¤. ë” ë§Žì€ ì •ë³´ë¥¼ ìœ„í•´ì„ "Multicopy ì›ìžì„±" -ì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - -주소 ì˜ì¡´ì„± 배리어는 매우 중요한ë°, 예를 들어 RCU 시스템ì—ì„œ ê·¸ë ‡ìŠµë‹ˆë‹¤. -include/linux/rcupdate.h ì˜ rcu_assign_pointer() 와 rcu_dereference() 를 -ì°¸ê³ í•˜ì„¸ìš”. ì´ê²ƒë“¤ì€ RCU ë¡œ 관리ë˜ëŠ” í¬ì¸í„°ì˜ íƒ€ê²Ÿì„ í˜„ìž¬ 타겟ì—ì„œ ìˆ˜ì •ëœ -새로운 타겟으로 바꾸는 ìž‘ì—…ì—ì„œ 새로 ìˆ˜ì •ëœ íƒ€ê²Ÿì´ ì´ˆê¸°í™”ê°€ 완료ë˜ì§€ ì•Šì€ ì±„ë¡œ -보여지는 ì¼ì´ ì¼ì–´ë‚˜ì§€ 않게 í•´ì¤ë‹ˆë‹¤. - -ë” ë§Žì€ ì˜ˆë¥¼ ìœ„í•´ì„ "ìºì‹œ ì¼ê´€ì„±" ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - -컨트롤 ì˜ì¡´ì„± -------------- - -í˜„ìž¬ì˜ ì»´íŒŒì¼ëŸ¬ë“¤ì€ 컨트롤 ì˜ì¡´ì„±ì„ ì´í•´í•˜ê³ 있지 않기 ë•Œë¬¸ì— ì»¨íŠ¸ë¡¤ ì˜ì¡´ì„±ì€ -약간 다루기 ì–´ë ¤ìš¸ 수 있습니다. ì´ ì„¹ì…˜ì˜ ëª©ì ì€ ì—¬ëŸ¬ë¶„ì´ ì»´íŒŒì¼ëŸ¬ì˜ 무시로 -ì¸í•´ ì—¬ëŸ¬ë¶„ì˜ ì½”ë“œê°€ ë§ê°€ì§€ëŠ” 걸 ë§‰ì„ ìˆ˜ 있ë„ë¡ ë•ëŠ”ê²ë‹ˆë‹¤. - -로드-로드 컨트롤 ì˜ì¡´ì„±ì€ (묵시ì ì¸) 주소 ì˜ì¡´ì„± 배리어만으로는 ì •í™•ížˆ ë™ìž‘í• -수가 없어서 ì½ê¸° 메모리 배리어를 필요로 합니다. ì•„ëž˜ì˜ ì½”ë“œë¥¼ 봅시다: - - q = READ_ONCE(a); - <묵시ì 주소 ì˜ì¡´ì„± 배리어> - if (q) { - /* BUG: No address dependency!!! */ - p = READ_ONCE(b); - } - -ì´ ì½”ë“œëŠ” ì›í•˜ëŠ” ëŒ€ë¡œì˜ íš¨ê³¼ë¥¼ 내지 ëª»í• ìˆ˜ 있는ë°, ì´ ì½”ë“œì—는 주소 ì˜ì¡´ì„±ì´ -ì•„ë‹ˆë¼ ì»¨íŠ¸ë¡¤ ì˜ì¡´ì„±ì´ 존재하기 때문으로, ì´ëŸ° ìƒí™©ì—ì„œ CPU 는 실행 ì†ë„를 ë” -ë¹ ë¥´ê²Œ 하기 위해 분기 ì¡°ê±´ì˜ ê²°ê³¼ë¥¼ ì˜ˆì¸¡í•˜ê³ ì½”ë“œë¥¼ 재배치 í• ìˆ˜ 있어서 다른 -CPU 는 b ë¡œë¶€í„°ì˜ ë¡œë“œ 오í¼ë ˆì´ì…˜ì´ a ë¡œë¶€í„°ì˜ ë¡œë“œ 오í¼ë ˆì´ì…˜ë³´ë‹¤ ë¨¼ì € ë°œìƒí•œ -걸로 ì¸ì‹í• 수 있습니다. ì—¬ê¸°ì— ì •ë§ë¡œ í•„ìš”í–ˆë˜ ê±´ 다ìŒê³¼ 같습니다: - - q = READ_ONCE(a); - if (q) { - <ì½ê¸° 배리어> - p = READ_ONCE(b); - } - -하지만, ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ì€ 예측ì 으로 수행ë˜ì§€ 않습니다. 즉, ë‹¤ìŒ ì˜ˆì—서와 -ê°™ì´ ë¡œë“œ-ìŠ¤í† ì–´ 컨트롤 ì˜ì¡´ì„±ì´ 존재하는 경우ì—는 순서가 -지켜진다-는 -ì˜ë¯¸ìž…니다. - - q = READ_ONCE(a); - if (q) { - WRITE_ONCE(b, 1); - } - -컨트롤 ì˜ì¡´ì„±ì€ 보통 다른 íƒ€ìž…ì˜ ë°°ë¦¬ì–´ë“¤ê³¼ ì§ì„ 맞춰 사용ë©ë‹ˆë‹¤. ê·¸ë ‡ë‹¤ê³¤ -하나, READ_ONCE() ë„ WRITE_ONCE() ë„ ì„ íƒì‚¬í•ì´ ì•„ë‹ˆë¼ í•„ìˆ˜ì‚¬í•ìž„ì„ ë¶€ë”” -명심하세요! READ_ONCE() ê°€ 없다면, 컴파ì¼ëŸ¬ëŠ” 'a' ë¡œë¶€í„°ì˜ ë¡œë“œë¥¼ 'a' ë¡œë¶€í„°ì˜ -ë˜ë‹¤ë¥¸ 로드와 ì¡°í•©í• ìˆ˜ 있습니다. WRITE_ONCE() ê°€ 없다면, 컴파ì¼ëŸ¬ëŠ” 'b' ë¡œì˜ -ìŠ¤í† ì–´ë¥¼ 'b' ë¡œì˜ ë˜ë¼ëŠ ìŠ¤í† ì–´ë“¤ê³¼ ì¡°í•©í• ìˆ˜ 있습니다. ë‘ ê²½ìš° ëª¨ë‘ ìˆœì„œì— -있어 ìƒë‹¹ížˆ 비ì§ê´€ì ì¸ ê²°ê³¼ë¥¼ ì´ˆëž˜í• ìˆ˜ 있습니다. - -ì´ê±¸ë¡œ ëì´ ì•„ë‹Œê²Œ, 컴파ì¼ëŸ¬ê°€ 변수 'a' ì˜ ê°’ì´ í•ìƒ 0ì´ ì•„ë‹ˆë¼ê³ ì¦ëª…í• ìˆ˜ -있다면, ì•žì˜ ì˜ˆì—ì„œ "if" ë¬¸ì„ ì—†ì• ì„œ 다ìŒê³¼ ê°™ì´ ìµœì í™” í• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤: - - q = a; - b = 1; /* BUG: Compiler and CPU can both reorder!!! */ - -그러니 READ_ONCE() 를 반드시 사용하세요. - -다ìŒê³¼ ê°™ì´ "if" ë¬¸ì˜ ì–‘ê°ˆëž˜ ë¸Œëžœì¹˜ì— ëª¨ë‘ ì¡´ìž¬í•˜ëŠ” ë™ì¼í•œ ìŠ¤í† ì–´ì— ëŒ€í•´ 순서를 -ê°•ì œí•˜ê³ ì‹¶ì€ ê²½ìš°ê°€ ìžˆì„ ìˆ˜ 있습니다: - - q = READ_ONCE(a); - if (q) { - barrier(); - WRITE_ONCE(b, 1); - do_something(); - } else { - barrier(); - WRITE_ONCE(b, 1); - do_something_else(); - } - -안타ê¹ê²Œë„, í˜„ìž¬ì˜ ì»´íŒŒì¼ëŸ¬ë“¤ì€ ë†’ì€ ìµœì í™” ë ˆë²¨ì—서는 ì´ê±¸ 다ìŒê³¼ ê°™ì´ -바꿔버립니다: - - q = READ_ONCE(a); - barrier(); - WRITE_ONCE(b, 1); /* BUG: No ordering vs. load from a!!! */ - if (q) { - /* WRITE_ONCE(b, 1); -- moved up, BUG!!! */ - do_something(); - } else { - /* WRITE_ONCE(b, 1); -- moved up, BUG!!! */ - do_something_else(); - } - -ì´ì œ 'a' ì—ì„œì˜ ë¡œë“œì™€ 'b' ë¡œì˜ ìŠ¤í† ì–´ 사ì´ì—는 ì¡°ê±´ì 관계가 없기 ë•Œë¬¸ì— CPU -는 ì´ë“¤ì˜ 순서를 바꿀 수 있게 ë©ë‹ˆë‹¤: ì´ëŸ° ê²½ìš°ì— ì¡°ê±´ì 관계는 반드시 -필요한ë°, ëª¨ë“ ì»´íŒŒì¼ëŸ¬ 최ì 화가 ì´ë£¨ì–´ì§€ê³ ë‚œ í›„ì˜ ì–´ì…ˆë¸”ë¦¬ 코드ì—ì„œë„ -마찬가지입니다. ë”°ë¼ì„œ, ì´ ì˜ˆì—ì„œ 순서를 지키기 위해서는 smp_store_release() -와 ê°™ì€ ëª…ì‹œì 메모리 배리어가 필요합니다: - - q = READ_ONCE(a); - if (q) { - smp_store_release(&b, 1); - do_something(); - } else { - smp_store_release(&b, 1); - do_something_else(); - } - -ë°˜ë©´ì— ëª…ì‹œì 메모리 배리어가 없다면, ì´ëŸ° ê²½ìš°ì˜ ìˆœì„œëŠ” ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì´ -서로 다를 ë•Œì—만 보장ë˜ëŠ”ë°, 예를 들면 다ìŒê³¼ ê°™ì€ ê²½ìš°ìž…ë‹ˆë‹¤: - - q = READ_ONCE(a); - if (q) { - WRITE_ONCE(b, 1); - do_something(); - } else { - WRITE_ONCE(b, 2); - do_something_else(); - } - -처ìŒì˜ READ_ONCE() 는 컴파ì¼ëŸ¬ê°€ 'a' ì˜ ê°’ì„ ì¦ëª…해내는 ê²ƒì„ ë§‰ê¸° 위해 ì—¬ì „ížˆ -필요합니다. - -ë˜í•œ, 로컬 변수 'q' 를 ê°€ì§€ê³ í•˜ëŠ” ì¼ì— 대해 주ì˜í•´ì•¼ 하는ë°, 그러지 않으면 -컴파ì¼ëŸ¬ëŠ” ê·¸ ê°’ì„ ì¶”ì¸¡í•˜ê³ ë˜ë‹¤ì‹œ 필요한 조건관계를 ì—†ì• ë²„ë¦´ 수 있습니다. -예를 들면: - - q = READ_ONCE(a); - if (q % MAX) { - WRITE_ONCE(b, 1); - do_something(); - } else { - WRITE_ONCE(b, 2); - do_something_else(); - } - -만약 MAX ê°€ 1 ë¡œ ì •ì˜ëœ ìƒìˆ˜ë¼ë©´, 컴파ì¼ëŸ¬ëŠ” (q % MAX) 는 0ì´ëž€ ê²ƒì„ ì•Œì•„ì±„ê³ , -ìœ„ì˜ ì½”ë“œë¥¼ 아래와 ê°™ì´ ë°”ê¿”ë²„ë¦´ 수 있습니다: - - q = READ_ONCE(a); - WRITE_ONCE(b, 2); - do_something_else(); - -ì´ë ‡ê²Œ ë˜ë©´, CPU 는 변수 'a' ë¡œë¶€í„°ì˜ ë¡œë“œì™€ 변수 'b' ë¡œì˜ ìŠ¤í† ì–´ 사ì´ì˜ 순서를 -지켜줄 필요가 없어집니다. barrier() 를 추가해 í•´ê²°í•´ ë³´ê³ ì‹¶ê² ì§€ë§Œ, 그건 -ë„ì›€ì´ ì•ˆë©ë‹ˆë‹¤. ì¡°ê±´ 관계는 사ë¼ì¡Œê³ , barrier() 는 ì´ë¥¼ ë˜ëŒë¦¬ì§€ 못합니다. -ë”°ë¼ì„œ, ì´ ìˆœì„œë¥¼ 지켜야 한다면, MAX ê°€ 1 보다 í¬ë‹¤ëŠ” 것ì„, 다ìŒê³¼ ê°™ì€ ë°©ë²•ì„ -사용해 분명히 해야 합니다: - - q = READ_ONCE(a); - BUILD_BUG_ON(MAX <= 1); /* Order load from a with store to b. */ - if (q % MAX) { - WRITE_ONCE(b, 1); - do_something(); - } else { - WRITE_ONCE(b, 2); - do_something_else(); - } - -'b' ë¡œì˜ ìŠ¤í† ì–´ë“¤ì€ ì—¬ì „ížˆ 서로 ë‹¤ë¦„ì„ ì•Œì•„ë‘세요. 만약 ê·¸ê²ƒë“¤ì´ ë™ì¼í•˜ë©´, -ì•žì—ì„œ ì´ì•¼ê¸°í–ˆë“¯, 컴파ì¼ëŸ¬ê°€ ê·¸ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì„ 'if' 문 바깥으로 -ë„집어낼 수 있습니다. - -ë˜í•œ ì´ì§„ 조건문 í‰ê°€ì— 너무 ì˜ì¡´í•˜ì§€ ì•Šë„ë¡ ì¡°ì‹¬í•´ì•¼ 합니다. 다ìŒì˜ 예를 -봅시다: - - q = READ_ONCE(a); - if (q || 1 > 0) - WRITE_ONCE(b, 1); - -첫번째 조건만으로는 브랜치 ì¡°ê±´ ì „ì²´ë¥¼ 거짓으로 만들 수 ì—†ê³ ë‘번째 ì¡°ê±´ì€ í•ìƒ -ì°¸ì´ê¸° 때문ì—, 컴파ì¼ëŸ¬ëŠ” ì´ ì˜ˆë¥¼ 다ìŒê³¼ ê°™ì´ ë°”ê¿”ì„œ 컨트롤 ì˜ì¡´ì„±ì„ ì—†ì• ë²„ë¦´ -수 있습니다: - - q = READ_ONCE(a); - WRITE_ONCE(b, 1); - -ì´ ì˜ˆëŠ” 컴파ì¼ëŸ¬ê°€ 코드를 추측으로 ìˆ˜ì •í• ìˆ˜ ì—†ë„ë¡ ë¶„ëª…ížˆ 해야 한다는 ì ì„ -강조합니다. 조금 ë” ì¼ë°˜ì 으로 ë§í•´ì„œ, READ_ONCE() 는 컴파ì¼ëŸ¬ì—게 주어진 로드 -오í¼ë ˆì´ì…˜ì„ 위한 코드를 ì •ë§ë¡œ 만들ë„ë¡ í•˜ì§€ë§Œ, 컴파ì¼ëŸ¬ê°€ ê·¸ë ‡ê²Œ 만들어진 -ì½”ë“œì˜ ìˆ˜í–‰ 결과를 사용하ë„ë¡ ê°•ì œí•˜ì§€ëŠ” 않습니다. - -ë˜í•œ, 컨트롤 ì˜ì¡´ì„±ì€ if ë¬¸ì˜ then ì ˆê³¼ else ì ˆì— ëŒ€í•´ì„œë§Œ ì ìš©ë©ë‹ˆë‹¤. ìƒì„¸ížˆ -ë§í•´ì„œ, 컨트롤 ì˜ì¡´ì„±ì€ if ë¬¸ì„ ë’¤ë”°ë¥´ëŠ” 코드ì—는 ì ìš©ë˜ì§€ 않습니다: - - q = READ_ONCE(a); - if (q) { - WRITE_ONCE(b, 1); - } else { - WRITE_ONCE(b, 2); - } - WRITE_ONCE(c, 1); /* BUG: No ordering against the read from 'a'. */ - -컴파ì¼ëŸ¬ëŠ” volatile íƒ€ìž…ì— ëŒ€í•œ 액세스를 재배치 í• ìˆ˜ ì—†ê³ ì´ ì¡°ê±´ í•˜ì˜ 'b' -ë¡œì˜ ì“°ê¸°ë¥¼ 재배치 í• ìˆ˜ 없기 ë•Œë¬¸ì— ì—¬ê¸°ì— ìˆœì„œ ê·œì¹™ì´ ì¡´ìž¬í•œë‹¤ê³ ì£¼ìž¥í•˜ê³ -ì‹¶ì„ ê²ë‹ˆë‹¤. ë¶ˆí–‰ížˆë„ ì´ ê²½ìš°ì—, 컴파ì¼ëŸ¬ëŠ” 다ìŒì˜ ê°€ìƒì˜ pseudo-assembly 언어 -코드처럼 'b' ë¡œì˜ ë‘ê°œì˜ ì“°ê¸° 오í¼ë ˆì´ì…˜ì„ conditional-move ì¸ìŠ¤íŠ¸ëŸì…˜ìœ¼ë¡œ -번ì—í• ìˆ˜ 있습니다: - - ld r1,a - cmp r1,$0 - cmov,ne r4,$1 - cmov,eq r4,$2 - st r4,b - st $1,c - -ì™„í™”ëœ ìˆœì„œ ê·œì¹™ì˜ CPU 는 'a' ë¡œë¶€í„°ì˜ ë¡œë“œì™€ 'c' ë¡œì˜ ìŠ¤í† ì–´ 사ì´ì— ì–´ë–¤ -ì¢…ë¥˜ì˜ ì˜ì¡´ì„±ë„ 갖지 ì•Šì„ ê²ë‹ˆë‹¤. ì´ ì»¨íŠ¸ë¡¤ ì˜ì¡´ì„±ì€ ë‘ê°œì˜ cmov ì¸ìŠ¤íŠ¸ëŸì…˜ê³¼ -ê±°ê¸°ì— ì˜ì¡´í•˜ëŠ” ìŠ¤í† ì–´ ì—게만 ì ìš©ë ê²ë‹ˆë‹¤. 짧게 ë§í•˜ìžë©´, 컨트롤 ì˜ì¡´ì„±ì€ -주어진 if ë¬¸ì˜ then ì ˆê³¼ else ì ˆì—게만 (ê·¸ë¦¬ê³ ì´ ë‘ ì ˆ ë‚´ì—ì„œ 호출ë˜ëŠ” -함수들ì—게까지) ì ìš©ë˜ì§€, ì´ if ë¬¸ì„ ë’¤ë”°ë¥´ëŠ” 코드ì—는 ì ìš©ë˜ì§€ 않습니다. - - -컨트롤 ì˜ì¡´ì„±ì— ì˜í•´ ì œê³µë˜ëŠ” ì´ ìˆœì„œê·œì¹™ì€ ì´ë¥¼ í¬í•¨í•˜ê³ 있는 CPU ì— -지ì—ì 입니다. ë” ë§Žì€ ì •ë³´ë¥¼ ìœ„í•´ì„ "Multicopy ì›ìžì„±" ì„¹ì…˜ì„ ì°¸ê³ í•˜ì„¸ìš”. - - -요약하ìžë©´: - - (*) 컨트롤 ì˜ì¡´ì„±ì€ ì•žì˜ ë¡œë“œë“¤ì„ ë’¤ì˜ ìŠ¤í† ì–´ë“¤ì— ëŒ€í•´ 순서를 맞춰ì¤ë‹ˆë‹¤. - 하지만, ê·¸ ì™¸ì˜ ì–´ë–¤ ìˆœì„œë„ ë³´ìž¥í•˜ì§€ -않습니다-: ì•žì˜ ë¡œë“œì™€ ë’¤ì˜ ë¡œë“œë“¤ - 사ì´ì—ë„, ì•žì˜ ìŠ¤í† ì–´ì™€ ë’¤ì˜ ìŠ¤í† ì–´ë“¤ 사ì´ì—ë„ìš”. ì´ëŸ° 다른 í˜•íƒœì˜ - 순서가 필요하다면 smp_rmb() 나 smp_wmb()를, ë˜ëŠ”, ì•žì˜ ìŠ¤í† ì–´ë“¤ê³¼ ë’¤ì˜ - 로드들 사ì´ì˜ 순서를 위해서는 smp_mb() 를 사용하세요. - - (*) "if" ë¬¸ì˜ ì–‘ê°ˆëž˜ 브랜치가 ê°™ì€ ë³€ìˆ˜ì—ì˜ ë™ì¼í•œ ìŠ¤í† ì–´ë¡œ 시작한다면, ê·¸ - ìŠ¤í† ì–´ë“¤ì€ ê° ìŠ¤í† ì–´ ì•žì— smp_mb() 를 넣거나 smp_store_release() 를 - 사용해서 ìŠ¤í† ì–´ë¥¼ 하는 ì‹ìœ¼ë¡œ 순서를 맞춰줘야 합니다. ì´ ë¬¸ì œë¥¼ 해결하기 - 위해 "if" ë¬¸ì˜ ì–‘ê°ˆëž˜ ë¸Œëžœì¹˜ì˜ ì‹œìž‘ 지ì ì— barrier() 를 넣는 것만으로는 - 충분한 í•´ê²°ì´ ë˜ì§€ 않는ë°, ì´ëŠ” ì•žì˜ ì˜ˆì—ì„œ 본것과 ê°™ì´, 컴파ì¼ëŸ¬ì˜ - 최ì 화는 barrier() ê°€ ì˜ë¯¸í•˜ëŠ” 바를 ì§€í‚¤ë©´ì„œë„ ì»¨íŠ¸ë¡¤ ì˜ì¡´ì„±ì„ ì†ìƒì‹œí‚¬ - 수 있기 때문ì´ë¼ëŠ” ì ì„ ë¶€ë”” 알아ë‘시기 ë°”ëžë‹ˆë‹¤. - - (*) 컨트롤 ì˜ì¡´ì„±ì€ ì•žì˜ ë¡œë“œì™€ ë’¤ì˜ ìŠ¤í† ì–´ 사ì´ì— 최소 하나ì˜, 실행 - ì‹œì ì—ì„œì˜ ì¡°ê±´ê´€ê³„ë¥¼ 필요로 하며, ì´ ì¡°ê±´ê´€ê³„ëŠ” ì•žì˜ ë¡œë“œì™€ 관계ë˜ì–´ì•¼ - 합니다. 만약 컴파ì¼ëŸ¬ê°€ ì¡°ê±´ 관계를 최ì 화로 없앨수 있다면, ìˆœì„œë„ - 최ì 화로 ì—†ì• ë²„ë ¸ì„ ê²ë‹ˆë‹¤. READ_ONCE() 와 WRITE_ONCE() ì˜ ì£¼ì˜ ê¹Šì€ - ì‚¬ìš©ì€ ì£¼ì–´ì§„ ì¡°ê±´ 관계를 ìœ ì§€í•˜ëŠ”ë° ë„ì›€ì´ ë 수 있습니다. - - (*) 컨트롤 ì˜ì¡´ì„±ì„ ìœ„í•´ì„ ì»´íŒŒì¼ëŸ¬ê°€ 조건관계를 ì—†ì• ë²„ë¦¬ëŠ” ê²ƒì„ ë§‰ì•„ì•¼ - 합니다. ì£¼ì˜ ê¹Šì€ READ_ONCE() 나 atomic{,64}_read() ì˜ ì‚¬ìš©ì´ ì»¨íŠ¸ë¡¤ - ì˜ì¡´ì„±ì´ 사ë¼ì§€ì§€ 않게 í•˜ëŠ”ë° ë„ì›€ì„ ì¤„ 수 있습니다. ë” ë§Žì€ ì •ë³´ë¥¼ - ìœ„í•´ì„ "컴파ì¼ëŸ¬ 배리어" ì„¹ì…˜ì„ ì°¸ê³ í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤. - - (*) 컨트롤 ì˜ì¡´ì„±ì€ 컨트롤 ì˜ì¡´ì„±ì„ 갖는 if ë¬¸ì˜ then ì ˆê³¼ else ì ˆê³¼ ì´ ë‘ ì ˆ - ë‚´ì—ì„œ 호출ë˜ëŠ” 함수들ì—만 ì ìš©ë©ë‹ˆë‹¤. 컨트롤 ì˜ì¡´ì„±ì€ 컨트롤 ì˜ì¡´ì„±ì„ - 갖는 if ë¬¸ì„ ë’¤ë”°ë¥´ëŠ” 코드ì—는 ì ìš©ë˜ì§€ -않습니다-. - - (*) 컨트롤 ì˜ì¡´ì„±ì€ 보통 다른 íƒ€ìž…ì˜ ë°°ë¦¬ì–´ë“¤ê³¼ ì§ì„ 맞춰 사용ë©ë‹ˆë‹¤. - - (*) 컨트롤 ì˜ì¡´ì„±ì€ multicopy ì›ìžì„±ì„ ì œê³µí•˜ì§€ -않습니다-. ëª¨ë“ CPU ë“¤ì´ - íŠ¹ì • ìŠ¤í† ì–´ë¥¼ ë™ì‹œì— 보길 ì›í•œë‹¤ë©´, smp_mb() 를 사용하세요. - - (*) 컴파ì¼ëŸ¬ëŠ” 컨트롤 ì˜ì¡´ì„±ì„ ì´í•´í•˜ê³ 있지 않습니다. ë”°ë¼ì„œ 컴파ì¼ëŸ¬ê°€ - ì—¬ëŸ¬ë¶„ì˜ ì½”ë“œë¥¼ ë§ê°€ëœ¨ë¦¬ì§€ ì•Šë„ë¡ í•˜ëŠ”ê±´ ì—¬ëŸ¬ë¶„ì´ í•´ì•¼ 하는 ì¼ìž…니다. - - -SMP 배리어 ì§ë§žì¶”기 --------------------- - -CPU ê°„ ìƒí˜¸ìž‘ìš©ì„ ë‹¤ë£° ë•Œì— ì¼ë¶€ íƒ€ìž…ì˜ ë©”ëª¨ë¦¬ 배리어는 í•ìƒ ì§ì„ 맞춰 -사용ë˜ì–´ì•¼ 합니다. ì ì ˆí•˜ê²Œ ì§ì„ 맞추지 ì•Šì€ ì½”ë“œëŠ” ì‚¬ì‹¤ìƒ ì—ëŸ¬ì— ê°€ê¹ìŠµë‹ˆë‹¤. - -범용 ë°°ë¦¬ì–´ë“¤ì€ ë²”ìš© 배리어ë¼ë¦¬ë„ ì§ì„ 맞추지만 multicopy ì›ìžì„±ì´ 없는 -ëŒ€ë¶€ë¶„ì˜ ë‹¤ë¥¸ íƒ€ìž…ì˜ ë°°ë¦¬ì–´ë“¤ê³¼ë„ ì§ì„ 맞춥니다. ACQUIRE 배리어는 RELEASE -배리어와 ì§ì„ 맞춥니다만, 둘 다 범용 배리어를 í¬í•¨í•´ 다른 ë°°ë¦¬ì–´ë“¤ê³¼ë„ ì§ì„ -맞출 수 있습니다. 쓰기 배리어는 주소 ì˜ì¡´ì„± 배리어나 컨트롤 ì˜ì¡´ì„±, ACQUIRE -배리어, RELEASE 배리어, ì½ê¸° 배리어, ë˜ëŠ” 범용 배리어와 ì§ì„ 맞춥니다. -비슷하게 ì½ê¸° 배리어나 컨트롤 ì˜ì¡´ì„±, ë˜ëŠ” 주소 ì˜ì¡´ì„± 배리어는 쓰기 배리어나 -ACQUIRE 배리어, RELEASE 배리어, ë˜ëŠ” 범용 배리어와 ì§ì„ 맞추는ë°, 다ìŒê³¼ -같습니다: - - CPU 1 CPU 2 - =============== =============== - WRITE_ONCE(a, 1); - <쓰기 배리어> - WRITE_ONCE(b, 2); x = READ_ONCE(b); - <ì½ê¸° 배리어> - y = READ_ONCE(a); - -ë˜ëŠ”: - - CPU 1 CPU 2 - =============== =============================== - a = 1; - <쓰기 배리어> - WRITE_ONCE(b, &a); x = READ_ONCE(b); - <묵시ì 주소 ì˜ì¡´ì„± 배리어> - y = *x; - -ë˜ëŠ”: - - CPU 1 CPU 2 - =============== =============================== - r1 = READ_ONCE(y); - <범용 배리어> - WRITE_ONCE(x, 1); if (r2 = READ_ONCE(x)) { - <묵시ì 컨트롤 ì˜ì¡´ì„±> - WRITE_ONCE(y, 1); - } - - assert(r1 == 0 || r2 == 0); - -기본ì 으로, ì—¬ê¸°ì„œì˜ ì½ê¸° 배리어는 "ë” ì™„í™”ëœ" íƒ€ìž…ì¼ ìˆœ ìžˆì–´ë„ í•ìƒ 존재해야 -합니다. - -[!] 쓰기 배리어 ì•žì˜ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ì€ ì¼ë°˜ì 으로 ì½ê¸° 배리어나 주소 ì˜ì¡´ì„± -배리어 ë’¤ì˜ ë¡œë“œ 오í¼ë ˆì´ì…˜ê³¼ 매치ë 것ì´ê³ , ë°˜ëŒ€ë„ ë§ˆì°¬ê°€ì§€ìž…ë‹ˆë‹¤: - - CPU 1 CPU 2 - =================== =================== - WRITE_ONCE(a, 1); }---- --->{ v = READ_ONCE(c); - WRITE_ONCE(b, 2); } \ / { w = READ_ONCE(d); - <쓰기 배리어> \ <ì½ê¸° 배리어> - WRITE_ONCE(c, 3); } / \ { x = READ_ONCE(a); - WRITE_ONCE(d, 4); }---- --->{ y = READ_ONCE(b); - - -메모리 배리어 ì‹œí€€ìŠ¤ì˜ ì˜ˆ -------------------------- - -첫째, 쓰기 배리어는 ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì˜ 부분ì 순서 세우기로 ë™ìž‘합니다. -ì•„ëž˜ì˜ ì´ë²¤íŠ¸ 시퀀스를 보세요: - - CPU 1 - ======================= - STORE A = 1 - STORE B = 2 - STORE C = 3 - <쓰기 배리어> - STORE D = 4 - STORE E = 5 - -ì´ ì´ë²¤íŠ¸ 시퀀스는 메모리 ì¼ê´€ì„± ì‹œìŠ¤í…œì— ì›ì†Œë¼ë¦¬ì˜ 순서가 존재하지 않는 집합 -{ STORE A, STORE B, STORE C } ê°€ ì—ì‹œ ì›ì†Œë¼ë¦¬ì˜ 순서가 존재하지 않는 집합 -{ STORE D, STORE E } 보다 ë¨¼ì € ì¼ì–´ë‚œ 것으로 ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ ìš”ì†Œë“¤ì— ë³´ì´ë„ë¡ -ì „ë‹¬ë©ë‹ˆë‹¤: - - +-------+ : : - | | +------+ - | |------>| C=3 | } /\ - | | : +------+ }----- \ -----> ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ ìš”ì†Œì— - | | : | A=1 | } \/ 보여질 수 있는 ì´ë²¤íŠ¸ë“¤ - | | : +------+ } - | CPU 1 | : | B=2 | } - | | +------+ } - | | wwwwwwwwwwwwwwww } <--- 여기서 쓰기 배리어는 배리어 ì•žì˜ - | | +------+ } ëª¨ë“ ìŠ¤í† ì–´ê°€ 배리어 ë’¤ì˜ ìŠ¤í† ì–´ - | | : | E=5 | } ì „ì— ë©”ëª¨ë¦¬ ì‹œìŠ¤í…œì— ì „ë‹¬ë˜ë„ë¡ - | | : +------+ } 합니다 - | |------>| D=4 | } - | | +------+ - +-------+ : : - | - | CPU 1 ì— ì˜í•´ 메모리 ì‹œìŠ¤í…œì— ì „ë‹¬ë˜ëŠ” - | ì¼ë ¨ì˜ ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ - V - - -둘째, 주소 ì˜ì¡´ì„± 배리어는 ë°ì´í„° ì˜ì¡´ì 로드 오í¼ë ˆì´ì…˜ë“¤ì˜ 부분ì 순서 -세우기로 ë™ìž‘합니다. ë‹¤ìŒ ì¼ë ¨ì˜ ì´ë²¤íŠ¸ë“¤ì„ 보세요: - - CPU 1 CPU 2 - ======================= ======================= - { B = 7; X = 9; Y = 8; C = &Y } - STORE A = 1 - STORE B = 2 - <쓰기 배리어> - STORE C = &B LOAD X - STORE D = 4 LOAD C (gets &B) - LOAD *C (reads B) - -ì—¬ê¸°ì— ë³„ë‹¤ë¥¸ ê°œìž…ì´ ì—†ë‹¤ë©´, CPU 1 ì˜ ì“°ê¸° 배리어ì—ë„ ë¶ˆêµ¬í•˜ê³ CPU 2 는 CPU 1 -ì˜ ì´ë²¤íŠ¸ë“¤ì„ ì™„ì „ížˆ 무작위ì 순서로 ì¸ì§€í•˜ê²Œ ë©ë‹ˆë‹¤: - - +-------+ : : : : - | | +------+ +-------+ | CPU 2 ì— ì¸ì§€ë˜ëŠ” - | |------>| B=2 |----- --->| Y->8 | | ì—…ë°ì´íŠ¸ ì´ë²¤íŠ¸ - | | : +------+ \ +-------+ | 시퀀스 - | CPU 1 | : | A=1 | \ --->| C->&Y | V - | | +------+ | +-------+ - | | wwwwwwwwwwwwwwww | : : - | | +------+ | : : - | | : | C=&B |--- | : : +-------+ - | | : +------+ \ | +-------+ | | - | |------>| D=4 | ----------->| C->&B |------>| | - | | +------+ | +-------+ | | - +-------+ : : | : : | | - | : : | | - | : : | CPU 2 | - | +-------+ | | - 분명히 ìž˜ëª»ëœ ---> | | B->7 |------>| | - B ì˜ ê°’ ì¸ì§€ (!) | +-------+ | | - | : : | | - | +-------+ | | - X ì˜ ë¡œë“œê°€ B ì˜ ---> \ | X->9 |------>| | - ì¼ê´€ì„± ìœ ì§€ë¥¼ \ +-------+ | | - 지연시킴 ----->| B->2 | +-------+ - +-------+ - : : - - -ì•žì˜ ì˜ˆì—ì„œ, CPU 2 는 (B ì˜ ê°’ì´ ë ) *C ì˜ ê°’ ì½ê¸°ê°€ C ì˜ LOAD ë’¤ì— ì´ì–´ì§ì—ë„ -B ê°€ 7 ì´ë¼ëŠ” 결과를 얻습니다. - -하지만, 만약 주소 ì˜ì¡´ì„± 배리어가 C ì˜ ë¡œë“œì™€ *C (즉, B) ì˜ ë¡œë“œ 사ì´ì— -있었다면: - - CPU 1 CPU 2 - ======================= ======================= - { B = 7; X = 9; Y = 8; C = &Y } - STORE A = 1 - STORE B = 2 - <쓰기 배리어> - STORE C = &B LOAD X - STORE D = 4 LOAD C (gets &B) - <주소 ì˜ì¡´ì„± 배리어> - LOAD *C (reads B) - -다ìŒê³¼ ê°™ì´ ë©ë‹ˆë‹¤: - - +-------+ : : : : - | | +------+ +-------+ - | |------>| B=2 |----- --->| Y->8 | - | | : +------+ \ +-------+ - | CPU 1 | : | A=1 | \ --->| C->&Y | - | | +------+ | +-------+ - | | wwwwwwwwwwwwwwww | : : - | | +------+ | : : - | | : | C=&B |--- | : : +-------+ - | | : +------+ \ | +-------+ | | - | |------>| D=4 | ----------->| C->&B |------>| | - | | +------+ | +-------+ | | - +-------+ : : | : : | | - | : : | | - | : : | CPU 2 | - | +-------+ | | - | | X->9 |------>| | - | +-------+ | | - C ë¡œì˜ ìŠ¤í† ì–´ ì•žì˜ ---> \ aaaaaaaaaaaaaaaaa | | - ëª¨ë“ ì´ë²¤íŠ¸ 결과가 \ +-------+ | | - ë’¤ì˜ ë¡œë“œì—게 ----->| B->2 |------>| | - ë³´ì´ê²Œ ê°•ì œí•œë‹¤ +-------+ | | - : : +-------+ - - -셋째, ì½ê¸° 배리어는 로드 오í¼ë ˆì´ì…˜ë“¤ì—ì˜ ë¶€ë¶„ì 순서 세우기로 ë™ìž‘합니다. -ì•„ëž˜ì˜ ì¼ë ¨ì˜ ì´ë²¤íŠ¸ë¥¼ 봅시다: - - CPU 1 CPU 2 - ======================= ======================= - { A = 0, B = 9 } - STORE A=1 - <쓰기 배리어> - STORE B=2 - LOAD B - LOAD A - -CPU 1 ì€ ì“°ê¸° 배리어를 쳤지만, 별다른 ê°œìž…ì´ ì—†ë‹¤ë©´ CPU 2 는 CPU 1 ì—ì„œ 행해진 -ì´ë²¤íŠ¸ì˜ 결과를 무작위ì 순서로 ì¸ì§€í•˜ê²Œ ë©ë‹ˆë‹¤. - - +-------+ : : : : - | | +------+ +-------+ - | |------>| A=1 |------ --->| A->0 | - | | +------+ \ +-------+ - | CPU 1 | wwwwwwwwwwwwwwww \ --->| B->9 | - | | +------+ | +-------+ - | |------>| B=2 |--- | : : - | | +------+ \ | : : +-------+ - +-------+ : : \ | +-------+ | | - ---------->| B->2 |------>| | - | +-------+ | CPU 2 | - | | A->0 |------>| | - | +-------+ | | - | : : +-------+ - \ : : - \ +-------+ - ---->| A->1 | - +-------+ - : : - - -하지만, 만약 ì½ê¸° 배리어가 B ì˜ ë¡œë“œì™€ A ì˜ ë¡œë“œ 사ì´ì— 존재한다면: - - CPU 1 CPU 2 - ======================= ======================= - { A = 0, B = 9 } - STORE A=1 - <쓰기 배리어> - STORE B=2 - LOAD B - <ì½ê¸° 배리어> - LOAD A - -CPU 1 ì— ì˜í•´ 만들어진 부분ì 순서가 CPU 2 ì—ë„ ê·¸ëŒ€ë¡œ ì¸ì§€ë©ë‹ˆë‹¤: - - +-------+ : : : : - | | +------+ +-------+ - | |------>| A=1 |------ --->| A->0 | - | | +------+ \ +-------+ - | CPU 1 | wwwwwwwwwwwwwwww \ --->| B->9 | - | | +------+ | +-------+ - | |------>| B=2 |--- | : : - | | +------+ \ | : : +-------+ - +-------+ : : \ | +-------+ | | - ---------->| B->2 |------>| | - | +-------+ | CPU 2 | - | : : | | - | : : | | - 여기서 ì½ê¸° 배리어는 ----> \ rrrrrrrrrrrrrrrrr | | - B ë¡œì˜ ìŠ¤í† ì–´ ì „ì˜ \ +-------+ | | - ëª¨ë“ ê²°ê³¼ë¥¼ CPU 2 ì— ---->| A->1 |------>| | - ë³´ì´ë„ë¡ í•œë‹¤ +-------+ | | - : : +-------+ - - -ë” ì™„ë²½í•œ ì„¤ëª…ì„ ìœ„í•´, A ì˜ ë¡œë“œê°€ ì½ê¸° 배리어 ì•žê³¼ ë’¤ì— ìžˆìœ¼ë©´ 어떻게 ë 지 -ìƒê°í•´ 봅시다: - - CPU 1 CPU 2 - ======================= ======================= - { A = 0, B = 9 } - STORE A=1 - <쓰기 배리어> - STORE B=2 - LOAD B - LOAD A [first load of A] - <ì½ê¸° 배리어> - LOAD A [second load of A] - -A ì˜ ë¡œë“œ ë‘개가 ëª¨ë‘ B ì˜ ë¡œë“œ ë’¤ì— ìžˆì§€ë§Œ, 서로 다른 ê°’ì„ ì–»ì–´ì˜¬ 수 -있습니다: - - +-------+ : : : : - | | +------+ +-------+ - | |------>| A=1 |------ --->| A->0 | - | | +------+ \ +-------+ - | CPU 1 | wwwwwwwwwwwwwwww \ --->| B->9 | - | | +------+ | +-------+ - | |------>| B=2 |--- | : : - | | +------+ \ | : : +-------+ - +-------+ : : \ | +-------+ | | - ---------->| B->2 |------>| | - | +-------+ | CPU 2 | - | : : | | - | : : | | - | +-------+ | | - | | A->0 |------>| 1st | - | +-------+ | | - 여기서 ì½ê¸° 배리어는 ----> \ rrrrrrrrrrrrrrrrr | | - B ë¡œì˜ ìŠ¤í† ì–´ ì „ì˜ \ +-------+ | | - ëª¨ë“ ê²°ê³¼ë¥¼ CPU 2 ì— ---->| A->1 |------>| 2nd | - ë³´ì´ë„ë¡ í•œë‹¤ +-------+ | | - : : +-------+ - - -하지만 CPU 1 ì—ì„œì˜ A ì—…ë°ì´íŠ¸ëŠ” ì½ê¸° 배리어가 완료ë˜ê¸° ì „ì—ë„ ë³´ì¼ ìˆ˜ë„ -있긴 합니다: - - +-------+ : : : : - | | +------+ +-------+ - | |------>| A=1 |------ --->| A->0 | - | | +------+ \ +-------+ - | CPU 1 | wwwwwwwwwwwwwwww \ --->| B->9 | - | | +------+ | +-------+ - | |------>| B=2 |--- | : : - | | +------+ \ | : : +-------+ - +-------+ : : \ | +-------+ | | - ---------->| B->2 |------>| | - | +-------+ | CPU 2 | - | : : | | - \ : : | | - \ +-------+ | | - ---->| A->1 |------>| 1st | - +-------+ | | - rrrrrrrrrrrrrrrrr | | - +-------+ | | - | A->1 |------>| 2nd | - +-------+ | | - : : +-------+ - - -여기서 보장ë˜ëŠ” ê±´, 만약 B ì˜ ë¡œë“œê°€ B == 2 ë¼ëŠ” 결과를 봤다면, A ì—ì˜ ë‘번째 -로드는 í•ìƒ A == 1 ì„ ë³´ê²Œ ë 것ì´ë¼ëŠ” ê²ë‹ˆë‹¤. A ì—ì˜ ì²«ë²ˆì§¸ 로드ì—는 그런 -ë³´ìž¥ì´ ì—†ìŠµë‹ˆë‹¤; A == 0 ì´ê±°ë‚˜ A == 1 ì´ê±°ë‚˜ 둘 중 í•˜ë‚˜ì˜ ê²°ê³¼ë¥¼ 보게 ë ê²ë‹ˆë‹¤. - - -ì½ê¸° 메모리 배리어 VS 로드 예측 -------------------------------- - -ë§Žì€ CPUë“¤ì´ ë¡œë“œë¥¼ 예측ì 으로 (speculatively) 합니다: ì–´ë–¤ ë°ì´í„°ë¥¼ 메모리ì—ì„œ -로드해야 하게 ë 지 ì˜ˆì¸¡ì„ í–ˆë‹¤ë©´, 해당 ë°ì´í„°ë¥¼ 로드하는 ì¸ìŠ¤íŠ¸ëŸì…˜ì„ ì‹¤ì œë¡œëŠ” -ì•„ì§ ë§Œë‚˜ì§€ 않았ë”ë¼ë„ 다른 로드 ìž‘ì—…ì´ ì—†ì–´ 버스 (bus) ê°€ 아무 ì¼ë„ í•˜ê³ ìžˆì§€ -않다면, ê·¸ ë°ì´í„°ë¥¼ 로드합니다. ì´í›„ì— ì‹¤ì œ 로드 ì¸ìŠ¤íŠ¸ëŸì…˜ì´ 실행ë˜ë©´ CPU ê°€ -ì´ë¯¸ ê·¸ ê°’ì„ ê°€ì§€ê³ ìžˆê¸° ë•Œë¬¸ì— ê·¸ 로드 ì¸ìŠ¤íŠ¸ëŸì…˜ì€ 즉시 완료ë©ë‹ˆë‹¤. - -해당 CPU 는 ì‹¤ì œë¡œëŠ” ê·¸ ê°’ì´ í•„ìš”ì¹˜ 않았다는 ì‚¬ì‹¤ì´ ë‚˜ì¤‘ì— ë“œëŸ¬ë‚ ìˆ˜ë„ ìžˆëŠ”ë° - -해당 로드 ì¸ìŠ¤íŠ¸ëŸì…˜ì´ 브랜치로 우회ë˜ê±°ë‚˜ í–ˆì„ ìˆ˜ ìžˆê² ì£ - , ê·¸ë ‡ê²Œ ë˜ë©´ ì•žì„œ -ì½ì–´ë‘” ê°’ì„ ë²„ë¦¬ê±°ë‚˜ ë‚˜ì¤‘ì˜ ì‚¬ìš©ì„ ìœ„í•´ ìºì‹œì— 넣어둘 수 있습니다. - -다ìŒì„ ìƒê°í•´ 봅시다: - - CPU 1 CPU 2 - ======================= ======================= - LOAD B - DIVIDE } 나누기 ëª…ë ¹ì€ ì¼ë°˜ì 으로 - DIVIDE } 긴 ì‹œê°„ì„ í•„ìš”ë¡œ 합니다 - LOAD A - -는 ì´ë ‡ê²Œ ë 수 있습니다: - - : : +-------+ - +-------+ | | - --->| B->2 |------>| | - +-------+ | CPU 2 | - : :DIVIDE | | - +-------+ | | - 나누기 하ëŠë¼ ë°”ìœ ---> --->| A->0 |~~~~ | | - CPU 는 A ì˜ LOAD 를 +-------+ ~ | | - 예측해서 수행한다 : : ~ | | - : :DIVIDE | | - : : ~ | | - 나누기가 ë나면 ---> ---> : : ~-->| | - CPU 는 해당 LOAD 를 : : | | - ì¦‰ê° ì™„ë£Œí•œë‹¤ : : +-------+ - - -ì½ê¸° 배리어나 주소 ì˜ì¡´ì„± 배리어를 ë‘번째 로드 ì§ì „ì— ë†“ëŠ”ë‹¤ë©´: - - CPU 1 CPU 2 - ======================= ======================= - LOAD B - DIVIDE - DIVIDE - <ì½ê¸° 배리어> - LOAD A - -예측으로 얻어진 ê°’ì€ ì‚¬ìš©ëœ ë°°ë¦¬ì–´ì˜ íƒ€ìž…ì— ë”°ë¼ì„œ 해당 ê°’ì´ ì˜³ì€ì§€ ê²€í† ë˜ê²Œ -ë©ë‹ˆë‹¤. 만약 해당 메모리 ì˜ì—ì— ë³€í™”ê°€ 없었다면, 예측으로 얻어ë‘ì—ˆë˜ ê°’ì´ -사용ë©ë‹ˆë‹¤: - - : : +-------+ - +-------+ | | - --->| B->2 |------>| | - +-------+ | CPU 2 | - : :DIVIDE | | - +-------+ | | - 나누기 하ëŠë¼ ë°”ìœ ---> --->| A->0 |~~~~ | | - CPU 는 A ì˜ LOAD 를 +-------+ ~ | | - 예측한다 : : ~ | | - : :DIVIDE | | - : : ~ | | - : : ~ | | - rrrrrrrrrrrrrrrr~ | | - : : ~ | | - : : ~-->| | - : : | | - : : +-------+ - - -하지만 다른 CPU ì—ì„œ ì—…ë°ì´íŠ¸ë‚˜ 무효화가 있었다면, ê·¸ ì˜ˆì¸¡ì€ ë¬´íš¨í™”ë˜ê³ ê·¸ ê°’ì€ -다시 ì½í˜€ì§‘니다: - - : : +-------+ - +-------+ | | - --->| B->2 |------>| | - +-------+ | CPU 2 | - : :DIVIDE | | - +-------+ | | - 나누기 하ëŠë¼ ë°”ìœ ---> --->| A->0 |~~~~ | | - CPU 는 A ì˜ LOAD 를 +-------+ ~ | | - 예측한다 : : ~ | | - : :DIVIDE | | - : : ~ | | - : : ~ | | - rrrrrrrrrrrrrrrrr | | - +-------+ | | - 예측성 ë™ìž‘ì€ ë¬´íš¨í™” ë˜ê³ ---> --->| A->1 |------>| | - ì—…ë°ì´íŠ¸ëœ ê°’ì´ ë‹¤ì‹œ ì½í˜€ì§„다 +-------+ | | - : : +-------+ - - -MULTICOPY ì›ìžì„± ----------------- - -Multicopy ì›ìžì„±ì€ ì‹¤ì œì˜ ì»´í“¨í„° 시스템ì—ì„œ í•ìƒ ì œê³µë˜ì§€ëŠ” 않는, 순서 ë§žì¶”ê¸°ì— -대한 ìƒë‹¹ížˆ ì§ê´€ì ì¸ ê°œë…으로, íŠ¹ì • ìŠ¤í† ì–´ê°€ ëª¨ë“ CPU 들ì—게 ë™ì‹œì— 보여지게 -ë¨ì„, 달리 ë§í•˜ìžë©´ ëª¨ë“ CPU ë“¤ì´ ëª¨ë“ ìŠ¤í† ì–´ë“¤ì´ ë³´ì—¬ì§€ëŠ” 순서를 ë™ì˜í•˜ê²Œ ë˜ëŠ” -것입니다. 하지만, ì™„ì „í•œ multicopy ì›ìžì„±ì˜ ì‚¬ìš©ì€ ê°€ì¹˜ìžˆëŠ” 하드웨어 -최ì í™”ë“¤ì„ ë¬´ëŠ¥í•˜ê²Œ 만들어버릴 수 있어서, 보다 ì™„í™”ëœ í˜•íƒœì˜ ``다른 multicopy -ì›ìžì„±'' ë¼ëŠ” ì´ë¦„ì˜, íŠ¹ì • ìŠ¤í† ì–´ê°€ ëª¨ë“ -다른- CPU 들ì—게는 ë™ì‹œì— 보여지게 -하는 ë³´ìž¥ì„ ëŒ€ì‹ ì œê³µí•©ë‹ˆë‹¤. ì´ ë¬¸ì„œì˜ ë’·ë¶€ë¶„ë“¤ì€ ì´ ì™„í™”ëœ í˜•íƒœì— ëŒ€í•´ 논하게 -ë©ë‹ˆë‹¤ë§Œ, 단순히 ``multicopy ì›ìžì„±'' ì´ë¼ê³ ë¶€ë¥´ê² ìŠµë‹ˆë‹¤. - -다ìŒì˜ 예가 multicopy ì›ìžì„±ì„ 보입니다: - - CPU 1 CPU 2 CPU 3 - ======================= ======================= ======================= - { X = 0, Y = 0 } - STORE X=1 r1=LOAD X (reads 1) LOAD Y (reads 1) - <범용 배리어> <ì½ê¸° 배리어> - STORE Y=r1 LOAD X - -CPU 2 ì˜ Y ë¡œì˜ ìŠ¤í† ì–´ì— ì‚¬ìš©ë˜ëŠ” X ë¡œë“œì˜ ê²°ê³¼ê°€ 1 ì´ì—ˆê³ CPU 3 ì˜ Y 로드가 -1ì„ ë¦¬í„´í–ˆë‹¤ê³ í•´ë´…ì‹œë‹¤. ì´ëŠ” CPU 1 ì˜ X ë¡œì˜ ìŠ¤í† ì–´ê°€ CPU 2 ì˜ X ë¡œë¶€í„°ì˜ -로드를 ì•žì„œê³ CPU 2 ì˜ Y ë¡œì˜ ìŠ¤í† ì–´ê°€ CPU 3 ì˜ Y ë¡œë¶€í„°ì˜ ë¡œë“œë¥¼ ì•žì„¬ì„ -ì˜ë¯¸í•©ë‹ˆë‹¤. ë˜í•œ, ì—¬ê¸°ì„œì˜ ë©”ëª¨ë¦¬ ë°°ë¦¬ì–´ë“¤ì€ CPU 2 ê°€ ìžì‹ ì˜ ë¡œë“œë¥¼ ìžì‹ ì˜ -ìŠ¤í† ì–´ ì „ì— ìˆ˜í–‰í•˜ê³ , CPU 3 ê°€ Y ë¡œë¶€í„°ì˜ ë¡œë“œë¥¼ X ë¡œë¶€í„°ì˜ ë¡œë“œ ì „ì— ìˆ˜í–‰í•¨ì„ -보장합니다. 그럼 "CPU 3 ì˜ X ë¡œë¶€í„°ì˜ ë¡œë“œëŠ” 0 ì„ ë¦¬í„´í• ìˆ˜ 있ì„까요?" - -CPU 3 ì˜ X 로드가 CPU 2 ì˜ ë¡œë“œë³´ë‹¤ ë’¤ì— ì´ë£¨ì–´ì¡Œìœ¼ë¯€ë¡œ, CPU 3 ì˜ X ë¡œë¶€í„°ì˜ -로드는 1 ì„ ë¦¬í„´í•œë‹¤ê³ ì˜ˆìƒí•˜ëŠ”게 당연합니다. ì´ëŸ° 예ìƒì€ multicopy -ì›ìžì„±ìœ¼ë¡œë¶€í„° 나옵니다: CPU B ì—ì„œ ìˆ˜í–‰ëœ ë¡œë“œê°€ CPU A ì˜ ê°™ì€ ë³€ìˆ˜ë¡œë¶€í„°ì˜ -로드를 뒤따른다면 (ê·¸ë¦¬ê³ CPU A ê°€ ìžì‹ ì´ ì½ì€ 값으로 ë¨¼ì € 해당 ë³€ìˆ˜ì— ìŠ¤í† ì–´ -하지 않았다면) multicopy ì›ìžì„±ì„ ì œê³µí•˜ëŠ” 시스템ì—서는, CPU B ì˜ ë¡œë“œê°€ CPU A -ì˜ ë¡œë“œì™€ ê°™ì€ ê°’ ë˜ëŠ” ê·¸ 나중 ê°’ì„ ë¦¬í„´í•´ì•¼ë§Œ 합니다. 하지만, 리눅스 커ë„ì€ -ì‹œìŠ¤í…œë“¤ì´ multicopy ì›ìžì„±ì„ ì œê³µí• ê²ƒì„ ìš”êµ¬í•˜ì§€ 않습니다. - -ì•žì˜ ë²”ìš© 메모리 ë°°ë¦¬ì–´ì˜ ì‚¬ìš©ì€ ëª¨ë“ multicopy ì›ìžì„±ì˜ ë¶€ì¡±ì„ ë³´ìƒí•´ì¤ë‹ˆë‹¤. -ì•žì˜ ì˜ˆì—ì„œ, CPU 2 ì˜ X ë¡œë¶€í„°ì˜ ë¡œë“œê°€ 1 ì„ ë¦¬í„´í–ˆê³ CPU 3 ì˜ Y ë¡œë¶€í„°ì˜ -로드가 1 ì„ ë¦¬í„´í–ˆë‹¤ë©´, CPU 3 ì˜ X ë¡œë¶€í„°ì˜ ë¡œë“œëŠ” 1ì„ ë¦¬í„´í•´ì•¼ë§Œ 합니다. - -하지만, ì˜ì¡´ì„±, ì½ê¸° 배리어, 쓰기 배리어는 í•ìƒ non-multicopy ì›ìžì„±ì„ ë³´ìƒí•´ -주지는 않습니다. 예를 들어, CPU 2 ì˜ ë²”ìš© 배리어가 ì•žì˜ ì˜ˆì—ì„œ 사ë¼ì ¸ì„œ -아래처럼 ë°ì´í„° ì˜ì¡´ì„±ë§Œ 남게 ë˜ì—ˆë‹¤ê³ 해봅시다: - - CPU 1 CPU 2 CPU 3 - ======================= ======================= ======================= - { X = 0, Y = 0 } - STORE X=1 r1=LOAD X (reads 1) LOAD Y (reads 1) - <ë°ì´í„° ì˜ì¡´ì„±> <ì½ê¸° 배리어> - STORE Y=r1 LOAD X (reads 0) - -ì´ ë³€í™”ëŠ” non-multicopy ì›ìžì„±ì´ 만연하게 합니다: ì´ ì˜ˆì—ì„œ, CPU 2 ì˜ X -ë¡œë¶€í„°ì˜ ë¡œë“œê°€ 1ì„ ë¦¬í„´í•˜ê³ , CPU 3 ì˜ Y ë¡œë¶€í„°ì˜ ë¡œë“œê°€ 1 ì„ ë¦¬í„´í•˜ëŠ”ë°, CPU 3 -ì˜ X ë¡œë¶€í„°ì˜ ë¡œë“œê°€ 0 ì„ ë¦¬í„´í•˜ëŠ”ê²Œ ì™„ì „ížˆ 합법ì 입니다. - -핵심ì€, CPU 2 ì˜ ë°ì´í„° ì˜ì¡´ì„±ì´ ìžì‹ ì˜ ë¡œë“œì™€ ìŠ¤í† ì–´ë¥¼ 순서짓지만, CPU 1 ì˜ -ìŠ¤í† ì–´ì— ëŒ€í•œ 순서는 보장하지 않는다는 것입니다. ë”°ë¼ì„œ, ì´ ì˜ˆì œê°€ CPU 1 ê³¼ -CPU 2 ê°€ ìŠ¤í† ì–´ 버í¼ë‚˜ í•œ ìˆ˜ì¤€ì˜ ìºì‹œë¥¼ ê³µìœ í•˜ëŠ”, multicopy ì›ìžì„±ì„ ì œê³µí•˜ì§€ -않는 시스템ì—ì„œ 수행ëœë‹¤ë©´ CPU 2 는 CPU 1 ì˜ ì“°ê¸°ì— ì´ë¥¸ ì ‘ê·¼ì„ í• ìˆ˜ë„ -있습니다. ë”°ë¼ì„œ, ëª¨ë“ CPU ë“¤ì´ ì—¬ëŸ¬ ì ‘ê·¼ë“¤ì˜ ì¡°í•©ëœ ìˆœì„œì— ëŒ€í•´ì„œ ë™ì˜í•˜ê²Œ -하기 위해서는 범용 배리어가 필요합니다. - -범용 배리어는 non-multicopy ì›ìžì„±ë§Œ ë³´ìƒí• 수 있는게 아니ë¼, -ëª¨ë“ - CPU ë“¤ì´ --ëª¨ë“ - 오í¼ë ˆì´ì…˜ë“¤ì˜ 순서를 ë™ì¼í•˜ê²Œ ì¸ì‹í•˜ê²Œ 하는 추가ì ì¸ ìˆœì„œ ë³´ìž¥ì„ -만들어냅니다. 반대로, release-acquire ì§ì˜ ì—°ê²°ì€ ì´ëŸ° 추가ì ì¸ ìˆœì„œëŠ” -ì œê³µí•˜ì§€ 않는ë°, 해당 ì—°ê²°ì— ë“¤ì–´ìžˆëŠ” CPU ë“¤ë§Œì´ ë©”ëª¨ë¦¬ ì ‘ê·¼ì˜ ì¡°í•©ëœ ìˆœì„œì— -대해 ë™ì˜í• 것으로 보장ë¨ì„ ì˜ë¯¸í•©ë‹ˆë‹¤. 예를 들어, 존경스런 Herman Hollerith -ì˜ ì½”ë“œë¥¼ C 코드로 변환하면: - - int u, v, x, y, z; - - void cpu0(void) - { - r0 = smp_load_acquire(&x); - WRITE_ONCE(u, 1); - smp_store_release(&y, 1); - } - - void cpu1(void) - { - r1 = smp_load_acquire(&y); - r4 = READ_ONCE(v); - r5 = READ_ONCE(u); - smp_store_release(&z, 1); - } - - void cpu2(void) - { - r2 = smp_load_acquire(&z); - smp_store_release(&x, 1); - } - - void cpu3(void) - { - WRITE_ONCE(v, 1); - smp_mb(); - r3 = READ_ONCE(u); - } - -cpu0(), cpu1(), ê·¸ë¦¬ê³ cpu2() 는 smp_store_release()/smp_load_acquire() ìŒì˜ -ì—°ê²°ì— ì°¸ì—¬ë˜ì–´ 있으므로, 다ìŒê³¼ ê°™ì€ ê²°ê³¼ëŠ” 나오지 ì•Šì„ ê²ë‹ˆë‹¤: - - r0 == 1 && r1 == 1 && r2 == 1 - -ë” ë‚˜ì•„ê°€ì„œ, cpu0() 와 cpu1() 사ì´ì˜ release-acquire 관계로 ì¸í•´, cpu1() ì€ -cpu0() ì˜ ì“°ê¸°ë¥¼ ë´ì•¼ë§Œ 하므로, 다ìŒê³¼ ê°™ì€ ê²°ê³¼ë„ ì—†ì„ ê²ë‹ˆë‹¤: - - r1 == 1 && r5 == 0 - -하지만, release-acquire ì— ì˜í•´ ì œê³µë˜ëŠ” 순서는 해당 ì—°ê²°ì— ë™ì°¸í•œ CPU 들ì—만 -ì ìš©ë˜ë¯€ë¡œ cpu3() ì—, ì ì–´ë„ ìŠ¤í† ì–´ë“¤ 외ì—는 ì ìš©ë˜ì§€ 않습니다. ë”°ë¼ì„œ, 다ìŒê³¼ -ê°™ì€ ê²°ê³¼ê°€ 가능합니다: - - r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0 - -비슷하게, 다ìŒê³¼ ê°™ì€ ê²°ê³¼ë„ ê°€ëŠ¥í•©ë‹ˆë‹¤: - - r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0 && r5 == 1 - -cpu0(), cpu1(), ê·¸ë¦¬ê³ cpu2() 는 ê·¸ë“¤ì˜ ì½ê¸°ì™€ 쓰기를 순서대로 보게 ë˜ì§€ë§Œ, -release-acquire ì²´ì¸ì— 관여ë˜ì§€ ì•Šì€ CPU ë“¤ì€ ê·¸ ìˆœì„œì— ì´ê²¬ì„ 가질 수 -있습니다. ì´ëŸ° ì´ê²¬ì€ smp_load_acquire() 와 smp_store_release() ì˜ êµ¬í˜„ì— -사용ë˜ëŠ” ì™„í™”ëœ ë©”ëª¨ë¦¬ 배리어 ì¸ìŠ¤íŠ¸ëŸì…˜ë“¤ì€ í•ìƒ 배리어 ì•žì˜ ìŠ¤í† ì–´ë“¤ì„ ë’¤ì˜ -ë¡œë“œë“¤ì— ì•žì„¸ìš¸ 필요는 없다는 사실ì—ì„œ 기ì¸í•©ë‹ˆë‹¤. ì´ ë§ì€ cpu3() 는 cpu0() ì˜ -u ë¡œì˜ ìŠ¤í† ì–´ë¥¼ cpu1() ì˜ v ë¡œë¶€í„°ì˜ ë¡œë“œ ë’¤ì— ì¼ì–´ë‚œ 것으로 ë³¼ 수 있다는 -뜻입니다, cpu0() 와 cpu1() ì€ ì´ ë‘ ì˜¤í¼ë ˆì´ì…˜ì´ ì˜ë„ëœ ìˆœì„œëŒ€ë¡œ ì¼ì–´ë‚¬ìŒì— -ëª¨ë‘ ë™ì˜í•˜ëŠ”ë°ë„ ë§ìž…니다. - -하지만, smp_load_acquire() 는 ë§ˆìˆ ì´ ì•„ë‹˜ì„ ëª…ì‹¬í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤. 구체ì 으로, -ì´ í•¨ìˆ˜ëŠ” 단순히 순서 ê·œì¹™ì„ ì§€í‚¤ë©° ì¸ìžë¡œë¶€í„°ì˜ ì½ê¸°ë¥¼ 수행합니다. ì´ê²ƒì€ -ì–´ë–¤ íŠ¹ì •í•œ ê°’ì´ ì½íž 것ì¸ì§€ëŠ” 보장하지 -않습니다-. ë”°ë¼ì„œ, 다ìŒê³¼ ê°™ì€ ê²°ê³¼ë„ -가능합니다: - - r0 == 0 && r1 == 0 && r2 == 0 && r5 == 0 - -ì´ëŸ° 결과는 ì–´ë–¤ ê²ƒë„ ìž¬ë°°ì¹˜ ë˜ì§€ 않는, 순차ì ì¼ê´€ì„±ì„ 가진 ê°€ìƒì˜ -시스템ì—ì„œë„ ì¼ì–´ë‚ 수 있ìŒì„ 기억해 ë‘시기 ë°”ëžë‹ˆë‹¤. - -다시 ë§í•˜ì§€ë§Œ, ë‹¹ì‹ ì˜ ì½”ë“œê°€ ëª¨ë“ ì˜¤í¼ë ˆì´ì…˜ë“¤ì˜ ì™„ì „í•œ 순서를 필요로 한다면, -범용 배리어를 사용하ì‹ì‹œì˜¤. - - -================== -명시ì ì»¤ë„ ë°°ë¦¬ì–´ -================== - -리눅스 커ë„ì€ ì„œë¡œ 다른 단계ì—ì„œ ë™ìž‘하는 다양한 ë°°ë¦¬ì–´ë“¤ì„ ê°€ì§€ê³ ìžˆìŠµë‹ˆë‹¤: - - (*) 컴파ì¼ëŸ¬ 배리어. - - (*) CPU 메모리 배리어. - - -컴파ì¼ëŸ¬ 배리어 ---------------- - -리눅스 커ë„ì€ ì»´íŒŒì¼ëŸ¬ê°€ 메모리 액세스를 재배치 하는 ê²ƒì„ ë§‰ì•„ì£¼ëŠ” 명시ì ì¸ -컴파ì¼ëŸ¬ 배리어를 ê°€ì§€ê³ ìžˆìŠµë‹ˆë‹¤: - - barrier(); - -ì´ê±´ 범용 배리어입니다 -- barrier() ì˜ ì½ê¸°-ì½ê¸° 나 쓰기-쓰기 ë³€ì¢…ì€ ì—†ìŠµë‹ˆë‹¤. -하지만, READ_ONCE() 와 WRITE_ONCE() 는 íŠ¹ì • ì•¡ì„¸ìŠ¤ë“¤ì— ëŒ€í•´ì„œë§Œ ë™ìž‘하는 -barrier() ì˜ ì™„í™”ëœ í˜•íƒœë¡œ ë³¼ 수 있습니다. - -barrier() 함수는 다ìŒê³¼ ê°™ì€ íš¨ê³¼ë¥¼ 갖습니다: - - (*) 컴파ì¼ëŸ¬ê°€ barrier() ë’¤ì˜ ì•¡ì„¸ìŠ¤ë“¤ì´ barrier() ì•žì˜ ì•¡ì„¸ìŠ¤ë³´ë‹¤ 앞으로 - 재배치ë˜ì§€ 못하게 합니다. 예를 들어, ì¸í„°ëŸ½íŠ¸ 핸들러 코드와 ì¸í„°ëŸ½íŠ¸ 당한 - 코드 사ì´ì˜ í†µì‹ ì„ ì‹ ì¤‘ížˆ 하기 위해 사용ë 수 있습니다. - - (*) 루프ì—ì„œ, 컴파ì¼ëŸ¬ê°€ 루프 ì¡°ê±´ì— ì‚¬ìš©ëœ ë³€ìˆ˜ë¥¼ 매 ì´í„°ë ˆì´ì…˜ë§ˆë‹¤ - 메모리ì—ì„œ 로드하지 ì•Šì•„ë„ ë˜ë„ë¡ ìµœì í™” 하는걸 방지합니다. - -READ_ONCE() 와 WRITE_ONCE() 함수는 싱글 ì“°ë ˆë“œ 코드ì—서는 ë¬¸ì œ 없지만 ë™ì‹œì„±ì´ -있는 코드ì—서는 ë¬¸ì œê°€ ë 수 있는 ëª¨ë“ ìµœì 화를 막습니다. ì´ëŸ° ë¥˜ì˜ ìµœì í™”ì— -대한 예를 몇가지 들어보면 다ìŒê³¼ 같습니다: - - (*) 컴파ì¼ëŸ¬ëŠ” ê°™ì€ ë³€ìˆ˜ì— ëŒ€í•œ 로드와 ìŠ¤í† ì–´ë¥¼ 재배치 í• ìˆ˜ ìžˆê³ , ì–´ë–¤ - 경우ì—는 CPUê°€ ê°™ì€ ë³€ìˆ˜ë¡œë¶€í„°ì˜ ë¡œë“œë“¤ì„ ìž¬ë°°ì¹˜í• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. ì´ëŠ” - 다ìŒì˜ 코드가: - - a[0] = x; - a[1] = x; - - x ì˜ ì˜ˆì „ ê°’ì´ a[1] ì—, 새 ê°’ì´ a[0] ì— ìžˆê²Œ í• ìˆ˜ 있다는 뜻입니다. - 컴파ì¼ëŸ¬ì™€ CPUê°€ ì´ëŸ° ì¼ì„ 못하게 í•˜ë ¤ë©´ 다ìŒê³¼ ê°™ì´ í•´ì•¼ 합니다: - - a[0] = READ_ONCE(x); - a[1] = READ_ONCE(x); - - 즉, READ_ONCE() 와 WRITE_ONCE() 는 여러 CPU ì—ì„œ í•˜ë‚˜ì˜ ë³€ìˆ˜ì— ê°€í•´ì§€ëŠ” - ì•¡ì„¸ìŠ¤ë“¤ì— ìºì‹œ ì¼ê´€ì„±ì„ ì œê³µí•©ë‹ˆë‹¤. - - (*) 컴파ì¼ëŸ¬ëŠ” ê°™ì€ ë³€ìˆ˜ì— ëŒ€í•œ ì—°ì†ì ì¸ ë¡œë“œë“¤ì„ ë³‘í•©í• ìˆ˜ 있습니다. 그런 - 병합 작업으로 컴파ì¼ëŸ¬ëŠ” 다ìŒì˜ 코드를: - - while (tmp = a) - do_something_with(tmp); - - 다ìŒê³¼ ê°™ì´, 싱글 ì“°ë ˆë“œ 코드ì—서는 ë§ì´ ë˜ì§€ë§Œ 개발ìžì˜ ì˜ë„와 ì „í˜€ 맞지 - 않는 방향으로 "최ì í™”" í• ìˆ˜ 있습니다: - - if (tmp = a) - for (;;) - do_something_with(tmp); - - 컴파ì¼ëŸ¬ê°€ ì´ëŸ° ì§“ì„ í•˜ì§€ 못하게 í•˜ë ¤ë©´ READ_ONCE() 를 사용하세요: - - while (tmp = READ_ONCE(a)) - do_something_with(tmp); - - (*) 예컨대 ë ˆì§€ìŠ¤í„° ì‚¬ìš©ëŸ‰ì´ ë§Žì•„ 컴파ì¼ëŸ¬ê°€ ëª¨ë“ ë°ì´í„°ë¥¼ ë ˆì§€ìŠ¤í„°ì— ë‹´ì„ ìˆ˜ - 없는 경우, 컴파ì¼ëŸ¬ëŠ” 변수를 다시 ë¡œë“œí• ìˆ˜ 있습니다. ë”°ë¼ì„œ 컴파ì¼ëŸ¬ëŠ” - ì•žì˜ ì˜ˆì—ì„œ 변수 'tmp' ì‚¬ìš©ì„ ìµœì 화로 ì—†ì• ë²„ë¦´ 수 있습니다: - - while (tmp = a) - do_something_with(tmp); - - ì´ ì½”ë“œëŠ” 다ìŒê³¼ ê°™ì´ ì‹±ê¸€ ì“°ë ˆë“œì—서는 완벽하지만 ë™ì‹œì„±ì´ 존재하는 - 경우엔 치명ì ì¸ ì½”ë“œë¡œ 바뀔 수 있습니다: - - while (a) - do_something_with(a); - - 예를 들어, 최ì í™”ëœ ì´ ì½”ë“œëŠ” 변수 a ê°€ 다른 CPU ì— ì˜í•´ "while" 문과 - do_something_with() 호출 사ì´ì— 바뀌어 do_something_with() ì— 0ì„ ë„˜ê¸¸ - ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. - - ì´ë²ˆì—ë„, 컴파ì¼ëŸ¬ê°€ 그런 ì§“ì„ í•˜ëŠ”ê±¸ 막기 위해 READ_ONCE() 를 사용하세요: - - while (tmp = READ_ONCE(a)) - do_something_with(tmp); - - ë ˆì§€ìŠ¤í„°ê°€ 부족한 ìƒí™©ì„ 겪는 경우, 컴파ì¼ëŸ¬ëŠ” tmp 를 스íƒì— ì €ìž¥í•´ë‘˜ ìˆ˜ë„ - 있습니다. 컴파ì¼ëŸ¬ê°€ 변수를 다시 ì½ì–´ë“¤ì´ëŠ”ê±´ ì´ë ‡ê²Œ ì €ìž¥í•´ë‘ê³ í›„ì— ë‹¤ì‹œ - ì½ì–´ë“¤ì´ëŠ”ë° ë“œëŠ” 오버헤드 때문입니다. ê·¸ë ‡ê²Œ 하는게 싱글 ì“°ë ˆë“œ - 코드ì—서는 ì•ˆì „í•˜ë¯€ë¡œ, ì•ˆì „í•˜ì§€ ì•Šì€ ê²½ìš°ì—는 컴파ì¼ëŸ¬ì—게 ì§ì ‘ ì•Œë ¤ì¤˜ì•¼ - 합니다. - - (*) 컴파ì¼ëŸ¬ëŠ” ê·¸ ê°’ì´ ë¬´ì—‡ì¼ì§€ ì•Œê³ ìžˆë‹¤ë©´ 로드를 아예 ì•ˆí• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. - 예를 들어, 다ìŒì˜ 코드는 변수 'a' ì˜ ê°’ì´ í•ìƒ 0ìž„ì„ ì¦ëª…í• ìˆ˜ 있다면: - - while (tmp = a) - do_something_with(tmp); - - ì´ë ‡ê²Œ 최ì í™” ë˜ì–´ë²„릴 수 있습니다: - - do { } while (0); - - ì´ ë³€í™˜ì€ ì‹±ê¸€ ì“°ë ˆë“œ 코드ì—서는 ë„ì›€ì´ ë˜ëŠ”ë° ë¡œë“œì™€ 브랜치를 ì œê±°í–ˆê¸° - 때문입니다. ë¬¸ì œëŠ” 컴파ì¼ëŸ¬ê°€ 'a' ì˜ ê°’ì„ ì—…ë°ì´íŠ¸ 하는건 í˜„ìž¬ì˜ CPU 하나 - ë¿ì´ë¼ëŠ” ê°€ì • 위ì—ì„œ ì¦ëª…ì„ í–ˆë‹¤ëŠ”ë° ìžˆìŠµë‹ˆë‹¤. 만약 변수 'a' ê°€ ê³µìœ ë˜ì–´ - 있다면, 컴파ì¼ëŸ¬ì˜ ì¦ëª…ì€ í‹€ë¦° ê²ƒì´ ë ê²ë‹ˆë‹¤. 컴파ì¼ëŸ¬ëŠ” ê·¸ ìžì‹ ì´ - ìƒê°í•˜ëŠ” ê²ƒë§Œí¼ ë§Žì€ ê²ƒì„ ì•Œê³ ìžˆì§€ ëª»í•¨ì„ ì»´íŒŒì¼ëŸ¬ì—게 알리기 위해 - READ_ONCE() 를 사용하세요: - - while (tmp = READ_ONCE(a)) - do_something_with(tmp); - - 하지만 컴파ì¼ëŸ¬ëŠ” READ_ONCE() ë’¤ì— ë‚˜ì˜¤ëŠ” ê°’ì— ëŒ€í•´ì„œë„ ëˆˆê¸¸ì„ ë‘ê³ ìžˆìŒì„ - 기억하세요. 예를 들어, 다ìŒì˜ 코드ì—ì„œ MAX 는 ì „ì²˜ë¦¬ê¸° 매í¬ë¡œë¡œ, 1ì˜ ê°’ì„ - ê°–ëŠ”ë‹¤ê³ í•´ë´…ì‹œë‹¤: - - while ((tmp = READ_ONCE(a)) % MAX) - do_something_with(tmp); - - ì´ë ‡ê²Œ ë˜ë©´ 컴파ì¼ëŸ¬ëŠ” MAX 를 ê°€ì§€ê³ ìˆ˜í–‰ë˜ëŠ” "%" 오í¼ë ˆì´í„°ì˜ 결과가 í•ìƒ - 0ì´ë¼ëŠ” ê²ƒì„ ì•Œê²Œ ë˜ê³ , 컴파ì¼ëŸ¬ê°€ 코드를 실질ì 으로는 존재하지 않는 - 것처럼 최ì í™” 하는 ê²ƒì´ í—ˆìš©ë˜ì–´ 버립니다. ('a' ë³€ìˆ˜ì˜ ë¡œë“œëŠ” ì—¬ì „ížˆ - 행해질 ê²ë‹ˆë‹¤.) - - (*) 비슷하게, 컴파ì¼ëŸ¬ëŠ” 변수가 ì €ìž¥í•˜ë ¤ 하는 ê°’ì„ ì´ë¯¸ ê°€ì§€ê³ ìžˆë‹¤ëŠ” ê²ƒì„ - 알면 ìŠ¤í† ì–´ ìžì²´ë¥¼ ì œê±°í• ìˆ˜ 있습니다. ì´ë²ˆì—ë„, 컴파ì¼ëŸ¬ëŠ” í˜„ìž¬ì˜ CPU - ë§Œì´ ê·¸ ë³€ìˆ˜ì— ê°’ì„ ì“°ëŠ” 오로지 í•˜ë‚˜ì˜ ì¡´ìž¬ë¼ê³ ìƒê°í•˜ì—¬ ê³µìœ ëœ ë³€ìˆ˜ì— - 대해서는 ìž˜ëª»ëœ ì¼ì„ 하게 ë©ë‹ˆë‹¤. 예를 들어, 다ìŒê³¼ ê°™ì€ ê²½ìš°ê°€ ìžˆì„ ìˆ˜ - 있습니다: - - a = 0; - ... 변수 a ì— ìŠ¤í† ì–´ë¥¼ 하지 않는 코드 ... - a = 0; - - 컴파ì¼ëŸ¬ëŠ” 변수 'a' ì˜ ê°’ì€ ì´ë¯¸ 0ì´ë¼ëŠ” ê²ƒì„ ì•Œê³ , ë”°ë¼ì„œ ë‘번째 ìŠ¤í† ì–´ë¥¼ - ì‚ì œí• ê²ë‹ˆë‹¤. 만약 다른 CPU ê°€ ê·¸ ì‚¬ì´ ë³€ìˆ˜ 'a' ì— ë‹¤ë¥¸ ê°’ì„ ì¼ë‹¤ë©´ - 황당한 결과가 나올 ê²ë‹ˆë‹¤. - - 컴파ì¼ëŸ¬ê°€ 그런 ìž˜ëª»ëœ ì¶”ì¸¡ì„ í•˜ì§€ ì•Šë„ë¡ WRITE_ONCE() 를 사용하세요: - - WRITE_ONCE(a, 0); - ... 변수 a ì— ìŠ¤í† ì–´ë¥¼ 하지 않는 코드 ... - WRITE_ONCE(a, 0); - - (*) 컴파ì¼ëŸ¬ëŠ” 하지 ë§ë¼ê³ 하지 않으면 메모리 ì•¡ì„¸ìŠ¤ë“¤ì„ ìž¬ë°°ì¹˜ í• ìˆ˜ - 있습니다. 예를 들어, 다ìŒì˜ 프로세스 ë ˆë²¨ 코드와 ì¸í„°ëŸ½íŠ¸ 핸들러 사ì´ì˜ - ìƒí˜¸ìž‘ìš©ì„ ìƒê°í•´ 봅시다: - - void process_level(void) - { - msg = get_message(); - flag = true; - } - - void interrupt_handler(void) - { - if (flag) - process_message(msg); - } - - ì´ ì½”ë“œì—는 컴파ì¼ëŸ¬ê°€ process_level() ì„ ë‹¤ìŒê³¼ ê°™ì´ ë³€í™˜í•˜ëŠ” ê²ƒì„ ë§‰ì„ - ìˆ˜ë‹¨ì´ ì—†ê³ , ì´ëŸ° ë³€í™˜ì€ ì‹±ê¸€ì“°ë ˆë“œì—ì„œë¼ë©´ ì‹¤ì œë¡œ 훌ë¥í•œ ì„ íƒì¼ 수 - 있습니다: - - void process_level(void) - { - flag = true; - msg = get_message(); - } - - ì´ ë‘ê°œì˜ ë¬¸ìž¥ 사ì´ì— ì¸í„°ëŸ½íŠ¸ê°€ ë°œìƒí•œë‹¤ë©´, interrupt_handler() 는 ì˜ë¯¸ë¥¼ - ì•Œ 수 없는 메세지를 ë°›ì„ ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. ì´ê±¸ 막기 위해 다ìŒê³¼ ê°™ì´ - WRITE_ONCE() 를 사용하세요: - - void process_level(void) - { - WRITE_ONCE(msg, get_message()); - WRITE_ONCE(flag, true); - } - - void interrupt_handler(void) - { - if (READ_ONCE(flag)) - process_message(READ_ONCE(msg)); - } - - interrupt_handler() 안ì—ì„œë„ ì¤‘ì²©ëœ ì¸í„°ëŸ½íŠ¸ë‚˜ NMI 와 ê°™ì´ ì¸í„°ëŸ½íŠ¸ 핸들러 - ì—ì‹œ 'flag' 와 'msg' ì— ì ‘ê·¼í•˜ëŠ” ë˜ë‹¤ë¥¸ ë¬´ì–¸ê°€ì— ì¸í„°ëŸ½íŠ¸ ë 수 있다면 - READ_ONCE() 와 WRITE_ONCE() 를 사용해야 í•¨ì„ ê¸°ì–µí•´ ë‘세요. 만약 그런 - ê°€ëŠ¥ì„±ì´ ì—†ë‹¤ë©´, interrupt_handler() 안ì—서는 문서화 목ì ì´ ì•„ë‹ˆë¼ë©´ - READ_ONCE() 와 WRITE_ONCE() 는 필요치 않습니다. (ê·¼ëž˜ì˜ ë¦¬ëˆ…ìŠ¤ 커ë„ì—ì„œ - ì¤‘ì²©ëœ ì¸í„°ëŸ½íŠ¸ëŠ” 보통 잘 ì¼ì–´ë‚˜ì§€ ì•ŠìŒë„ 기억해 ë‘세요, ì‹¤ì œë¡œ, ì–´ë–¤ - ì¸í„°ëŸ½íŠ¸ 핸들러가 ì¸í„°ëŸ½íŠ¸ê°€ í™œì„±í™”ëœ ì±„ë¡œ 리턴하면 WARN_ONCE() ê°€ - 실행ë©ë‹ˆë‹¤.) - - 컴파ì¼ëŸ¬ëŠ” READ_ONCE() 와 WRITE_ONCE() ë’¤ì˜ READ_ONCE() 나 WRITE_ONCE(), - barrier(), ë˜ëŠ” 비슷한 ê²ƒë“¤ì„ ë‹´ê³ ìžˆì§€ ì•Šì€ ì½”ë“œë¥¼ 움ì§ì¼ 수 ìžˆì„ ê²ƒìœ¼ë¡œ - ê°€ì •ë˜ì–´ì•¼ 합니다. - - ì´ íš¨ê³¼ëŠ” barrier() 를 í†µí•´ì„œë„ ë§Œë“¤ 수 있지만, READ_ONCE() 와 - WRITE_ONCE() ê°€ 좀 ë” ì•ˆëª© ë†’ì€ ì„ íƒìž…니다: READ_ONCE() 와 WRITE_ONCE()는 - 컴파ì¼ëŸ¬ì— 주어진 메모리 ì˜ì—ì— ëŒ€í•´ì„œë§Œ 최ì í™” ê°€ëŠ¥ì„±ì„ í¬ê¸°í•˜ë„ë¡ - 하지만, barrier() 는 컴파ì¼ëŸ¬ê°€ 지금까지 ê¸°ê³„ì˜ ë ˆì§€ìŠ¤í„°ì— ìºì‹œí•´ ë†“ì€ - ëª¨ë“ ë©”ëª¨ë¦¬ ì˜ì—ì˜ ê°’ì„ ë²„ë ¤ì•¼ 하게 하기 때문입니다. ë¬¼ë¡ , 컴파ì¼ëŸ¬ëŠ” - READ_ONCE() 와 WRITE_ONCE() ê°€ ì¼ì–´ë‚œ ìˆœì„œë„ ì§€ì¼œì¤ë‹ˆë‹¤, CPU 는 당연히 - ê·¸ 순서를 지킬 ì˜ë¬´ê°€ 없지만요. - - (*) 컴파ì¼ëŸ¬ëŠ” 다ìŒì˜ 예ì—서와 ê°™ì´ ë³€ìˆ˜ì—ì˜ ìŠ¤í† ì–´ë¥¼ ë‚ ì¡°í•´ë‚¼ ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤: - - if (a) - b = a; - else - b = 42; - - 컴파ì¼ëŸ¬ëŠ” 아래와 ê°™ì€ ìµœì 화로 브랜치를 ì¤„ì¼ ê²ë‹ˆë‹¤: - - b = 42; - if (a) - b = a; - - 싱글 ì“°ë ˆë“œ 코드ì—ì„œ ì´ ìµœì 화는 ì•ˆì „í• ë¿ ì•„ë‹ˆë¼ ë¸Œëžœì¹˜ 갯수를 - 줄여ì¤ë‹ˆë‹¤. 하지만 안타ê¹ê²Œë„, ë™ì‹œì„±ì´ 있는 코드ì—서는 ì´ ìµœì 화는 다른 - CPU ê°€ 'b' 를 ë¡œë“œí• ë•Œ, -- 'a' ê°€ 0ì´ ì•„ë‹Œë°ë„ -- ê°€ì§œì¸ ê°’, 42를 보게 - ë˜ëŠ” 경우를 가능하게 합니다. ì´ê±¸ 방지하기 위해 WRITE_ONCE() 를 - 사용하세요: - - if (a) - WRITE_ONCE(b, a); - else - WRITE_ONCE(b, 42); - - 컴파ì¼ëŸ¬ëŠ” 로드를 만들어낼 ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. ì¼ë°˜ì 으로는 ë¬¸ì œë¥¼ ì¼ìœ¼í‚¤ì§€ - 않지만, ìºì‹œ ë¼ì¸ ë°”ìš´ì‹±ì„ ì¼ìœ¼ì¼œ 성능과 í™•ìž¥ì„±ì„ ë–¨ì–´ëœ¨ë¦´ 수 있습니다. - ë‚ ì¡°ëœ ë¡œë“œë¥¼ 막기 ìœ„í•´ì„ READ_ONCE() 를 사용하세요. - - (*) ì •ë ¬ëœ ë©”ëª¨ë¦¬ ì£¼ì†Œì— ìœ„ì¹˜í•œ, í•œë²ˆì˜ ë©”ëª¨ë¦¬ 참조 ì¸ìŠ¤íŠ¸ëŸì…˜ìœ¼ë¡œ 액세스 - 가능한 í¬ê¸°ì˜ ë°ì´í„°ëŠ” í•˜ë‚˜ì˜ í° ì•¡ì„¸ìŠ¤ê°€ ì—¬ëŸ¬ê°œì˜ ìž‘ì€ ì•¡ì„¸ìŠ¤ë“¤ë¡œ - 대체ë˜ëŠ” "로드 í‹°ì–´ë§(load tearing)" ê³¼ "ìŠ¤í† ì–´ í‹°ì–´ë§(store tearing)" ì„ - 방지합니다. 예를 들어, 주어진 아키í…ì³ê°€ 7-bit imeediate field 를 갖는 - 16-bit ìŠ¤í† ì–´ ì¸ìŠ¤íŠ¸ëŸì…˜ì„ ì œê³µí•œë‹¤ë©´, 컴파ì¼ëŸ¬ëŠ” 다ìŒì˜ 32-bit ìŠ¤í† ì–´ë¥¼ - 구현하는ë°ì— ë‘ê°œì˜ 16-bit store-immediate ëª…ë ¹ì„ ì‚¬ìš©í•˜ë ¤ í• ê²ë‹ˆë‹¤: - - p = 0x00010002; - - ìŠ¤í† ì–´ í• ìƒìˆ˜ë¥¼ ë§Œë“¤ê³ ê·¸ ê°’ì„ ìŠ¤í† ì–´ 하기 위해 ë‘개가 넘는 ì¸ìŠ¤íŠ¸ëŸì…˜ì„ - 사용하게 ë˜ëŠ”, ì´ëŸ° ì¢…ë¥˜ì˜ ìµœì 화를 GCC 는 ì‹¤ì œë¡œ í•¨ì„ ë¶€ë”” 알아 ë‘ì‹ì‹œì˜¤. - ì´ ìµœì 화는 싱글 ì“°ë ˆë“œ 코드ì—서는 성공ì ì¸ ìµœì í™” 입니다. ì‹¤ì œë¡œ, ê·¼ëž˜ì— - ë°œìƒí•œ (ê·¸ë¦¬ê³ ê³ ì³ì§„) 버그는 GCC ê°€ volatile ìŠ¤í† ì–´ì— ë¹„ì •ìƒì 으로 ì´ - 최ì 화를 사용하게 했습니다. 그런 버그가 없다면, 다ìŒì˜ 예ì—ì„œ - WRITE_ONCE() ì˜ ì‚¬ìš©ì€ ìŠ¤í† ì–´ í‹°ì–´ë§ì„ 방지합니다: - - WRITE_ONCE(p, 0x00010002); - - Packed êµ¬ì¡°ì²´ì˜ ì‚¬ìš© ì—ì‹œ 다ìŒì˜ 예처럼 로드 / ìŠ¤í† ì–´ í‹°ì–´ë§ì„ ìœ ë°œí• ìˆ˜ - 있습니다: - - struct __attribute__((__packed__)) foo { - short a; - int b; - short c; - }; - struct foo foo1, foo2; - ... - - foo2.a = foo1.a; - foo2.b = foo1.b; - foo2.c = foo1.c; - - READ_ONCE() 나 WRITE_ONCE() ë„ ì—†ê³ volatile ë§ˆí‚¹ë„ ì—†ê¸° 때문ì—, - 컴파ì¼ëŸ¬ëŠ” ì´ ì„¸ê°œì˜ ëŒ€ìž…ë¬¸ì„ ë‘ê°œì˜ 32-bit 로드와 ë‘ê°œì˜ 32-bit ìŠ¤í† ì–´ë¡œ - ë³€í™˜í• ìˆ˜ 있습니다. ì´ëŠ” 'foo1.b' ì˜ ê°’ì˜ ë¡œë“œ í‹°ì–´ë§ê³¼ 'foo2.b' ì˜ - ìŠ¤í† ì–´ í‹°ì–´ë§ì„ ì´ˆëž˜í• ê²ë‹ˆë‹¤. ì´ ì˜ˆì—ì„œë„ READ_ONCE() 와 WRITE_ONCE() - ê°€ í‹°ì–´ë§ì„ ë§‰ì„ ìˆ˜ 있습니다: - - foo2.a = foo1.a; - WRITE_ONCE(foo2.b, READ_ONCE(foo1.b)); - foo2.c = foo1.c; - -ê·¸ë ‡ì§€ë§Œ, volatile ë¡œ 마í¬ëœ ë³€ìˆ˜ì— ëŒ€í•´ì„œëŠ” READ_ONCE() 와 WRITE_ONCE() ê°€ -필요치 않습니다. 예를 들어, 'jiffies' 는 volatile ë¡œ 마í¬ë˜ì–´ 있기 때문ì—, -READ_ONCE(jiffies) ë¼ê³ í• í•„ìš”ê°€ 없습니다. READ_ONCE() 와 WRITE_ONCE() ê°€ -ì‹¤ì€ volatile ìºìŠ¤íŒ…으로 구현ë˜ì–´ 있어서 ì¸ìžê°€ ì´ë¯¸ volatile ë¡œ 마í¬ë˜ì–´ -있다면 ë˜ë‹¤ë¥¸ 효과를 내지는 않기 때문입니다. - -ì´ ì»´íŒŒì¼ëŸ¬ ë°°ë¦¬ì–´ë“¤ì€ CPU ì—는 ì§ì ‘ì 효과를 ì „í˜€ 만들지 않기 때문ì—, ê²°êµì€ -재배치가 ì¼ì–´ë‚ ìˆ˜ë„ ìžˆìŒì„ 부디 기억해 ë‘ì‹ì‹œì˜¤. - - -CPU 메모리 배리어 ------------------ - -리눅스 커ë„ì€ ë‹¤ìŒì˜ ì¼ê³±ê°œ 기본 CPU 메모리 배리어를 ê°€ì§€ê³ ìžˆìŠµë‹ˆë‹¤: - - TYPE MANDATORY SMP CONDITIONAL - =============== ======================= =============== - 범용 mb() smp_mb() - 쓰기 wmb() smp_wmb() - ì½ê¸° rmb() smp_rmb() - 주소 ì˜ì¡´ì„± READ_ONCE() - - -주소 ì˜ì¡´ì„± 배리어를 ì œì™¸í•œ ëª¨ë“ ë©”ëª¨ë¦¬ 배리어는 컴파ì¼ëŸ¬ 배리어를 í¬í•¨í•©ë‹ˆë‹¤. -주소 ì˜ì¡´ì„±ì€ 컴파ì¼ëŸ¬ì—ì˜ ì¶”ê°€ì ì¸ ìˆœì„œ ë³´ìž¥ì„ í¬í•¨í•˜ì§€ 않습니다. - -ë°©ë°±: 주소 ì˜ì¡´ì„±ì´ 있는 경우, 컴파ì¼ëŸ¬ëŠ” 해당 로드를 올바른 순서로 ì¼ìœ¼í‚¬ -것으로 (예: `a[b]` 는 a[b] 를 로드 하기 ì „ì— b ì˜ ê°’ì„ ë¨¼ì € 로드한다) -기대ë˜ì§€ë§Œ, C 언어 사양ì—는 컴파ì¼ëŸ¬ê°€ b ì˜ ê°’ì„ ì¶”ì¸¡ (예: 1 ê³¼ ê°™ìŒ) í•´ì„œ -b 로드 ì „ì— a 로드를 하는 코드 (예: tmp = a[1]; if (b != 1) tmp = a[b]; ) 를 -만들지 않아야 한다는 ë‚´ìš© ê°™ì€ ê±´ 없습니다. ë˜í•œ 컴파ì¼ëŸ¬ëŠ” a[b] 를 로드한 -í›„ì— b 를 ë˜ë‹¤ì‹œ ë¡œë“œí• ìˆ˜ë„ ìžˆì–´ì„œ, a[b] 보다 ìµœì‹ ë²„ì „ì˜ b ê°’ì„ ê°€ì§ˆ ìˆ˜ë„ -있습니다. ì´ëŸ° ë¬¸ì œë“¤ì˜ í•´ê²°ì±…ì— ëŒ€í•œ ì˜ê²¬ ì¼ì¹˜ëŠ” ì•„ì§ ì—†ìŠµë‹ˆë‹¤ë§Œ, ì¼ë‹¨ -READ_ONCE() 매í¬ë¡œë¶€í„° 보기 시작하는게 ì¢‹ì€ ì‹œìž‘ì´ ë ê²ë‹ˆë‹¤. - -SMP 메모리 ë°°ë¦¬ì–´ë“¤ì€ ìœ ë‹ˆí”„ë¡œì„¸ì„œë¡œ 컴파ì¼ëœ 시스템ì—서는 컴파ì¼ëŸ¬ 배리어로 -바뀌는ë°, í•˜ë‚˜ì˜ CPU 는 스스로 ì¼ê´€ì„±ì„ ìœ ì§€í•˜ê³ , 겹치는 액세스들 ì—ì‹œ 올바른 -순서로 행해질 것으로 ìƒê°ë˜ê¸° 때문입니다. 하지만, ì•„ëž˜ì˜ "Virtual Machine -Guests" ì„œë¸Œì„¹ì…˜ì„ ì°¸ê³ í•˜ì‹ì‹œì˜¤. - -[!] SMP 시스템ì—ì„œ ê³µìœ ë©”ëª¨ë¦¬ë¡œì˜ ì ‘ê·¼ë“¤ì„ ìˆœì„œ 세워야 í• ë•Œ, SMP 메모리 -배리어는 _반드시_ 사용ë˜ì–´ì•¼ í•¨ì„ ê¸°ì–µí•˜ì„¸ìš”, ê·¸ëŒ€ì‹ ë½ì„ 사용하는 ê²ƒìœ¼ë¡œë„ -충분하긴 하지만 ë§ì´ì£ . - -Mandatory ë°°ë¦¬ì–´ë“¤ì€ SMP 시스템ì—ì„œë„ UP 시스템ì—ì„œë„ SMP 효과만 í†µì œí•˜ê¸°ì—는 -불필요한 오버헤드를 갖기 ë•Œë¬¸ì— SMP 효과만 í†µì œí•˜ë©´ ë˜ëŠ” ê³³ì—는 사용ë˜ì§€ 않아야 -합니다. 하지만, ëŠìŠ¨í•œ 순서 ê·œì¹™ì˜ ë©”ëª¨ë¦¬ I/O 윈ë„우를 통한 MMIO ì˜ íš¨ê³¼ë¥¼ -í†µì œí• ë•Œì—는 mandatory ë°°ë¦¬ì–´ë“¤ì´ ì‚¬ìš©ë 수 있습니다. ì´ ë°°ë¦¬ì–´ë“¤ì€ -컴파ì¼ëŸ¬ì™€ CPU ëª¨ë‘ ìž¬ë°°ì¹˜ë¥¼ 못하ë„ë¡ í•¨ìœ¼ë¡œì¨ ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ë“¤ì´ 디바ì´ìŠ¤ì— -보여지는 순서ì—ë„ ì˜í–¥ì„ 주기 때문ì—, SMP ê°€ ì•„ë‹Œ 시스템ì´ë¼ í• ì§€ë¼ë„ í•„ìš”í• ìˆ˜ -있습니다. - - -ì¼ë¶€ ê³ ê¸‰ 배리어 í•¨ìˆ˜ë“¤ë„ ìžˆìŠµë‹ˆë‹¤: - - (*) smp_store_mb(var, value) - - ì´ í•¨ìˆ˜ëŠ” íŠ¹ì • ë³€ìˆ˜ì— íŠ¹ì • ê°’ì„ ëŒ€ìž…í•˜ê³ ë²”ìš© 메모리 배리어를 칩니다. - UP 컴파ì¼ì—서는 컴파ì¼ëŸ¬ 배리어보다 ë”í•œ ê²ƒì„ ì¹œë‹¤ê³ ëŠ” 보장ë˜ì§€ 않습니다. - - - (*) smp_mb__before_atomic(); - (*) smp_mb__after_atomic(); - - ì´ê²ƒë“¤ì€ 메모리 배리어를 ë‚´í¬í•˜ì§€ 않는 ì–´í† ë¯¹ RMW 함수를 사용하지만 ì½”ë“œì— - 메모리 배리어가 필요한 경우를 위한 것들입니다. 메모리 배리어를 ë‚´í¬í•˜ì§€ - 않는 ì–´í† ë¯¹ RMW í•¨ìˆ˜ë“¤ì˜ ì˜ˆë¡œëŠ” ë”하기, 빼기, (실패한) ì¡°ê±´ì - 오í¼ë ˆì´ì…˜ë“¤, _relaxed í•¨ìˆ˜ë“¤ì´ ìžˆìœ¼ë©°, atomic_read 나 atomic_set ì€ ì´ì— - 해당ë˜ì§€ 않습니다. 메모리 배리어가 필요해지는 í”í•œ 예로는 ì–´í† ë¯¹ - 오í¼ë ˆì´ì…˜ì„ 사용해 ë ˆí¼ëŸ°ìŠ¤ 카운트를 ìˆ˜ì •í•˜ëŠ” 경우를 들 수 있습니다. - - ì´ê²ƒë“¤ì€ ë˜í•œ (set_bit ê³¼ clear_bit ê°™ì€) 메모리 배리어를 ë‚´í¬í•˜ì§€ 않는 - ì–´í† ë¯¹ RMW bitop í•¨ìˆ˜ë“¤ì„ ìœ„í•´ì„œë„ ì‚¬ìš©ë 수 있습니다. - - í•œ 예로, ê°ì²´ 하나를 무효한 것으로 í‘œì‹œí•˜ê³ ê·¸ ê°ì²´ì˜ ë ˆí¼ëŸ°ìŠ¤ 카운트를 - ê°ì†Œì‹œí‚¤ëŠ” ë‹¤ìŒ ì½”ë“œë¥¼ 보세요: - - obj->dead = 1; - smp_mb__before_atomic(); - atomic_dec(&obj->ref_count); - - ì´ ì½”ë“œëŠ” ê°ì²´ì˜ ì—…ë°ì´íŠ¸ëœ death 마í¬ê°€ ë ˆí¼ëŸ°ìŠ¤ ì¹´ìš´í„° ê°ì†Œ ë™ìž‘ - *ì „ì—* ë³´ì¼ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - ë” ë§Žì€ ì •ë³´ë¥¼ ìœ„í•´ì„ Documentation/atomic_{t,bitops}.txt 문서를 - ì°¸ê³ í•˜ì„¸ìš”. - - - (*) dma_wmb(); - (*) dma_rmb(); - (*) dma_mb(); - - ì´ê²ƒë“¤ì€ CPU 와 DMA 가능한 디바ì´ìŠ¤ì—ì„œ ëª¨ë‘ ì•¡ì„¸ìŠ¤ 가능한 ê³µìœ ë©”ëª¨ë¦¬ì˜ - ì½ê¸°, 쓰기 ìž‘ì—…ë“¤ì˜ ìˆœì„œë¥¼ 보장하기 위해 consistent memory ì—ì„œ 사용하기 - 위한 것들입니다. - - 예를 들어, 디바ì´ìŠ¤ì™€ 메모리를 ê³µìœ í•˜ë©°, 디스í¬ë¦½í„° ìƒíƒœ ê°’ì„ ì‚¬ìš©í•´ - 디스í¬ë¦½í„°ê°€ 디바ì´ìŠ¤ì— ì†í•´ 있는지 아니면 CPU ì— ì†í•´ 있는지 í‘œì‹œí•˜ê³ , - 공지용 ì´ˆì¸ì¢…(doorbell) ì„ ì‚¬ìš©í•´ ì—…ë°ì´íŠ¸ëœ 디스í¬ë¦½í„°ê°€ 디바ì´ìŠ¤ì— 사용 - 가능해졌ìŒì„ 공지하는 디바ì´ìŠ¤ ë“œë¼ì´ë²„를 ìƒê°í•´ 봅시다: - - if (desc->status != DEVICE_OWN) { - /* 디스í¬ë¦½í„°ë¥¼ ì†Œìœ í•˜ê¸° ì „ì—는 ë°ì´í„°ë¥¼ ì½ì§€ ì•ŠìŒ */ - dma_rmb(); - - /* ë°ì´í„°ë¥¼ ì½ê³ 씀 */ - read_data = desc->data; - desc->data = write_data; - - /* ìƒíƒœ ì—…ë°ì´íŠ¸ ì „ ìˆ˜ì •ì‚¬í•ì„ ë°˜ì˜ */ - dma_wmb(); - - /* ì†Œìœ ê¶Œì„ ìˆ˜ì • */ - desc->status = DEVICE_OWN; - - /* ì—…ë°ì´íŠ¸ëœ 디스í¬ë¦½í„°ì˜ 디바ì´ìŠ¤ì— 공지 */ - writel(DESC_NOTIFY, doorbell); - } - - dma_rmb() 는 디스í¬ë¦½í„°ë¡œë¶€í„° ë°ì´í„°ë¥¼ ì½ì–´ì˜¤ê¸° ì „ì— ë””ë°”ì´ìŠ¤ê°€ ì†Œìœ ê¶Œì„ - ë‚´ë ¤ë†“ì•˜ì„ ê²ƒì„ ë³´ìž¥í•˜ê³ , dma_wmb() 는 디바ì´ìŠ¤ê°€ ìžì‹ ì´ ì†Œìœ ê¶Œì„ ë‹¤ì‹œ - 가졌ìŒì„ 보기 ì „ì— ë””ìŠ¤í¬ë¦½í„°ì— ë°ì´í„°ê°€ ì“°ì˜€ì„ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. dma_mb() - 는 dma_rmb() 와 dma_wmb() 를 ëª¨ë‘ ë‚´í¬í•©ë‹ˆë‹¤. ì°¸ê³ ë¡œ, writel() ì„ - 사용하면 ìºì‹œ ì¼ê´€ì„±ì´ 있는 메모리 (cache coherent memory) 쓰기가 MMIO - ì˜ì—ì—ì˜ ì“°ê¸° ì „ì— ì™„ë£Œë˜ì—ˆì„ ê²ƒì„ ë³´ìž¥í•˜ë¯€ë¡œ writel() ì•žì— wmb() 를 - ì‹¤í–‰í• í•„ìš”ê°€ ì—†ìŒì„ 알아ë‘시기 ë°”ëžë‹ˆë‹¤. writel() 보다 ë¹„ìš©ì´ ì €ë ´í•œ - writel_relaxed() 는 ì´ëŸ° ë³´ìž¥ì„ ì œê³µí•˜ì§€ 않으므로 ì—¬ê¸°ì„ ì‚¬ìš©ë˜ì§€ 않아야 - 합니다. - - writel_relaxed() 와 ê°™ì€ ì™„í™”ëœ I/O ì ‘ê·¼ìžë“¤ì— 대한 ìžì„¸í•œ ë‚´ìš©ì„ ìœ„í•´ì„œëŠ” - "ì»¤ë„ I/O ë°°ë¦¬ì–´ì˜ íš¨ê³¼" 섹션ì„, consistent memory ì— ëŒ€í•œ ìžì„¸í•œ ë‚´ìš©ì„ - ìœ„í•´ì„ Documentation/core-api/dma-api.rst 문서를 ì°¸ê³ í•˜ì„¸ìš”. - - (*) pmem_wmb(); - - ì´ê²ƒì€ persistent memory 를 위한 것으로, persistent ì €ìž¥ì†Œì— ê°€í•´ì§„ 변경 - 사í•ì´ í”Œëž«í¼ ì—°ì†ì„± ë„ë©”ì¸ì— ë„ë‹¬í–ˆì„ ê²ƒì„ ë³´ìž¥í•˜ê¸° 위한 것입니다. - - 예를 들어, ìž„ì‹œì ì´ì§€ ì•Šì€ pmem ì˜ì—ìœ¼ë¡œì˜ ì“°ê¸° 후, 우리는 쓰기가 í”Œëž«í¼ - ì—°ì†ì„± ë„ë©”ì¸ì— ë„ë‹¬í–ˆì„ ê²ƒì„ ë³´ìž¥í•˜ê¸° 위해 pmem_wmb() 를 사용합니다. - ì´ëŠ” 쓰기가 뒤따르는 instruction ë“¤ì´ ìœ ë°œí•˜ëŠ” ì–´ë– í•œ ë°ì´í„° 액세스나 - ë°ì´í„° ì „ì†¡ì˜ ì‹œìž‘ ì „ì— persistent ì €ìž¥ì†Œë¥¼ ì—…ë°ì´íŠ¸ í–ˆì„ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - ì´ëŠ” wmb() ì— ì˜í•´ ì´ë¤„지는 순서 ê·œì¹™ì„ í¬í•¨í•©ë‹ˆë‹¤. - - Persistent memory ì—ì„œì˜ ë¡œë“œë¥¼ ìœ„í•´ì„ í˜„ìž¬ì˜ ì½ê¸° 메모리 ë°°ë¦¬ì–´ë¡œë„ ì½ê¸° - 순서를 ë³´ìž¥í•˜ëŠ”ë° ì¶©ë¶„í•©ë‹ˆë‹¤. - - (*) io_stop_wc(); - - 쓰기와 ê²°í•©ëœ íŠ¹ì„±ì„ ê°–ëŠ” 메모리 ì•¡ì„¸ìŠ¤ì˜ ê²½ìš° (예: ioremap_wc() ì— ì˜í•´ - 리턴ë˜ëŠ” 것들), CPU 는 ì•žì˜ ì•¡ì„¸ìŠ¤ë“¤ì´ ë’¤ë”°ë¥´ëŠ” 것들과 병합ë˜ê²Œë” 기다릴 - 수 있습니다. io_stop_wc() 는 그런 ê¸°ë‹¤ë¦¼ì´ ì„±ëŠ¥ì— ì˜í–¥ì„ ë¼ì¹ 수 ìžˆì„ ë•Œ, - ì´ ë§¤í¬ë¡œ ì•žì˜ ì“°ê¸°-ê²°í•©ëœ ë©”ëª¨ë¦¬ ì•¡ì„¸ìŠ¤ë“¤ì´ ë§¤í¬ë¡œ ë’¤ì˜ ê²ƒë“¤ê³¼ 병합ë˜ëŠ” - ê²ƒì„ ë°©ì§€í•˜ê¸° 위해 사용ë 수 있습니다. - -========================= -암묵ì ì»¤ë„ ë©”ëª¨ë¦¬ 배리어 -========================= - -리눅스 커ë„ì˜ ì¼ë¶€ í•¨ìˆ˜ë“¤ì€ ë©”ëª¨ë¦¬ 배리어를 ë‚´ìž¥í•˜ê³ ìžˆëŠ”ë°, ë½(lock)ê³¼ -ìŠ¤ì¼€ì¥´ë§ ê´€ë ¨ í•¨ìˆ˜ë“¤ì´ ëŒ€ë¶€ë¶„ìž…ë‹ˆë‹¤. - -ì—¬ê¸°ì„ _최소한ì˜_ ë³´ìž¥ì„ ì„¤ëª…í•©ë‹ˆë‹¤; íŠ¹ì • 아키í…ì³ì—서는 ì´ ì„¤ëª…ë³´ë‹¤ ë” ë§Žì€ -ë³´ìž¥ì„ ì œê³µí• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤ë§Œ 해당 아키í…ì³ì— 종ì†ì ì¸ ì½”ë“œ ì™¸ì˜ ë¶€ë¶„ì—서는 -그런 ë³´ìž¥ì„ ê¸°ëŒ€í•´ì„ ì•ˆë ê²ë‹ˆë‹¤. - - -ë½ ACQUISITION 함수 -------------------- - -리눅스 커ë„ì€ ë‹¤ì–‘í•œ ë½ êµ¬ì„±ì²´ë¥¼ ê°€ì§€ê³ ìžˆìŠµë‹ˆë‹¤: - - (*) 스핀 ë½ - (*) R/W 스핀 ë½ - (*) 뮤í…스 - (*) 세마í¬ì–´ - (*) R/W 세마í¬ì–´ - -ê° êµ¬ì„±ì²´ë§ˆë‹¤ ëª¨ë“ ê²½ìš°ì— "ACQUIRE" 오í¼ë ˆì´ì…˜ê³¼ "RELEASE" 오í¼ë ˆì´ì…˜ì˜ ë³€ì¢…ì´ -존재합니다. ì´ ì˜¤í¼ë ˆì´ì…˜ë“¤ì€ ëª¨ë‘ ì ì ˆí•œ 배리어를 ë‚´í¬í•˜ê³ 있습니다: - - (1) ACQUIRE 오í¼ë ˆì´ì…˜ì˜ ì˜í–¥: - - ACQUIRE ë’¤ì—ì„œ ìš”ì²ëœ 메모리 오í¼ë ˆì´ì…˜ì€ ACQUIRE 오í¼ë ˆì´ì…˜ì´ ì™„ë£Œëœ - ë’¤ì— ì™„ë£Œë©ë‹ˆë‹¤. - - ACQUIRE ì•žì—ì„œ ìš”ì²ëœ 메모리 오í¼ë ˆì´ì…˜ì€ ACQUIRE 오í¼ë ˆì´ì…˜ì´ ì™„ë£Œëœ í›„ì— - 완료ë 수 있습니다. - - (2) RELEASE 오í¼ë ˆì´ì…˜ì˜ ì˜í–¥: - - RELEASE ì•žì—ì„œ ìš”ì²ëœ 메모리 오í¼ë ˆì´ì…˜ì€ RELEASE 오í¼ë ˆì´ì…˜ì´ 완료ë˜ê¸° - ì „ì— ì™„ë£Œë©ë‹ˆë‹¤. - - RELEASE ë’¤ì—ì„œ ìš”ì²ëœ 메모리 오í¼ë ˆì´ì…˜ì€ RELEASE 오í¼ë ˆì´ì…˜ 완료 ì „ì— - 완료ë 수 있습니다. - - (3) ACQUIRE vs ACQUIRE ì˜í–¥: - - ì–´ë–¤ ACQUIRE 오í¼ë ˆì´ì…˜ë³´ë‹¤ ì•žì—ì„œ ìš”ì²ëœ ëª¨ë“ ACQUIRE 오í¼ë ˆì´ì…˜ì€ ê·¸ - ACQUIRE 오í¼ë ˆì´ì…˜ ì „ì— ì™„ë£Œë©ë‹ˆë‹¤. - - (4) ACQUIRE vs RELEASE implication: - - ì–´ë–¤ RELEASE 오í¼ë ˆì´ì…˜ë³´ë‹¤ ì•žì„œ ìš”ì²ëœ ACQUIRE 오í¼ë ˆì´ì…˜ì€ ê·¸ RELEASE - 오í¼ë ˆì´ì…˜ë³´ë‹¤ ë¨¼ì € 완료ë©ë‹ˆë‹¤. - - (5) 실패한 ì¡°ê±´ì ACQUIRE ì˜í–¥: - - ACQUIRE 오í¼ë ˆì´ì…˜ì˜ ì¼ë¶€ ë½(lock) ë³€ì¢…ì€ ë½ì´ 곧바로 íšë“하기ì—는 - 불가능한 ìƒíƒœì´ê±°ë‚˜ ë½ì´ íšë“ 가능해지ë„ë¡ ê¸°ë‹¤ë¦¬ëŠ” ë„중 시그ë„ì„ ë°›ê±°ë‚˜ - í•´ì„œ ì‹¤íŒ¨í• ìˆ˜ 있습니다. 실패한 ë½ì€ ì–´ë–¤ ë°°ë¦¬ì–´ë„ ë‚´í¬í•˜ì§€ 않습니다. - -[!] ì°¸ê³ : ë½ ACQUIRE 와 RELEASE ê°€ 단방향 배리어여서 나타나는 í˜„ìƒ ì¤‘ 하나는 -í¬ë¦¬í‹°ì»¬ 섹션 ë°”ê¹¥ì˜ ì¸ìŠ¤íŠ¸ëŸì…˜ì˜ ì˜í–¥ì´ í¬ë¦¬í‹°ì»¬ 섹션 ë‚´ë¶€ë¡œë„ ë“¤ì–´ì˜¬ 수 -있다는 것입니다. - -RELEASE í›„ì— ìš”ì²ë˜ëŠ” ACQUIRE 는 ì „ì²´ 메모리 ë°°ë¦¬ì–´ë¼ ì—¬ê²¨ì§€ë©´ 안ë˜ëŠ”ë°, -ACQUIRE ì•žì˜ ì•¡ì„¸ìŠ¤ê°€ ACQUIRE í›„ì— ìˆ˜í–‰ë 수 ìžˆê³ , RELEASE í›„ì˜ ì•¡ì„¸ìŠ¤ê°€ -RELEASE ì „ì— ìˆ˜í–‰ë ìˆ˜ë„ ìžˆìœ¼ë©°, ê·¸ ë‘ê°œì˜ ì•¡ì„¸ìŠ¤ê°€ 서로를 ì§€ë‚˜ì¹ ìˆ˜ë„ ìžˆê¸° -때문입니다: - - *A = a; - ACQUIRE M - RELEASE M - *B = b; - -는 다ìŒê³¼ ê°™ì´ ë ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤: - - ACQUIRE M, STORE *B, STORE *A, RELEASE M - -ACQUIRE 와 RELEASE ê°€ ë½ íšë“ê³¼ í•´ì œë¼ë©´, ê·¸ë¦¬ê³ ë½ì˜ ACQUIRE 와 RELEASE ê°€ -ê°™ì€ ë½ ë³€ìˆ˜ì— ëŒ€í•œ 것ì´ë¼ë©´, 해당 ë½ì„ ì¥ê³ 있지 ì•Šì€ ë‹¤ë¥¸ CPU ì˜ ì‹œì•¼ì—는 -ì´ì™€ ê°™ì€ ìž¬ë°°ì¹˜ê°€ ì¼ì–´ë‚˜ëŠ” 것으로 ë³´ì¼ ìˆ˜ 있습니다. 요약하ìžë©´, ACQUIRE ì— -ì´ì–´ RELEASE 오í¼ë ˆì´ì…˜ì„ 순차ì 으로 실행하는 행위가 ì „ì²´ 메모리 배리어로 -ìƒê°ë˜ì–´ì„ -안ë©ë‹ˆë‹¤-. - -비슷하게, ì•žì˜ ë°˜ëŒ€ ì¼€ì´ìŠ¤ì¸ RELEASE 와 ACQUIRE ë‘ê°œ 오í¼ë ˆì´ì…˜ì˜ 순차ì 실행 -ì—ì‹œ ì „ì²´ 메모리 배리어를 ë‚´í¬í•˜ì§€ 않습니다. ë”°ë¼ì„œ, RELEASE, ACQUIRE ë¡œ -ê·œì •ë˜ëŠ” í¬ë¦¬í‹°ì»¬ ì„¹ì…˜ì˜ CPU ìˆ˜í–‰ì€ RELEASE 와 ACQUIRE 를 가로지를 수 있으므로, -다ìŒê³¼ ê°™ì€ ì½”ë“œëŠ”: - - *A = a; - RELEASE M - ACQUIRE N - *B = b; - -다ìŒê³¼ ê°™ì´ ìˆ˜í–‰ë 수 있습니다: - - ACQUIRE N, STORE *B, STORE *A, RELEASE M - -ì´ëŸ° 재배치는 ë°ë“œë½ì„ ì¼ìœ¼í‚¬ ìˆ˜ë„ ìžˆì„ ê²ƒì²˜ëŸ¼ ë³´ì¼ ìˆ˜ 있습니다. 하지만, 그런 -ë°ë“œë½ì˜ ì¡°ì§ì´ 있다면 RELEASE 는 단순히 완료ë 것ì´ë¯€ë¡œ ë°ë“œë½ì€ ì¡´ìž¬í• ìˆ˜ -없습니다. - - ì´ê²Œ 어떻게 올바른 ë™ìž‘ì„ í• ìˆ˜ 있ì„까요? - - 우리가 ì´ì•¼ê¸° í•˜ê³ ìžˆëŠ”ê±´ 재배치를 하는 CPU ì— ëŒ€í•œ ì´ì•¼ê¸°ì´ì§€, - 컴파ì¼ëŸ¬ì— 대한 ê²ƒì´ ì•„ë‹ˆëž€ ì ì´ í•µì‹¬ìž…ë‹ˆë‹¤. 컴파ì¼ëŸ¬ (ë˜ëŠ”, 개발ìž) - ê°€ 오í¼ë ˆì´ì…˜ë“¤ì„ ì´ë ‡ê²Œ 재배치하면, ë°ë“œë½ì´ ì¼ì–´ë‚ 수 -있습-니다. - - 하지만 CPU ê°€ 오í¼ë ˆì´ì…˜ë“¤ì„ 재배치 했다는걸 ìƒê°í•´ 보세요. ì´ ì˜ˆì—ì„œ, - 어셈블리 코드 ìƒìœ¼ë¡œëŠ” ì–¸ë½ì´ ë½ì„ 앞서게 ë˜ì–´ 있습니다. CPU ê°€ ì´ë¥¼ - 재배치해서 ë’¤ì˜ ë½ ì˜¤í¼ë ˆì´ì…˜ì„ ë¨¼ì € 실행하게 ë©ë‹ˆë‹¤. 만약 ë°ë“œë½ì´ - 존재한다면, ì´ ë½ ì˜¤í¼ë ˆì´ì…˜ì€ ê·¸ì € ìŠ¤í•€ì„ í•˜ë©° 계ì†í•´ì„œ ë½ì„ - ì‹œë„합니다 (ë˜ëŠ”, 한참 후ì—ê² ì§€ë§Œ, ìž ë“니다). CPU 는 ì–¸ì 가는 - (어셈블리 코드ì—서는 ë½ì„ 앞서는) ì–¸ë½ ì˜¤í¼ë ˆì´ì…˜ì„ 실행하는ë°, ì´ ì–¸ë½ - 오í¼ë ˆì´ì…˜ì´ ìž ìž¬ì ë°ë“œë½ì„ í•´ê²°í•˜ê³ , ë½ ì˜¤í¼ë ˆì´ì…˜ë„ ë’¤ì´ì–´ 성공하게 - ë©ë‹ˆë‹¤. - - 하지만 만약 ë½ì´ ìž ì„ ìžëŠ” 타입ì´ì—ˆë‹¤ë©´ìš”? 그런 ê²½ìš°ì— ì½”ë“œëŠ” - 스케쥴러로 ë“¤ì–´ê°€ë ¤ í• ê±°ê³ , 여기서 ê²°êµì€ 메모리 배리어를 만나게 - ë˜ëŠ”ë°, ì´ ë©”ëª¨ë¦¬ 배리어는 ì•žì˜ ì–¸ë½ ì˜¤í¼ë ˆì´ì…˜ì´ 완료ë˜ë„ë¡ ë§Œë“¤ê³ , - ë°ë“œë½ì€ ì´ë²ˆì—ë„ í•´ê²°ë©ë‹ˆë‹¤. ìž ì„ ìžëŠ” 행위와 ì–¸ë½ ì‚¬ì´ì˜ 경주 ìƒí™© - (race) ë„ ìžˆì„ ìˆ˜ ìžˆê² ìŠµë‹ˆë‹¤ë§Œ, ë½ ê´€ë ¨ ê¸°ëŠ¥ë“¤ì€ ê·¸ëŸ° 경주 ìƒí™©ì„ ëª¨ë“ - ê²½ìš°ì— ì œëŒ€ë¡œ í•´ê²°í• ìˆ˜ 있어야 합니다. - -ë½ê³¼ 세마í¬ì–´ëŠ” UP 컴파ì¼ëœ 시스템ì—ì„œì˜ ìˆœì„œì— ëŒ€í•´ ë³´ìž¥ì„ í•˜ì§€ 않기 때문ì—, -그런 ìƒí™©ì—ì„œ ì¸í„°ëŸ½íŠ¸ 비활성화 오í¼ë ˆì´ì…˜ê³¼ 함께가 아니ë¼ë©´ ì–´ë–¤ ì¼ì—ë„ - 특히 -I/O 액세스와 ê´€ë ¨í•´ì„œëŠ” - ì œëŒ€ë¡œ 사용ë 수 ì—†ì„ ê²ë‹ˆë‹¤. - -"CPU ê°„ ACQUIRING 배리어 효과" ì„¹ì…˜ë„ ì°¸ê³ í•˜ì‹œê¸° ë°”ëžë‹ˆë‹¤. - - -예를 들어, 다ìŒê³¼ ê°™ì€ ì½”ë“œë¥¼ ìƒê°í•´ 봅시다: - - *A = a; - *B = b; - ACQUIRE - *C = c; - *D = d; - RELEASE - *E = e; - *F = f; - -ì—¬ê¸°ì„ ë‹¤ìŒì˜ ì´ë²¤íŠ¸ 시퀀스가 ìƒê¸¸ 수 있습니다: - - ACQUIRE, {*F,*A}, *E, {*C,*D}, *B, RELEASE - - [+] {*F,*A} 는 ì¡°í•©ëœ ì•¡ì„¸ìŠ¤ë¥¼ ì˜ë¯¸í•©ë‹ˆë‹¤. - -하지만 다ìŒê³¼ ê°™ì€ ê±´ ë¶ˆê°€ëŠ¥í•˜ì£ : - - {*F,*A}, *B, ACQUIRE, *C, *D, RELEASE, *E - *A, *B, *C, ACQUIRE, *D, RELEASE, *E, *F - *A, *B, ACQUIRE, *C, RELEASE, *D, *E, *F - *B, ACQUIRE, *C, *D, RELEASE, {*F,*A}, *E - - - -ì¸í„°ëŸ½íŠ¸ 비활성화 함수 ----------------------- - -ì¸í„°ëŸ½íŠ¸ë¥¼ 비활성화 하는 함수 (ACQUIRE 와 ë™ì¼) 와 ì¸í„°ëŸ½íŠ¸ë¥¼ 활성화 하는 함수 -(RELEASE 와 ë™ì¼) 는 컴파ì¼ëŸ¬ 배리어처럼만 ë™ìž‘합니다. ë”°ë¼ì„œ, 별ë„ì˜ ë©”ëª¨ë¦¬ -배리어나 I/O 배리어가 필요한 ìƒí™©ì´ë¼ë©´ ê·¸ ë°°ë¦¬ì–´ë“¤ì€ ì¸í„°ëŸ½íŠ¸ 비활성화 함수 -ì™¸ì˜ ë°©ë²•ìœ¼ë¡œ ì œê³µë˜ì–´ì•¼ë§Œ 합니다. - - -슬립과 웨ì´í¬ì—… 함수 --------------------- - -글로벌 ë°ì´í„°ì— í‘œì‹œëœ ì´ë²¤íŠ¸ì— ì˜í•´ 프로세스를 ìž ì— ë¹ íŠ¸ë¦¬ëŠ” 것과 깨우는 ê²ƒì€ -해당 ì´ë²¤íŠ¸ë¥¼ 기다리는 태스í¬ì˜ íƒœìŠ¤í¬ ìƒíƒœì™€ ê·¸ ì´ë²¤íŠ¸ë¥¼ 알리기 위해 사용ë˜ëŠ” -글로벌 ë°ì´í„°, ë‘ ë°ì´í„°ê°„ì˜ ìƒí˜¸ìž‘용으로 ë³¼ 수 있습니다. ì´ê²ƒì´ ì˜³ì€ ìˆœì„œëŒ€ë¡œ -ì¼ì–´ë‚¨ì„ 분명히 하기 위해, 프로세스를 ìž ì— ë“¤ê²Œ 하는 기능과 깨우는 ê¸°ëŠ¥ì€ -몇가지 배리어를 ë‚´í¬í•©ë‹ˆë‹¤. - -ë¨¼ì €, ìž ì„ ìž¬ìš°ëŠ” ìª½ì€ ì¼ë°˜ì 으로 다ìŒê³¼ ê°™ì€ ì´ë²¤íŠ¸ 시퀀스를 따릅니다: - - for (;;) { - set_current_state(TASK_UNINTERRUPTIBLE); - if (event_indicated) - break; - schedule(); - } - -set_current_state() ì— ì˜í•´, íƒœìŠ¤í¬ ìƒíƒœê°€ ë°”ë€ í›„ 범용 메모리 배리어가 -ìžë™ìœ¼ë¡œ 삽입ë©ë‹ˆë‹¤: - - CPU 1 - =============================== - set_current_state(); - smp_store_mb(); - STORE current->state - <범용 배리어> - LOAD event_indicated - -set_current_state() 는 다ìŒì˜ 것들로 ê°ì‹¸ì§ˆ ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤: - - prepare_to_wait(); - prepare_to_wait_exclusive(); - -ì´ê²ƒë“¤ ì—ì‹œ ìƒíƒœë¥¼ ì„¤ì •í•œ 후 범용 메모리 배리어를 삽입합니다. -ì•žì˜ ì „ì²´ 시퀀스는 다ìŒê³¼ ê°™ì€ í•¨ìˆ˜ë“¤ë¡œ í•œë²ˆì— ìˆ˜í–‰ 가능한ë°, ì´ê²ƒë“¤ì€ ëª¨ë‘ -올바른 ìž¥ì†Œì— ë©”ëª¨ë¦¬ 배리어를 삽입합니다: - - wait_event(); - wait_event_interruptible(); - wait_event_interruptible_exclusive(); - wait_event_interruptible_timeout(); - wait_event_killable(); - wait_event_timeout(); - wait_on_bit(); - wait_on_bit_lock(); - - -ë‘번째로, 깨우기를 수행하는 코드는 ì¼ë°˜ì 으로 다ìŒê³¼ ê°™ì„ ê²ë‹ˆë‹¤: - - event_indicated = 1; - wake_up(&event_wait_queue); - -ë˜ëŠ”: - - event_indicated = 1; - wake_up_process(event_daemon); - -wake_up() ì´ ë¬´ì–¸ê°€ë¥¼ 깨우게 ë˜ë©´, ì´ í•¨ìˆ˜ëŠ” 범용 메모리 배리어를 수행합니다. -ì´ í•¨ìˆ˜ê°€ ì•„ë¬´ê²ƒë„ ê¹¨ìš°ì§€ 않는다면 메모리 배리어는 수행ë 수ë„, 수행ë˜ì§€ ì•Šì„ -ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤; ì´ ê²½ìš°ì— ë©”ëª¨ë¦¬ 배리어를 ìˆ˜í–‰í• ê±°ë¼ ì˜¤í•´í•´ì„ ì•ˆë©ë‹ˆë‹¤. ì´ -배리어는 íƒœìŠ¤í¬ ìƒíƒœê°€ ì ‘ê·¼ë˜ê¸° ì „ì— ìˆ˜í–‰ë˜ëŠ”ë°, ìžì„¸ížˆ ë§í•˜ë©´ ì´ ì´ë²¤íŠ¸ë¥¼ -알리기 위한 STORE 와 TASK_RUNNING 으로 ìƒíƒœë¥¼ 쓰는 STORE 사ì´ì— 수행ë©ë‹ˆë‹¤: - - CPU 1 (Sleeper) CPU 2 (Waker) - =============================== =============================== - set_current_state(); STORE event_indicated - smp_store_mb(); wake_up(); - STORE current->state ... - <범용 배리어> <범용 배리어> - LOAD event_indicated if ((LOAD task->state) & TASK_NORMAL) - STORE task->state - -여기서 "task" 는 깨어나지는 ì“°ë ˆë“œì´ê³ CPU 1 ì˜ "current" 와 같습니다. - -반복하지만, wake_up() ì´ ë¬´ì–¸ê°€ë¥¼ ì •ë§ ê¹¨ìš´ë‹¤ë©´ 범용 메모리 배리어가 수행ë -ê²ƒì´ ë³´ìž¥ë˜ì§€ë§Œ, ê·¸ë ‡ì§€ 않다면 그런 ë³´ìž¥ì´ ì—†ìŠµë‹ˆë‹¤. ì´ê±¸ ì´í•´í•˜ê¸° 위해, X 와 -Y 는 ëª¨ë‘ 0 으로 초기화 ë˜ì–´ 있다는 ê°€ì • í•˜ì— ì•„ëž˜ì˜ ì´ë²¤íŠ¸ 시퀀스를 ìƒê°í•´ -봅시다: - - CPU 1 CPU 2 - =============================== =============================== - X = 1; Y = 1; - smp_mb(); wake_up(); - LOAD Y LOAD X - -ì •ë§ë¡œ 깨우기가 행해졌다면, ë‘ ë¡œë“œ 중 (최소한) 하나는 1 ì„ ë³´ê²Œ ë©ë‹ˆë‹¤. -반면ì—, ì‹¤ì œ 깨우기가 행해지지 않았다면, ë‘ ë¡œë“œ ëª¨ë‘ 0ì„ ë³¼ ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. - -wake_up_process() 는 í•ìƒ 범용 메모리 배리어를 수행합니다. ì´ ë°°ë¦¬ì–´ ì—ì‹œ -íƒœìŠ¤í¬ ìƒíƒœê°€ ì ‘ê·¼ë˜ê¸° ì „ì— ìˆ˜í–‰ë©ë‹ˆë‹¤. 특히, ì•žì˜ ì˜ˆì œ 코드ì—ì„œ wake_up() ì´ -wake_up_process() ë¡œ 대체ëœë‹¤ë©´ ë‘ ë¡œë“œ 중 하나는 1ì„ ë³¼ ê²ƒì´ ë³´ìž¥ë©ë‹ˆë‹¤. - -사용 가능한 깨우기류 함수들로 다ìŒê³¼ ê°™ì€ ê²ƒë“¤ì´ ìžˆìŠµë‹ˆë‹¤: - - complete(); - wake_up(); - wake_up_all(); - wake_up_bit(); - wake_up_interruptible(); - wake_up_interruptible_all(); - wake_up_interruptible_nr(); - wake_up_interruptible_poll(); - wake_up_interruptible_sync(); - wake_up_interruptible_sync_poll(); - wake_up_locked(); - wake_up_locked_poll(); - wake_up_nr(); - wake_up_poll(); - wake_up_process(); - -메모리 순서규칙 ê´€ì ì—ì„œ, ì´ í•¨ìˆ˜ë“¤ì€ ëª¨ë‘ wake_up() ê³¼ 같거나 보다 ê°•í•œ 순서 -ë³´ìž¥ì„ ì œê³µí•©ë‹ˆë‹¤. - -[!] ìž ìž¬ìš°ëŠ” 코드와 깨우는 ì½”ë“œì— ë‚´í¬ë˜ëŠ” 메모리 ë°°ë¦¬ì–´ë“¤ì€ ê¹¨ìš°ê¸° ì „ì— -ì´ë£¨ì–´ì§„ ìŠ¤í† ì–´ë¥¼ ìž ìž¬ìš°ëŠ” 코드가 set_current_state() 를 호출한 í›„ì— í–‰í•˜ëŠ” -ë¡œë“œì— ëŒ€í•´ 순서를 맞추지 _않는다는_ ì ì„ ê¸°ì–µí•˜ì„¸ìš”. 예를 들어, ìž ìž¬ìš°ëŠ” -코드가 다ìŒê³¼ ê°™ê³ : - - set_current_state(TASK_INTERRUPTIBLE); - if (event_indicated) - break; - __set_current_state(TASK_RUNNING); - do_something(my_data); - -깨우는 코드는 다ìŒê³¼ 같다면: - - my_data = value; - event_indicated = 1; - wake_up(&event_wait_queue); - -event_indecated ì—ì˜ ë³€ê²½ì´ ìž ìž¬ìš°ëŠ” 코드ì—게 my_data ì—ì˜ ë³€ê²½ í›„ì— ì´ë£¨ì–´ì§„ -것으로 ì¸ì§€ë 것ì´ë¼ëŠ” ë³´ìž¥ì´ ì—†ìŠµë‹ˆë‹¤. ì´ëŸ° 경우ì—는 양쪽 코드 ëª¨ë‘ ê°ê°ì˜ -ë°ì´í„° 액세스 사ì´ì— 메모리 배리어를 ì§ì ‘ ì³ì•¼ 합니다. ë”°ë¼ì„œ ì•žì˜ ìž¬ìš°ëŠ” -코드는 다ìŒê³¼ ê°™ì´: - - set_current_state(TASK_INTERRUPTIBLE); - if (event_indicated) { - smp_rmb(); - do_something(my_data); - } - -ê·¸ë¦¬ê³ ê¹¨ìš°ëŠ” 코드는 다ìŒê³¼ ê°™ì´ ë˜ì–´ì•¼ 합니다: - - my_data = value; - smp_wmb(); - event_indicated = 1; - wake_up(&event_wait_queue); - - -ê·¸ì™¸ì˜ í•¨ìˆ˜ë“¤ -------------- - -ê·¸ì™¸ì˜ ë°°ë¦¬ì–´ë¥¼ ë‚´í¬í•˜ëŠ” í•¨ìˆ˜ë“¤ì€ ë‹¤ìŒê³¼ 같습니다: - - (*) schedule() ê³¼ ê·¸ ìœ ì‚¬í•œ ê²ƒë“¤ì´ ì™„ì „í•œ 메모리 배리어를 ë‚´í¬í•©ë‹ˆë‹¤. - - -============================== -CPU ê°„ ACQUIRING ë°°ë¦¬ì–´ì˜ íš¨ê³¼ -============================== - -SMP 시스템ì—ì„œì˜ ë½ ê¸°ëŠ¥ë“¤ì€ ë”ìš± ê°•ë ¥í•œ í˜•íƒœì˜ ë°°ë¦¬ì–´ë¥¼ ì œê³µí•©ë‹ˆë‹¤: ì´ -배리어는 ë™ì¼í•œ ë½ì„ 사용하는 다른 CPU ë“¤ì˜ ë©”ëª¨ë¦¬ 액세스 순서ì—ë„ ì˜í–¥ì„ -ë¼ì¹©ë‹ˆë‹¤. - - -ACQUIRE VS 메모리 액세스 ------------------------- - -다ìŒì˜ 예를 ìƒê°í•´ 봅시다: ì‹œìŠ¤í…œì€ ë‘ê°œì˜ ìŠ¤í•€ë½ (M) ê³¼ (Q), ê·¸ë¦¬ê³ ì„¸ê°œì˜ CPU -를 ê°€ì§€ê³ ìžˆìŠµë‹ˆë‹¤; ì—¬ê¸°ì— ë‹¤ìŒì˜ ì´ë²¤íŠ¸ 시퀀스가 ë°œìƒí•©ë‹ˆë‹¤: - - CPU 1 CPU 2 - =============================== =============================== - WRITE_ONCE(*A, a); WRITE_ONCE(*E, e); - ACQUIRE M ACQUIRE Q - WRITE_ONCE(*B, b); WRITE_ONCE(*F, f); - WRITE_ONCE(*C, c); WRITE_ONCE(*G, g); - RELEASE M RELEASE Q - WRITE_ONCE(*D, d); WRITE_ONCE(*H, h); - -*A ë¡œì˜ ì•¡ì„¸ìŠ¤ë¶€í„° *H ë¡œì˜ ì•¡ì„¸ìŠ¤ê¹Œì§€ê°€ ì–´ë–¤ 순서로 CPU 3 ì—게 ë³´ì—¬ì§ˆì§€ì— -대해서는 ê° CPU ì—ì„œì˜ ë½ ì‚¬ìš©ì— ì˜í•´ ë‚´í¬ë˜ì–´ 있는 ì œì•½ì„ ì œì™¸í•˜ê³ ëŠ” ì–´ë–¤ -ë³´ìž¥ë„ ì¡´ìž¬í•˜ì§€ 않습니다. 예를 들어, CPU 3 ì—게 다ìŒê³¼ ê°™ì€ ìˆœì„œë¡œ 보여지는 -ê²ƒì´ ê°€ëŠ¥í•©ë‹ˆë‹¤: - - *E, ACQUIRE M, ACQUIRE Q, *G, *C, *F, *A, *B, RELEASE Q, *D, *H, RELEASE M - -하지만 다ìŒê³¼ ê°™ì´ ë³´ì´ì§€ëŠ” ì•Šì„ ê²ë‹ˆë‹¤: - - *B, *C or *D preceding ACQUIRE M - *A, *B or *C following RELEASE M - *F, *G or *H preceding ACQUIRE Q - *E, *F or *G following RELEASE Q - - -========================= -메모리 배리어가 필요한 ê³³ -========================= - -ì„¤ë ¹ SMP 커ë„ì„ ì‚¬ìš©í•˜ë”ë¼ë„ 싱글 ì“°ë ˆë“œë¡œ ë™ìž‘하는 코드는 올바르게 ë™ìž‘하는 -것으로 보여질 것ì´ê¸° 때문ì—, í‰ë²”í•œ 시스템 ìš´ì˜ì¤‘ì— ë©”ëª¨ë¦¬ 오í¼ë ˆì´ì…˜ 재배치는 -ì¼ë°˜ì 으로 ë¬¸ì œê°€ ë˜ì§€ 않습니다. 하지만, 재배치가 ë¬¸ì œê°€ _ë 수 있는_ 네가지 -í™˜ê²½ì´ ìžˆìŠµë‹ˆë‹¤: - - (*) 프로세서간 ìƒí˜¸ ìž‘ìš©. - - (*) ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜. - - (*) 디바ì´ìŠ¤ 액세스. - - (*) ì¸í„°ëŸ½íŠ¸. - - -프로세서간 ìƒí˜¸ ìž‘ìš© --------------------- - -ë‘ê°œ ì´ìƒì˜ 프로세서를 가진 ì‹œìŠ¤í…œì´ ìžˆë‹¤ë©´, ì‹œìŠ¤í…œì˜ ë‘ê°œ ì´ìƒì˜ CPU 는 ë™ì‹œì— -ê°™ì€ ë°ì´í„°ì— 대한 ìž‘ì—…ì„ í• ìˆ˜ 있습니다. ì´ëŠ” ë™ê¸°í™” ë¬¸ì œë¥¼ ì¼ìœ¼í‚¬ 수 ìžˆê³ , -ì´ ë¬¸ì œë¥¼ 해결하는 ì¼ë°˜ì ë°©ë²•ì€ ë½ì„ 사용하는 것입니다. 하지만, ë½ì€ ìƒë‹¹ížˆ -ë¹„ìš©ì´ ë¹„ì‹¸ì„œ 가능하면 ë½ì„ 사용하지 ì•Šê³ ì¼ì„ 처리하는 ê²ƒì´ ë‚«ìŠµë‹ˆë‹¤. ì´ëŸ° -경우, ë‘ CPU 모ë‘ì— ì˜í–¥ì„ ë¼ì¹˜ëŠ” 오í¼ë ˆì´ì…˜ë“¤ì€ 오ë™ìž‘ì„ ë§‰ê¸° 위해 ì‹ ì¤‘í•˜ê²Œ -순서가 ë§žì¶°ì ¸ì•¼ 합니다. - -예를 들어, R/W 세마í¬ì–´ì˜ ëŠë¦° 수행경로 (slow path) 를 ìƒê°í•´ 봅시다. -세마í¬ì–´ë¥¼ 위해 대기를 하는 í•˜ë‚˜ì˜ í”„ë¡œì„¸ìŠ¤ê°€ ìžì‹ ì˜ ìŠ¤íƒ ì¤‘ ì¼ë¶€ë¥¼ ì´ -세마í¬ì–´ì˜ 대기 프로세스 ë¦¬ìŠ¤íŠ¸ì— ë§í¬í•œ 채로 있습니다: - - struct rw_semaphore { - ... - spinlock_t lock; - struct list_head waiters; - }; - - struct rwsem_waiter { - struct list_head list; - struct task_struct *task; - }; - -íŠ¹ì • 대기 ìƒíƒœ 프로세스를 깨우기 위해, up_read() 나 up_write() 함수는 다ìŒê³¼ -ê°™ì€ ì¼ì„ 합니다: - - (1) ë‹¤ìŒ ëŒ€ê¸° ìƒíƒœ 프로세스 ë ˆì½”ë“œëŠ” 어디있는지 알기 위해 ì´ ëŒ€ê¸° ìƒíƒœ - 프로세스 ë ˆì½”ë“œì˜ next í¬ì¸í„°ë¥¼ ì½ìŠµë‹ˆë‹¤; - - (2) ì´ ëŒ€ê¸° ìƒíƒœ í”„ë¡œì„¸ìŠ¤ì˜ task êµ¬ì¡°ì²´ë¡œì˜ í¬ì¸í„°ë¥¼ ì½ìŠµë‹ˆë‹¤; - - (3) ì´ ëŒ€ê¸° ìƒíƒœ 프로세스가 세마í¬ì–´ë¥¼ íšë“í–ˆìŒì„ 알리기 위해 task - í¬ì¸í„°ë¥¼ 초기화 합니다; - - (4) 해당 태스í¬ì— 대해 wake_up_process() 를 호출합니다; ê·¸ë¦¬ê³ - - (5) 해당 대기 ìƒíƒœ í”„ë¡œì„¸ìŠ¤ì˜ task 구조체를 ìž¡ê³ ìžˆë˜ ë ˆí¼ëŸ°ìŠ¤ë¥¼ í•´ì œí•©ë‹ˆë‹¤. - -달리 ë§í•˜ìžë©´, ë‹¤ìŒ ì´ë²¤íŠ¸ 시퀀스를 수행해야 합니다: - - LOAD waiter->list.next; - LOAD waiter->task; - STORE waiter->task; - CALL wakeup - RELEASE task - -ê·¸ë¦¬ê³ ì´ ì´ë²¤íŠ¸ë“¤ì´ 다른 순서로 수행ëœë‹¤ë©´, 오ë™ìž‘ì´ ì¼ì–´ë‚ 수 있습니다. - -한번 세마í¬ì–´ì˜ ëŒ€ê¸°ì¤„ì— ë“¤ì–´ê°”ê³ ì„¸ë§ˆí¬ì–´ ë½ì„ 놓았다면, 해당 대기 프로세스는 -ë½ì„ 다시는 잡지 않습니다; ëŒ€ì‹ ìžì‹ ì˜ task í¬ì¸í„°ê°€ 초기화 ë˜ê¸¸ 기다립니다. -ê·¸ ë ˆì½”ë“œëŠ” 대기 í”„ë¡œì„¸ìŠ¤ì˜ ìŠ¤íƒì— 있기 때문ì—, ë¦¬ìŠ¤íŠ¸ì˜ next í¬ì¸í„°ê°€ ì½í˜€ì§€ê¸° -_ì „ì—_ task í¬ì¸í„°ê°€ 지워진다면, 다른 CPU 는 해당 대기 프로세스를 시작해 ë²„ë¦¬ê³ -up*() 함수가 next í¬ì¸í„°ë¥¼ ì½ê¸° ì „ì— ëŒ€ê¸° í”„ë¡œì„¸ìŠ¤ì˜ ìŠ¤íƒì„ 마구 건드릴 수 -있습니다. - -ê·¸ë ‡ê²Œ ë˜ë©´ ìœ„ì˜ ì´ë²¤íŠ¸ ì‹œí€€ìŠ¤ì— ì–´ë–¤ ì¼ì´ ì¼ì–´ë‚˜ëŠ”지 ìƒê°í•´ ë³´ì£ : - - CPU 1 CPU 2 - =============================== =============================== - down_xxx() - Queue waiter - Sleep - up_yyy() - LOAD waiter->task; - STORE waiter->task; - Woken up by other event - <preempt> - Resume processing - down_xxx() returns - call foo() - foo() clobbers *waiter - </preempt> - LOAD waiter->list.next; - --- OOPS --- - -ì´ ë¬¸ì œëŠ” 세마í¬ì–´ ë½ì˜ 사용으로 í•´ê²°ë ìˆ˜ë„ ìžˆê² ì§€ë§Œ, ê·¸ë ‡ê²Œ ë˜ë©´ 깨어난 í›„ì— -down_xxx() 함수가 불필요하게 스핀ë½ì„ ë˜ë‹¤ì‹œ 얻어야만 합니다. - -ì´ ë¬¸ì œë¥¼ 해결하는 ë°©ë²•ì€ ë²”ìš© SMP 메모리 배리어를 추가하는 ê²ë‹ˆë‹¤: - - LOAD waiter->list.next; - LOAD waiter->task; - smp_mb(); - STORE waiter->task; - CALL wakeup - RELEASE task - -ì´ ê²½ìš°ì—, 배리어는 ì‹œìŠ¤í…œì˜ ë‚˜ë¨¸ì§€ CPU 들ì—게 ëª¨ë“ ë°°ë¦¬ì–´ ì•žì˜ ë©”ëª¨ë¦¬ 액세스가 -배리어 ë’¤ì˜ ë©”ëª¨ë¦¬ 액세스보다 ì•žì„œ ì¼ì–´ë‚œ 것으로 ë³´ì´ê²Œ 만ë“니다. 배리어 ì•žì˜ -메모리 ì•¡ì„¸ìŠ¤ë“¤ì´ ë°°ë¦¬ì–´ ëª…ë ¹ ìžì²´ê°€ 완료ë˜ëŠ” ì‹œì 까지 완료ëœë‹¤ê³ 는 보장하지 -_않습니다_. - -(ì´ê²Œ ë¬¸ì œê°€ ë˜ì§€ ì•Šì„) ë‹¨ì¼ í”„ë¡œì„¸ì„œ 시스템ì—ì„œ smp_mb() 는 ì‹¤ì œë¡œëŠ” ê·¸ì € -컴파ì¼ëŸ¬ê°€ CPU 안ì—ì„œì˜ ìˆœì„œë¥¼ 바꾸거나 하지 ì•Šê³ ì£¼ì–´ì§„ 순서대로 ëª…ë ¹ì„ -내리ë„ë¡ í•˜ëŠ” 컴파ì¼ëŸ¬ ë°°ë¦¬ì–´ì¼ ë¿ìž…니다. ì˜¤ì§ í•˜ë‚˜ì˜ CPU 만 있으니, CPU ì˜ -ì˜ì¡´ì„± 순서 ë¡œì§ì´ ê·¸ ì™¸ì˜ ëª¨ë“ ê²ƒì„ ì•Œì•„ì„œ ì²˜ë¦¬í• ê²ë‹ˆë‹¤. - - -ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜ ------------------ - -ì–´í† ë¯¹ 오í¼ë ˆì´ì…˜ì€ ê¸°ìˆ ì 으로 프로세서간 ìƒí˜¸ìž‘용으로 분류ë˜ë©° ê·¸ 중 ì¼ë¶€ëŠ” -ì „ì²´ 메모리 배리어를 ë‚´í¬í•˜ê³ ë˜ ì¼ë¶€ëŠ” ë‚´í¬í•˜ì§€ 않지만, 커ë„ì—ì„œ ìƒë‹¹ížˆ -ì˜ì¡´ì 으로 사용하는 기능 중 하나입니다. - -ë” ë§Žì€ ë‚´ìš©ì„ ìœ„í•´ì„ Documentation/atomic_t.txt 를 ì°¸ê³ í•˜ì„¸ìš”. - - -디바ì´ìŠ¤ 액세스 ---------------- - -ë§Žì€ ë””ë°”ì´ìŠ¤ê°€ 메모리 매핑 기법으로 ì œì–´ë 수 있는ë°, ê·¸ë ‡ê²Œ ì œì–´ë˜ëŠ” -디바ì´ìŠ¤ëŠ” CPU ì—는 단지 íŠ¹ì • 메모리 ì˜ì—ì˜ ì§‘í•©ì²˜ëŸ¼ ë³´ì´ê²Œ ë©ë‹ˆë‹¤. ë“œë¼ì´ë²„는 -그런 디바ì´ìŠ¤ë¥¼ ì œì–´í•˜ê¸° 위해 ì •í™•ížˆ 올바른 순서로 올바른 메모리 액세스를 -만들어야 합니다. - -하지만, ì•¡ì„¸ìŠ¤ë“¤ì„ ìž¬ë°°ì¹˜ 하거나 조합하거나 병합하는게 ë” íš¨ìœ¨ì ì´ë¼ íŒë‹¨í•˜ëŠ” -ì˜ë¦¬í•œ CPU 나 컴파ì¼ëŸ¬ë“¤ì„ 사용하면 ë“œë¼ì´ë²„ ì½”ë“œì˜ ì¡°ì‹¬ìŠ¤ëŸ½ê²Œ 순서 맞춰진 -ì•¡ì„¸ìŠ¤ë“¤ì´ ë””ë°”ì´ìŠ¤ì—는 ìš”ì²ëœ 순서대로 ë„착하지 못하게 í• ìˆ˜ 있는 - 디바ì´ìŠ¤ê°€ -오ë™ìž‘ì„ í•˜ê²Œ í• - ìž ìž¬ì ë¬¸ì œê°€ ìƒê¸¸ 수 있습니다. - -리눅스 ì»¤ë„ ë‚´ë¶€ì—ì„œ, I/O 는 어떻게 ì•¡ì„¸ìŠ¤ë“¤ì„ ì ì ˆížˆ 순차ì ì´ê²Œ 만들 수 있는지 -ì•Œê³ ìžˆëŠ”, - inb() 나 writel() ê³¼ ê°™ì€ - ì ì ˆí•œ 액세스 ë£¨í‹´ì„ í†µí•´ ì´ë£¨ì–´ì ¸ì•¼ë§Œ -합니다. ì´ê²ƒë“¤ì€ ëŒ€ë¶€ë¶„ì˜ ê²½ìš°ì—는 명시ì 메모리 배리어 와 함께 사용ë 필요가 -없습니다만, ì™„í™”ëœ ë©”ëª¨ë¦¬ 액세스 ì†ì„±ìœ¼ë¡œ I/O 메모리 윈ë„ìš°ë¡œì˜ ì°¸ì¡°ë¥¼ 위해 -액세스 함수가 사용ëœë‹¤ë©´ 순서를 ê°•ì œí•˜ê¸° 위해 _mandatory_ 메모리 배리어가 -필요합니다. - -ë” ë§Žì€ ì •ë³´ë¥¼ ìœ„í•´ì„ Documentation/driver-api/device-io.rst 를 ì°¸ê³ í•˜ì‹ì‹œì˜¤. - - -ì¸í„°ëŸ½íŠ¸ --------- - -ë“œë¼ì´ë²„는 ìžì‹ ì˜ ì¸í„°ëŸ½íŠ¸ 서비스 ë£¨í‹´ì— ì˜í•´ ì¸í„°ëŸ½íŠ¸ ë‹¹í• ìˆ˜ 있기 ë•Œë¬¸ì— -ë“œë¼ì´ë²„ì˜ ì´ ë‘ ë¶€ë¶„ì€ ì„œë¡œì˜ ë””ë°”ì´ìŠ¤ ì œì–´ ë˜ëŠ” 액세스 부분과 ìƒí˜¸ ê°„ì„í• ìˆ˜ -있습니다. - -스스로ì—게 ì¸í„°ëŸ½íŠ¸ 당하는 걸 불가능하게 í•˜ê³ , ë“œë¼ì´ë²„ì˜ í¬ë¦¬í‹°ì»¬í•œ -오í¼ë ˆì´ì…˜ë“¤ì„ ëª¨ë‘ ì¸í„°ëŸ½íŠ¸ê°€ 불가능하게 ëœ ì˜ì—ì— ì§‘ì–´ë„£ê±°ë‚˜ 하는 방법 (ë½ì˜ -í•œ 형태) 으로 ì´ëŸ° ìƒí˜¸ ê°„ì„ì„ - 최소한 부분ì 으로ë¼ë„ - ì¤„ì¼ ìˆ˜ 있습니다. -ë“œë¼ì´ë²„ì˜ ì¸í„°ëŸ½íŠ¸ ë£¨í‹´ì´ ì‹¤í–‰ ì¤‘ì¸ ë™ì•ˆ, 해당 ë“œë¼ì´ë²„ì˜ ì½”ì–´ëŠ” ê°™ì€ CPU ì—ì„œ -수행ë˜ì§€ ì•Šì„ ê²ƒì´ë©°, í˜„ìž¬ì˜ ì¸í„°ëŸ½íŠ¸ê°€ 처리ë˜ëŠ” 중ì—는 ë˜ë‹¤ì‹œ ì¸í„°ëŸ½íŠ¸ê°€ -ì¼ì–´ë‚˜ì§€ 못하ë„ë¡ ë˜ì–´ 있으니 ì¸í„°ëŸ½íŠ¸ 핸들러는 ê·¸ì— ëŒ€í•´ì„œëŠ” ë½ì„ 잡지 ì•Šì•„ë„ -ë©ë‹ˆë‹¤. - -하지만, ì–´ë“œë ˆìŠ¤ ë ˆì§€ìŠ¤í„°ì™€ ë°ì´í„° ë ˆì§€ìŠ¤í„°ë¥¼ 갖는 ì´ë”ë„· 카드를 다루는 -ë“œë¼ì´ë²„를 ìƒê°í•´ 봅시다. 만약 ì´ ë“œë¼ì´ë²„ì˜ ì½”ì–´ê°€ ì¸í„°ëŸ½íŠ¸ë¥¼ 비활성화시킨 -채로 ì´ë”ë„· 카드와 ëŒ€í™”í•˜ê³ ë“œë¼ì´ë²„ì˜ ì¸í„°ëŸ½íŠ¸ 핸들러가 호출ë˜ì—ˆë‹¤ë©´: - - LOCAL IRQ DISABLE - writew(ADDR, 3); - writew(DATA, y); - LOCAL IRQ ENABLE - <interrupt> - writew(ADDR, 4); - q = readw(DATA); - </interrupt> - -만약 순서 ê·œì¹™ì´ ì¶©ë¶„ížˆ 완화ë˜ì–´ 있다면 ë°ì´í„° ë ˆì§€ìŠ¤í„°ì—ì˜ ìŠ¤í† ì–´ëŠ” ì–´ë“œë ˆìŠ¤ -ë ˆì§€ìŠ¤í„°ì— ë‘번째로 행해지는 ìŠ¤í† ì–´ ë’¤ì— ì¼ì–´ë‚ ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤: - - STORE *ADDR = 3, STORE *ADDR = 4, STORE *DATA = y, q = LOAD *DATA - - -만약 순서 ê·œì¹™ì´ ì¶©ë¶„ížˆ 완화ë˜ì–´ ìžˆê³ ë¬µì‹œì ìœ¼ë¡œë“ ëª…ì‹œì ìœ¼ë¡œë“ ë°°ë¦¬ì–´ê°€ -사용ë˜ì§€ 않았다면 ì¸í„°ëŸ½íŠ¸ 비활성화 섹션ì—ì„œ ì¼ì–´ë‚œ 액세스가 바깥으로 새어서 -ì¸í„°ëŸ½íŠ¸ ë‚´ì—ì„œ ì¼ì–´ë‚œ 액세스와 ì„žì¼ ìˆ˜ ìžˆë‹¤ê³ - ê·¸ë¦¬ê³ ê·¸ ë°˜ëŒ€ë„ - ê°€ì •í•´ì•¼ë§Œ -합니다. - -그런 ì˜ì— 안ì—ì„œ ì¼ì–´ë‚˜ëŠ” I/O 액세스는 묵시ì I/O 배리어를 형성하는, 엄격한 -순서 ê·œì¹™ì˜ I/O ë ˆì§€ìŠ¤í„°ë¡œì˜ ë¡œë“œ 오í¼ë ˆì´ì…˜ì„ í¬í•¨í•˜ê¸° ë•Œë¬¸ì— ì¼ë°˜ì 으로는 -ë¬¸ì œê°€ ë˜ì§€ 않습니다. - - -í•˜ë‚˜ì˜ ì¸í„°ëŸ½íŠ¸ 루틴과 별ë„ì˜ CPU ì—ì„œ 수행중ì´ë©° 서로 í†µì‹ ì„ í•˜ëŠ” ë‘ ë£¨í‹´ -사ì´ì—ë„ ë¹„ìŠ·í•œ ìƒí™©ì´ ì¼ì–´ë‚ 수 있습니다. 만약 그런 경우가 ë°œìƒí• ê°€ëŠ¥ì„±ì´ -있다면, 순서를 보장하기 위해 ì¸í„°ëŸ½íŠ¸ 비활성화 ë½ì´ 사용ë˜ì–´ì ¸ì•¼ë§Œ 합니다. - - -====================== -ì»¤ë„ I/O ë°°ë¦¬ì–´ì˜ íš¨ê³¼ -====================== - -I/O 액세스를 통한 ì£¼ë³€ìž¥ì¹˜ì™€ì˜ í†µì‹ ì€ ì•„í‚¤í…ì³ì™€ ê¸°ê¸°ì— ë§¤ìš° 종ì†ì 입니다. -ë”°ë¼ì„œ, 본질ì 으로 ì´ì‹ì„±ì´ 없는 ë“œë¼ì´ë²„는 가능한 가장 ì ì€ ì˜¤ë²„í—¤ë“œë¡œ -ë™ê¸°í™”를 하기 위해 ê°ìžì˜ 타겟 ì‹œìŠ¤í…œì˜ íŠ¹ì • ë™ìž‘ì— ì˜ì¡´í• ê²ë‹ˆë‹¤. 다양한 -아키í…ì³ì™€ 버스 êµ¬í˜„ì— ì´ì‹ì„±ì„ ê°€ì§€ë ¤ 하는 ë“œë¼ì´ë²„를 위해, 커ë„ì€ ë‹¤ì–‘í•œ -ì •ë„ì˜ ìˆœì„œ ë³´ìž¥ì„ ì œê³µí•˜ëŠ” ì¼ë ¨ì˜ 액세스 함수를 ì œê³µí•©ë‹ˆë‹¤. - - (*) readX(), writeX(): - - readX() 와 writeX() MMIO 액세스 함수는 ì ‘ê·¼ë˜ëŠ” ì£¼ë³€ìž¥ì¹˜ë¡œì˜ í¬ì¸í„°ë¥¼ - __iomem * 패러미터로 받습니다. ë””í´íŠ¸ I/O 기능으로 매핑ë˜ëŠ” í¬ì¸í„° - (예: ioremap() 으로 반환ë˜ëŠ” 것) ì˜ ìˆœì„œ ë³´ìž¥ì€ ë‹¤ìŒê³¼ 같습니다: - - 1. ê°™ì€ ì£¼ë³€ìž¥ì¹˜ë¡œì˜ ëª¨ë“ readX() 와 writeX() 액세스는 ê°ìžì— 대해 - 순서지어집니다. ì´ëŠ” ê°™ì€ CPU ì“°ë ˆë“œì— ì˜í•œ íŠ¹ì • 디바ì´ìŠ¤ë¡œì˜ MMIO - ë ˆì§€ìŠ¤í„° 액세스가 프로그램 순서대로 ë„ì°©í• ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 2. í•œ 스핀ë½ì„ ìž¡ì€ CPU ì“°ë ˆë“œì— ì˜í•œ writeX() 는 ê°™ì€ ìŠ¤í•€ë½ì„ ë‚˜ì¤‘ì— - ìž¡ì€ ë‹¤ë¥¸ CPU ì“°ë ˆë“œì— ì˜í•´ ê°™ì€ ì£¼ë³€ìž¥ì¹˜ë¥¼ 향해 í˜¸ì¶œëœ writeX() - 앞으로 순서지어집니다. ì´ëŠ” 스핀ë½ì„ ìž¡ì€ ì±„ íŠ¹ì • 디바ì´ìŠ¤ë¥¼ 향해 - í˜¸ì¶œëœ MMIO ë ˆì§€ìŠ¤í„° 쓰기는 해당 ë½ì˜ íšë“ì— ì¼ê´€ì ì¸ ìˆœì„œë¡œ ë„ë‹¬í• - ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 3. íŠ¹ì • 주변장치를 향한 íŠ¹ì • CPU ì“°ë ˆë“œì˜ writeX() 는 ë¨¼ì € 해당 - ì“°ë ˆë“œë¡œ ì „íŒŒë˜ëŠ”, ë˜ëŠ” 해당 ì“°ë ˆë“œì— ì˜í•´ ìš”ì²ëœ ëª¨ë“ ì•žì„ ë©”ëª¨ë¦¬ - 쓰기가 완료ë˜ê¸° ì „ê¹Œì§€ ë¨¼ì € 기다립니다. ì´ëŠ” dma_alloc_coherent() - 를 통해 í• ë‹¹ëœ ì „ì†¡ìš© DMA 버í¼ë¡œì˜ 해당 CPU ì˜ ì“°ê¸°ê°€ ì´ CPU ê°€ ì´ - ì „ì†¡ì„ ì‹œìž‘ì‹œí‚¤ê¸° 위해 MMIO 컨트롤 ë ˆì§€ìŠ¤í„°ì— ì“°ê¸°ë¥¼ í• ë•Œ DMA - ì—”ì§„ì— ë³´ì—¬ì§ˆ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 4. íŠ¹ì • CPU ì“°ë ˆë“œì— ì˜í•œ ì£¼ë³€ìž¥ì¹˜ë¡œì˜ readX() 는 ê°™ì€ ì“°ë ˆë“œì— ì˜í•œ - ëª¨ë“ ë’¤ë”°ë¥´ëŠ” 메모리 ì½ê¸°ê°€ 시작ë˜ê¸° ì „ì— ì™„ë£Œë©ë‹ˆë‹¤. ì´ëŠ” - dma_alloc_coherent() 를 통해 í• ë‹¹ëœ ìˆ˜ì‹ ìš© DMA 버í¼ë¡œë¶€í„°ì˜ CPU ì˜ - ì½ê¸°ëŠ” ì´ DMA ìˆ˜ì‹ ì˜ ì™„ë£Œë¥¼ 표시하는 DMA ì—”ì§„ì˜ MMIO ìƒíƒœ ë ˆì§€ìŠ¤í„° - ì½ê¸° 후ì—는 ì˜¤ì—¼ëœ ë°ì´í„°ë¥¼ ì½ì§€ ì•Šì„ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤. - - 5. CPU ì— ì˜í•œ ì£¼ë³€ìž¥ì¹˜ë¡œì˜ readX() 는 ëª¨ë“ ë’¤ë”°ë¥´ëŠ” delay() 루프가 - ìˆ˜í–‰ì„ ì‹œìž‘í•˜ê¸° ì „ì— ì™„ë£Œë©ë‹ˆë‹¤. ì´ëŠ” CPU ì˜ íŠ¹ì • - ì£¼ë³€ìž¥ì¹˜ë¡œì˜ ë‘ê°œì˜ MMIO ë ˆì§€ìŠ¤í„° 쓰기가 í–‰í•´ì§€ëŠ”ë° ì²«ë²ˆì§¸ 쓰기가 - readX() 를 통해 곧바로 ì½ì–´ì¡Œê³ ì´ì–´ ë‘번째 writeX() ì „ì— udelay(1) - ì´ í˜¸ì¶œë˜ì—ˆë‹¤ë©´ ì´ ë‘ê°œì˜ ì“°ê¸°ëŠ” 최소 1us ì˜ ê°„ê²©ì„ ë‘ê³ í–‰í•´ì§ˆ ê²ƒì„ - 보장합니다: - - writel(42, DEVICE_REGISTER_0); // 디바ì´ìŠ¤ì— ë„착함... - readl(DEVICE_REGISTER_0); - udelay(1); - writel(42, DEVICE_REGISTER_1); // ...ì´ê²ƒë³´ë‹¤ 최소 1us ì „ì—. - - ë””í´íŠ¸ê°€ ì•„ë‹Œ ê¸°ëŠ¥ì„ í†µí•´ 얻어지는 __iomem í¬ì¸í„° (예: ioremap_wc() 를 - 통해 리턴ë˜ëŠ” 것) ì˜ ìˆœì„œ ì†ì„±ì€ ì‹¤ì œ 아키í…ì³ì— ì˜ì¡´ì ì´ì–´ì„œ ì´ëŸ° - ì¢…ë¥˜ì˜ ë§¤í•‘ìœ¼ë¡œì˜ ì•¡ì„¸ìŠ¤ëŠ” ì•žì„œ ì„¤ëª…ëœ ë³´ìž¥ì‚¬í•ì— ì˜ì¡´í• 수 없습니다. - - (*) readX_relaxed(), writeX_relaxed() - - ì´ê²ƒë“¤ì€ readX() 와 writeX() ëž‘ 비슷하지만, ë” ì™„í™”ëœ ë©”ëª¨ë¦¬ 순서 - ë³´ìž¥ì„ ì œê³µí•©ë‹ˆë‹¤. 구체ì 으로, ì´ê²ƒë“¤ì€ ì¼ë°˜ì 메모리 액세스나 delay() - 루프 (예:ì•žì˜ 2-5 í•ëª©) ì— ëŒ€í•´ 순서를 보장하지 않습니다만 ë””í´íŠ¸ I/O - 기능으로 ë§¤í•‘ëœ __iomem í¬ì¸í„°ì— 대해 ë™ìž‘í• ë•Œ, ê°™ì€ CPU ì“°ë ˆë“œì— ì˜í•œ - ê°™ì€ ì£¼ë³€ìž¥ì¹˜ë¡œì˜ ì•¡ì„¸ìŠ¤ì—는 순서가 맞춰질 ê²ƒì´ ë³´ìž¥ë©ë‹ˆë‹¤. - - (*) readsX(), writesX(): - - readsX() 와 writesX() MMIO 액세스 함수는 DMA 를 ìˆ˜í–‰í•˜ëŠ”ë° ì ì ˆì¹˜ ì•Šì€, - 주변장치 ë‚´ì˜ ë©”ëª¨ë¦¬ ë§¤í•‘ëœ ë ˆì§€ìŠ¤í„° 기반 FIFO ë¡œì˜ ì•¡ì„¸ìŠ¤ë¥¼ 위해 - 설계ë˜ì—ˆìŠµë‹ˆë‹¤. ë”°ë¼ì„œ, ì´ ê¸°ëŠ¥ë“¤ì€ ì•žì„œ ì„¤ëª…ëœ readX_relaxed() 와 - writeX_relaxed() ì˜ ìˆœì„œ ë³´ìž¥ë§Œì„ ì œê³µí•©ë‹ˆë‹¤. - - (*) inX(), outX(): - - inX() 와 outX() 액세스 함수는 ì¼ë¶€ 아키í…ì³ (특히 x86) ì—서는 특수한 - ëª…ë ¹ì–´ë¥¼ 필요로 하며 í¬íŠ¸ì— 매핑ë˜ëŠ”, ê³¼ê±°ì˜ ìœ ì‚°ì¸ I/O ì£¼ë³€ìž¥ì¹˜ë¡œì˜ - ì ‘ê·¼ì„ ìœ„í•´ 만들어졌습니다. - - ë§Žì€ CPU 아키í…ì³ê°€ ê²°êµì€ ì´ëŸ° 주변장치를 ë‚´ë¶€ì˜ ê°€ìƒ ë©”ëª¨ë¦¬ ë§¤í•‘ì„ - 통해 ì ‘ê·¼í•˜ê¸° 때문ì—, inX() 와 outX() ê°€ ì œê³µí•˜ëŠ” ì´ì‹ì„± 있는 순서 - ë³´ìž¥ì€ ë””í´íŠ¸ I/O ê¸°ëŠ¥ì„ í†µí•œ ë§¤í•‘ì„ ì ‘ê·¼í• ë•Œì˜ readX() 와 writeX() ì— - ì˜í•´ ì œê³µë˜ëŠ” 것과 ê°ê° ë™ì¼í•©ë‹ˆë‹¤. - - 디바ì´ìŠ¤ ë“œë¼ì´ë²„는 outX() ê°€ 리턴하기 ì „ì— í•´ë‹¹ I/O ì£¼ë³€ìž¥ì¹˜ë¡œë¶€í„°ì˜ - 완료 ì‘ë‹µì„ ê¸°ë‹¤ë¦¬ëŠ” 쓰기 트랜ìžì…˜ì„ 만들어 ë‚¸ë‹¤ê³ ê¸°ëŒ€í• ìˆ˜ë„ - 있습니다. ì´ëŠ” ëª¨ë“ ì•„í‚¤í…ì³ì—ì„œ 보장ë˜ì§€ëŠ” ì•Šê³ , ë”°ë¼ì„œ ì´ì‹ì„± 있는 - 순서 ê·œì¹™ì˜ ì¼ë¶€ë¶„ì´ ì•„ë‹™ë‹ˆë‹¤. - - (*) insX(), outsX(): - - ì•žì—서와 ê°™ì´, insX() 와 outsX() 액세스 함수는 ë””í´íŠ¸ I/O ê¸°ëŠ¥ì„ í†µí•œ - ë§¤í•‘ì„ ì ‘ê·¼í• ë•Œ ê°ê° readX() 와 writeX() 와 ê°™ì€ ìˆœì„œ ë³´ìž¥ì„ - ì œê³µí•©ë‹ˆë‹¤. - - (*) ioreadX(), iowriteX() - - ì´ê²ƒë“¤ì€ inX()/outX() 나 readX()/writeX() 처럼 ì‹¤ì œë¡œ 수행하는 ì•¡ì„¸ìŠ¤ì˜ - ì¢…ë¥˜ì— ë”°ë¼ ì ì ˆí•˜ê²Œ 수행ë 것입니다. - -String 액세스 함수 (insX(), outsX(), readsX() ê·¸ë¦¬ê³ writesX()) ì˜ ì˜ˆì™¸ë¥¼ -ì œì™¸í•˜ê³ ëŠ”, ì•žì˜ ëª¨ë“ ê²ƒì´ ì•„ëž«ë‹¨ì˜ ì£¼ë³€ìž¥ì¹˜ê°€ little-endian ì´ë¼ ê°€ì •í•˜ë©°, -ë”°ë¼ì„œ big-endian 아키í…ì³ì—서는 byte-swapping 오í¼ë ˆì´ì…˜ì„ 수행합니다. - - -=================================== -ê°€ì •ë˜ëŠ” 가장 ì™„í™”ëœ ì‹¤í–‰ 순서 ëª¨ë¸ -=================================== - -컨셉ì 으로 CPU 는 주어진 í”„ë¡œê·¸ëž¨ì— ëŒ€í•´ 프로그램 ê·¸ ìžì²´ì—는 ì¸ê³¼ì„± (program -causality) ì„ ì§€í‚¤ëŠ” 것처럼 ë³´ì´ê²Œ 하지만 ì¼ë°˜ì 으로는 순서를 ê±°ì˜ ì§€ì¼œì£¼ì§€ -ì•ŠëŠ”ë‹¤ê³ ê°€ì •ë˜ì–´ì•¼ë§Œ 합니다. (i386 ì´ë‚˜ x86_64 ê°™ì€) ì¼ë¶€ CPU ë“¤ì€ ì½”ë“œ -ìž¬ë°°ì¹˜ì— (powerpc 나 frv 와 ê°™ì€) 다른 ê²ƒë“¤ì— ë¹„í•´ ê°•í•œ ì œì•½ì„ ê°–ì§€ë§Œ, 아키í…ì³ -종ì†ì 코드 ì´ì™¸ì˜ 코드ì—서는 ìˆœì„œì— ëŒ€í•œ ì œì•½ì´ ê°€ìž¥ ì™„í™”ëœ ê²½ìš° (DEC Alpha) -를 ê°€ì •í•´ì•¼ 합니다. - -ì´ ë§ì€, CPU ì—게 주어지는 ì¸ìŠ¤íŠ¸ëŸì…˜ 스트림 ë‚´ì˜ í•œ ì¸ìŠ¤íŠ¸ëŸì…˜ì´ ì•žì˜ -ì¸ìŠ¤íŠ¸ëŸì…˜ì— 종ì†ì ì´ë¼ë©´ ì•žì˜ ì¸ìŠ¤íŠ¸ëŸì…˜ì€ ë’¤ì˜ ì¢…ì†ì ì¸ìŠ¤íŠ¸ëŸì…˜ì´ 실행ë˜ê¸° -ì „ì— ì™„ë£Œ[*]ë 수 있어야 한다는 ì œì•½ (달리 ë§í•´ì„œ, ì¸ê³¼ì„±ì´ 지켜지는 것으로 -ë³´ì´ê²Œ 함) 외ì—는 ìžì‹ ì´ ì›í•˜ëŠ” 순서대로 - 심지어 ë³‘ë ¬ì ìœ¼ë¡œë„ - ê·¸ ìŠ¤íŠ¸ë¦¼ì„ -ì‹¤í–‰í• ìˆ˜ 있ìŒì„ ì˜ë¯¸í•©ë‹ˆë‹¤ - - [*] ì¼ë¶€ ì¸ìŠ¤íŠ¸ëŸì…˜ì€ 하나 ì´ìƒì˜ ì˜í–¥ - ì¡°ê±´ 코드를 바꾼다ë˜ì§€, ë ˆì§€ìŠ¤í„°ë‚˜ - 메모리를 바꾼다ë˜ì§€ - ì„ ë§Œë“¤ì–´ë‚´ë©°, 다른 ì¸ìŠ¤íŠ¸ëŸì…˜ì€ 다른 íš¨ê³¼ì— - 종ì†ì ì¼ ìˆ˜ 있습니다. - -CPU 는 최종ì 으로 아무 íš¨ê³¼ë„ ë§Œë“¤ì§€ 않는 ì¸ìŠ¤íŠ¸ëŸì…˜ 시퀀스는 ì—†ì• ë²„ë¦´ ìˆ˜ë„ -있습니다. 예를 들어, 만약 ë‘ê°œì˜ ì—°ì†ë˜ëŠ” ì¸ìŠ¤íŠ¸ëŸì…˜ì´ 둘 다 ê°™ì€ ë ˆì§€ìŠ¤í„°ì— -ì§ì ‘ì ì¸ ê°’ (immediate value) ì„ ì§‘ì–´ë„£ëŠ”ë‹¤ë©´, 첫번째 ì¸ìŠ¤íŠ¸ëŸì…˜ì€ ë²„ë ¤ì§ˆ ìˆ˜ë„ -있습니다. - - -비슷하게, 컴파ì¼ëŸ¬ ì—ì‹œ í”„ë¡œê·¸ëž¨ì˜ ì¸ê³¼ì„±ë§Œ 지켜준다면 ì¸ìŠ¤íŠ¸ëŸì…˜ ìŠ¤íŠ¸ë¦¼ì„ -ìžì‹ ì´ ë³´ê¸°ì— ì˜¬ë°”ë¥´ë‹¤ ìƒê°ë˜ëŠ”대로 재배치 í• ìˆ˜ 있습니다. - - -=============== -CPU ìºì‹œì˜ ì˜í–¥ -=============== - -ìºì‹œëœ 메모리 오í¼ë ˆì´ì…˜ë“¤ì´ 시스템 ì „ì²´ì— ì–´ë–»ê²Œ ì¸ì§€ë˜ëŠ”지는 CPU 와 메모리 -사ì´ì— 존재하는 ìºì‹œë“¤, ê·¸ë¦¬ê³ ì‹œìŠ¤í…œ ìƒíƒœì˜ ì¼ê´€ì„±ì„ 관리하는 메모리 ì¼ê´€ì„± -ì‹œìŠ¤í…œì— ìƒë‹¹ 부분 ì˜í–¥ì„ 받습니다. - -í•œ CPU ê°€ ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ 부분들과 ìºì‹œë¥¼ 통해 ìƒí˜¸ìž‘용한다면, 메모리 ì‹œìŠ¤í…œì€ -CPU ì˜ ìºì‹œë“¤ì„ í¬í•¨í•´ì•¼ 하며, CPU 와 CPU ìžì‹ ì˜ ìºì‹œ 사ì´ì—ì„œì˜ ë™ìž‘ì„ ìœ„í•œ -메모리 배리어를 ê°€ì ¸ì•¼ 합니다. (메모리 배리어는 논리ì 으로는 ë‹¤ìŒ ê·¸ë¦¼ì˜ -ì ì„ ì—ì„œ ë™ìž‘합니다): - - <--- CPU ---> : <----------- Memory -----------> - : - +--------+ +--------+ : +--------+ +-----------+ - | | | | : | | | | +--------+ - | CPU | | Memory | : | CPU | | | | | - | Core |--->| Access |----->| Cache |<-->| | | | - | | | Queue | : | | | |--->| Memory | - | | | | : | | | | | | - +--------+ +--------+ : +--------+ | | | | - : | Cache | +--------+ - : | Coherency | - : | Mechanism | +--------+ - +--------+ +--------+ : +--------+ | | | | - | | | | : | | | | | | - | CPU | | Memory | : | CPU | | |--->| Device | - | Core |--->| Access |----->| Cache |<-->| | | | - | | | Queue | : | | | | | | - | | | | : | | | | +--------+ - +--------+ +--------+ : +--------+ +-----------+ - : - : - -íŠ¹ì • 로드나 ìŠ¤í† ì–´ëŠ” 해당 오í¼ë ˆì´ì…˜ì„ ìš”ì²í•œ CPU ì˜ ìºì‹œ ë‚´ì—ì„œ ë™ìž‘ì„ ì™„ë£Œí• -ìˆ˜ë„ ìžˆê¸° ë•Œë¬¸ì— í•´ë‹¹ CPU ì˜ ë°”ê¹¥ì—는 ë³´ì´ì§€ ì•Šì„ ìˆ˜ 있지만, 다른 CPU ê°€ ê´€ì‹¬ì„ -갖는다면 ìºì‹œ ì¼ê´€ì„± ë©”ì»¤ë‹ˆì¦˜ì´ í•´ë‹¹ ìºì‹œë¼ì¸ì„ 해당 CPU ì—게 ì „ë‹¬í•˜ê³ , 해당 -메모리 ì˜ì—ì— ëŒ€í•œ 오í¼ë ˆì´ì…˜ì´ ë°œìƒí• 때마다 ê·¸ ì˜í–¥ì„ ì „íŒŒì‹œí‚¤ê¸° 때문ì—, 해당 -오í¼ë ˆì´ì…˜ì€ ë©”ëª¨ë¦¬ì— ì‹¤ì œë¡œ 액세스를 한것처럼 ë‚˜íƒ€ë‚ ê²ƒìž…ë‹ˆë‹¤. - -CPU 코어는 í”„ë¡œê·¸ëž¨ì˜ ì¸ê³¼ì„±ì´ ìœ ì§€ëœë‹¤ê³ 만 여겨진다면 ì¸ìŠ¤íŠ¸ëŸì…˜ë“¤ì„ ì–´ë–¤ -ìˆœì„œë¡œë“ ìž¬ë°°ì¹˜í•´ì„œ ìˆ˜í–‰í• ìˆ˜ 있습니다. ì¼ë¶€ ì¸ìŠ¤íŠ¸ëŸì…˜ë“¤ì€ 로드나 ìŠ¤í† ì–´ -오í¼ë ˆì´ì…˜ì„ ë§Œë“œëŠ”ë° ì´ ì˜¤í¼ë ˆì´ì…˜ë“¤ì€ ì´í›„ 수행ë 메모리 액세스 íì— ë“¤ì–´ê°€ê²Œ -ë©ë‹ˆë‹¤. 코어는 ì´ ì˜¤í¼ë ˆì´ì…˜ë“¤ì„ 해당 íì— ì–´ë–¤ ìˆœì„œë¡œë“ ì›í•˜ëŠ”대로 ë„£ì„ ìˆ˜ -ìžˆê³ , 다른 ì¸ìŠ¤íŠ¸ëŸì…˜ì˜ 완료를 기다리ë„ë¡ ê°•ì œë˜ê¸° ì „ê¹Œì§€ëŠ” ìˆ˜í–‰ì„ ê³„ì†í•©ë‹ˆë‹¤. - -메모리 배리어가 하는 ì¼ì€ CPU 쪽ì—ì„œ 메모리 쪽으로 넘어가는 ì•¡ì„¸ìŠ¤ë“¤ì˜ ìˆœì„œ, -ê·¸ë¦¬ê³ ê·¸ ì•¡ì„¸ìŠ¤ì˜ ê²°ê³¼ê°€ ì‹œìŠ¤í…œì˜ ë‹¤ë¥¸ 관찰ìžë“¤ì—게 ì¸ì§€ë˜ëŠ” 순서를 ì œì–´í•˜ëŠ” -것입니다. - -[!] CPU ë“¤ì€ í•ìƒ 그들 ìžì‹ ì˜ ë¡œë“œì™€ ìŠ¤í† ì–´ëŠ” 프로그램 순서대로 ì¼ì–´ë‚œ 것으로 -보기 때문ì—, 주어진 CPU ë‚´ì—서는 메모리 배리어를 ì‚¬ìš©í• í•„ìš”ê°€ _없습니다_. - -[!] MMIO 나 다른 디바ì´ìŠ¤ ì•¡ì„¸ìŠ¤ë“¤ì€ ìºì‹œ ì‹œìŠ¤í…œì„ ìš°íšŒí• ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. 우회 -여부는 디바ì´ìŠ¤ê°€ 액세스 ë˜ëŠ” 메모리 윈ë„ìš°ì˜ íŠ¹ì„±ì— ì˜í•´ ê²°ì •ë ìˆ˜ë„ ìžˆê³ , CPU -ê°€ ê°€ì§€ê³ ìžˆì„ ìˆ˜ 있는 특수한 디바ì´ìŠ¤ í†µì‹ ì¸ìŠ¤íŠ¸ëŸì…˜ì˜ ì‚¬ìš©ì— ì˜í•´ì„œ ê²°ì •ë -ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. - - -ìºì‹œ ì¼ê´€ì„± VS DMA ------------------- - -ëª¨ë“ ì‹œìŠ¤í…œì´ DMA 를 하는 디바ì´ìŠ¤ì— 대해서까지 ìºì‹œ ì¼ê´€ì„±ì„ ìœ ì§€í•˜ì§€ëŠ” -않습니다. 그런 경우, DMA 를 ì‹œë„하는 디바ì´ìŠ¤ëŠ” RAM 으로부터 ìž˜ëª»ëœ ë°ì´í„°ë¥¼ -ì½ì„ 수 있는ë°, ë”í‹° ìºì‹œ ë¼ì¸ì´ CPU ì˜ ìºì‹œì— ë¨¸ë¬´ë¥´ê³ ìžˆê³ , ë°”ë€ ê°’ì´ ì•„ì§ -RAM ì— ì¨ì§€ì§€ ì•Šì•˜ì„ ìˆ˜ 있기 때문입니다. ì´ ë¬¸ì œë¥¼ 해결하기 ìœ„í•´ì„ , 커ë„ì˜ -ì ì ˆí•œ 부분ì—ì„œ ê° CPU ìºì‹œì˜ ë¬¸ì œë˜ëŠ” ë¹„íŠ¸ë“¤ì„ í”ŒëŸ¬ì‹œ (flush) 시켜야만 합니다 -(ê·¸ë¦¬ê³ ê·¸ê²ƒë“¤ì„ ë¬´íš¨í™” - invalidation - 시킬 ìˆ˜ë„ ìžˆê² ì£ ). - -ë˜í•œ, 디바ì´ìŠ¤ì— ì˜í•´ RAM ì— DMA ë¡œ 쓰여진 ê°’ì€ ë””ë°”ì´ìŠ¤ê°€ 쓰기를 완료한 í›„ì— -CPU ì˜ ìºì‹œì—ì„œ RAM 으로 쓰여지는 ë”í‹° ìºì‹œ ë¼ì¸ì— ì˜í•´ ë®ì–´ì¨ì§ˆ ìˆ˜ë„ ìžˆê³ , CPU -ì˜ ìºì‹œì— 존재하는 ìºì‹œ ë¼ì¸ì´ 해당 ìºì‹œì—ì„œ ì‚ì œë˜ê³ 다시 ê°’ì„ ì½ì–´ë“¤ì´ê¸° -ì „ê¹Œì§€ëŠ” RAM ì´ ì—…ë°ì´íŠ¸ ë˜ì—ˆë‹¤ëŠ” 사실 ìžì²´ê°€ ìˆ¨ê²¨ì ¸ 버릴 ìˆ˜ë„ ìžˆìŠµë‹ˆë‹¤. ì´ -ë¬¸ì œë¥¼ 해결하기 ìœ„í•´ì„ , 커ë„ì˜ ì ì ˆí•œ 부분ì—ì„œ ê° CPU ì˜ ìºì‹œ ì•ˆì˜ ë¬¸ì œê°€ ë˜ëŠ” -ë¹„íŠ¸ë“¤ì„ ë¬´íš¨í™” 시켜야 합니다. - -ìºì‹œ ê´€ë¦¬ì— ëŒ€í•œ ë” ë§Žì€ ì •ë³´ë¥¼ ìœ„í•´ì„ Documentation/core-api/cachetlb.rst 를 -ì°¸ê³ í•˜ì„¸ìš”. - - -ìºì‹œ ì¼ê´€ì„± VS MMIO -------------------- - -Memory mapped I/O 는 ì¼ë°˜ì 으로 CPU ì˜ ë©”ëª¨ë¦¬ 공간 ë‚´ì˜ í•œ 윈ë„ìš°ì˜ íŠ¹ì • 부분 -ë‚´ì˜ ë©”ëª¨ë¦¬ 지ì—ì— ì´ë£¨ì–´ì§€ëŠ”ë°, ì´ ìœˆë„우는 ì¼ë°˜ì ì¸, RAM 으로 향하는 -윈ë„우와는 다른 íŠ¹ì„±ì„ ê°–ìŠµë‹ˆë‹¤. - -그런 특성 ê°€ìš´ë° í•˜ë‚˜ëŠ”, ì¼ë°˜ì 으로 그런 액세스는 ìºì‹œë¥¼ ì™„ì „ížˆ ìš°íšŒí•˜ê³ -디바ì´ìŠ¤ 버스로 곧바로 향한다는 것입니다. ì´ ë§ì€ MMIO 액세스는 ë¨¼ì € -시작ë˜ì–´ì„œ ìºì‹œì—ì„œ ì™„ë£Œëœ ë©”ëª¨ë¦¬ 액세스를 ì¶”ì›”í• ìˆ˜ 있다는 뜻입니다. ì´ëŸ° -경우엔 메모리 배리어만으로는 충분치 ì•Šê³ , 만약 ìºì‹œëœ 메모리 쓰기 오í¼ë ˆì´ì…˜ê³¼ -MMIO 액세스가 ì–´ë–¤ ë°©ì‹ìœ¼ë¡œë“ ì˜ì¡´ì ì´ë¼ë©´ 해당 ìºì‹œëŠ” ë‘ ì˜¤í¼ë ˆì´ì…˜ 사ì´ì— -ë¹„ì›Œì ¸(flush)야만 합니다. - - -====================== -CPU ë“¤ì´ ì €ì§€ë¥´ëŠ” ì¼ë“¤ -====================== - -프로그래머는 CPU ê°€ 메모리 오í¼ë ˆì´ì…˜ë“¤ì„ ì •í™•ížˆ ìš”ì²í•œëŒ€ë¡œ 수행해 줄 것ì´ë¼ê³ -ìƒê°í•˜ëŠ”ë°, 예를 들어 다ìŒê³¼ ê°™ì€ ì½”ë“œë¥¼ CPU ì—게 넘긴다면: - - a = READ_ONCE(*A); - WRITE_ONCE(*B, b); - c = READ_ONCE(*C); - d = READ_ONCE(*D); - WRITE_ONCE(*E, e); - -CPU 는 ë‹¤ìŒ ì¸ìŠ¤íŠ¸ëŸì…˜ì„ 처리하기 ì „ì— í˜„ìž¬ì˜ ì¸ìŠ¤íŠ¸ëŸì…˜ì„ 위한 메모리 -오í¼ë ˆì´ì…˜ì„ ì™„ë£Œí• ê²ƒì´ë¼ ìƒê°í•˜ê³ , ë”°ë¼ì„œ 시스템 외부ì—ì„œ 관찰하기ì—ë„ ì •í•´ì§„ -순서대로 오í¼ë ˆì´ì…˜ì´ 수행ë 것으로 예ìƒí•©ë‹ˆë‹¤: - - LOAD *A, STORE *B, LOAD *C, LOAD *D, STORE *E. - - -당연하지만, ì‹¤ì œë¡œëŠ” 훨씬 ì—‰ë§ìž…니다. ë§Žì€ CPU 와 컴파ì¼ëŸ¬ì—ì„œ ì•žì˜ ê°€ì •ì€ -성립하지 ëª»í•˜ëŠ”ë° ê·¸ ì´ìœ 는 다ìŒê³¼ 같습니다: - - (*) 로드 오í¼ë ˆì´ì…˜ë“¤ì€ ì‹¤í–‰ì„ ê³„ì† í•´ë‚˜ê°€ê¸° 위해 곧바로 완료ë 필요가 있는 - 경우가 ë§Žì€ ë°˜ë©´, ìŠ¤í† ì–´ 오í¼ë ˆì´ì…˜ë“¤ì€ 종종 별다른 ë¬¸ì œ ì—†ì´ ìœ ì˜ˆë 수 - 있습니다; - - (*) 로드 오í¼ë ˆì´ì…˜ë“¤ì€ 예측ì 으로 수행ë 수 있으며, 필요없는 ë¡œë“œì˜€ë‹¤ê³ - ì¦ëª…ëœ ì˜ˆì¸¡ì ë¡œë“œì˜ ê²°ê³¼ëŠ” ë²„ë ¤ì§‘ë‹ˆë‹¤; - - (*) 로드 오í¼ë ˆì´ì…˜ë“¤ì€ 예측ì 으로 수행ë 수 있으므로, 예ìƒëœ ì´ë²¤íŠ¸ì˜ - 시퀀스와 다른 ì‹œê°„ì— ë¡œë“œê°€ ì´ë¤„질 수 있습니다; - - (*) 메모리 액세스 순서는 CPU 버스와 ìºì‹œë¥¼ 좀 ë” ìž˜ ì‚¬ìš©í• ìˆ˜ 있ë„ë¡ ìž¬ë°°ì¹˜ - ë 수 있습니다; - - (*) 로드와 ìŠ¤í† ì–´ëŠ” ì¸ì ‘í•œ 위치ì—ì˜ ì•¡ì„¸ìŠ¤ë“¤ì„ ì¼ê´„ì 으로 ì²˜ë¦¬í• ìˆ˜ 있는 - 메모리나 I/O 하드웨어 (메모리와 PCI 디바ì´ìŠ¤ 둘 다 ì´ê²Œ ê°€ëŠ¥í• ìˆ˜ - 있습니다) ì— ëŒ€í•´ ìš”ì²ë˜ëŠ” 경우, 개별 오í¼ë ˆì´ì…˜ì„ 위한 트랜ìžì…˜ ì„¤ì • - ë¹„ìš©ì„ ì•„ë¼ê¸° 위해 ì¡°í•©ë˜ì–´ 실행ë 수 있습니다; ê·¸ë¦¬ê³ - - (*) 해당 CPU ì˜ ë°ì´í„° ìºì‹œê°€ ìˆœì„œì— ì˜í–¥ì„ ë¼ì¹ ìˆ˜ë„ ìžˆê³ , ìºì‹œ ì¼ê´€ì„± - ë©”ì»¤ë‹ˆì¦˜ì´ - ìŠ¤í† ì–´ê°€ ì‹¤ì œë¡œ ìºì‹œì— ë„달한다면 - ì´ ë¬¸ì œë¥¼ 완화시킬 수는 - 있지만 ì´ ì¼ê´€ì„± 관리가 다른 CPU 들ì—ë„ ê°™ì€ ìˆœì„œë¡œ ì „ë‹¬ëœë‹¤ëŠ” ë³´ìž¥ì€ - 없습니다. - -ë”°ë¼ì„œ, ì•žì˜ ì½”ë“œì— ëŒ€í•´ 다른 CPU ê°€ 보는 결과는 다ìŒê³¼ ê°™ì„ ìˆ˜ 있습니다: - - LOAD *A, ..., LOAD {*C,*D}, STORE *E, STORE *B - - ("LOAD {*C,*D}" 는 ì¡°í•©ëœ ë¡œë“œìž…ë‹ˆë‹¤) - - -하지만, CPU 는 스스로는 ì¼ê´€ì ì¼ ê²ƒì„ ë³´ìž¥í•©ë‹ˆë‹¤: CPU _ìžì‹ _ ì˜ ì•¡ì„¸ìŠ¤ë“¤ì€ -ìžì‹ ì—게는 메모리 배리어가 ì—†ìŒì—ë„ ë¶ˆêµ¬í•˜ê³ ì •í™•ížˆ 순서 세워진 것으로 보여질 -것입니다. 예를 들어 다ìŒì˜ 코드가 주어졌다면: - - U = READ_ONCE(*A); - WRITE_ONCE(*A, V); - WRITE_ONCE(*A, W); - X = READ_ONCE(*A); - WRITE_ONCE(*A, Y); - Z = READ_ONCE(*A); - -ê·¸ë¦¬ê³ ì™¸ë¶€ì˜ ì˜í–¥ì— ì˜í•œ ê°„ì„ì´ ì—†ë‹¤ê³ ê°€ì •í•˜ë©´, 최종 결과는 다ìŒê³¼ ê°™ì´ -ë‚˜íƒ€ë‚ ê²ƒì´ë¼ê³ 예ìƒë 수 있습니다: - - U == *A ì˜ ìµœì´ˆ ê°’ - X == W - Z == Y - *A == Y - -ì•žì˜ ì½”ë“œëŠ” CPU ê°€ 다ìŒì˜ 메모리 액세스 시퀀스를 만들ë„ë¡ í• ê²ë‹ˆë‹¤: - - U=LOAD *A, STORE *A=V, STORE *A=W, X=LOAD *A, STORE *A=Y, Z=LOAD *A - -하지만, 별다른 ê°œìž…ì´ ì—†ê³ í”„ë¡œê·¸ëž¨ì˜ ì‹œì•¼ì— ì´ ì„¸ìƒì´ ì—¬ì „ížˆ ì¼ê´€ì ì´ë¼ê³ -ë³´ì¸ë‹¤ëŠ” 보장만 지켜진다면 ì´ ì‹œí€€ìŠ¤ëŠ” ì–´ë–¤ ì¡°í•©ìœ¼ë¡œë“ ìž¬êµ¬ì„±ë 수 있으며, ê° -ì•¡ì„¸ìŠ¤ë“¤ì€ í•©ì³ì§€ê±°ë‚˜ ë²„ë ¤ì§ˆ 수 있습니다. ì¼ë¶€ 아키í…ì³ì—ì„œ CPU 는 ê°™ì€ ìœ„ì¹˜ì— -대한 ì—°ì†ì ì¸ ë¡œë“œ 오í¼ë ˆì´ì…˜ë“¤ì„ 재배치 í• ìˆ˜ 있기 ë•Œë¬¸ì— ì•žì˜ ì˜ˆì—ì„œì˜ -READ_ONCE() 와 WRITE_ONCE() 는 반드시 존재해야 í•¨ì„ ì•Œì•„ë‘세요. 그런 ì¢…ë¥˜ì˜ -아키í…ì³ì—ì„œ READ_ONCE() 와 WRITE_ONCE() 는 ì´ ë¬¸ì œë¥¼ 막기 위해 필요한 ì¼ì„ -ëê°€ ëë“ ì§€ 하게 ë˜ëŠ”ë°, 예를 들어 Itanium ì—서는 READ_ONCE() 와 WRITE_ONCE() -ê°€ 사용하는 volatile ìºìŠ¤íŒ…ì€ GCC ê°€ 그런 재배치를 방지하는 특수 ì¸ìŠ¤íŠ¸ëŸì…˜ì¸ -ld.acq 와 stl.rel ì¸ìŠ¤íŠ¸ëŸì…˜ì„ ê°ê° 만들어 ë‚´ë„ë¡ í•©ë‹ˆë‹¤. - -컴파ì¼ëŸ¬ ì—ì‹œ ì´ ì‹œí€€ìŠ¤ì˜ ì•¡ì„¸ìŠ¤ë“¤ì„ CPU ê°€ ë³´ê¸°ë„ ì „ì— í•©ì¹˜ê±°ë‚˜ 버리거나 뒤로 -미뤄버릴 수 있습니다. - -예를 들어: - - *A = V; - *A = W; - -는 다ìŒê³¼ ê°™ì´ ë³€í˜•ë 수 있습니다: - - *A = W; - -ë”°ë¼ì„œ, 쓰기 배리어나 WRITE_ONCE() ê°€ 없다면 *A ë¡œì˜ V ê°’ì˜ ì €ìž¥ì˜ íš¨ê³¼ëŠ” -사ë¼ì§„ë‹¤ê³ ê°€ì •ë 수 있습니다. 비슷하게: - - *A = Y; - Z = *A; - -는, 메모리 배리어나 READ_ONCE() 와 WRITE_ONCE() ì—†ì´ëŠ” 다ìŒê³¼ ê°™ì´ ë³€í˜•ë 수 -있습니다: - - *A = Y; - Z = Y; - -ê·¸ë¦¬ê³ ì´ LOAD 오í¼ë ˆì´ì…˜ì€ CPU 바깥ì—는 아예 ë³´ì´ì§€ 않습니다. - - -ê·¸ë¦¬ê³ , ALPHA ê°€ 있다 ---------------------- - -DEC Alpha CPU 는 가장 ì™„í™”ëœ ë©”ëª¨ë¦¬ ìˆœì„œì˜ CPU 중 하나입니다. ë¿ë§Œ 아니ë¼, -Alpha CPU ì˜ ì¼ë¶€ ë²„ì „ì€ ë¶„í• ëœ ë°ì´í„° ìºì‹œë¥¼ ê°€ì§€ê³ ìžˆì–´ì„œ, ì˜ë¯¸ì 으로 -관계ë˜ì–´ 있는 ë‘ê°œì˜ ìºì‹œ ë¼ì¸ì´ 서로 다른 ì‹œê°„ì— ì—…ë°ì´íŠ¸ ë˜ëŠ”게 가능합니다. -ì´ê²Œ 주소 ì˜ì¡´ì„± 배리어가 ì •ë§ í•„ìš”í•´ì§€ëŠ” 부분ì¸ë°, 주소 ì˜ì¡´ì„± 배리어는 메모리 -ì¼ê´€ì„± 시스템과 함께 ë‘ê°œì˜ ìºì‹œë¥¼ ë™ê¸°í™” 시켜서, í¬ì¸í„° 변경과 새로운 ë°ì´í„°ì˜ -ë°œê²¬ì„ ì˜¬ë°”ë¥¸ 순서로 ì¼ì–´ë‚˜ê²Œ 하기 때문입니다. - -리눅스 커ë„ì˜ ë©”ëª¨ë¦¬ 배리어 모ë¸ì€ Alpha ì— ê¸°ì´ˆí•´ì„œ ì •ì˜ë˜ì—ˆìŠµë‹ˆë‹¤ë§Œ, v4.15 -부터는 Alpha ìš© READ_ONCE() 코드 ë‚´ì— smp_mb() ê°€ 추가ë˜ì–´ì„œ 메모리 모ë¸ë¡œì˜ -Alpha ì˜ ì˜í–¥ë ¥ì´ í¬ê²Œ 줄어들었습니다. - - -ê°€ìƒ ë¨¸ì‹ ê²ŒìŠ¤íŠ¸ ----------------- - -ê°€ìƒ ë¨¸ì‹ ì—ì„œ ë™ìž‘하는 ê²ŒìŠ¤íŠ¸ë“¤ì€ ê²ŒìŠ¤íŠ¸ ìžì²´ëŠ” SMP ì§€ì› ì—†ì´ ì»´íŒŒì¼ ë˜ì—ˆë‹¤ -í•´ë„ SMP ì˜í–¥ì„ ë°›ì„ ìˆ˜ 있습니다. ì´ê±´ UP 커ë„ì„ ì‚¬ìš©í•˜ë©´ì„œ SMP 호스트와 -결부ë˜ì–´ ë°œìƒí•˜ëŠ” 부작용입니다. ì´ ê²½ìš°ì—는 mandatory 배리어를 사용해서 ë¬¸ì œë¥¼ -í•´ê²°í• ìˆ˜ ìžˆê² ì§€ë§Œ 그런 í•´ê²°ì€ ëŒ€ë¶€ë¶„ì˜ ê²½ìš° 최ì ì˜ í•´ê²°ì±…ì´ ì•„ë‹™ë‹ˆë‹¤. - -ì´ ë¬¸ì œë¥¼ 완벽하게 해결하기 위해, 로우 ë ˆë²¨ì˜ virt_mb() ë“±ì˜ ë§¤í¬ë¡œë¥¼ ì‚¬ìš©í• ìˆ˜ -있습니다. ì´ê²ƒë“¤ì€ SMP ê°€ 활성화 ë˜ì–´ 있다면 smp_mb() 등과 ë™ì¼í•œ 효과를 -갖습니다만, SMP 와 SMP ì•„ë‹Œ 시스템 모ë‘ì— ëŒ€í•´ ë™ì¼í•œ 코드를 만들어냅니다. -예를 들어, ê°€ìƒ ë¨¸ì‹ ê²ŒìŠ¤íŠ¸ë“¤ì€ (SMP ì¼ ìˆ˜ 있는) 호스트와 ë™ê¸°í™”를 í• ë•Œì—는 -smp_mb() ê°€ ì•„ë‹ˆë¼ virt_mb() 를 사용해야 합니다. - -ì´ê²ƒë“¤ì€ smp_mb() ë¥˜ì˜ ê²ƒë“¤ê³¼ ëª¨ë“ ë¶€ë¶„ì—ì„œ ë™ì¼í•˜ë©°, 특히, MMIO ì˜ ì˜í–¥ì— -대해서는 간여하지 않습니다: MMIO ì˜ ì˜í–¥ì„ ì œì–´í•˜ë ¤ë©´, mandatory 배리어를 -사용하시기 ë°”ëžë‹ˆë‹¤. - - -======= -사용 예 -======= - -ìˆœí™˜ì‹ ë²„í¼ ------------ - -메모리 배리어는 ìˆœí™˜ì‹ ë²„í¼ë¥¼ ìƒì„±ìž(producer)와 소비ìž(consumer) 사ì´ì˜ -ë™ê¸°í™”ì— ë½ì„ 사용하지 ì•Šê³ êµ¬í˜„í•˜ëŠ”ë°ì— 사용ë 수 있습니다. ë” ìžì„¸í•œ ë‚´ìš©ì„ -ìœ„í•´ì„ ë‹¤ìŒì„ ì°¸ê³ í•˜ì„¸ìš”: - - Documentation/core-api/circular-buffers.rst - - -========= -ì°¸ê³ ë¬¸í—Œ -========= - -Alpha AXP Architecture Reference Manual, Second Edition (Sites & Witek, -Digital Press) - Chapter 5.2: Physical Address Space Characteristics - Chapter 5.4: Caches and Write Buffers - Chapter 5.5: Data Sharing - Chapter 5.6: Read/Write Ordering - -AMD64 Architecture Programmer's Manual Volume 2: System Programming - Chapter 7.1: Memory-Access Ordering - Chapter 7.4: Buffering and Combining Memory Writes - -ARM Architecture Reference Manual (ARMv8, for ARMv8-A architecture profile) - Chapter B2: The AArch64 Application Level Memory Model - -IA-32 Intel Architecture Software Developer's Manual, Volume 3: -System Programming Guide - Chapter 7.1: Locked Atomic Operations - Chapter 7.2: Memory Ordering - Chapter 7.4: Serializing Instructions - -The SPARC Architecture Manual, Version 9 - Chapter 8: Memory Models - Appendix D: Formal Specification of the Memory Models - Appendix J: Programming with the Memory Models - -Storage in the PowerPC (Stone and Fitzgerald) - -UltraSPARC Programmer Reference Manual - Chapter 5: Memory Accesses and Cacheability - Chapter 15: Sparc-V9 Memory Models - -UltraSPARC III Cu User's Manual - Chapter 9: Memory Models - -UltraSPARC IIIi Processor User's Manual - Chapter 8: Memory Models - -UltraSPARC Architecture 2005 - Chapter 9: Memory - Appendix D: Formal Specifications of the Memory Models - -UltraSPARC T1 Supplement to the UltraSPARC Architecture 2005 - Chapter 8: Memory Models - Appendix F: Caches and Cache Coherency - -Solaris Internals, Core Kernel Architecture, p63-68: - Chapter 3.3: Hardware Considerations for Locks and - Synchronization - -Unix Systems for Modern Architectures, Symmetric Multiprocessing and Caching -for Kernel Programmers: - Chapter 13: Other Memory Models - -Intel Itanium Architecture Software Developer's Manual: Volume 1: - Section 2.6: Speculation - Section 4.4: Memory Access diff --git a/Documentation/translations/sp_SP/process/adding-syscalls.rst b/Documentation/translations/sp_SP/process/adding-syscalls.rst index f21504c612b2..5f7445b62637 100644 --- a/Documentation/translations/sp_SP/process/adding-syscalls.rst +++ b/Documentation/translations/sp_SP/process/adding-syscalls.rst @@ -128,7 +128,7 @@ manipulador de ese objeto -- no invente un nuevo tipo de objeto manipulador userspace cuando el kernel ya tiene mecanismos y semánticas bien definidas para usar los descriptores de archivos. -Si su nueva llamada a sistema :manpage:`xyzzy(2)` retorna un nuevo +Si su nueva llamada a sistema xyzzy(2) retorna un nuevo descriptor de archivo, entonces el argumento flag debe incluir un valor que sea equivalente a definir ``O_CLOEXEC`` en el nuevo FD. Esto hace posible al userspace acortar la brecha de tiempo entre ``xyzzy()`` y la llamada a @@ -145,12 +145,12 @@ archivo listo para leer o escribir es la forma normal para que el kernel indique al espacio de usuario que un evento ha ocurrido en el correspondiente objeto del kernel. -Si su nueva llamada de sistema :manpage:`xyzzy(2)` involucra algún nombre +Si su nueva llamada de sistema xyzzy(2) involucra algún nombre de archivo como argumento:: int sys_xyzzy(const char __user *path, ..., unsigned int flags); -deberÃa considerar también si una versión :manpage:`xyzzyat(2)` es mas +deberÃa considerar también si una versión xyzzyat(2) es mas apropiada:: int sys_xyzzyat(int dfd, const char __user *path, ..., unsigned int flags); @@ -158,7 +158,7 @@ apropiada:: Esto permite más flexibilidad en como el userspace especifica el archivo en cuestión; en particular esto permite al userspace pedir la funcionalidad a un descriptor de archivo ya abierto usando el flag ``AT_EMPTY_PATH``, -efectivamente dando una operación :manpage:`fxyzzy(3)` gratis:: +efectivamente dando una operación fxyzzy(3) gratis:: - xyzzyat(AT_FDCWD, path, ..., 0) es equivalente a xyzzy(path, ...) - xyzzyat(fd, "", ..., AT_EMPTY_PATH) es equivalente a fxyzzy(fd, ...) @@ -167,12 +167,12 @@ efectivamente dando una operación :manpage:`fxyzzy(3)` gratis:: revise el man page :manpage:`openat(2)`; para un ejemplo de AT_EMPTY_PATH, mire el man page :manpage:`fstatat(2)` manpage.) -Si su nueva llamada de sistema :manpage:`xyzzy(2)` involucra un parámetro +Si su nueva llamada de sistema xyzzy(2) involucra un parámetro describiendo un describiendo un movimiento dentro de un archivo, ponga de tipo ``loff_t`` para que movimientos de 64-bit puedan ser soportados incluso en arquitecturas de 32-bit. -Si su nueva llamada de sistema :manpage:`xyzzy` involucra una +Si su nueva llamada de sistema xyzzy(2) involucra una funcionalidad privilegiada, esta necesita ser gobernada por la capability bit linux apropiada (revisado con una llamada a ``capable()``), como se describe en el man page :manpage:`capabilities(7)`. Elija una parte de @@ -182,7 +182,7 @@ misma sección, ya que va en contra de los propósitos de las capabilities de dividir el poder del usuario root. En particular, evite agregar nuevos usos de la capacidad ya demasiado general de la capabilities ``CAP_SYS_ADMIN``. -Si su nueva llamada de sistema :manpage:`xyzzy(2)` manipula un proceso que +Si su nueva llamada de sistema xyzzy(2) manipula un proceso que no es el proceso invocado, este deberÃa ser restringido (usando una llamada a ``ptrace_may_access()``) de forma que el único proceso con los mismos permisos del proceso objetivo, o con las capacidades (capabilities) @@ -221,7 +221,7 @@ kernel, deberÃa siempre ser copiado a linux-api@vger.kernel.org. Implementation de Llamada de Sistema Generica --------------------------------------------- -La entrada principal a su nueva llamada de sistema :manpage:`xyzzy(2)` será +La entrada principal a su nueva llamada de sistema xyzzy(2) será llamada ``sys_xyzzy()``, pero incluya este punto de entrada con la macro ``SYSCALL_DEFINEn()`` apropiada en vez de explicitamente. El 'n' indica el numero de argumentos de la llamada de sistema, y la macro toma el nombre de diff --git a/Documentation/translations/sp_SP/process/coding-style.rst b/Documentation/translations/sp_SP/process/coding-style.rst index 025223be9706..7d63aa8426e6 100644 --- a/Documentation/translations/sp_SP/process/coding-style.rst +++ b/Documentation/translations/sp_SP/process/coding-style.rst @@ -633,7 +633,7 @@ posiblemente POR QUÉ hace esto. Al comentar las funciones de la API del kernel, utilice el formato kernel-doc. Consulte los archivos en :ref:`Documentation/doc-guide/ <doc_guide>` -y ``scripts/kernel-doc`` para más detalles. +y ``tools/docs/kernel-doc`` para más detalles. El estilo preferido para comentarios largos (de varias lÃneas) es: diff --git a/Documentation/translations/zh_CN/core-api/cpu_hotplug.rst b/Documentation/translations/zh_CN/core-api/cpu_hotplug.rst index bc0d7ea6d834..3447fbf0e695 100644 --- a/Documentation/translations/zh_CN/core-api/cpu_hotplug.rst +++ b/Documentation/translations/zh_CN/core-api/cpu_hotplug.rst @@ -22,7 +22,7 @@ Srivatsa Vaddagiri <vatsa@in.ibm.com>, Ashok Raj <ashok.raj@intel.com>, Joel Schopp <jschopp@austin.ibm.com>, - Thomas Gleixner <tglx@linutronix.de> + Thomas Gleixner <tglx@kernel.org> 简介 ==== diff --git a/Documentation/translations/zh_CN/core-api/genericirq.rst b/Documentation/translations/zh_CN/core-api/genericirq.rst index 05ccb954c18d..d2c1bd94bb97 100644 --- a/Documentation/translations/zh_CN/core-api/genericirq.rst +++ b/Documentation/translations/zh_CN/core-api/genericirq.rst @@ -404,6 +404,6 @@ kernel/irq/chip.c 感谢以下人士对本文档作出的贡献： -1. Thomas Gleixner tglx@linutronix.de +1. Thomas Gleixner tglx@kernel.org 2. Ingo Molnar mingo@elte.hu diff --git a/Documentation/translations/zh_CN/doc-guide/kernel-doc.rst b/Documentation/translations/zh_CN/doc-guide/kernel-doc.rst index ccfb9b8329c2..fb2bbaaa85c1 100644 --- a/Documentation/translations/zh_CN/doc-guide/kernel-doc.rst +++ b/Documentation/translations/zh_CN/doc-guide/kernel-doc.rst @@ -43,7 +43,7 @@ kernel-doc注释用 ``/**`` ä½œä¸ºå¼€å§‹æ ‡è®°ã€‚ ``kernel-doc`` 工具将æå– ç”¨è¯¦ç»†æ¨¡å¼å’Œä¸ç”Ÿæˆå®žé™…输出æ¥è¿è¡Œ ``kernel-doc`` 工具，å¯ä»¥éªŒè¯æ–‡æ¡£æ³¨é‡Šçš„æ ¼å¼ æ˜¯å¦æ£ç¡®ã€‚例如:: - scripts/kernel-doc -v -none drivers/foo/bar.c + tools/docs/kernel-doc -v -none drivers/foo/bar.c 当请求执行é¢å¤–çš„gccæ£€æŸ¥æ—¶ï¼Œå†…æ ¸æž„å»ºå°†éªŒè¯æ–‡æ¡£æ ¼å¼:: @@ -473,7 +473,7 @@ doc: *title* 如果没有选项，kernel-doc指令将包å«æºæ–‡ä»¶ä¸çš„所有文档注释。 kernel-doc扩展包å«åœ¨å†…æ ¸æºä»£ç æ ‘ä¸ï¼Œä½äºŽ ``Documentation/sphinx/kerneldoc.py`` 。 -在内部，它使用 ``scripts/kernel-doc`` 脚本从æºä»£ç ä¸æå–文档注释。 +在内部，它使用 ``tools/docs/kernel-doc`` 脚本从æºä»£ç ä¸æå–文档注释。 .. _kernel_doc_zh: @@ -482,18 +482,18 @@ kernel-doc扩展包å«åœ¨å†…æ ¸æºä»£ç æ ‘ä¸ï¼Œä½äºŽ ``Documentation/sphinx/k 如果您åªæƒ³ä½¿ç”¨kernel-doc生æˆæ‰‹å†Œé¡µï¼Œå¯ä»¥ä»Žå†…æ ¸gitæ ‘è¿™æ ·åš:: - $ scripts/kernel-doc -man \ + $ tools/docs/kernel-doc -man \ $(git grep -l '/\*\*' -- :^Documentation :^tools) \ | scripts/split-man.pl /tmp/man 一些旧版本的gitä¸æ”¯æŒè·¯å¾„排除è¯æ³•çš„æŸäº›å˜ä½“。 以下命令之一å¯èƒ½é€‚用于这些版本:: - $ scripts/kernel-doc -man \ + $ tools/docs/kernel-doc -man \ $(git grep -l '/\*\*' -- . ':!Documentation' ':!tools') \ | scripts/split-man.pl /tmp/man - $ scripts/kernel-doc -man \ + $ tools/docs/kernel-doc -man \ $(git grep -l '/\*\*' -- . ":(exclude)Documentation" ":(exclude)tools") \ | scripts/split-man.pl /tmp/man diff --git a/Documentation/translations/zh_CN/kbuild/kbuild.rst b/Documentation/translations/zh_CN/kbuild/kbuild.rst index 57f5cf5b2cdd..a477b4b08958 100644 --- a/Documentation/translations/zh_CN/kbuild/kbuild.rst +++ b/Documentation/translations/zh_CN/kbuild/kbuild.rst @@ -174,7 +174,7 @@ UTS_MACHINE å˜é‡ï¼ˆåœ¨æŸäº›æž¶æž„ä¸è¿˜åŒ…æ‹¬å†…æ ¸é…置）æ¥çŒœæµ‹æ£ç¡®çš KDOCFLAGS --------- 指定在构建过程ä¸ç”¨äºŽ kernel-doc 检查的é¢å¤–（è¦å‘Š/é”™è¯¯ï¼‰æ ‡å¿—ï¼ŒæŸ¥çœ‹ -scripts/kernel-doc 了解支æŒçš„æ ‡å¿—ã€‚è¯·æ³¨æ„，这目å‰ä¸é€‚用于文档构建。 +tools/docs/kernel-doc 了解支æŒçš„æ ‡å¿—ã€‚è¯·æ³¨æ„，这目å‰ä¸é€‚用于文档构建。 ARCH ---- diff --git a/Documentation/translations/zh_CN/mm/memory-model.rst b/Documentation/translations/zh_CN/mm/memory-model.rst index 77ec149a970c..c0c5d8ecd880 100644 --- a/Documentation/translations/zh_CN/mm/memory-model.rst +++ b/Documentation/translations/zh_CN/mm/memory-model.rst @@ -83,8 +83,6 @@ SPARSEMEM模型将物ç†å†…å˜æ˜¾ç¤ºä¸ºä¸€ä¸ªéƒ¨åˆ†çš„集åˆã€‚一个区段用me æ¯ä¸€è¡ŒåŒ…å«ä»·å€¼ `PAGE_SIZE` çš„ `mem_section` 对象，行数的计算是为了适应所有的 内å˜åŒºã€‚ -架构设置代ç 应该调用sparse_init()æ¥åˆå§‹åŒ–内å˜åŒºå’Œå†…å˜æ˜ 射。 - 通过SPARSEMEM，有两ç§å¯èƒ½çš„æ–¹å¼å°†PFN转æ¢ä¸ºç›¸åº”çš„ `struct page` --"classic sparse"å’Œ "sparse vmemmap"。选择是在构建时进行的，它由 `CONFIG_SPARSEMEM_VMEMMAP` çš„ 值决定。 diff --git a/Documentation/translations/zh_CN/process/coding-style.rst b/Documentation/translations/zh_CN/process/coding-style.rst index 0484d0c65c25..5a342a024c01 100644 --- a/Documentation/translations/zh_CN/process/coding-style.rst +++ b/Documentation/translations/zh_CN/process/coding-style.rst @@ -545,7 +545,7 @@ Linux 里这是æ倡的åšæ³•ï¼Œå› ä¸ºè¿™æ ·å¯ä»¥å¾ˆç®€å•çš„给读者æä¾›æ› ä¹Ÿå¯ä»¥åŠ 上它åšè¿™äº›äº‹æƒ…çš„åŽŸå› ã€‚ å½“æ³¨é‡Šå†…æ ¸ API 函数时，请使用 kernel-doc æ ¼å¼ã€‚è¯¦è§ -Documentation/translations/zh_CN/doc-guide/index.rst å’Œ scripts/kernel-doc 。 +Documentation/translations/zh_CN/doc-guide/index.rst å’Œ tools/docs/kernel-doc 。 é•¿ (多行) æ³¨é‡Šçš„é¦–é€‰é£Žæ ¼æ˜¯ï¼š diff --git a/Documentation/translations/zh_TW/process/coding-style.rst b/Documentation/translations/zh_TW/process/coding-style.rst index 311c6f6bad0b..e2ba97b3d8bb 100644 --- a/Documentation/translations/zh_TW/process/coding-style.rst +++ b/Documentation/translations/zh_TW/process/coding-style.rst @@ -548,7 +548,7 @@ Linux è£é€™æ˜¯æ倡的åšæ³•ï¼Œå› 爲這樣å¯ä»¥å¾ˆç°¡å–®çš„給讀者æä¾›æ› ä¹Ÿå¯ä»¥åŠ 上它åšé€™äº›äº‹æƒ…çš„åŽŸå› ã€‚ ç•¶è¨»é‡‹å…§æ ¸ API 函數時，請使用 kernel-doc æ ¼å¼ã€‚詳見 -Documentation/translations/zh_CN/doc-guide/index.rst å’Œ scripts/kernel-doc 。 +Documentation/translations/zh_CN/doc-guide/index.rst å’Œ tools/docs/kernel-doc 。 é•· (多行) 註釋的首é¸é¢¨æ ¼æ˜¯ï¼š diff --git a/Documentation/usb/gadget-testing.rst b/Documentation/usb/gadget-testing.rst index 5f90af1fb573..a6e8292f320a 100644 --- a/Documentation/usb/gadget-testing.rst +++ b/Documentation/usb/gadget-testing.rst @@ -368,14 +368,15 @@ Function-specific configfs interface The function name to use when creating the function directory is "midi". The MIDI function provides these attributes in its function directory: - =============== ==================================== - buflen MIDI buffer length - id ID string for the USB MIDI adapter - in_ports number of MIDI input ports - index index value for the USB MIDI adapter - out_ports number of MIDI output ports - qlen USB read request queue length - =============== ==================================== + ================ ==================================== + buflen MIDI buffer length + id ID string for the USB MIDI adapter + in_ports number of MIDI input ports + index index value for the USB MIDI adapter + out_ports number of MIDI output ports + qlen USB read request queue length + interface_string USB AudioControl interface string + ================ ==================================== Testing the MIDI function ------------------------- @@ -686,6 +687,7 @@ The SOURCESINK function provides these attributes in its function directory: isoc_mult 0..2 (hs/ss only) isoc_maxburst 0..15 (ss only) bulk_buflen buffer length + bulk_maxburst 0..15 (ss only) bulk_qlen depth of queue for bulk iso_qlen depth of queue for iso =============== ================================== diff --git a/Documentation/usb/index.rst b/Documentation/usb/index.rst index 826492c813ac..605233febd7a 100644 --- a/Documentation/usb/index.rst +++ b/Documentation/usb/index.rst @@ -31,10 +31,3 @@ USB support usb-help text_files - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/userspace-api/gpio/index.rst b/Documentation/userspace-api/gpio/index.rst index f258de4ef370..ac9c6ff9875c 100644 --- a/Documentation/userspace-api/gpio/index.rst +++ b/Documentation/userspace-api/gpio/index.rst @@ -9,10 +9,3 @@ GPIO Character Device Userspace API <chardev> Obsolete Userspace APIs <obsolete> - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/userspace-api/index.rst b/Documentation/userspace-api/index.rst index 8a61ac4c1bf1..a68b1bea57a8 100644 --- a/Documentation/userspace-api/index.rst +++ b/Documentation/userspace-api/index.rst @@ -21,6 +21,7 @@ System calls ebpf/index ioctl/index mseal + rseq Security-related interfaces =========================== @@ -68,10 +69,3 @@ Everything else futex2 perf_ring_buffer ntsync - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 7232b3544cec..331223761fff 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -15,7 +15,7 @@ macros defined in <linux/ioctl.h>: ====== =========================== _IO none _IOW write (read from userspace) - _IOR read (write to userpace) + _IOR read (write to userspace) _IOWR write and read ====== =========================== @@ -397,7 +397,6 @@ Code Seq# Include File Comments 0xCD 01 linux/reiserfs_fs.h Dead since 6.13 0xCE 01-02 uapi/linux/cxl_mem.h Compute Express Link Memory Devices 0xCF 02 fs/smb/client/cifs_ioctl.h -0xDB 00-0F drivers/char/mwave/mwavepub.h 0xDD 00-3F ZFCP device driver see drivers/s390/scsi/ <mailto:aherrman@de.ibm.com> 0xE5 00-3F linux/fuse.h diff --git a/Documentation/userspace-api/landlock.rst b/Documentation/userspace-api/landlock.rst index 1d0c2c15c22e..13134bccdd39 100644 --- a/Documentation/userspace-api/landlock.rst +++ b/Documentation/userspace-api/landlock.rst @@ -8,7 +8,7 @@ Landlock: unprivileged access control ===================================== :Author: Mickaël Salaün -:Date: March 2025 +:Date: January 2026 The goal of Landlock is to enable restriction of ambient rights (e.g. global filesystem or network access) for a set of processes. Because Landlock @@ -142,11 +142,11 @@ This enables the creation of an inclusive ruleset that will contain our rules. } We can now add a new rule to this ruleset thanks to the returned file -descriptor referring to this ruleset. The rule will only allow reading the -file hierarchy ``/usr``. Without another rule, write actions would then be -denied by the ruleset. To add ``/usr`` to the ruleset, we open it with the -``O_PATH`` flag and fill the &struct landlock_path_beneath_attr with this file -descriptor. +descriptor referring to this ruleset. The rule will allow reading and +executing the file hierarchy ``/usr``. Without another rule, write actions +would then be denied by the ruleset. To add ``/usr`` to the ruleset, we open +it with the ``O_PATH`` flag and fill the &struct landlock_path_beneath_attr with +this file descriptor. .. code-block:: c @@ -191,10 +191,24 @@ number for a specific action: HTTPS connections. err = landlock_add_rule(ruleset_fd, LANDLOCK_RULE_NET_PORT, &net_port, 0); +When passing a non-zero ``flags`` argument to ``landlock_restrict_self()``, a +similar backwards compatibility check is needed for the restrict flags +(see sys_landlock_restrict_self() documentation for available flags): + +.. code-block:: c + + __u32 restrict_flags = LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON; + if (abi < 7) { + /* Clear logging flags unsupported before ABI 7. */ + restrict_flags &= ~(LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF | + LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON | + LANDLOCK_RESTRICT_SELF_LOG_SUBDOMAINS_OFF); + } + The next step is to restrict the current thread from gaining more privileges (e.g. through a SUID binary). We now have a ruleset with the first rule -allowing read access to ``/usr`` while denying all other handled accesses for -the filesystem, and a second rule allowing HTTPS connections. +allowing read and execute access to ``/usr`` while denying all other handled +accesses for the filesystem, and a second rule allowing HTTPS connections. .. code-block:: c @@ -208,7 +222,7 @@ The current thread is now ready to sandbox itself with the ruleset. .. code-block:: c - if (landlock_restrict_self(ruleset_fd, 0)) { + if (landlock_restrict_self(ruleset_fd, restrict_flags)) { perror("Failed to enforce ruleset"); close(ruleset_fd); return 1; @@ -431,9 +445,68 @@ system call: printf("Landlock supports LANDLOCK_ACCESS_FS_REFER.\n"); } -The following kernel interfaces are implicitly supported by the first ABI -version. Features only supported from a specific version are explicitly marked -as such. +All Landlock kernel interfaces are supported by the first ABI version unless +explicitly noted in their documentation. + +Landlock errata +--------------- + +In addition to ABI versions, Landlock provides an errata mechanism to track +fixes for issues that may affect backwards compatibility or require userspace +awareness. The errata bitmask can be queried using: + +.. code-block:: c + + int errata; + + errata = landlock_create_ruleset(NULL, 0, LANDLOCK_CREATE_RULESET_ERRATA); + if (errata < 0) { + /* Landlock not available or disabled */ + return 0; + } + +The returned value is a bitmask where each bit represents a specific erratum. +If bit N is set (``errata & (1 << (N - 1))``), then erratum N has been fixed +in the running kernel. + +.. warning:: + + **Most applications should NOT check errata.** In 99.9% of cases, checking + errata is unnecessary, increases code complexity, and can potentially + decrease protection if misused. For example, disabling the sandbox when an + erratum is not fixed could leave the system less secure than using + Landlock's best-effort protection. When in doubt, ignore errata. + +.. kernel-doc:: security/landlock/errata/abi-4.h + :doc: erratum_1 + +.. kernel-doc:: security/landlock/errata/abi-6.h + :doc: erratum_2 + +.. kernel-doc:: security/landlock/errata/abi-1.h + :doc: erratum_3 + +How to check for errata +~~~~~~~~~~~~~~~~~~~~~~~ + +If you determine that your application needs to check for specific errata, +use this pattern: + +.. code-block:: c + + int errata = landlock_create_ruleset(NULL, 0, LANDLOCK_CREATE_RULESET_ERRATA); + if (errata >= 0) { + /* Check for specific erratum (1-indexed) */ + if (errata & (1 << (erratum_number - 1))) { + /* Erratum N is fixed in this kernel */ + } else { + /* Erratum N is NOT fixed - consider implications for your use case */ + } + } + +**Important:** Only check errata if your application specifically relies on +behavior that changed due to the fix. The fixes generally make Landlock less +restrictive or more correct, not more restrictive. Kernel interface ================ @@ -604,6 +677,14 @@ Landlock audit events with the ``LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF``, sys_landlock_restrict_self(). See Documentation/admin-guide/LSM/landlock.rst for more details on audit. +Thread synchronization (ABI < 8) +-------------------------------- + +Starting with the Landlock ABI version 8, it is now possible to +enforce Landlock rulesets across all threads of the calling process +using the ``LANDLOCK_RESTRICT_SELF_TSYNC`` flag passed to +sys_landlock_restrict_self(). + .. _kernel_support: Kernel support diff --git a/Documentation/userspace-api/media/conf_nitpick.py b/Documentation/userspace-api/media/conf_nitpick.py index 0a8e236d07ab..445a29c01d1b 100644 --- a/Documentation/userspace-api/media/conf_nitpick.py +++ b/Documentation/userspace-api/media/conf_nitpick.py @@ -42,8 +42,6 @@ nitpick_ignore = [ ("c:func", "struct fd_set"), ("c:func", "struct pollfd"), ("c:func", "usb_make_path"), - ("c:func", "wait_finish"), - ("c:func", "wait_prepare"), ("c:func", "write"), ("c:type", "atomic_t"), diff --git a/Documentation/userspace-api/media/v4l/dev-decoder.rst b/Documentation/userspace-api/media/v4l/dev-decoder.rst index eb662ced0ab4..2beb6ba1b3c2 100644 --- a/Documentation/userspace-api/media/v4l/dev-decoder.rst +++ b/Documentation/userspace-api/media/v4l/dev-decoder.rst @@ -933,7 +933,10 @@ reflected by corresponding queries): * the minimum number of buffers needed for decoding, -* bit-depth of the bitstream has been changed. +* bit-depth of the bitstream has been changed, + +* colorspace of the bitstream has been changed, but it doesn't require + buffer reallocation. Whenever that happens, the decoder must proceed as follows: diff --git a/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst index 2bec20d87928..1f7bb8fd15e7 100644 --- a/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst @@ -221,7 +221,7 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does :alt: vbi_hsync.svg :align: center - **Figure 4.1. Line synchronization** + Line synchronization .. _vbi-525: @@ -229,7 +229,7 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does :alt: vbi_525.svg :align: center - **Figure 4.2. ITU-R 525 line numbering (M/NTSC and M/PAL)** + ITU-R 525 line numbering (M/NTSC and M/PAL) .. _vbi-625: @@ -237,7 +237,7 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does :alt: vbi_625.svg :align: center - **Figure 4.3. ITU-R 625 line numbering** + ITU-R 625 line numbering Remember the VBI image format depends on the selected video standard, therefore the application must choose a new standard or query the diff --git a/Documentation/userspace-api/media/v4l/dev-subdev.rst b/Documentation/userspace-api/media/v4l/dev-subdev.rst index 2530170a56ae..142e2cd95062 100644 --- a/Documentation/userspace-api/media/v4l/dev-subdev.rst +++ b/Documentation/userspace-api/media/v4l/dev-subdev.rst @@ -460,7 +460,7 @@ selection will refer to the sink pad format dimensions instead. :alt: subdev-image-processing-crop.svg :align: center - **Figure 4.5. Image processing in subdevs: simple crop example** + Image processing in subdevs: simple crop example In the above example, the subdev supports cropping on its sink pad. To configure it, the user sets the media bus format on the subdev's sink @@ -477,7 +477,7 @@ pad. :alt: subdev-image-processing-scaling-multi-source.svg :align: center - **Figure 4.6. Image processing in subdevs: scaling with multiple sources** + Image processing in subdevs: scaling with multiple sources In this example, the subdev is capable of first cropping, then scaling and finally cropping for two source pads individually from the resulting @@ -493,7 +493,7 @@ an area at location specified by the source crop rectangle from it. :alt: subdev-image-processing-full.svg :align: center - **Figure 4.7. Image processing in subdevs: scaling and composition with multiple sinks and sources** + Image processing in subdevs: scaling and composition with multiple sinks and sources The subdev driver supports two sink pads and two source pads. The images from both of the sink pads are individually cropped, then scaled and @@ -578,15 +578,14 @@ Device types and routing setup Different kinds of sub-devices have differing behaviour for route activation, depending on the hardware. In all cases, however, only routes that have the -``V4L2_SUBDEV_STREAM_FL_ACTIVE`` flag set are active. +``V4L2_SUBDEV_ROUTE_FL_ACTIVE`` flag set are active. Devices generating the streams may allow enabling and disabling some of the routes or have a fixed routing configuration. If the routes can be disabled, not -declaring the routes (or declaring them without -``V4L2_SUBDEV_STREAM_FL_ACTIVE`` flag set) in ``VIDIOC_SUBDEV_S_ROUTING`` will -disable the routes. ``VIDIOC_SUBDEV_S_ROUTING`` will still return such routes -back to the user in the routes array, with the ``V4L2_SUBDEV_STREAM_FL_ACTIVE`` -flag unset. +declaring the routes (or declaring them without ``V4L2_SUBDEV_ROUTE_FL_ACTIVE`` +flag set) in ``VIDIOC_SUBDEV_S_ROUTING`` will disable the routes. +``VIDIOC_SUBDEV_S_ROUTING`` will still return such routes back to the user in +the routes array, with the ``V4L2_SUBDEV_ROUTE_FL_ACTIVE`` flag unset. Devices transporting the streams almost always have more configurability with respect to routing. Typically any route between the sub-device's sink and source diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst index 497ae74379f6..3b1e05c6eb13 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst @@ -2959,6 +2959,126 @@ This structure contains all loop filter related parameters. See sections - 0x00000004 - +``V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS (struct)`` + Subset of the :c:type:`v4l2_ctrl_hevc_sps` control. + It extends it with the list of Long-term reference sets parameters. + These parameters are defined according to :ref:`hevc`. + They are described in section 7.4.3.2.1 "General sequence parameter set + RBSP semantics" of the specification. + This control is a dynamically sized 1-dimensional array. + The values in the array should be ignored when either + num_long_term_ref_pics_sps is 0 or the + V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT flag is not set in + :c:type:`v4l2_ctrl_hevc_sps`. + +.. c:type:: v4l2_ctrl_hevc_ext_sps_lt_rps + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hevc_ext_sps_lt_rps + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u16 + - ``lt_ref_pic_poc_lsb_sps`` + - Long term reference picture order count as described in section 7.4.3.2.1 + "General sequence parameter set RBSP semantics" of the specification. + * - __u16 + - ``flags`` + - See :ref:`Extended Long-Term RPS Flags <hevc_ext_sps_lt_rps_flags>` + +.. _hevc_ext_sps_lt_rps_flags: + +``Extended SPS Long-Term RPS Flags`` + +.. cssclass:: longtable + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - ``V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT`` + - 0x00000001 + - Specifies if the long-term reference picture is used 7.4.3.2.1 "General sequence parameter + set RBSP semantics" of the specification. + +``V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS (struct)`` + Subset of the :c:type:`v4l2_ctrl_hevc_sps` control. + It extends it with the list of Short-term reference sets parameters. + These parameters are defined according to :ref:`hevc`. + They are described in section 7.4.8 "Short-term reference picture set + semantics" of the specification. + This control is a dynamically sized 1-dimensional array. + The values in the array should be ignored when + num_short_term_ref_pic_sets is 0. + +.. c:type:: v4l2_ctrl_hevc_ext_sps_st_rps + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hevc_ext_sps_st_rps + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u8 + - ``delta_idx_minus1`` + - Specifies the delta compare to the index. See details in section 7.4.8 "Short-term + reference picture set semantics" of the specification. + * - __u8 + - ``delta_rps_sign`` + - Sign of the delta as specified in section 7.4.8 "Short-term reference picture set + semantics" of the specification. + * - __u8 + - ``num_negative_pics`` + - Number of short-term RPS entries that have picture order count values less than the + picture order count value of the current picture. + * - __u8 + - ``num_positive_pics`` + - Number of short-term RPS entries that have picture order count values greater than the + picture order count value of the current picture. + * - __u32 + - ``used_by_curr_pic`` + - Bit i specifies if short-term RPS i is used by the current picture. + * - __u32 + - ``use_delta_flag`` + - Bit i specifies if short-term RPS i is included in the short-term RPS entries. + * - __u16 + - ``abs_delta_rps_minus1`` + - Absolute delta RPS as specified in section 7.4.8 "Short-term reference picture set + semantics" of the specification. + * - __u16 + - ``delta_poc_s0_minus1[16]`` + - Specifies the negative picture order count delta for the i-th entry in the short-term RPS. + See details in section 7.4.8 "Short-term reference picture set semantics" of the + specification. + * - __u16 + - ``delta_poc_s1_minus1[16]`` + - Specifies the positive picture order count delta for the i-th entry in the short-term RPS. + See details in section 7.4.8 "Short-term reference picture set semantics" of the + specification. + * - __u16 + - ``flags`` + - See :ref:`Extended Short-Term RPS Flags <hevc_ext_sps_st_rps_flags>` + +.. _hevc_ext_sps_st_rps_flags: + +``Extended SPS Short-Term RPS Flags`` + +.. cssclass:: longtable + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - ``V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED`` + - 0x00000001 + - Specifies if the short-term RPS is predicted from another short term RPS. See details in + section 7.4.8 "Short-term reference picture set semantics" of the specification. + .. _v4l2-codec-stateless-av1: ``V4L2_CID_STATELESS_AV1_SEQUENCE (struct)`` diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst index bd024ab461a4..b7f45fc0a797 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst @@ -58,6 +58,8 @@ Flash Control IDs ``V4L2_CID_FLASH_CLASS (class)`` The FLASH class descriptor. +.. _v4l2-cid-flash-led-mode: + ``V4L2_CID_FLASH_LED_MODE (menu)`` Defines the mode of the flash LED, the high-power white LED attached to the flash controller. Setting this control may not be possible in @@ -81,6 +83,8 @@ Flash Control IDs +.. _v4l2-cid-flash-strobe-source: + ``V4L2_CID_FLASH_STROBE_SOURCE (menu)`` Defines the source of the flash LED strobe. @@ -97,6 +101,12 @@ Flash Control IDs - The flash strobe is triggered by an external source. Typically this is a sensor, which makes it possible to synchronise the flash strobe start to exposure start. + This method of controlling flash LED strobe has two additional + prerequisites: the strobe source's :ref:`strobe output + <v4l2-cid-flash-strobe-oe>` must be enabled (if available) + and the flash controller's :ref:`flash LED mode + <v4l2-cid-flash-led-mode>` must be set to + ``V4L2_FLASH_LED_MODE_FLASH``. @@ -187,3 +197,35 @@ Flash Control IDs charged before strobing. LED flashes often require a cooldown period after strobe during which another strobe will not be possible. This is a read-only control. + +.. _v4l2-cid-flash-duration: + +``V4L2_CID_FLASH_DURATION (integer)`` + Duration of the flash strobe pulse generated by the strobe source, when + using external strobe. This control shall be implemented by the device + generating the hardware flash strobe signal, typically a camera sensor, + connected to a flash controller. + + The flash controllers :ref:`strobe source <v4l2-cid-flash-strobe-source>` + must be configured to ``V4L2_FLASH_STROBE_SOURCE_EXTERNAL`` for this + mode of operation. For more details please also take a look at the + documentation there. + + The unit should be microseconds (µs) if possible. + +.. _v4l2-cid-flash-strobe-oe: + +``V4L2_CID_FLASH_STROBE_OE (boolean)`` + Enables the output of a hardware strobe signal from the strobe source, + when using external strobe. This control shall be implemented by the device + generating the hardware flash strobe signal, typically a camera sensor, + connected to a flash controller. + + Provided the signal generating device driver supports it, the length of the + strobe signal can be configured by adjusting its + :ref:`flash duration <v4l2-cid-flash-duration>`. + + The flash controllers :ref:`strobe source <v4l2-cid-flash-strobe-source>` + must be configured to ``V4L2_FLASH_STROBE_SOURCE_EXTERNAL`` for this + mode of operation. For more details please also take a look at the + documentation there. diff --git a/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst index 696e0a645a7e..f8029bcb5282 100644 --- a/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst +++ b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst @@ -44,7 +44,7 @@ member and userspace must populate the type member with a value from struct v4l2_isp_params_buffer *params = (struct v4l2_isp_params_buffer *)buffer; - params->version = MALI_C55_PARAM_BUFFER_V1; + params->version = V4L2_ISP_PARAMS_VERSION_V1; params->data_size = 0; void *data = (void *)params->data; diff --git a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst index c7efb0465db6..235f955d3cd5 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst @@ -275,6 +275,14 @@ Compressed Formats of macroblocks to decode a full corresponding frame to the matching capture buffer. + * .. _V4L2-PIX-FMT-AV1: + + - ``V4L2_PIX_FMT_AV1`` + - 'AV01' + - AV1 compressed video frame. This format is adapted for implementing AV1 + pipeline. The decoder implements stateful video decoder and expects one + temporal unit per buffer in OBU stream format. + The encoder generates one Temporal Unit per buffer. .. raw:: latex \normalsize diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst b/Documentation/userspace-api/media/v4l/subdev-formats.rst index cf970750dd4c..896177c5334f 100644 --- a/Documentation/userspace-api/media/v4l/subdev-formats.rst +++ b/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -2800,7 +2800,7 @@ be named ``MEDIA_BUS_FMT_SRGGB10_2X8_PADHI_LE``. :alt: bayer.svg :align: center - **Figure 4.8 Bayer Patterns** + Bayer Patterns The following table lists existing packed Bayer formats. The data organization is given as an example for the first pixel only. diff --git a/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions index c41693115db6..6182b4e2d2ee 100644 --- a/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions +++ b/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions @@ -150,6 +150,8 @@ replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_H264_PRED_WEIGHTS :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`V4L.v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS :c:type:`V4L.v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`V4L.v4l2_ctrl_type` replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`V4L.v4l2_ctrl_type` diff --git a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst index c8baa9430c14..82c8b52e771c 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst @@ -531,6 +531,18 @@ See also the examples in :ref:`control`. - n/a - A struct :c:type:`v4l2_ctrl_hevc_decode_params`, containing HEVC decoding parameters for stateless video decoders. + * - ``V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS`` + - n/a + - n/a + - n/a + - A struct :c:type:`v4l2_ctrl_hevc_ext_sps_lt_rps`, containing HEVC + extended Long-Term RPS for stateless video decoders. + * - ``V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS`` + - n/a + - n/a + - n/a + - A struct :c:type:`v4l2_ctrl_hevc_ext_sps_st_rps`, containing HEVC + extended Short-Term RPS for stateless video decoders. * - ``V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR`` - n/a - n/a diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst index 1cf795480602..6f66ca38589e 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst @@ -157,7 +157,14 @@ appropriately. The generic error codes are described at the EINVAL The sink or source pad identifiers reference a non-existing pad or reference pads of different types (ie. the sink_pad identifiers refers to a source - pad), or the ``which`` field has an unsupported value. + pad), the ``which`` field has an unsupported value, or, for + ``VIDIOC_SUBDEV_S_ROUTING``, the num_routes field set by the application is + larger than the len_routes field value. + +ENXIO + The application requested routes cannot be created or the state of + the specified routes cannot be modified. Only returned for + ``VIDIOC_SUBDEV_S_ROUTING``. E2BIG The application provided ``num_routes`` for ``VIDIOC_SUBDEV_S_ROUTING`` is diff --git a/Documentation/userspace-api/rseq.rst b/Documentation/userspace-api/rseq.rst new file mode 100644 index 000000000000..3cd27a3c7c7e --- /dev/null +++ b/Documentation/userspace-api/rseq.rst @@ -0,0 +1,140 @@ +===================== +Restartable Sequences +===================== + +Restartable Sequences allow to register a per thread userspace memory area +to be used as an ABI between kernel and userspace for three purposes: + + * userspace restartable sequences + + * quick access to read the current CPU number, node ID from userspace + + * scheduler time slice extensions + +Restartable sequences (per-cpu atomics) +--------------------------------------- + +Restartable sequences allow userspace to perform update operations on +per-cpu data without requiring heavyweight atomic operations. The actual +ABI is unfortunately only available in the code and selftests. + +Quick access to CPU number, node ID +----------------------------------- + +Allows to implement per CPU data efficiently. Documentation is in code and +selftests. :( + +Scheduler time slice extensions +------------------------------- + +This allows a thread to request a time slice extension when it enters a +critical section to avoid contention on a resource when the thread is +scheduled out inside of the critical section. + +The prerequisites for this functionality are: + + * Enabled in Kconfig + + * Enabled at boot time (default is enabled) + + * A rseq userspace pointer has been registered for the thread + +The thread has to enable the functionality via prctl(2):: + + prctl(PR_RSEQ_SLICE_EXTENSION, PR_RSEQ_SLICE_EXTENSION_SET, + PR_RSEQ_SLICE_EXT_ENABLE, 0, 0); + +prctl() returns 0 on success or otherwise with the following error codes: + +========= ============================================================== +Errorcode Meaning +========= ============================================================== +EINVAL Functionality not available or invalid function arguments. + Note: arg4 and arg5 must be zero +ENOTSUPP Functionality was disabled on the kernel command line +ENXIO Available, but no rseq user struct registered +========= ============================================================== + +The state can be also queried via prctl(2):: + + prctl(PR_RSEQ_SLICE_EXTENSION, PR_RSEQ_SLICE_EXTENSION_GET, 0, 0, 0); + +prctl() returns ``PR_RSEQ_SLICE_EXT_ENABLE`` when it is enabled or 0 if +disabled. Otherwise it returns with the following error codes: + +========= ============================================================== +Errorcode Meaning +========= ============================================================== +EINVAL Functionality not available or invalid function arguments. + Note: arg3 and arg4 and arg5 must be zero +========= ============================================================== + +The availability and status is also exposed via the rseq ABI struct flags +field via the ``RSEQ_CS_FLAG_SLICE_EXT_AVAILABLE_BIT`` and the +``RSEQ_CS_FLAG_SLICE_EXT_ENABLED_BIT``. These bits are read-only for user +space and only for informational purposes. + +If the mechanism was enabled via prctl(), the thread can request a time +slice extension by setting rseq::slice_ctrl::request to 1. If the thread is +interrupted and the interrupt results in a reschedule request in the +kernel, then the kernel can grant a time slice extension and return to +userspace instead of scheduling out. The length of the extension is +determined by debugfs:rseq/slice_ext_nsec. The default value is 5 usec; which +is the minimum value. It can be incremented to 50 usecs, however doing so +can/will affect the minimum scheduling latency. + +Any proposed changes to this default will have to come with a selftest and +rseq-slice-hist.py output that shows the new value has merrit. + +The kernel indicates the grant by clearing rseq::slice_ctrl::request and +setting rseq::slice_ctrl::granted to 1. If there is a reschedule of the +thread after granting the extension, the kernel clears the granted bit to +indicate that to userspace. + +If the request bit is still set when the leaving the critical section, +userspace can clear it and continue. + +If the granted bit is set, then userspace invokes rseq_slice_yield(2) when +leaving the critical section to relinquish the CPU. The kernel enforces +this by arming a timer to prevent misbehaving userspace from abusing this +mechanism. + +If both the request bit and the granted bit are false when leaving the +critical section, then this indicates that a grant was revoked and no +further action is required by userspace. + +The required code flow is as follows:: + + rseq->slice_ctrl.request = 1; + barrier(); // Prevent compiler reordering + critical_section(); + barrier(); // Prevent compiler reordering + rseq->slice_ctrl.request = 0; + if (rseq->slice_ctrl.granted) + rseq_slice_yield(); + +As all of this is strictly CPU local, there are no atomicity requirements. +Checking the granted state is racy, but that cannot be avoided at all:: + + if (rseq->slice_ctrl.granted) + -> Interrupt results in schedule and grant revocation + rseq_slice_yield(); + +So there is no point in pretending that this might be solved by an atomic +operation. + +If the thread issues a syscall other than rseq_slice_yield(2) within the +granted timeslice extension, the grant is also revoked and the CPU is +relinquished immediately when entering the kernel. This is required as +syscalls might consume arbitrary CPU time until they reach a scheduling +point when the preemption model is either NONE or VOLUNTARY and therefore +might exceed the grant by far. + +The preferred solution for user space is to use rseq_slice_yield(2) which +is side effect free. The support for arbitrary syscalls is required to +support onion layer architectured applications, where the code handling the +critical section and requesting the time slice extension has no control +over the code within the critical section. + +The kernel enforces flag consistency and terminates the thread with SIGSEGV +if it detects a violation. diff --git a/Documentation/userspace-api/spec_ctrl.rst b/Documentation/userspace-api/spec_ctrl.rst index ca89151fc0a8..61fe020b23a2 100644 --- a/Documentation/userspace-api/spec_ctrl.rst +++ b/Documentation/userspace-api/spec_ctrl.rst @@ -81,11 +81,15 @@ Value Meaning ERANGE arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE. -ENXIO Control of the selected speculation misfeature is not possible. - See PR_GET_SPECULATION_CTRL. +ENXIO For PR_SPEC_STORE_BYPASS: control of the selected speculation misfeature + is not possible via prctl, because of the system's boot configuration. + +EPERM Speculation was disabled with PR_SPEC_FORCE_DISABLE and caller tried to + enable it again. + +EPERM For PR_SPEC_L1D_FLUSH and PR_SPEC_INDIRECT_BRANCH: control of the + mitigation is not possible because of the system's boot configuration. -EPERM Speculation was disabled with PR_SPEC_FORCE_DISABLE and caller - tried to enable it again. ======= ================================================================= Speculation misfeature controls diff --git a/Documentation/userspace-api/vduse.rst b/Documentation/userspace-api/vduse.rst index bdb880e01132..81479d47c8b9 100644 --- a/Documentation/userspace-api/vduse.rst +++ b/Documentation/userspace-api/vduse.rst @@ -230,4 +230,57 @@ able to start the dataplane processing as follows: 5. Inject an interrupt for specific virtqueue with the VDUSE_INJECT_VQ_IRQ ioctl after the used ring is filled. +Enabling ASID (API version 1) +------------------------------ + +VDUSE supports per-address-space identifiers (ASIDs) starting with API +version 1. Set it up with ioctl(VDUSE_SET_API_VERSION) on `/dev/vduse/control` +and pass `VDUSE_API_VERSION_1` before creating a new VDUSE instance with +ioctl(VDUSE_CREATE_DEV). + +Afterwards, you can use the member asid of ioctl(VDUSE_VQ_SETUP) argument to +select the address space of the IOTLB you are querying. The driver could +change the address space of any virtqueue group by using the +VDUSE_SET_VQ_GROUP_ASID VDUSE message type, and the VDUSE instance needs to +reply with VDUSE_REQ_RESULT_OK if it was possible to change it. + +Similarly, you can use ioctl(VDUSE_IOTLB_GET_FD2) to obtain the file descriptor +describing an IOVA region of a specific ASID. Example usage: + +.. code-block:: c + + static void *iova_to_va(int dev_fd, uint32_t asid, uint64_t iova, + uint64_t *len) + { + int fd; + void *addr; + size_t size; + struct vduse_iotlb_entry_v2 entry = { 0 }; + + entry.v1.start = iova; + entry.v1.last = iova; + entry.asid = asid; + + fd = ioctl(dev_fd, VDUSE_IOTLB_GET_FD2, &entry); + if (fd < 0) + return NULL; + + size = entry.v1.last - entry.v1.start + 1; + *len = entry.v1.last - iova + 1; + addr = mmap(0, size, perm_to_prot(entry.v1.perm), MAP_SHARED, + fd, entry.v1.offset); + close(fd); + if (addr == MAP_FAILED) + return NULL; + + /* + * Using some data structures such as linked list to store + * the iotlb mapping. The munmap(2) should be called for the + * cached mapping when the corresponding VDUSE_UPDATE_IOTLB + * message is received or the device is reset. + */ + + return addr + iova - entry.v1.start; + } + For more details on the uAPI, please see include/uapi/linux/vduse.h. diff --git a/Documentation/virt/index.rst b/Documentation/virt/index.rst index 7fb55ae08598..c1f0bbc37315 100644 --- a/Documentation/virt/index.rst +++ b/Documentation/virt/index.rst @@ -16,10 +16,3 @@ Virtualization Support coco/sev-guest coco/tdx-guest hyperv/index - -.. only:: html and subproject - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 01a3abef8abb..6f85e1b321dd 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -1303,12 +1303,13 @@ userspace, for example because of missing instruction syndrome decode information or because there is no device mapped at the accessed IPA, then userspace can ask the kernel to inject an external abort using the address from the exiting fault on the VCPU. It is a programming error to set -ext_dabt_pending after an exit which was not either KVM_EXIT_MMIO or -KVM_EXIT_ARM_NISV. This feature is only available if the system supports -KVM_CAP_ARM_INJECT_EXT_DABT. This is a helper which provides commonality in -how userspace reports accesses for the above cases to guests, across different -userspace implementations. Nevertheless, userspace can still emulate all Arm -exceptions by manipulating individual registers using the KVM_SET_ONE_REG API. +ext_dabt_pending after an exit which was not either KVM_EXIT_MMIO, +KVM_EXIT_ARM_NISV, or KVM_EXIT_ARM_LDST64B. This feature is only available if +the system supports KVM_CAP_ARM_INJECT_EXT_DABT. This is a helper which +provides commonality in how userspace reports accesses for the above cases to +guests, across different userspace implementations. Nevertheless, userspace +can still emulate all Arm exceptions by manipulating individual registers +using the KVM_SET_ONE_REG API. See KVM_GET_VCPU_EVENTS for the data structure. @@ -1395,7 +1396,10 @@ or its flags may be modified, but it may not be resized. Memory for the region is taken starting at the address denoted by the field userspace_addr, which must point at user addressable memory for the entire memory slot size. Any object may back this memory, including -anonymous memory, ordinary files, and hugetlbfs. +anonymous memory, ordinary files, and hugetlbfs. Changes in the backing +of the memory region are automatically reflected into the guest. +For example, an mmap() that affects the region will be made visible +immediately. Another example is madvise(MADV_DROP). On architectures that support a form of address tagging, userspace_addr must be an untagged address. @@ -1411,11 +1415,6 @@ use it. The latter can be set, if KVM_CAP_READONLY_MEM capability allows it, to make a new slot read-only. In this case, writes to this memory will be posted to userspace as KVM_EXIT_MMIO exits. -When the KVM_CAP_SYNC_MMU capability is available, changes in the backing of -the memory region are automatically reflected into the guest. For example, an -mmap() that affects the region will be made visible immediately. Another -example is madvise(MADV_DROP). - For TDX guest, deleting/moving memory region loses guest memory contents. Read only region isn't supported. Only as-id 0 is supported. @@ -6517,6 +6516,40 @@ the capability to be present. `flags` must currently be zero. +4.144 KVM_S390_KEYOP +-------------------- + +:Capability: KVM_CAP_S390_KEYOP +:Architectures: s390 +:Type: vm ioctl +:Parameters: struct kvm_s390_keyop (in/out) +:Returns: 0 in case of success, < 0 on error + +The specified key operation is performed on the given guest address. The +previous storage key (or the relevant part thereof) will be returned in +`key`. + +:: + + struct kvm_s390_keyop { + __u64 guest_addr; + __u8 key; + __u8 operation; + }; + +Currently supported values for ``operation``: + +KVM_S390_KEYOP_ISKE + Returns the storage key for the guest address ``guest_addr`` in ``key``. + +KVM_S390_KEYOP_RRBE + Resets the reference bit for the guest address ``guest_addr``, returning the + R and C bits of the old storage key in ``key``; the remaining fields of + the storage key will be set to 0. + +KVM_S390_KEYOP_SSKE + Sets the storage key for the guest address ``guest_addr`` to the key + specified in ``key``, returning the previous value in ``key``. .. _kvm_run: @@ -7050,12 +7083,14 @@ in send_page or recv a buffer to recv_page). :: - /* KVM_EXIT_ARM_NISV */ + /* KVM_EXIT_ARM_NISV / KVM_EXIT_ARM_LDST64B */ struct { __u64 esr_iss; __u64 fault_ipa; } arm_nisv; +- KVM_EXIT_ARM_NISV: + Used on arm64 systems. If a guest accesses memory not in a memslot, KVM will typically return to userspace and ask it to do MMIO emulation on its behalf. However, for certain classes of instructions, no instruction decode @@ -7089,6 +7124,32 @@ Note that although KVM_CAP_ARM_NISV_TO_USER will be reported if queried outside of a protected VM context, the feature will not be exposed if queried on a protected VM file descriptor. +- KVM_EXIT_ARM_LDST64B: + +Used on arm64 systems. When a guest using a LD64B, ST64B, ST64BV, ST64BV0, +outside of a memslot, KVM will return to userspace with KVM_EXIT_ARM_LDST64B, +exposing the relevant ESR_EL2 information and faulting IPA, similarly to +KVM_EXIT_ARM_NISV. + +Userspace is supposed to fully emulate the instructions, which includes: + + - fetch of the operands for a store, including ACCDATA_EL1 in the case + of a ST64BV0 instruction + - deal with the endianness if the guest is big-endian + - emulate the access, including the delivery of an exception if the + access didn't succeed + - provide a return value in the case of ST64BV/ST64BV0 + - return the data in the case of a load + - increment PC if the instruction was successfully executed + +Note that there is no expectation of performance for this emulation, as it +involves a large number of interaction with the guest state. It is, however, +expected that the instruction's semantics are preserved, specially the +single-copy atomicity property of the 64 byte access. + +This exit reason must be handled if userspace sets ID_AA64ISAR1_EL1.LS64 to a +non-zero value, indicating that FEAT_LS64* is enabled. + :: /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ @@ -7353,6 +7414,50 @@ Please note that the kernel is allowed to use the kvm_run structure as the primary storage for certain register types. Therefore, the kernel may use the values in kvm_run even if the corresponding bit in kvm_dirty_regs is not set. +:: + + /* KVM_EXIT_SNP_REQ_CERTS */ + struct kvm_exit_snp_req_certs { + __u64 gpa; + __u64 npages; + __u64 ret; + }; + +KVM_EXIT_SNP_REQ_CERTS indicates an SEV-SNP guest with certificate-fetching +enabled (see KVM_SEV_SNP_ENABLE_REQ_CERTS) has generated an Extended Guest +Request NAE #VMGEXIT (SNP_GUEST_REQUEST) with message type MSG_REPORT_REQ, +i.e. has requested an attestation report from firmware, and would like the +certificate data corresponding to the attestation report signature to be +provided by the hypervisor as part of the request. + +To allow for userspace to provide the certificate, the 'gpa' and 'npages' +are forwarded verbatim from the guest request (the RAX and RBX GHCB fields +respectively). 'ret' is not an "output" from KVM, and is always '0' on +exit. KVM verifies the 'gpa' is 4KiB aligned prior to exiting to userspace, +but otherwise the information from the guest isn't validated. + +Upon the next KVM_RUN, e.g. after userspace has serviced the request (or not), +KVM will complete the #VMGEXIT, using the 'ret' field to determine whether to +signal success or failure to the guest, and on failure, what reason code will +be communicated via SW_EXITINFO2. If 'ret' is set to an unsupported value (see +the table below), KVM_RUN will fail with -EINVAL. For a 'ret' of 'ENOSPC', KVM +also consumes the 'npages' field, i.e. userspace can use the field to inform +the guest of the number of pages needed to hold all the certificate data. + +The supported 'ret' values and their respective SW_EXITINFO2 encodings: + + ====== ============================================================= + 0 0x0, i.e. success. KVM will emit an SNP_GUEST_REQUEST command + to SNP firmware. + ENOSPC 0x0000000100000000, i.e. not enough guest pages to hold the + certificate table and certificate data. KVM will also set the + RBX field in the GHBC to 'npages'. + EAGAIN 0x0000000200000000, i.e. the host is busy and the guest should + retry the request. + EIO 0xffffffff00000000, for all other errors (this return code is + a KVM-defined hypervisor value, as allowed by the GHCB) + ====== ============================================================= + .. _cap_enable: @@ -7835,8 +7940,10 @@ Will return -EBUSY if a VCPU has already been created. Valid feature flags in args[0] are:: - #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) - #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) + #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) + #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) + #define KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST (1ULL << 2) + #define KVM_X2APIC_DISABLE_SUPPRESS_EOI_BROADCAST (1ULL << 3) Enabling KVM_X2APIC_API_USE_32BIT_IDS changes the behavior of KVM_SET_GSI_ROUTING, KVM_SIGNAL_MSI, KVM_SET_LAPIC, and KVM_GET_LAPIC, @@ -7849,6 +7956,28 @@ as a broadcast even in x2APIC mode in order to support physical x2APIC without interrupt remapping. This is undesirable in logical mode, where 0xff represents CPUs 0-7 in cluster 0. +Setting KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST instructs KVM to enable +Suppress EOI Broadcasts. KVM will advertise support for Suppress EOI +Broadcast to the guest and suppress LAPIC EOI broadcasts when the guest +sets the Suppress EOI Broadcast bit in the SPIV register. This flag is +supported only when using a split IRQCHIP. + +Setting KVM_X2APIC_DISABLE_SUPPRESS_EOI_BROADCAST disables support for +Suppress EOI Broadcasts entirely, i.e. instructs KVM to NOT advertise +support to the guest. + +Modern VMMs should either enable KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST +or KVM_X2APIC_DISABLE_SUPPRESS_EOI_BROADCAST. If not, legacy quirky +behavior will be used by KVM: in split IRQCHIP mode, KVM will advertise +support for Suppress EOI Broadcasts but not actually suppress EOI +broadcasts; for in-kernel IRQCHIP mode, KVM will not advertise support for +Suppress EOI Broadcasts. + +Setting both KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST and +KVM_X2APIC_DISABLE_SUPPRESS_EOI_BROADCAST will fail with an EINVAL error, +as will setting KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST without a split +IRCHIP. + 7.8 KVM_CAP_S390_USER_INSTR0 ---------------------------- @@ -9287,6 +9416,14 @@ The presence of this capability indicates that KVM_RUN will update the KVM_RUN_X86_GUEST_MODE bit in kvm_run.flags to indicate whether the vCPU was executing nested guest code when it exited. +8.46 KVM_CAP_S390_KEYOP +----------------------- + +:Architectures: s390 + +The presence of this capability indicates that the KVM_S390_KEYOP ioctl is +available. + KVM exits with the register state of either the L1 or L2 guest depending on which executed at the time of an exit. Userspace must take care to differentiate between these cases. diff --git a/Documentation/virt/kvm/x86/amd-memory-encryption.rst b/Documentation/virt/kvm/x86/amd-memory-encryption.rst index 1ddb6a86ce7f..b2395dd4769d 100644 --- a/Documentation/virt/kvm/x86/amd-memory-encryption.rst +++ b/Documentation/virt/kvm/x86/amd-memory-encryption.rst @@ -523,7 +523,7 @@ Returns: 0 on success, < 0 on error, -EAGAIN if caller should retry struct kvm_sev_snp_launch_update { __u64 gfn_start; /* Guest page number to load/encrypt data into. */ - __u64 uaddr; /* Userspace address of data to be loaded/encrypted. */ + __u64 uaddr; /* 4k-aligned address of data to be loaded/encrypted. */ __u64 len; /* 4k-aligned length in bytes to copy into guest memory.*/ __u8 type; /* The type of the guest pages being initialized. */ __u8 pad0; @@ -572,6 +572,52 @@ Returns: 0 on success, -negative on error See SNP_LAUNCH_FINISH in the SEV-SNP specification [snp-fw-abi]_ for further details on the input parameters in ``struct kvm_sev_snp_launch_finish``. +21. KVM_SEV_SNP_ENABLE_REQ_CERTS +-------------------------------- + +The KVM_SEV_SNP_ENABLE_REQ_CERTS command will configure KVM to exit to +userspace with a ``KVM_EXIT_SNP_REQ_CERTS`` exit type as part of handling +a guest attestation report, which will to allow userspace to provide a +certificate corresponding to the endorsement key used by firmware to sign +that attestation report. + +Returns: 0 on success, -negative on error + +NOTE: The endorsement key used by firmware may change as a result of +management activities like updating SEV-SNP firmware or loading new +endorsement keys, so some care should be taken to keep the returned +certificate data in sync with the actual endorsement key in use by +firmware at the time the attestation request is sent to SNP firmware. The +recommended scheme to do this is to use file locking (e.g. via fcntl()'s +F_OFD_SETLK) in the following manner: + + - Prior to obtaining/providing certificate data as part of servicing an + exit type of ``KVM_EXIT_SNP_REQ_CERTS``, the VMM should obtain a + shared/read or exclusive/write lock on the certificate blob file before + reading it and returning it to KVM, and continue to hold the lock until + the attestation request is actually sent to firmware. To facilitate + this, the VMM can set the ``immediate_exit`` flag of kvm_run just after + supplying the certificate data, and just before resuming the vCPU. + This will ensure the vCPU will exit again to userspace with ``-EINTR`` + after it finishes fetching the attestation request from firmware, at + which point the VMM can safely drop the file lock. + + - Tools/libraries that perform updates to SNP firmware TCB values or + endorsement keys (e.g. via /dev/sev interfaces such as ``SNP_COMMIT``, + ``SNP_SET_CONFIG``, or ``SNP_VLEK_LOAD``, see + Documentation/virt/coco/sev-guest.rst for more details) in such a way + that the certificate blob needs to be updated, should similarly take an + exclusive lock on the certificate blob for the duration of any updates + to endorsement keys or the certificate blob contents to ensure that + VMMs using the above scheme will not return certificate blob data that + is out of sync with the endorsement key used by firmware at the time + the attestation request is actually issued. + +This scheme is recommended so that tools can use a fairly generic/natural +approach to synchronizing firmware/certificate updates via file-locking, +which should make it easier to maintain interoperability across +tools/VMMs/vendors. + Device attribute API ==================== @@ -579,11 +625,15 @@ Attributes of the SEV implementation can be retrieved through the ``KVM_HAS_DEVICE_ATTR`` and ``KVM_GET_DEVICE_ATTR`` ioctls on the ``/dev/kvm`` device node, using group ``KVM_X86_GRP_SEV``. -Currently only one attribute is implemented: +The following attributes are currently implemented: * ``KVM_X86_SEV_VMSA_FEATURES``: return the set of all bits that are accepted in the ``vmsa_features`` of ``KVM_SEV_INIT2``. +* ``KVM_X86_SEV_SNP_REQ_CERTS``: return a value of 1 if the kernel supports the + ``KVM_EXIT_SNP_REQ_CERTS`` exit, which allows for fetching endorsement key + certificates from userspace for each SNP attestation request the guest issues. + Firmware Management =================== diff --git a/Documentation/virt/kvm/x86/intel-tdx.rst b/Documentation/virt/kvm/x86/intel-tdx.rst index 5efac62c92c7..6a222e9d0954 100644 --- a/Documentation/virt/kvm/x86/intel-tdx.rst +++ b/Documentation/virt/kvm/x86/intel-tdx.rst @@ -156,7 +156,7 @@ KVM_TDX_INIT_MEM_REGION :Returns: 0 on success, <0 on error Initialize @nr_pages TDX guest private memory starting from @gpa with userspace -provided data from @source_addr. +provided data from @source_addr. @source_addr must be PAGE_SIZE-aligned. Note, before calling this sub command, memory attribute of the range [gpa, gpa + nr_pages] needs to be private. Userspace can use diff --git a/Documentation/w1/index.rst b/Documentation/w1/index.rst index 156279f17553..2e7bd8afea84 100644 --- a/Documentation/w1/index.rst +++ b/Documentation/w1/index.rst @@ -12,10 +12,3 @@ w1-netlink.rst masters/index slaves/index - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/watchdog/index.rst b/Documentation/watchdog/index.rst index 4603f2511f58..1cea24681e6b 100644 --- a/Documentation/watchdog/index.rst +++ b/Documentation/watchdog/index.rst @@ -16,10 +16,3 @@ Watchdog Support watchdog-pm wdt convert_drivers_to_kernel_api - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/watchdog/watchdog-kernel-api.rst b/Documentation/watchdog/watchdog-kernel-api.rst index 243231fe4c0a..5649c54cf6fb 100644 --- a/Documentation/watchdog/watchdog-kernel-api.rst +++ b/Documentation/watchdog/watchdog-kernel-api.rst @@ -293,7 +293,7 @@ To initialize the timeout field, the following function can be used:: extern int watchdog_init_timeout(struct watchdog_device *wdd, unsigned int timeout_parm, - struct device *dev); + const struct device *dev); The watchdog_init_timeout function allows you to initialize the timeout field using the module timeout parameter or by retrieving the timeout-sec property from diff --git a/Documentation/watchdog/watchdog-parameters.rst b/Documentation/watchdog/watchdog-parameters.rst index 0a0119edfa82..773241ed9986 100644 --- a/Documentation/watchdog/watchdog-parameters.rst +++ b/Documentation/watchdog/watchdog-parameters.rst @@ -209,13 +209,6 @@ iTCO_wdt: ------------------------------------------------- -iTCO_vendor_support: - vendorsupport: - iTCO vendor specific support mode, default=0 (none), - 1=SuperMicro Pent3, 2=SuperMicro Pent4+, 911=Broken SMI BIOS - -------------------------------------------------- - ib700wdt: timeout: Watchdog timeout in seconds. 0<= timeout <=30, default=30. diff --git a/Documentation/wmi/acpi-interface.rst b/Documentation/wmi/acpi-interface.rst index 1ef003b033bf..4657101c528a 100644 --- a/Documentation/wmi/acpi-interface.rst +++ b/Documentation/wmi/acpi-interface.rst @@ -104,3 +104,71 @@ holding the notification ID of the event. This method should be evaluated every time an ACPI notification is received, since some ACPI implementations use a queue to store WMI event data items. This queue will overflow after a couple of WMI events are received without retrieving the associated WMI event data. + +Conversion rules for ACPI data types +------------------------------------ + +Consumers of the ACPI-WMI interface use binary buffers to exchange data with the WMI driver core, +with the internal structure of the buffer being only know to the consumers. The WMI driver core is +thus responsible for converting the data inside the buffer into an appropriate ACPI data type for +consumption by the ACPI firmware. Additionally, any data returned by the various ACPI methods needs +to be converted back into a binary buffer. + +The layout of said buffers is defined by the MOF description of the WMI method or data block in +question [1]_: + +=============== ======================================================================= ========= +Data Type Layout Alignment +=============== ======================================================================= ========= +``string`` Starts with an unsigned 16-bit little endian integer specifying 2 bytes + the length of the string data in bytes, followed by the string data + encoded as UTF-16LE with **optional** NULL termination and padding. + Keep in mind that some firmware implementations might depend on the + terminating NULL character to be present. Also the padding should + always be performed with NULL characters. +``boolean`` Single byte where 0 means ``false`` and nonzero means ``true``. 1 byte +``sint8`` Signed 8-bit integer. 1 byte +``uint8`` Unsigned 8-bit integer. 1 byte +``sint16`` Signed 16-bit little endian integer. 2 bytes +``uint16`` Unsigned 16-bit little endian integer. 2 bytes +``sint32`` Signed 32-bit little endian integer. 4 bytes +``uint32`` Unsigned 32-bit little endian integer. 4 bytes +``sint64`` Signed 64-bit little endian integer. 8 bytes +``uint64`` Unsigned 64-bit little endian integer. 8 bytes +``datetime`` A fixed-length 25-character UTF-16LE string with the format 2 bytes + *yyyymmddhhmmss.mmmmmmsutc* where *yyyy* is the 4-digit year, *mm* is + the 2-digit month, *dd* is the 2-digit day, *hh* is the 2-digit hour + based on a 24-hour clock, *mm* is the 2-digit minute, *ss* is the + 2-digit second, *mmmmmm* is the 6-digit microsecond, *s* is a plus or + minus character depending on whether *utc* is a positive or negative + offset from UTC (or a colon if the date is an interval). Unpopulated + fields should be filled with asterisks. +=============== ======================================================================= ========= + +Arrays should be aligned based on the alignment of their base type, while objects should be +aligned based on the largest alignment of an element inside them. + +All buffers returned by the WMI driver core are 8-byte aligned. When converting ACPI data types +into such buffers the following conversion rules apply: + +=============== ============================================================ +ACPI Data Type Converted into +=============== ============================================================ +Buffer Copied as-is. +Integer Converted into a ``uint32``. +String Converted into a ``string`` with a terminating NULL character + to match the behavior the of the Windows driver. +Package Each element inside the package is converted with alignment + of the resulting data types being respected. Nested packages + are not allowed. +=============== ============================================================ + +The Windows driver does attempt to handle nested packages, but this results in internal data +structures (``_ACPI_METHOD_ARGUMENT_V1``) erroneously being copied into the resulting buffer. +ACPI firmware implementations should thus not return nested packages from ACPI methods +associated with the ACPI-WMI interface. + +References +========== + +.. [1] https://learn.microsoft.com/en-us/windows-hardware/drivers/kernel/driver-defined-wmi-data-items diff --git a/Documentation/wmi/devices/index.rst b/Documentation/wmi/devices/index.rst index c08735a9d7df..b0a9b4229add 100644 --- a/Documentation/wmi/devices/index.rst +++ b/Documentation/wmi/devices/index.rst @@ -13,10 +13,3 @@ the Linux kernel, their protocols and driver details. :glob: * - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/wmi/devices/lenovo-wmi-other.rst b/Documentation/wmi/devices/lenovo-wmi-other.rst index d7928b8dfb4b..01d471156738 100644 --- a/Documentation/wmi/devices/lenovo-wmi-other.rst +++ b/Documentation/wmi/devices/lenovo-wmi-other.rst @@ -31,13 +31,32 @@ under the following path: /sys/class/firmware-attributes/lenovo-wmi-other/attributes/<attribute>/ +Additionally, this driver also exports attributes to HWMON. + +LENOVO_CAPABILITY_DATA_00 +------------------------- + +WMI GUID ``362A3AFE-3D96-4665-8530-96DAD5BB300E`` + +The LENOVO_CAPABILITY_DATA_00 interface provides various information that +does not rely on the gamezone thermal mode. + +The following HWMON attributes are implemented: + - fanX_div: internal RPM divisor + - fanX_input: current RPM + - fanX_target: target RPM (tunable, 0=auto) + +Due to the internal RPM divisor, the current/target RPMs are rounded down to +its nearest multiple. The divisor itself is not necessary to be a power of two. + LENOVO_CAPABILITY_DATA_01 ------------------------- WMI GUID ``7A8F5407-CB67-4D6E-B547-39B3BE018154`` -The LENOVO_CAPABILITY_DATA_01 interface provides information on various -power limits of integrated CPU and GPU components. +The LENOVO_CAPABILITY_DATA_01 interface provides various information that +relies on the gamezone thermal mode, including power limits of integrated +CPU and GPU components. Each attribute has the following properties: - current_value @@ -48,11 +67,22 @@ Each attribute has the following properties: - scalar_increment - type -The following attributes are implemented: +The following firmware-attributes are implemented: - ppt_pl1_spl: Platform Profile Tracking Sustained Power Limit - ppt_pl2_sppt: Platform Profile Tracking Slow Package Power Tracking - ppt_pl3_fppt: Platform Profile Tracking Fast Package Power Tracking +LENOVO_FAN_TEST_DATA +------------------------- + +WMI GUID ``B642801B-3D21-45DE-90AE-6E86F164FB21`` + +The LENOVO_FAN_TEST_DATA interface provides reference data for self-test of +cooling fans. + +The following HWMON attributes are implemented: + - fanX_max: maximum RPM + - fanX_min: minimum RPM WMI interface description ========================= @@ -106,3 +136,13 @@ data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility: [WmiDataId(3), read, Description("Data Size.")] uint32 DataSize; [WmiDataId(4), read, Description("Default Value"), WmiSizeIs("DataSize")] uint8 DefaultValue[]; }; + + [WMI, Dynamic, Provider("WmiProv"), Locale("MS\\0x409"), Description("Definition of Fan Test Data"), guid("{B642801B-3D21-45DE-90AE-6E86F164FB21}")] + class LENOVO_FAN_TEST_DATA { + [key, read] string InstanceName; + [read] boolean Active; + [WmiDataId(1), read, Description("Mode.")] uint32 NumOfFans; + [WmiDataId(2), read, Description("Fan ID."), WmiSizeIs("NumOfFans")] uint32 FanId[]; + [WmiDataId(3), read, Description("Maximum Fan Speed."), WmiSizeIs("NumOfFans")] uint32 FanMaxSpeed[]; + [WmiDataId(4), read, Description("Minumum Fan Speed."), WmiSizeIs("NumOfFans")] uint32 FanMinSpeed[]; + }; diff --git a/Documentation/wmi/driver-development-guide.rst b/Documentation/wmi/driver-development-guide.rst index 5680303ae314..fbc2d9b12fe9 100644 --- a/Documentation/wmi/driver-development-guide.rst +++ b/Documentation/wmi/driver-development-guide.rst @@ -70,7 +70,7 @@ to matching WMI devices using a struct wmi_device_id table: .probe = foo_probe, .remove = foo_remove, /* optional, devres is preferred */ .shutdown = foo_shutdown, /* optional, called during shutdown */ - .notify = foo_notify, /* optional, for event handling */ + .notify_new = foo_notify, /* optional, for event handling */ .no_notify_data = true, /* optional, enables events containing no additional data */ .no_singleton = true, /* required for new WMI drivers */ }; @@ -90,9 +90,9 @@ the WMI device and put it in a well-known state for the WMI driver to pick up la or kexec. Most WMI drivers need no special shutdown handling and can thus omit this callback. Please note that new WMI drivers are required to be able to be instantiated multiple times, -and are forbidden from using any deprecated GUID-based WMI functions. This means that the -WMI driver should be prepared for the scenario that multiple matching WMI devices are present -on a given machine. +and are forbidden from using any deprecated GUID-based or ACPI-based WMI functions. This means +that the WMI driver should be prepared for the scenario that multiple matching WMI devices are +present on a given machine. Because of this, WMI drivers should use the state container design pattern as described in Documentation/driver-api/driver-model/design-patterns.rst. @@ -104,38 +104,37 @@ Documentation/driver-api/driver-model/design-patterns.rst. WMI method drivers ------------------ -WMI drivers can call WMI device methods using wmidev_evaluate_method(), the -structure of the ACPI buffer passed to this function is device-specific and usually -needs some tinkering to get right. Looking at the ACPI tables containing the WMI -device usually helps here. The method id and instance number passed to this function -are also device-specific, looking at the decoded Binary MOF is usually enough to -find the right values. +WMI drivers can call WMI device methods using wmidev_invoke_method(). For each WMI method +invocation the WMI driver needs to provide the instance number and the method ID, as well as +a buffer with the method arguments and optionally a buffer for the results. -The maximum instance number can be retrieved during runtime using wmidev_instance_count(). +The layout of said buffers is device-specific and described by the Binary MOF data associated +with a given WMI device. Said Binary MOF data also describes the method ID of a given WMI method +with the ``WmiMethodId`` qualifier. WMI devices exposing WMI methods usually expose only a single +instance (instance number 0), but in theory can expose multiple instances as well. In such a case +the number of instances can be retrieved using wmidev_instance_count(). -Take a look at drivers/platform/x86/inspur_platform_profile.c for an example WMI method driver. +Take a look at drivers/platform/x86/intel/wmi/thunderbolt.c for an example WMI method driver. WMI data block drivers ---------------------- -WMI drivers can query WMI device data blocks using wmidev_block_query(), the -structure of the returned ACPI object is again device-specific. Some WMI devices -also allow for setting data blocks using wmidev_block_set(). +WMI drivers can query WMI data blocks using wmidev_query_block(), the layout of the returned +buffer is again device-specific and described by the Binary MOF data. Some WMI data blocks are +also writeable and can be set using wmidev_set_block(). The number of data block instances can +again be retrieved using wmidev_instance_count(). -The maximum instance number can also be retrieved using wmidev_instance_count(). - -Take a look at drivers/platform/x86/intel/wmi/sbl-fw-update.c for an example -WMI data block driver. +Take a look at drivers/platform/x86/intel/wmi/sbl-fw-update.c for an example WMI data block driver. WMI event drivers ----------------- -WMI drivers can receive WMI events via the notify() callback inside the struct wmi_driver. +WMI drivers can receive WMI events via the notify_new() callback inside the struct wmi_driver. The WMI subsystem will then take care of setting up the WMI event accordingly. Please note that -the structure of the ACPI object passed to this callback is device-specific, and freeing the -ACPI object is being done by the WMI subsystem, not the driver. +the layout of the buffer passed to this callback is device-specific, and freeing of the buffer +is done by the WMI subsystem itself, not the driver. -The WMI driver core will take care that the notify() callback will only be called after +The WMI driver core will take care that the notify_new() callback will only be called after the probe() callback has been called, and that no events are being received by the driver right before and after calling its remove() or shutdown() callback. @@ -147,6 +146,36 @@ the ``no_notify_data`` flag inside struct wmi_driver should be set to ``true``. Take a look at drivers/platform/x86/xiaomi-wmi.c for an example WMI event driver. +Exchanging data with the WMI driver core +---------------------------------------- + +WMI drivers can exchange data with the WMI driver core using struct wmi_buffer. The internal +structure of those buffers is device-specific and only known by the WMI driver. Because of this +the WMI driver itself is responsible for parsing and validating the data received from its +WMI device. + +The structure of said buffers is described by the MOF data associated with the WMI device in +question. When such a buffer contains multiple data items it usually makes sense to define a +C structure and use it during parsing. Since the WMI driver core guarantees that all buffers +received from a WMI device are aligned on an 8-byte boundary, WMI drivers can simply perform +a cast between the WMI buffer data and this C structure. + +This however should only be done after the size of the buffer was verified to be large enough +to hold the whole C structure. WMI drivers should reject undersized buffers as they are usually +sent by the WMI device to signal an internal error. Oversized buffers however should be accepted +to emulate the behavior of the Windows WMI implementation. + +When defining a C structure for parsing WMI buffers the alignment of the data items should be +respected. This is especially important for 64-bit integers as those have different alignments +on 64-bit (8-byte alignment) and 32-bit (4-byte alignment) architectures. It is thus a good idea +to manually specify the alignment of such data items or mark the whole structure as packed when +appropriate. Integer data items in general are little-endian integers and should be marked as +such using ``__le64`` and friends. When parsing WMI string data items the struct wmi_string should +be used as WMI strings have a different layout than C strings. + +See Documentation/wmi/acpi-interface.rst for more information regarding the binary format +of WMI data items. + Handling multiple WMI devices at once ------------------------------------- @@ -171,6 +200,7 @@ Things to avoid When developing WMI drivers, there are a couple of things which should be avoided: - usage of the deprecated GUID-based WMI interface which uses GUIDs instead of WMI device structs +- usage of the deprecated ACPI-based WMI interface which uses ACPI objects instead of plain buffers - bypassing of the WMI subsystem when talking to WMI devices - WMI drivers which cannot be instantiated multiple times. diff --git a/Documentation/wmi/index.rst b/Documentation/wmi/index.rst index fec4b6ae97b3..56016078fc79 100644 --- a/Documentation/wmi/index.rst +++ b/Documentation/wmi/index.rst @@ -10,11 +10,3 @@ WMI Subsystem acpi-interface driver-development-guide devices/index - -.. only:: subproject and html - - - Indices - ======= - - * :ref:`genindex` |
