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authorMarek Vasut <marek.vasut+renesas@mailbox.org>2026-09-03 22:50:52 +0200
committerBjorn Helgaas <bhelgaas@google.com>2026-09-25 15:49:15 -0500
commitc687d310b1cf294e9365151db07dfd49e75b40f9 (patch)
treef8d7fc393c03b859da65980ffb9b642d1a0d9686 /Documentation
parent056fd7eb017d73d9d175b733043edfbeb43569be (diff)
dt-bindings: PCI: rcar-gen4-pci-host: Document Application/Local register reset
The R-Car Gen4 PCIe controller does contain core reset, which puts the controller back into well-defined state, but it does also tear down the PCIe link. This is called Application/Local register reset in the documentation. Document this reset. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> [bhelgaas: squash maxItems fix from https://patch.msgid.link/20260925203039.110653-1-marek.vasut+renesas@mailbox.org] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260903205153.283553-1-marek.vasut+renesas@mailbox.org
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml9
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
index 9767a52f3904..362c43a1a15d 100644
--- a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
@@ -47,11 +47,14 @@ properties:
maxItems: 1
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
reset-names:
+ minItems: 1
items:
- const: pwr
+ - const: core
max-link-speed:
maximum: 4
@@ -141,8 +144,8 @@ examples:
clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
clock-names = "core", "ref";
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
- resets = <&cpg 624>;
- reset-names = "pwr";
+ resets = <&cpg 624>,<&cpg 1121>;
+ reset-names = "pwr", "core";
max-link-speed = <4>;
num-lanes = <2>;
#address-cells = <3>;