diff options
| author | Thomas Weißschuh <thomas.weissschuh@linutronix.de> | 2026-01-14 08:28:13 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2026-01-30 16:46:17 +0100 |
| commit | b4171fd0b091072f403b66bf05d01051d4bd94d9 (patch) | |
| tree | 8f1879b05b4fb316d08015d04d7cbe3b7b56add1 /arch/arc/include/uapi | |
| parent | eed444d02585b426645532166ede3e2427db901d (diff) | |
ARC: Always use SWAPE instructions for __arch_swab32()
Since commit 67a697e7576 ("ARC: retire ARC750 support") all supported
CPUs have the 'swape' instruction.
Always use the implementation of __arch_swabe() which uses 'swape'.
ARCH_USE_BUILTIN_BSWAP can not be used as that results on libcalls on
-mcpu=arc700.
As as side-effect, remove a leak of an internal kconfig symbol through
the UAPI headers.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/lkml/0ae2688a-5a22-405b-adaf-9b5ad712b245@app.fastmail.com/
Suggested-by: Vineet Gupta <vgupta@kernel.org>
Link: https://lore.kernel.org/lkml/a033a402-e3c5-4982-9fff-b6a4c55817ae@kernel.org/
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arc/include/uapi')
| -rw-r--r-- | arch/arc/include/uapi/asm/swab.h | 63 |
1 files changed, 0 insertions, 63 deletions
diff --git a/arch/arc/include/uapi/asm/swab.h b/arch/arc/include/uapi/asm/swab.h index 8d1f1ef44ba7..417ea30f29f5 100644 --- a/arch/arc/include/uapi/asm/swab.h +++ b/arch/arc/include/uapi/asm/swab.h @@ -19,9 +19,6 @@ #include <linux/types.h> -/* Native single cycle endian swap insn */ -#ifdef CONFIG_ARC_HAS_SWAPE - #define __arch_swab32(x) \ ({ \ unsigned int tmp = x; \ @@ -32,66 +29,6 @@ tmp; \ }) -#else - -/* Several ways of Endian-Swap Emulation for ARC - * 0: kernel generic - * 1: ARC optimised "C" - * 2: ARC Custom instruction - */ -#define ARC_BSWAP_TYPE 1 - -#if (ARC_BSWAP_TYPE == 1) /******* Software only ********/ - -/* The kernel default implementation of htonl is - * return x<<24 | x>>24 | - * (x & (__u32)0x0000ff00UL)<<8 | (x & (__u32)0x00ff0000UL)>>8; - * - * This generates 9 instructions on ARC (excluding the ld/st) - * - * 8051fd8c: ld r3,[r7,20] ; Mem op : Get the value to be swapped - * 8051fd98: asl r5,r3,24 ; get 3rd Byte - * 8051fd9c: lsr r2,r3,24 ; get 0th Byte - * 8051fda0: and r4,r3,0xff00 - * 8051fda8: asl r4,r4,8 ; get 1st Byte - * 8051fdac: and r3,r3,0x00ff0000 - * 8051fdb4: or r2,r2,r5 ; combine 0th and 3rd Bytes - * 8051fdb8: lsr r3,r3,8 ; 2nd Byte at correct place in Dst Reg - * 8051fdbc: or r2,r2,r4 ; combine 0,3 Bytes with 1st Byte - * 8051fdc0: or r2,r2,r3 ; combine 0,3,1 Bytes with 2nd Byte - * 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem - * - * Joern suggested a better "C" algorithm which is great since - * (1) It is portable to any architecture - * (2) At the same time it takes advantage of ARC ISA (rotate intrns) - */ - -#define __arch_swab32(x) \ -({ unsigned long __in = (x), __tmp; \ - __tmp = __in << 8 | __in >> 24; /* ror tmp,in,24 */ \ - __in = __in << 24 | __in >> 8; /* ror in,in,8 */ \ - __tmp ^= __in; \ - __tmp &= 0xff00ff; \ - __tmp ^ __in; \ -}) - -#elif (ARC_BSWAP_TYPE == 2) /* Custom single cycle bswap instruction */ - -#define __arch_swab32(x) \ -({ \ - unsigned int tmp = x; \ - __asm__( \ - " .extInstruction bswap, 7, 0x00, SUFFIX_NONE, SYNTAX_2OP \n"\ - " bswap %0, %1 \n"\ - : "=r" (tmp) \ - : "r" (tmp)); \ - tmp; \ -}) - -#endif /* ARC_BSWAP_TYPE=zzz */ - -#endif /* CONFIG_ARC_HAS_SWAPE */ - #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) #define __SWAB_64_THRU_32__ #endif |