diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2025-09-15 22:07:20 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-09-15 22:07:36 +0200 |
| commit | 2f5049f049a4784dc92972fd43f1ecf2ac12a69b (patch) | |
| tree | 0de8bf1b01e331a590ec80bc42951ee54497eddf /arch/arm/boot/dts | |
| parent | a409fac1f74bae095605fda86d8f7083aa5b35a6 (diff) | |
| parent | 53c18dc078bb6d9e9dfe2cc0671ab78588c44723 (diff) | |
Merge tag 'stm32-dt-for-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.18, round 1
Highlights:
----------
- MPU:
- STM32MP13:
- Add missing Ethernet1/2 PTP reference clocks.
- Add Hardware debug port (HDP).
- STMP32MP15:
- Add resets property to m_can nodes.
- Add Hardware debug port (HDP) and enable it on stm32mp157c-dk2
board.
- Reserve leds for CM4 on stm32mp15xx-ed1 and stm32mp15xx-dkx.
- stm32mp151c-plyaqm:
Use correct dai-format property.
- STM32MP23:
- Add Ethernet1 MAC controller on stm32mp235f-dk board:
It is connected to a RTL8211F-CG phy through RGMII.
- Fix GPIO bank definition & memory size (DDR).
- STM32MP25:
- Add Ethernet1 MAC controller on stm32mp257f-dk board.
It is connected to a RTL8211F-CG phy through RGMII.
- Add Ethernet1 MAC controller on stm32mp257f-ev1 board.
It is connected to a RTL8211F-CG phy through RGMII.
- Add display support by enabling the following IPs on
stm32mp257f-ev1:
* LTDC
* LVDS
* WSVGA LVDS panel (1024x600)
* Panel LVDS backlight as GPIO backlight
* ILI2511 i2c touchscreen
- Add PCIe Root complex and Endpoint support on stm32mp257f-ev1.
Root complex mode is used by default.
* tag 'stm32-dt-for-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (30 commits)
arm64: dts: st: fix memory region size on stm32mp235f-dk
arm64: dts: st: remove gpioj and gpiok banks from stm32mp231
arm64: dts: st: enable ethernet1 controller on stm32mp235f-dk
arm64: dts: st: enable ethernet1 controller on stm32mp257f-ev1
arm64: dts: st: enable ethernet1 controller on stm32mp257f-dk
arm64: dts: st: add eth1 pins for stm32mp2x platforms
ARM: dts: stm32: add missing PTP reference clocks on stm32mp13x SoCs
arm64: dts: st: enable display support on stm32mp257f-ev1 board
arm64: dts: st: add clock-cells to syscfg node on stm32mp251
arm64: dts: st: add lvds support on stm32mp255
arm64: dts: st: add ltdc support on stm32mp255
arm64: dts: st: add ltdc support on stm32mp251
ARM: dts: stm32: add resets property to m_can nodes in the stm32mp153
dt-binding: can: m_can: add optional resets property
arm64: dts: st: Enable PCIe on the stm32mp257f-ev1 board
arm64: dts: st: Add PCIe Endpoint mode on stm32mp251
arm64: dts: st: Add PCIe Root Complex mode on stm32mp251
arm64: dts: st: add PCIe pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: defconfig: Enable STMicroelectronics STM32 DMA3 support
ARM: dts: stm32: add Hardware debug port (HDP) on stm32mp157c-dk2 board
...
Link: https://lore.kernel.org/r/13153fc2-1abe-4d53-807a-5d289981a63d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp131.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp133.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 39 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp151.dtsi | 7 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp153.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157c-ed1.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157f-dk2.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 2 |
15 files changed, 73 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index ace9495b9b06..fd730aa37c22 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -954,6 +954,13 @@ status = "disabled"; }; + hdp: pinctrl@5002a000 { + compatible = "st,stm32mp131-hdp"; + reg = <0x5002a000 0x400>; + clocks = <&rcc HDP>; + status = "disabled"; + }; + mdma: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; @@ -1602,11 +1609,13 @@ "mac-clk-tx", "mac-clk-rx", "ethstp", + "ptp_ref", "eth-ck"; clocks = <&rcc ETH1MAC>, <&rcc ETH1TX>, <&rcc ETH1RX>, <&rcc ETH1STP>, + <&rcc ETH1PTP_K>, <&rcc ETH1CK_K>; st,syscon = <&syscfg 0x4 0xff0000>; snps,mixed-burst; diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi index 49583137b597..053fc6691205 100644 --- a/arch/arm/boot/dts/st/stm32mp133.dtsi +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi @@ -81,11 +81,13 @@ "mac-clk-tx", "mac-clk-rx", "ethstp", + "ptp_ref", "eth-ck"; clocks = <&rcc ETH2MAC>, <&rcc ETH2TX>, <&rcc ETH2RX>, <&rcc ETH2STP>, + <&rcc ETH2PTP_K>, <&rcc ETH2CK_K>; st,syscon = <&syscfg 0x4 0xff000000>; snps,mixed-burst; diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 40605ea85ee1..8613a6a17ee9 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -5,6 +5,14 @@ */ #include <dt-bindings/pinctrl/stm32-pinfunc.h> +&hdp { + /omit-if-no-ref/ + hdp2_gpo: hdp2-pins { + function = "gpoval2"; + pins = "HDP2"; + }; +}; + &pinctrl { /omit-if-no-ref/ adc1_ain_pins_a: adc1-ain-0 { @@ -732,6 +740,23 @@ }; /omit-if-no-ref/ + hdp2_pins_a: hdp2-0 { + pins { + pinmux = <STM32_PINMUX('E', 13, AF0)>; /* HDP2 */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + /omit-if-no-ref/ + hdp2_sleep_pins_a: hdp2-sleep-0 { + pins { + pinmux = <STM32_PINMUX('E', 13, ANALOG)>; /* HDP2 */ + }; + }; + + /omit-if-no-ref/ i2c1_pins_a: i2c1-0 { pins { pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ @@ -1305,6 +1330,20 @@ }; /omit-if-no-ref/ + m4_leds_orange_pins_a: m4-leds-orange-0 { + pins { + pinmux = <STM32_PINMUX('H', 7, RSVD)>; + }; + }; + + /omit-if-no-ref/ + m4_leds_orange_pins_b: m4-leds-orange-1 { + pins { + pinmux = <STM32_PINMUX('D', 8, RSVD)>; + }; + }; + + /omit-if-no-ref/ mco1_pins_a: mco1-0 { pins { pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */ diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 0daa8ffe2ff5..b1b568dfd126 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -270,6 +270,13 @@ status = "disabled"; }; + hdp: pinctrl@5002a000 { + compatible = "st,stm32mp151-hdp"; + reg = <0x5002a000 0x400>; + clocks = <&rcc HDP>; + status = "disabled"; + }; + mdma1: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; diff --git a/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts b/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts index 39a3211c6133..5d219a448763 100644 --- a/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts +++ b/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts @@ -239,7 +239,7 @@ i2s1_port: port { i2s1_endpoint: endpoint { - format = "i2s"; + dai-format = "i2s"; mclk-fs = <256>; remote-endpoint = <&codec_endpoint>; }; @@ -255,7 +255,7 @@ /delete-property/ st,syscfg-holdboot; resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; - reset-names = "mcu_rst", "hold_boot"; + reset-names = "mcu_rst", "hold_boot"; }; &mdma1 { diff --git a/arch/arm/boot/dts/st/stm32mp153.dtsi b/arch/arm/boot/dts/st/stm32mp153.dtsi index 4640dafb1598..92794b942ab2 100644 --- a/arch/arm/boot/dts/st/stm32mp153.dtsi +++ b/arch/arm/boot/dts/st/stm32mp153.dtsi @@ -40,6 +40,7 @@ interrupt-names = "int0", "int1"; clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; clock-names = "hclk", "cclk"; + resets = <&rcc FDCAN_R>; bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; access-controllers = <&etzpc 62>; status = "disabled"; @@ -54,6 +55,7 @@ interrupt-names = "int0", "int1"; clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; clock-names = "hclk", "cclk"; + resets = <&rcc FDCAN_R>; bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; access-controllers = <&etzpc 62>; status = "disabled"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 1b34fbe10b4f..1ec3b8f2faa9 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -45,7 +45,6 @@ reg = <0>; reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; power-supply = <&v3v3>; - status = "okay"; port { panel_in: endpoint { @@ -63,6 +62,12 @@ remote-endpoint = <&panel_in>; }; +&hdp { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hdp2_gpo &hdp2_pins_a>; + pinctrl-1 = <&hdp2_sleep_pins_a>; +}; + &i2c1 { touchscreen@38 { compatible = "focaltech,ft6236"; @@ -71,7 +76,6 @@ interrupt-parent = <&gpiof>; touchscreen-size-x = <480>; touchscreen-size-y = <800>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts index 9cf5ed111b52..f6c478dbd041 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts @@ -328,6 +328,8 @@ <&vdev0vring1>, <&vdev0buffer>; mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; mbox-names = "vq0", "vq1", "shutdown", "detach"; + pinctrl-names = "default"; + pinctrl-0 = <&m4_leds_orange_pins_b>; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts b/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts index ac42d462d449..2531f4bc8ca4 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts @@ -92,7 +92,7 @@ leds: leds { compatible = "gpio-leds"; - led0{ + led0 { label = "buzzer"; gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>; default-state = "off"; diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts index 43375c4d62a3..8fa61e54d026 100644 --- a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts @@ -51,7 +51,6 @@ reg = <0>; reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; power-supply = <&scmi_v3v3>; - status = "okay"; port { panel_in: endpoint { @@ -77,7 +76,6 @@ interrupt-parent = <&gpiof>; touchscreen-size-x = <480>; touchscreen-size-y = <800>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi index be0c355d3105..154698f87b0e 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -262,7 +262,7 @@ baseboard_eeprom: &sip_eeprom { status = "okay"; usbhub: usbhub@2c { - compatible ="microchip,usb2514b"; + compatible = "microchip,usb2514b"; reg = <0x2c>; vdd-supply = <&v3v3>; reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi index abe2dfe70636..52c4e69597a4 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi @@ -62,7 +62,6 @@ pinctrl-0 = <&i2c2_pins_a>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; - status = "okay"; /* spare dmas for other usage */ /delete-property/dmas; /delete-property/dma-names; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi index 0fb4e55843b9..5c77202ee196 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi @@ -20,7 +20,6 @@ default-brightness-level = <8>; enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>; power-supply = <®_panel_bl>; - status = "okay"; }; gpio-keys-polled { @@ -135,7 +134,6 @@ "MIC_IN", "Microphone Jack", "Microphone Jack", "Mic Bias"; dais = <&sai2a_port &sai2b_port>; - status = "okay"; }; }; @@ -150,7 +148,6 @@ pinctrl-0 = <&i2c2_pins_a>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; - status = "okay"; /* spare dmas for other usage */ /delete-property/dmas; /delete-property/dma-names; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi index 142d4a8731f8..4cc633683c6b 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi @@ -269,7 +269,6 @@ interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; - status = "okay"; regulators { compatible = "st,stpmic1-regulators"; @@ -388,7 +387,6 @@ interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; interrupt-names = "onkey-falling", "onkey-rising"; power-off-time-sec = <10>; - status = "okay"; }; watchdog { diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi index 46692d8f566a..8cea6facd27b 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi @@ -479,6 +479,8 @@ <&vdev0vring1>, <&vdev0buffer>; mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; mbox-names = "vq0", "vq1", "shutdown", "detach"; + pinctrl-names = "default"; + pinctrl-0 = <&m4_leds_orange_pins_a>; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; |
