diff options
| author | Sherry Sun <sherry.sun@nxp.com> | 2026-04-22 17:35:43 +0800 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-06-01 11:12:40 -0400 |
| commit | f96840444d86b3834f0b1a306d7f8a597fdcabd8 (patch) | |
| tree | ce901ffb62f631f3dfe549ddb3f70527719c45ad /arch/arm/boot/dts | |
| parent | 9dc39532172cbbc9e4fd5ef4e955b84ed5d96402 (diff) | |
ARM: dts: imx6sx: Add Root Port node and PERST property
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi index 3e238d8118fa..338de4d144b2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi @@ -282,11 +282,16 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; + /* This property is deprecated, use reset-gpios from the Root Port node. */ reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie_gpio>; status = "okay"; }; +&pcie_port0 { + reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; +}; + &lcdif1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index 1426f357d474..d42363cb5105 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1470,6 +1470,17 @@ power-domains = <&pd_disp>, <&pd_pci>; power-domain-names = "pcie", "pcie_phy"; status = "disabled"; + + pcie_port0: pcie@0 { + compatible = "pciclass,0604"; + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; }; }; |